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authorMaxim Levitsky <maximlevitsky@gmail.com>2010-07-31 10:59:26 -0400
committerMauro Carvalho Chehab <mchehab@redhat.com>2010-08-08 22:43:00 -0400
commit931e39a13924f528754f07555689f77588e97763 (patch)
treebafac7e61db751e365a40af225eea91b74782528 /drivers/media/IR/ene_ir.h
parent9ea53b74df9c4681f5bb2da6b2e10e37d87ea6d6 (diff)
V4L/DVB: IR: Port ene driver to new IR subsystem and enable it
Signed-off-by: Maxim Levitsky <maximlevitsky@gmail.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
Diffstat (limited to 'drivers/media/IR/ene_ir.h')
-rw-r--r--drivers/media/IR/ene_ir.h49
1 files changed, 22 insertions, 27 deletions
diff --git a/drivers/media/IR/ene_ir.h b/drivers/media/IR/ene_ir.h
index b464a680d8ae..54c76af0d033 100644
--- a/drivers/media/IR/ene_ir.h
+++ b/drivers/media/IR/ene_ir.h
@@ -1,5 +1,5 @@
1/* 1/*
2 * driver for ENE KB3926 B/C/D CIR (also known as ENE0100/ENE0200/ENE0201) 2 * driver for ENE KB3926 B/C/D CIR (also known as ENE0XXX)
3 * 3 *
4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com> 4 * Copyright (C) 2010 Maxim Levitsky <maximlevitsky@gmail.com>
5 * 5 *
@@ -19,8 +19,7 @@
19 * USA 19 * USA
20 */ 20 */
21#include <linux/spinlock.h> 21#include <linux/spinlock.h>
22#include <media/lirc.h> 22
23#include <media/lirc_dev.h>
24 23
25/* hardware address */ 24/* hardware address */
26#define ENE_STATUS 0 /* hardware status - unused */ 25#define ENE_STATUS 0 /* hardware status - unused */
@@ -88,7 +87,7 @@
88#define ENE_CIR_CONF1 0xFEC0 87#define ENE_CIR_CONF1 0xFEC0
89#define ENE_CIR_CONF1_TX_CLEAR 0x01 /* clear that on revC */ 88#define ENE_CIR_CONF1_TX_CLEAR 0x01 /* clear that on revC */
90 /* while transmitting */ 89 /* while transmitting */
91#define ENE_CIR_CONF1_RX_ON 0x07 /* normal reciever enabled */ 90#define ENE_CIR_CONF1_RX_ON 0x07 /* normal receiver enabled */
92#define ENE_CIR_CONF1_LEARN1 0x08 /* enabled on learning mode */ 91#define ENE_CIR_CONF1_LEARN1 0x08 /* enabled on learning mode */
93#define ENE_CIR_CONF1_TX_ON 0x30 /* enabled on transmit */ 92#define ENE_CIR_CONF1_TX_ON 0x30 /* enabled on transmit */
94#define ENE_CIR_CONF1_TX_CARR 0x80 /* send TX carrier or not */ 93#define ENE_CIR_CONF1_TX_CARR 0x80 /* send TX carrier or not */
@@ -112,7 +111,7 @@
112/* Unknown TX setting - TX sample period ??? */ 111/* Unknown TX setting - TX sample period ??? */
113#define ENE_TX_UNK1 0xFECB /* set to 0x63 */ 112#define ENE_TX_UNK1 0xFECB /* set to 0x63 */
114 113
115/* Current recieved carrier period */ 114/* Current received carrier period */
116#define ENE_RX_CARRIER 0xFECC /* RX period (500 ns) */ 115#define ENE_RX_CARRIER 0xFECC /* RX period (500 ns) */
117#define ENE_RX_CARRIER_VALID 0x80 /* Register content valid */ 116#define ENE_RX_CARRIER_VALID 0x80 /* Register content valid */
118 117
@@ -124,6 +123,9 @@
124 123
125/* Hardware versions */ 124/* Hardware versions */
126#define ENE_HW_VERSION 0xFF00 /* hardware revision */ 125#define ENE_HW_VERSION 0xFF00 /* hardware revision */
126#define ENE_PLLFRH 0xFF16
127#define ENE_PLLFRL 0xFF17
128
127#define ENE_HW_UNK 0xFF1D 129#define ENE_HW_UNK 0xFF1D
128#define ENE_HW_UNK_CLR 0x04 130#define ENE_HW_UNK_CLR 0x04
129#define ENE_HW_VER_MAJOR 0xFF1E /* chip version */ 131#define ENE_HW_VER_MAJOR 0xFF1E /* chip version */
@@ -162,8 +164,7 @@
162 164
163/******************************************************************************/ 165/******************************************************************************/
164 166
165#define ENE_DRIVER_NAME "enecir" 167#define ENE_DRIVER_NAME "ene_ir"
166#define ENE_TXBUF_SIZE (500 * sizeof(int)) /* 500 samples (arbitary) */
167 168
168#define ENE_IRQ_RX 1 169#define ENE_IRQ_RX 1
169#define ENE_IRQ_TX 2 170#define ENE_IRQ_TX 2
@@ -188,7 +189,8 @@
188 189
189struct ene_device { 190struct ene_device {
190 struct pnp_dev *pnp_dev; 191 struct pnp_dev *pnp_dev;
191 struct lirc_driver *lirc_driver; 192 struct input_dev *idev;
193 struct ir_dev_props *props;
192 int in_use; 194 int in_use;
193 195
194 /* hw IO settings */ 196 /* hw IO settings */
@@ -198,43 +200,36 @@ struct ene_device {
198 200
199 /* HW features */ 201 /* HW features */
200 int hw_revision; /* hardware revision */ 202 int hw_revision; /* hardware revision */
201 int hw_learning_and_tx_capable; /* learning capable */ 203 bool hw_learning_and_tx_capable; /* learning capable */
202 int hw_gpio40_learning; /* gpio40 is learning */ 204 bool hw_gpio40_learning; /* gpio40 is learning */
203 int hw_fan_as_normal_input; /* fan input is used as */ 205 bool hw_fan_as_normal_input; /* fan input is used as */
204 /* regular input */ 206 /* regular input */
205 /* HW state*/ 207 /* HW state*/
206 int rx_pointer; /* hw pointer to rx buffer */ 208 int rx_pointer; /* hw pointer to rx buffer */
207 int rx_fan_input_inuse; /* is fan input in use for rx*/ 209 bool rx_fan_input_inuse; /* is fan input in use for rx*/
208 int tx_reg; /* current reg used for TX */ 210 int tx_reg; /* current reg used for TX */
209 u8 saved_conf1; /* saved FEC0 reg */ 211 u8 saved_conf1; /* saved FEC0 reg */
210 int learning_enabled; /* learning input enabled */
211
212 /* RX sample handling */
213 int rx_sample; /* current recieved sample */
214 int rx_sample_pulse; /* recieved sample is pulse */
215 int rx_idle; /* idle mode for RX activated */
216 struct timeval rx_gap_start; /* time of start of idle */
217 int rx_timeout; /* time in ms of RX timeout */
218 int rx_send_timeout_packet; /* do we send RX timeout */
219 int rx_timeout_sent; /* we sent the timeout packet */
220 int rx_carrier_sense; /* sense carrier */
221 212
222 /* TX sample handling */ 213 /* TX sample handling */
223 unsigned int tx_sample; /* current sample for TX */ 214 unsigned int tx_sample; /* current sample for TX */
224 int tx_sample_pulse; /* current sample is pulse */ 215 bool tx_sample_pulse; /* current sample is pulse */
225 216
226 /* TX buffer */ 217 /* TX buffer */
227 int tx_buffer[ENE_TXBUF_SIZE]; /* input samples buffer*/ 218 int *tx_buffer; /* input samples buffer*/
228 int tx_pos; /* position in that bufer */ 219 int tx_pos; /* position in that bufer */
229 int tx_len; /* current len of tx buffer */ 220 int tx_len; /* current len of tx buffer */
230 int tx_underway; /* TX is under way*/
231 int tx_done; /* done transmitting */ 221 int tx_done; /* done transmitting */
232 /* one more sample pending*/ 222 /* one more sample pending*/
233 struct completion tx_complete; /* TX completion */ 223 struct completion tx_complete; /* TX completion */
234 struct timer_list tx_sim_timer; 224 struct timer_list tx_sim_timer;
235 225
236 /*TX settings */ 226 /* TX settings */
237 int tx_period; 227 int tx_period;
238 int tx_duty_cycle; 228 int tx_duty_cycle;
239 int transmitter_mask; 229 int transmitter_mask;
230
231 /* RX settings */
232 bool learning_enabled; /* learning input enabled */
233 bool carrier_detect_enabled; /* carrier detect enabled */
234 int rx_period_adjust;
240}; 235};