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authorDan Williams <dan.j.williams@intel.com>2007-01-02 13:10:44 -0500
committerDan Williams <dan.j.williams@intel.com>2007-07-13 11:06:14 -0400
commit9bc89cd82d6f88fb0ca39b30445c329a430fd66b (patch)
tree7bd0e856abd359f84edea1bacfd1dd32edd93fbb /drivers/md/raid5.c
parent685784aaf3cd0e3ff5e36c7ecf6f441cdbf57f73 (diff)
async_tx: add the async_tx api
The async_tx api provides methods for describing a chain of asynchronous bulk memory transfers/transforms with support for inter-transactional dependencies. It is implemented as a dmaengine client that smooths over the details of different hardware offload engine implementations. Code that is written to the api can optimize for asynchronous operation and the api will fit the chain of operations to the available offload resources. I imagine that any piece of ADMA hardware would register with the 'async_*' subsystem, and a call to async_X would be routed as appropriate, or be run in-line. - Neil Brown async_tx exploits the capabilities of struct dma_async_tx_descriptor to provide an api of the following general format: struct dma_async_tx_descriptor * async_<operation>(..., struct dma_async_tx_descriptor *depend_tx, dma_async_tx_callback cb_fn, void *cb_param) { struct dma_chan *chan = async_tx_find_channel(depend_tx, <operation>); struct dma_device *device = chan ? chan->device : NULL; int int_en = cb_fn ? 1 : 0; struct dma_async_tx_descriptor *tx = device ? device->device_prep_dma_<operation>(chan, len, int_en) : NULL; if (tx) { /* run <operation> asynchronously */ ... tx->tx_set_dest(addr, tx, index); ... tx->tx_set_src(addr, tx, index); ... async_tx_submit(chan, tx, flags, depend_tx, cb_fn, cb_param); } else { /* run <operation> synchronously */ ... <operation> ... async_tx_sync_epilog(flags, depend_tx, cb_fn, cb_param); } return tx; } async_tx_find_channel() returns a capable channel from its pool. The channel pool is organized as a per-cpu array of channel pointers. The async_tx_rebalance() routine is tasked with managing these arrays. In the uniprocessor case async_tx_rebalance() tries to spread responsibility evenly over channels of similar capabilities. For example if there are two copy+xor channels, one will handle copy operations and the other will handle xor. In the SMP case async_tx_rebalance() attempts to spread the operations evenly over the cpus, e.g. cpu0 gets copy channel0 and xor channel0 while cpu1 gets copy channel 1 and xor channel 1. When a dependency is specified async_tx_find_channel defaults to keeping the operation on the same channel. A xor->copy->xor chain will stay on one channel if it supports both operation types, otherwise the transaction will transition between a copy and a xor resource. Currently the raid5 implementation in the MD raid456 driver has been converted to the async_tx api. A driver for the offload engines on the Intel Xscale series of I/O processors, iop-adma, is provided in a later commit. With the iop-adma driver and async_tx, raid456 is able to offload copy, xor, and xor-zero-sum operations to hardware engines. On iop342 tiobench showed higher throughput for sequential writes (20 - 30% improvement) and sequential reads to a degraded array (40 - 55% improvement). For the other cases performance was roughly equal, +/- a few percentage points. On a x86-smp platform the performance of the async_tx implementation (in synchronous mode) was also +/- a few percentage points of the original implementation. According to 'top' on iop342 CPU utilization drops from ~50% to ~15% during a 'resync' while the speed according to /proc/mdstat doubles from ~25 MB/s to ~50 MB/s. The tiobench command line used for testing was: tiobench --size 2048 --block 4096 --block 131072 --dir /mnt/raid --numruns 5 * iop342 had 1GB of memory available Details: * if CONFIG_DMA_ENGINE=n the asynchronous path is compiled away by making async_tx_find_channel a static inline routine that always returns NULL * when a callback is specified for a given transaction an interrupt will fire at operation completion time and the callback will occur in a tasklet. if the the channel does not support interrupts then a live polling wait will be performed * the api is written as a dmaengine client that requests all available channels * In support of dependencies the api implicitly schedules channel-switch interrupts. The interrupt triggers the cleanup tasklet which causes pending operations to be scheduled on the next channel * Xor engines treat an xor destination address differently than a software xor routine. To the software routine the destination address is an implied source, whereas engines treat it as a write-only destination. This patch modifies the xor_blocks routine to take a an explicit destination address to mirror the hardware. Changelog: * fixed a leftover debug print * don't allow callbacks in async_interrupt_cond * fixed xor_block changes * fixed usage of ASYNC_TX_XOR_DROP_DEST * drop dma mapping methods, suggested by Chris Leech * printk warning fixups from Andrew Morton * don't use inline in C files, Adrian Bunk * select the API when MD is enabled * BUG_ON xor source counts <= 1 * implicitly handle hardware concerns like channel switching and interrupts, Neil Brown * remove the per operation type list, and distribute operation capabilities evenly amongst the available channels * simplify async_tx_find_channel to optimize the fast path * introduce the channel_table_initialized flag to prevent early calls to the api * reorganize the code to mimic crypto * include mm.h as not all archs include it in dma-mapping.h * make the Kconfig options non-user visible, Adrian Bunk * move async_tx under crypto since it is meant as 'core' functionality, and the two may share algorithms in the future * move large inline functions into c files * checkpatch.pl fixes * gpl v2 only correction Cc: Herbert Xu <herbert@gondor.apana.org.au> Signed-off-by: Dan Williams <dan.j.williams@intel.com> Acked-By: NeilBrown <neilb@suse.de>
Diffstat (limited to 'drivers/md/raid5.c')
-rw-r--r--drivers/md/raid5.c54
1 files changed, 27 insertions, 27 deletions
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index 5adbe0b22684..4f51dfa8e487 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -916,25 +916,25 @@ static void copy_data(int frombio, struct bio *bio,
916 } 916 }
917} 917}
918 918
919#define check_xor() do { \ 919#define check_xor() do { \
920 if (count == MAX_XOR_BLOCKS) { \ 920 if (count == MAX_XOR_BLOCKS) { \
921 xor_blocks(count, STRIPE_SIZE, ptr); \ 921 xor_blocks(count, STRIPE_SIZE, dest, ptr);\
922 count = 1; \ 922 count = 0; \
923 } \ 923 } \
924 } while(0) 924 } while(0)
925 925
926 926
927static void compute_block(struct stripe_head *sh, int dd_idx) 927static void compute_block(struct stripe_head *sh, int dd_idx)
928{ 928{
929 int i, count, disks = sh->disks; 929 int i, count, disks = sh->disks;
930 void *ptr[MAX_XOR_BLOCKS], *p; 930 void *ptr[MAX_XOR_BLOCKS], *dest, *p;
931 931
932 PRINTK("compute_block, stripe %llu, idx %d\n", 932 PRINTK("compute_block, stripe %llu, idx %d\n",
933 (unsigned long long)sh->sector, dd_idx); 933 (unsigned long long)sh->sector, dd_idx);
934 934
935 ptr[0] = page_address(sh->dev[dd_idx].page); 935 dest = page_address(sh->dev[dd_idx].page);
936 memset(ptr[0], 0, STRIPE_SIZE); 936 memset(dest, 0, STRIPE_SIZE);
937 count = 1; 937 count = 0;
938 for (i = disks ; i--; ) { 938 for (i = disks ; i--; ) {
939 if (i == dd_idx) 939 if (i == dd_idx)
940 continue; 940 continue;
@@ -948,8 +948,8 @@ static void compute_block(struct stripe_head *sh, int dd_idx)
948 948
949 check_xor(); 949 check_xor();
950 } 950 }
951 if (count != 1) 951 if (count)
952 xor_blocks(count, STRIPE_SIZE, ptr); 952 xor_blocks(count, STRIPE_SIZE, dest, ptr);
953 set_bit(R5_UPTODATE, &sh->dev[dd_idx].flags); 953 set_bit(R5_UPTODATE, &sh->dev[dd_idx].flags);
954} 954}
955 955
@@ -957,14 +957,14 @@ static void compute_parity5(struct stripe_head *sh, int method)
957{ 957{
958 raid5_conf_t *conf = sh->raid_conf; 958 raid5_conf_t *conf = sh->raid_conf;
959 int i, pd_idx = sh->pd_idx, disks = sh->disks, count; 959 int i, pd_idx = sh->pd_idx, disks = sh->disks, count;
960 void *ptr[MAX_XOR_BLOCKS]; 960 void *ptr[MAX_XOR_BLOCKS], *dest;
961 struct bio *chosen; 961 struct bio *chosen;
962 962
963 PRINTK("compute_parity5, stripe %llu, method %d\n", 963 PRINTK("compute_parity5, stripe %llu, method %d\n",
964 (unsigned long long)sh->sector, method); 964 (unsigned long long)sh->sector, method);
965 965
966 count = 1; 966 count = 0;
967 ptr[0] = page_address(sh->dev[pd_idx].page); 967 dest = page_address(sh->dev[pd_idx].page);
968 switch(method) { 968 switch(method) {
969 case READ_MODIFY_WRITE: 969 case READ_MODIFY_WRITE:
970 BUG_ON(!test_bit(R5_UPTODATE, &sh->dev[pd_idx].flags)); 970 BUG_ON(!test_bit(R5_UPTODATE, &sh->dev[pd_idx].flags));
@@ -987,7 +987,7 @@ static void compute_parity5(struct stripe_head *sh, int method)
987 } 987 }
988 break; 988 break;
989 case RECONSTRUCT_WRITE: 989 case RECONSTRUCT_WRITE:
990 memset(ptr[0], 0, STRIPE_SIZE); 990 memset(dest, 0, STRIPE_SIZE);
991 for (i= disks; i-- ;) 991 for (i= disks; i-- ;)
992 if (i!=pd_idx && sh->dev[i].towrite) { 992 if (i!=pd_idx && sh->dev[i].towrite) {
993 chosen = sh->dev[i].towrite; 993 chosen = sh->dev[i].towrite;
@@ -1003,9 +1003,9 @@ static void compute_parity5(struct stripe_head *sh, int method)
1003 case CHECK_PARITY: 1003 case CHECK_PARITY:
1004 break; 1004 break;
1005 } 1005 }
1006 if (count>1) { 1006 if (count) {
1007 xor_blocks(count, STRIPE_SIZE, ptr); 1007 xor_blocks(count, STRIPE_SIZE, dest, ptr);
1008 count = 1; 1008 count = 0;
1009 } 1009 }
1010 1010
1011 for (i = disks; i--;) 1011 for (i = disks; i--;)
@@ -1037,9 +1037,9 @@ static void compute_parity5(struct stripe_head *sh, int method)
1037 check_xor(); 1037 check_xor();
1038 } 1038 }
1039 } 1039 }
1040 if (count != 1) 1040 if (count)
1041 xor_blocks(count, STRIPE_SIZE, ptr); 1041 xor_blocks(count, STRIPE_SIZE, dest, ptr);
1042 1042
1043 if (method != CHECK_PARITY) { 1043 if (method != CHECK_PARITY) {
1044 set_bit(R5_UPTODATE, &sh->dev[pd_idx].flags); 1044 set_bit(R5_UPTODATE, &sh->dev[pd_idx].flags);
1045 set_bit(R5_LOCKED, &sh->dev[pd_idx].flags); 1045 set_bit(R5_LOCKED, &sh->dev[pd_idx].flags);
@@ -1132,7 +1132,7 @@ static void compute_parity6(struct stripe_head *sh, int method)
1132static void compute_block_1(struct stripe_head *sh, int dd_idx, int nozero) 1132static void compute_block_1(struct stripe_head *sh, int dd_idx, int nozero)
1133{ 1133{
1134 int i, count, disks = sh->disks; 1134 int i, count, disks = sh->disks;
1135 void *ptr[MAX_XOR_BLOCKS], *p; 1135 void *ptr[MAX_XOR_BLOCKS], *dest, *p;
1136 int pd_idx = sh->pd_idx; 1136 int pd_idx = sh->pd_idx;
1137 int qd_idx = raid6_next_disk(pd_idx, disks); 1137 int qd_idx = raid6_next_disk(pd_idx, disks);
1138 1138
@@ -1143,9 +1143,9 @@ static void compute_block_1(struct stripe_head *sh, int dd_idx, int nozero)
1143 /* We're actually computing the Q drive */ 1143 /* We're actually computing the Q drive */
1144 compute_parity6(sh, UPDATE_PARITY); 1144 compute_parity6(sh, UPDATE_PARITY);
1145 } else { 1145 } else {
1146 ptr[0] = page_address(sh->dev[dd_idx].page); 1146 dest = page_address(sh->dev[dd_idx].page);
1147 if (!nozero) memset(ptr[0], 0, STRIPE_SIZE); 1147 if (!nozero) memset(dest, 0, STRIPE_SIZE);
1148 count = 1; 1148 count = 0;
1149 for (i = disks ; i--; ) { 1149 for (i = disks ; i--; ) {
1150 if (i == dd_idx || i == qd_idx) 1150 if (i == dd_idx || i == qd_idx)
1151 continue; 1151 continue;
@@ -1159,8 +1159,8 @@ static void compute_block_1(struct stripe_head *sh, int dd_idx, int nozero)
1159 1159
1160 check_xor(); 1160 check_xor();
1161 } 1161 }
1162 if (count != 1) 1162 if (count)
1163 xor_blocks(count, STRIPE_SIZE, ptr); 1163 xor_blocks(count, STRIPE_SIZE, dest, ptr);
1164 if (!nozero) set_bit(R5_UPTODATE, &sh->dev[dd_idx].flags); 1164 if (!nozero) set_bit(R5_UPTODATE, &sh->dev[dd_idx].flags);
1165 else clear_bit(R5_UPTODATE, &sh->dev[dd_idx].flags); 1165 else clear_bit(R5_UPTODATE, &sh->dev[dd_idx].flags);
1166 } 1166 }