diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/macintosh/via-pmu.c |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/macintosh/via-pmu.c')
-rw-r--r-- | drivers/macintosh/via-pmu.c | 3147 |
1 files changed, 3147 insertions, 0 deletions
diff --git a/drivers/macintosh/via-pmu.c b/drivers/macintosh/via-pmu.c new file mode 100644 index 000000000000..cea1e758eb46 --- /dev/null +++ b/drivers/macintosh/via-pmu.c | |||
@@ -0,0 +1,3147 @@ | |||
1 | /* | ||
2 | * Device driver for the via-pmu on Apple Powermacs. | ||
3 | * | ||
4 | * The VIA (versatile interface adapter) interfaces to the PMU, | ||
5 | * a 6805 microprocessor core whose primary function is to control | ||
6 | * battery charging and system power on the PowerBook 3400 and 2400. | ||
7 | * The PMU also controls the ADB (Apple Desktop Bus) which connects | ||
8 | * to the keyboard and mouse, as well as the non-volatile RAM | ||
9 | * and the RTC (real time clock) chip. | ||
10 | * | ||
11 | * Copyright (C) 1998 Paul Mackerras and Fabio Riccardi. | ||
12 | * Copyright (C) 2001-2002 Benjamin Herrenschmidt | ||
13 | * | ||
14 | * THIS DRIVER IS BECOMING A TOTAL MESS ! | ||
15 | * - Cleanup atomically disabling reply to PMU events after | ||
16 | * a sleep or a freq. switch | ||
17 | * - Move sleep code out of here to pmac_pm, merge into new | ||
18 | * common PM infrastructure | ||
19 | * - Move backlight code out as well | ||
20 | * - Save/Restore PCI space properly | ||
21 | * | ||
22 | */ | ||
23 | #include <stdarg.h> | ||
24 | #include <linux/config.h> | ||
25 | #include <linux/types.h> | ||
26 | #include <linux/errno.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/sched.h> | ||
30 | #include <linux/miscdevice.h> | ||
31 | #include <linux/blkdev.h> | ||
32 | #include <linux/pci.h> | ||
33 | #include <linux/slab.h> | ||
34 | #include <linux/poll.h> | ||
35 | #include <linux/adb.h> | ||
36 | #include <linux/pmu.h> | ||
37 | #include <linux/cuda.h> | ||
38 | #include <linux/smp_lock.h> | ||
39 | #include <linux/module.h> | ||
40 | #include <linux/spinlock.h> | ||
41 | #include <linux/pm.h> | ||
42 | #include <linux/proc_fs.h> | ||
43 | #include <linux/init.h> | ||
44 | #include <linux/interrupt.h> | ||
45 | #include <linux/device.h> | ||
46 | #include <linux/sysdev.h> | ||
47 | #include <linux/suspend.h> | ||
48 | #include <linux/syscalls.h> | ||
49 | #include <linux/cpu.h> | ||
50 | #include <asm/prom.h> | ||
51 | #include <asm/machdep.h> | ||
52 | #include <asm/io.h> | ||
53 | #include <asm/pgtable.h> | ||
54 | #include <asm/system.h> | ||
55 | #include <asm/sections.h> | ||
56 | #include <asm/irq.h> | ||
57 | #include <asm/pmac_feature.h> | ||
58 | #include <asm/uaccess.h> | ||
59 | #include <asm/mmu_context.h> | ||
60 | #include <asm/cputable.h> | ||
61 | #include <asm/time.h> | ||
62 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
63 | #include <asm/backlight.h> | ||
64 | #endif | ||
65 | |||
66 | /* Some compile options */ | ||
67 | #undef SUSPEND_USES_PMU | ||
68 | #define DEBUG_SLEEP | ||
69 | #undef HACKED_PCI_SAVE | ||
70 | |||
71 | /* Misc minor number allocated for /dev/pmu */ | ||
72 | #define PMU_MINOR 154 | ||
73 | |||
74 | /* How many iterations between battery polls */ | ||
75 | #define BATTERY_POLLING_COUNT 2 | ||
76 | |||
77 | static volatile unsigned char __iomem *via; | ||
78 | |||
79 | /* VIA registers - spaced 0x200 bytes apart */ | ||
80 | #define RS 0x200 /* skip between registers */ | ||
81 | #define B 0 /* B-side data */ | ||
82 | #define A RS /* A-side data */ | ||
83 | #define DIRB (2*RS) /* B-side direction (1=output) */ | ||
84 | #define DIRA (3*RS) /* A-side direction (1=output) */ | ||
85 | #define T1CL (4*RS) /* Timer 1 ctr/latch (low 8 bits) */ | ||
86 | #define T1CH (5*RS) /* Timer 1 counter (high 8 bits) */ | ||
87 | #define T1LL (6*RS) /* Timer 1 latch (low 8 bits) */ | ||
88 | #define T1LH (7*RS) /* Timer 1 latch (high 8 bits) */ | ||
89 | #define T2CL (8*RS) /* Timer 2 ctr/latch (low 8 bits) */ | ||
90 | #define T2CH (9*RS) /* Timer 2 counter (high 8 bits) */ | ||
91 | #define SR (10*RS) /* Shift register */ | ||
92 | #define ACR (11*RS) /* Auxiliary control register */ | ||
93 | #define PCR (12*RS) /* Peripheral control register */ | ||
94 | #define IFR (13*RS) /* Interrupt flag register */ | ||
95 | #define IER (14*RS) /* Interrupt enable register */ | ||
96 | #define ANH (15*RS) /* A-side data, no handshake */ | ||
97 | |||
98 | /* Bits in B data register: both active low */ | ||
99 | #define TACK 0x08 /* Transfer acknowledge (input) */ | ||
100 | #define TREQ 0x10 /* Transfer request (output) */ | ||
101 | |||
102 | /* Bits in ACR */ | ||
103 | #define SR_CTRL 0x1c /* Shift register control bits */ | ||
104 | #define SR_EXT 0x0c /* Shift on external clock */ | ||
105 | #define SR_OUT 0x10 /* Shift out if 1 */ | ||
106 | |||
107 | /* Bits in IFR and IER */ | ||
108 | #define IER_SET 0x80 /* set bits in IER */ | ||
109 | #define IER_CLR 0 /* clear bits in IER */ | ||
110 | #define SR_INT 0x04 /* Shift register full/empty */ | ||
111 | #define CB2_INT 0x08 | ||
112 | #define CB1_INT 0x10 /* transition on CB1 input */ | ||
113 | |||
114 | static volatile enum pmu_state { | ||
115 | idle, | ||
116 | sending, | ||
117 | intack, | ||
118 | reading, | ||
119 | reading_intr, | ||
120 | locked, | ||
121 | } pmu_state; | ||
122 | |||
123 | static volatile enum int_data_state { | ||
124 | int_data_empty, | ||
125 | int_data_fill, | ||
126 | int_data_ready, | ||
127 | int_data_flush | ||
128 | } int_data_state[2] = { int_data_empty, int_data_empty }; | ||
129 | |||
130 | static struct adb_request *current_req; | ||
131 | static struct adb_request *last_req; | ||
132 | static struct adb_request *req_awaiting_reply; | ||
133 | static unsigned char interrupt_data[2][32]; | ||
134 | static int interrupt_data_len[2]; | ||
135 | static int int_data_last; | ||
136 | static unsigned char *reply_ptr; | ||
137 | static int data_index; | ||
138 | static int data_len; | ||
139 | static volatile int adb_int_pending; | ||
140 | static volatile int disable_poll; | ||
141 | static struct adb_request bright_req_1, bright_req_2; | ||
142 | static struct device_node *vias; | ||
143 | static int pmu_kind = PMU_UNKNOWN; | ||
144 | static int pmu_fully_inited = 0; | ||
145 | static int pmu_has_adb; | ||
146 | static unsigned char __iomem *gpio_reg = NULL; | ||
147 | static int gpio_irq = -1; | ||
148 | static int gpio_irq_enabled = -1; | ||
149 | static volatile int pmu_suspended = 0; | ||
150 | static spinlock_t pmu_lock; | ||
151 | static u8 pmu_intr_mask; | ||
152 | static int pmu_version; | ||
153 | static int drop_interrupts; | ||
154 | #ifdef CONFIG_PMAC_PBOOK | ||
155 | static int option_lid_wakeup = 1; | ||
156 | static int sleep_in_progress; | ||
157 | #endif /* CONFIG_PMAC_PBOOK */ | ||
158 | static unsigned long async_req_locks; | ||
159 | static unsigned int pmu_irq_stats[11]; | ||
160 | |||
161 | static struct proc_dir_entry *proc_pmu_root; | ||
162 | static struct proc_dir_entry *proc_pmu_info; | ||
163 | static struct proc_dir_entry *proc_pmu_irqstats; | ||
164 | static struct proc_dir_entry *proc_pmu_options; | ||
165 | static int option_server_mode; | ||
166 | |||
167 | #ifdef CONFIG_PMAC_PBOOK | ||
168 | int pmu_battery_count; | ||
169 | int pmu_cur_battery; | ||
170 | unsigned int pmu_power_flags; | ||
171 | struct pmu_battery_info pmu_batteries[PMU_MAX_BATTERIES]; | ||
172 | static int query_batt_timer = BATTERY_POLLING_COUNT; | ||
173 | static struct adb_request batt_req; | ||
174 | static struct proc_dir_entry *proc_pmu_batt[PMU_MAX_BATTERIES]; | ||
175 | #endif /* CONFIG_PMAC_PBOOK */ | ||
176 | |||
177 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | ||
178 | extern int disable_kernel_backlight; | ||
179 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | ||
180 | |||
181 | int __fake_sleep; | ||
182 | int asleep; | ||
183 | struct notifier_block *sleep_notifier_list; | ||
184 | |||
185 | #ifdef CONFIG_ADB | ||
186 | static int adb_dev_map = 0; | ||
187 | static int pmu_adb_flags; | ||
188 | |||
189 | static int pmu_probe(void); | ||
190 | static int pmu_init(void); | ||
191 | static int pmu_send_request(struct adb_request *req, int sync); | ||
192 | static int pmu_adb_autopoll(int devs); | ||
193 | static int pmu_adb_reset_bus(void); | ||
194 | #endif /* CONFIG_ADB */ | ||
195 | |||
196 | static int init_pmu(void); | ||
197 | static int pmu_queue_request(struct adb_request *req); | ||
198 | static void pmu_start(void); | ||
199 | static irqreturn_t via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs); | ||
200 | static irqreturn_t gpio1_interrupt(int irq, void *arg, struct pt_regs *regs); | ||
201 | static int proc_get_info(char *page, char **start, off_t off, | ||
202 | int count, int *eof, void *data); | ||
203 | static int proc_get_irqstats(char *page, char **start, off_t off, | ||
204 | int count, int *eof, void *data); | ||
205 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
206 | static int pmu_set_backlight_level(int level, void* data); | ||
207 | static int pmu_set_backlight_enable(int on, int level, void* data); | ||
208 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
209 | #ifdef CONFIG_PMAC_PBOOK | ||
210 | static void pmu_pass_intr(unsigned char *data, int len); | ||
211 | static int proc_get_batt(char *page, char **start, off_t off, | ||
212 | int count, int *eof, void *data); | ||
213 | #endif /* CONFIG_PMAC_PBOOK */ | ||
214 | static int proc_read_options(char *page, char **start, off_t off, | ||
215 | int count, int *eof, void *data); | ||
216 | static int proc_write_options(struct file *file, const char __user *buffer, | ||
217 | unsigned long count, void *data); | ||
218 | |||
219 | #ifdef CONFIG_ADB | ||
220 | struct adb_driver via_pmu_driver = { | ||
221 | "PMU", | ||
222 | pmu_probe, | ||
223 | pmu_init, | ||
224 | pmu_send_request, | ||
225 | pmu_adb_autopoll, | ||
226 | pmu_poll_adb, | ||
227 | pmu_adb_reset_bus | ||
228 | }; | ||
229 | #endif /* CONFIG_ADB */ | ||
230 | |||
231 | extern void low_sleep_handler(void); | ||
232 | extern void enable_kernel_altivec(void); | ||
233 | extern void enable_kernel_fp(void); | ||
234 | |||
235 | #ifdef DEBUG_SLEEP | ||
236 | int pmu_polled_request(struct adb_request *req); | ||
237 | int pmu_wink(struct adb_request *req); | ||
238 | #endif | ||
239 | |||
240 | /* | ||
241 | * This table indicates for each PMU opcode: | ||
242 | * - the number of data bytes to be sent with the command, or -1 | ||
243 | * if a length byte should be sent, | ||
244 | * - the number of response bytes which the PMU will return, or | ||
245 | * -1 if it will send a length byte. | ||
246 | */ | ||
247 | static const s8 pmu_data_len[256][2] __openfirmwaredata = { | ||
248 | /* 0 1 2 3 4 5 6 7 */ | ||
249 | /*00*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
250 | /*08*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
251 | /*10*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
252 | /*18*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0, 0}, | ||
253 | /*20*/ {-1, 0},{ 0, 0},{ 2, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
254 | /*28*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{ 0,-1}, | ||
255 | /*30*/ { 4, 0},{20, 0},{-1, 0},{ 3, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
256 | /*38*/ { 0, 4},{ 0,20},{ 2,-1},{ 2, 1},{ 3,-1},{-1,-1},{-1,-1},{ 4, 0}, | ||
257 | /*40*/ { 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
258 | /*48*/ { 0, 1},{ 0, 1},{-1,-1},{ 1, 0},{ 1, 0},{-1,-1},{-1,-1},{-1,-1}, | ||
259 | /*50*/ { 1, 0},{ 0, 0},{ 2, 0},{ 2, 0},{-1, 0},{ 1, 0},{ 3, 0},{ 1, 0}, | ||
260 | /*58*/ { 0, 1},{ 1, 0},{ 0, 2},{ 0, 2},{ 0,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
261 | /*60*/ { 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
262 | /*68*/ { 0, 3},{ 0, 3},{ 0, 2},{ 0, 8},{ 0,-1},{ 0,-1},{-1,-1},{-1,-1}, | ||
263 | /*70*/ { 1, 0},{ 1, 0},{ 1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
264 | /*78*/ { 0,-1},{ 0,-1},{-1,-1},{-1,-1},{-1,-1},{ 5, 1},{ 4, 1},{ 4, 1}, | ||
265 | /*80*/ { 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
266 | /*88*/ { 0, 5},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
267 | /*90*/ { 1, 0},{ 2, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
268 | /*98*/ { 0, 1},{ 0, 1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
269 | /*a0*/ { 2, 0},{ 2, 0},{ 2, 0},{ 4, 0},{-1, 0},{ 0, 0},{-1, 0},{-1, 0}, | ||
270 | /*a8*/ { 1, 1},{ 1, 0},{ 3, 0},{ 2, 0},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
271 | /*b0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
272 | /*b8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
273 | /*c0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
274 | /*c8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
275 | /*d0*/ { 0, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
276 | /*d8*/ { 1, 1},{ 1, 1},{-1,-1},{-1,-1},{ 0, 1},{ 0,-1},{-1,-1},{-1,-1}, | ||
277 | /*e0*/ {-1, 0},{ 4, 0},{ 0, 1},{-1, 0},{-1, 0},{ 4, 0},{-1, 0},{-1, 0}, | ||
278 | /*e8*/ { 3,-1},{-1,-1},{ 0, 1},{-1,-1},{ 0,-1},{-1,-1},{-1,-1},{ 0, 0}, | ||
279 | /*f0*/ {-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0},{-1, 0}, | ||
280 | /*f8*/ {-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1},{-1,-1}, | ||
281 | }; | ||
282 | |||
283 | static char *pbook_type[] = { | ||
284 | "Unknown PowerBook", | ||
285 | "PowerBook 2400/3400/3500(G3)", | ||
286 | "PowerBook G3 Series", | ||
287 | "1999 PowerBook G3", | ||
288 | "Core99" | ||
289 | }; | ||
290 | |||
291 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
292 | static struct backlight_controller pmu_backlight_controller = { | ||
293 | pmu_set_backlight_enable, | ||
294 | pmu_set_backlight_level | ||
295 | }; | ||
296 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
297 | |||
298 | int __openfirmware | ||
299 | find_via_pmu(void) | ||
300 | { | ||
301 | if (via != 0) | ||
302 | return 1; | ||
303 | vias = find_devices("via-pmu"); | ||
304 | if (vias == 0) | ||
305 | return 0; | ||
306 | if (vias->next != 0) | ||
307 | printk(KERN_WARNING "Warning: only using 1st via-pmu\n"); | ||
308 | |||
309 | if (vias->n_addrs < 1 || vias->n_intrs < 1) { | ||
310 | printk(KERN_ERR "via-pmu: %d addresses, %d interrupts!\n", | ||
311 | vias->n_addrs, vias->n_intrs); | ||
312 | if (vias->n_addrs < 1 || vias->n_intrs < 1) | ||
313 | return 0; | ||
314 | } | ||
315 | |||
316 | spin_lock_init(&pmu_lock); | ||
317 | |||
318 | pmu_has_adb = 1; | ||
319 | |||
320 | pmu_intr_mask = PMU_INT_PCEJECT | | ||
321 | PMU_INT_SNDBRT | | ||
322 | PMU_INT_ADB | | ||
323 | PMU_INT_TICK; | ||
324 | |||
325 | if (vias->parent->name && ((strcmp(vias->parent->name, "ohare") == 0) | ||
326 | || device_is_compatible(vias->parent, "ohare"))) | ||
327 | pmu_kind = PMU_OHARE_BASED; | ||
328 | else if (device_is_compatible(vias->parent, "paddington")) | ||
329 | pmu_kind = PMU_PADDINGTON_BASED; | ||
330 | else if (device_is_compatible(vias->parent, "heathrow")) | ||
331 | pmu_kind = PMU_HEATHROW_BASED; | ||
332 | else if (device_is_compatible(vias->parent, "Keylargo") | ||
333 | || device_is_compatible(vias->parent, "K2-Keylargo")) { | ||
334 | struct device_node *gpio, *gpiop; | ||
335 | |||
336 | pmu_kind = PMU_KEYLARGO_BASED; | ||
337 | pmu_has_adb = (find_type_devices("adb") != NULL); | ||
338 | pmu_intr_mask = PMU_INT_PCEJECT | | ||
339 | PMU_INT_SNDBRT | | ||
340 | PMU_INT_ADB | | ||
341 | PMU_INT_TICK | | ||
342 | PMU_INT_ENVIRONMENT; | ||
343 | |||
344 | gpiop = find_devices("gpio"); | ||
345 | if (gpiop && gpiop->n_addrs) { | ||
346 | gpio_reg = ioremap(gpiop->addrs->address, 0x10); | ||
347 | gpio = find_devices("extint-gpio1"); | ||
348 | if (gpio == NULL) | ||
349 | gpio = find_devices("pmu-interrupt"); | ||
350 | if (gpio && gpio->parent == gpiop && gpio->n_intrs) | ||
351 | gpio_irq = gpio->intrs[0].line; | ||
352 | } | ||
353 | } else | ||
354 | pmu_kind = PMU_UNKNOWN; | ||
355 | |||
356 | via = ioremap(vias->addrs->address, 0x2000); | ||
357 | |||
358 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | ||
359 | out_8(&via[IFR], 0x7f); /* clear IFR */ | ||
360 | |||
361 | pmu_state = idle; | ||
362 | |||
363 | if (!init_pmu()) { | ||
364 | via = NULL; | ||
365 | return 0; | ||
366 | } | ||
367 | |||
368 | printk(KERN_INFO "PMU driver %d initialized for %s, firmware: %02x\n", | ||
369 | PMU_DRIVER_VERSION, pbook_type[pmu_kind], pmu_version); | ||
370 | |||
371 | sys_ctrler = SYS_CTRLER_PMU; | ||
372 | |||
373 | return 1; | ||
374 | } | ||
375 | |||
376 | #ifdef CONFIG_ADB | ||
377 | static int __openfirmware | ||
378 | pmu_probe(void) | ||
379 | { | ||
380 | return vias == NULL? -ENODEV: 0; | ||
381 | } | ||
382 | |||
383 | static int __init | ||
384 | pmu_init(void) | ||
385 | { | ||
386 | if (vias == NULL) | ||
387 | return -ENODEV; | ||
388 | return 0; | ||
389 | } | ||
390 | #endif /* CONFIG_ADB */ | ||
391 | |||
392 | /* | ||
393 | * We can't wait until pmu_init gets called, that happens too late. | ||
394 | * It happens after IDE and SCSI initialization, which can take a few | ||
395 | * seconds, and by that time the PMU could have given up on us and | ||
396 | * turned us off. | ||
397 | * Thus this is called with arch_initcall rather than device_initcall. | ||
398 | */ | ||
399 | static int __init via_pmu_start(void) | ||
400 | { | ||
401 | if (vias == NULL) | ||
402 | return -ENODEV; | ||
403 | |||
404 | bright_req_1.complete = 1; | ||
405 | bright_req_2.complete = 1; | ||
406 | #ifdef CONFIG_PMAC_PBOOK | ||
407 | batt_req.complete = 1; | ||
408 | #endif | ||
409 | |||
410 | if (request_irq(vias->intrs[0].line, via_pmu_interrupt, 0, "VIA-PMU", | ||
411 | (void *)0)) { | ||
412 | printk(KERN_ERR "VIA-PMU: can't get irq %d\n", | ||
413 | vias->intrs[0].line); | ||
414 | return -EAGAIN; | ||
415 | } | ||
416 | |||
417 | if (pmu_kind == PMU_KEYLARGO_BASED && gpio_irq != -1) { | ||
418 | if (request_irq(gpio_irq, gpio1_interrupt, 0, "GPIO1 ADB", (void *)0)) | ||
419 | printk(KERN_ERR "pmu: can't get irq %d (GPIO1)\n", gpio_irq); | ||
420 | gpio_irq_enabled = 1; | ||
421 | } | ||
422 | |||
423 | /* Enable interrupts */ | ||
424 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | ||
425 | |||
426 | pmu_fully_inited = 1; | ||
427 | |||
428 | /* Make sure PMU settle down before continuing. This is _very_ important | ||
429 | * since the IDE probe may shut interrupts down for quite a bit of time. If | ||
430 | * a PMU communication is pending while this happens, the PMU may timeout | ||
431 | * Not that on Core99 machines, the PMU keeps sending us environement | ||
432 | * messages, we should find a way to either fix IDE or make it call | ||
433 | * pmu_suspend() before masking interrupts. This can also happens while | ||
434 | * scolling with some fbdevs. | ||
435 | */ | ||
436 | do { | ||
437 | pmu_poll(); | ||
438 | } while (pmu_state != idle); | ||
439 | |||
440 | return 0; | ||
441 | } | ||
442 | |||
443 | arch_initcall(via_pmu_start); | ||
444 | |||
445 | /* | ||
446 | * This has to be done after pci_init, which is a subsys_initcall. | ||
447 | */ | ||
448 | static int __init via_pmu_dev_init(void) | ||
449 | { | ||
450 | if (vias == NULL) | ||
451 | return -ENODEV; | ||
452 | |||
453 | #ifndef CONFIG_PPC64 | ||
454 | request_OF_resource(vias, 0, NULL); | ||
455 | #endif | ||
456 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
457 | /* Enable backlight */ | ||
458 | register_backlight_controller(&pmu_backlight_controller, NULL, "pmu"); | ||
459 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
460 | |||
461 | #ifdef CONFIG_PMAC_PBOOK | ||
462 | if (machine_is_compatible("AAPL,3400/2400") || | ||
463 | machine_is_compatible("AAPL,3500")) { | ||
464 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | ||
465 | NULL, PMAC_MB_INFO_MODEL, 0); | ||
466 | pmu_battery_count = 1; | ||
467 | if (mb == PMAC_TYPE_COMET) | ||
468 | pmu_batteries[0].flags |= PMU_BATT_TYPE_COMET; | ||
469 | else | ||
470 | pmu_batteries[0].flags |= PMU_BATT_TYPE_HOOPER; | ||
471 | } else if (machine_is_compatible("AAPL,PowerBook1998") || | ||
472 | machine_is_compatible("PowerBook1,1")) { | ||
473 | pmu_battery_count = 2; | ||
474 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | ||
475 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | ||
476 | } else { | ||
477 | struct device_node* prim = find_devices("power-mgt"); | ||
478 | u32 *prim_info = NULL; | ||
479 | if (prim) | ||
480 | prim_info = (u32 *)get_property(prim, "prim-info", NULL); | ||
481 | if (prim_info) { | ||
482 | /* Other stuffs here yet unknown */ | ||
483 | pmu_battery_count = (prim_info[6] >> 16) & 0xff; | ||
484 | pmu_batteries[0].flags |= PMU_BATT_TYPE_SMART; | ||
485 | if (pmu_battery_count > 1) | ||
486 | pmu_batteries[1].flags |= PMU_BATT_TYPE_SMART; | ||
487 | } | ||
488 | } | ||
489 | #endif /* CONFIG_PMAC_PBOOK */ | ||
490 | /* Create /proc/pmu */ | ||
491 | proc_pmu_root = proc_mkdir("pmu", NULL); | ||
492 | if (proc_pmu_root) { | ||
493 | #ifdef CONFIG_PMAC_PBOOK | ||
494 | int i; | ||
495 | |||
496 | for (i=0; i<pmu_battery_count; i++) { | ||
497 | char title[16]; | ||
498 | sprintf(title, "battery_%d", i); | ||
499 | proc_pmu_batt[i] = create_proc_read_entry(title, 0, proc_pmu_root, | ||
500 | proc_get_batt, (void *)i); | ||
501 | } | ||
502 | #endif /* CONFIG_PMAC_PBOOK */ | ||
503 | |||
504 | proc_pmu_info = create_proc_read_entry("info", 0, proc_pmu_root, | ||
505 | proc_get_info, NULL); | ||
506 | proc_pmu_irqstats = create_proc_read_entry("interrupts", 0, proc_pmu_root, | ||
507 | proc_get_irqstats, NULL); | ||
508 | proc_pmu_options = create_proc_entry("options", 0600, proc_pmu_root); | ||
509 | if (proc_pmu_options) { | ||
510 | proc_pmu_options->nlink = 1; | ||
511 | proc_pmu_options->read_proc = proc_read_options; | ||
512 | proc_pmu_options->write_proc = proc_write_options; | ||
513 | } | ||
514 | } | ||
515 | return 0; | ||
516 | } | ||
517 | |||
518 | device_initcall(via_pmu_dev_init); | ||
519 | |||
520 | static int __openfirmware | ||
521 | init_pmu(void) | ||
522 | { | ||
523 | int timeout; | ||
524 | struct adb_request req; | ||
525 | |||
526 | out_8(&via[B], via[B] | TREQ); /* negate TREQ */ | ||
527 | out_8(&via[DIRB], (via[DIRB] | TREQ) & ~TACK); /* TACK in, TREQ out */ | ||
528 | |||
529 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | ||
530 | timeout = 100000; | ||
531 | while (!req.complete) { | ||
532 | if (--timeout < 0) { | ||
533 | printk(KERN_ERR "init_pmu: no response from PMU\n"); | ||
534 | return 0; | ||
535 | } | ||
536 | udelay(10); | ||
537 | pmu_poll(); | ||
538 | } | ||
539 | |||
540 | /* ack all pending interrupts */ | ||
541 | timeout = 100000; | ||
542 | interrupt_data[0][0] = 1; | ||
543 | while (interrupt_data[0][0] || pmu_state != idle) { | ||
544 | if (--timeout < 0) { | ||
545 | printk(KERN_ERR "init_pmu: timed out acking intrs\n"); | ||
546 | return 0; | ||
547 | } | ||
548 | if (pmu_state == idle) | ||
549 | adb_int_pending = 1; | ||
550 | via_pmu_interrupt(0, NULL, NULL); | ||
551 | udelay(10); | ||
552 | } | ||
553 | |||
554 | /* Tell PMU we are ready. */ | ||
555 | if (pmu_kind == PMU_KEYLARGO_BASED) { | ||
556 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | ||
557 | while (!req.complete) | ||
558 | pmu_poll(); | ||
559 | } | ||
560 | |||
561 | /* Read PMU version */ | ||
562 | pmu_request(&req, NULL, 1, PMU_GET_VERSION); | ||
563 | pmu_wait_complete(&req); | ||
564 | if (req.reply_len > 0) | ||
565 | pmu_version = req.reply[0]; | ||
566 | |||
567 | /* Read server mode setting */ | ||
568 | if (pmu_kind == PMU_KEYLARGO_BASED) { | ||
569 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, | ||
570 | PMU_PWR_GET_POWERUP_EVENTS); | ||
571 | pmu_wait_complete(&req); | ||
572 | if (req.reply_len == 2) { | ||
573 | if (req.reply[1] & PMU_PWR_WAKEUP_AC_INSERT) | ||
574 | option_server_mode = 1; | ||
575 | printk(KERN_INFO "via-pmu: Server Mode is %s\n", | ||
576 | option_server_mode ? "enabled" : "disabled"); | ||
577 | } | ||
578 | } | ||
579 | return 1; | ||
580 | } | ||
581 | |||
582 | int | ||
583 | pmu_get_model(void) | ||
584 | { | ||
585 | return pmu_kind; | ||
586 | } | ||
587 | |||
588 | #ifndef CONFIG_PPC64 | ||
589 | static inline void wakeup_decrementer(void) | ||
590 | { | ||
591 | set_dec(tb_ticks_per_jiffy); | ||
592 | /* No currently-supported powerbook has a 601, | ||
593 | * so use get_tbl, not native | ||
594 | */ | ||
595 | last_jiffy_stamp(0) = tb_last_stamp = get_tbl(); | ||
596 | } | ||
597 | #endif | ||
598 | |||
599 | static void pmu_set_server_mode(int server_mode) | ||
600 | { | ||
601 | struct adb_request req; | ||
602 | |||
603 | if (pmu_kind != PMU_KEYLARGO_BASED) | ||
604 | return; | ||
605 | |||
606 | option_server_mode = server_mode; | ||
607 | pmu_request(&req, NULL, 2, PMU_POWER_EVENTS, PMU_PWR_GET_POWERUP_EVENTS); | ||
608 | pmu_wait_complete(&req); | ||
609 | if (req.reply_len < 2) | ||
610 | return; | ||
611 | if (server_mode) | ||
612 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | ||
613 | PMU_PWR_SET_POWERUP_EVENTS, | ||
614 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | ||
615 | else | ||
616 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, | ||
617 | PMU_PWR_CLR_POWERUP_EVENTS, | ||
618 | req.reply[0], PMU_PWR_WAKEUP_AC_INSERT); | ||
619 | pmu_wait_complete(&req); | ||
620 | } | ||
621 | |||
622 | #ifdef CONFIG_PMAC_PBOOK | ||
623 | |||
624 | /* This new version of the code for 2400/3400/3500 powerbooks | ||
625 | * is inspired from the implementation in gkrellm-pmu | ||
626 | */ | ||
627 | static void __pmac | ||
628 | done_battery_state_ohare(struct adb_request* req) | ||
629 | { | ||
630 | /* format: | ||
631 | * [0] : flags | ||
632 | * 0x01 : AC indicator | ||
633 | * 0x02 : charging | ||
634 | * 0x04 : battery exist | ||
635 | * 0x08 : | ||
636 | * 0x10 : | ||
637 | * 0x20 : full charged | ||
638 | * 0x40 : pcharge reset | ||
639 | * 0x80 : battery exist | ||
640 | * | ||
641 | * [1][2] : battery voltage | ||
642 | * [3] : CPU temperature | ||
643 | * [4] : battery temperature | ||
644 | * [5] : current | ||
645 | * [6][7] : pcharge | ||
646 | * --tkoba | ||
647 | */ | ||
648 | unsigned int bat_flags = PMU_BATT_TYPE_HOOPER; | ||
649 | long pcharge, charge, vb, vmax, lmax; | ||
650 | long vmax_charging, vmax_charged; | ||
651 | long amperage, voltage, time, max; | ||
652 | int mb = pmac_call_feature(PMAC_FTR_GET_MB_INFO, | ||
653 | NULL, PMAC_MB_INFO_MODEL, 0); | ||
654 | |||
655 | if (req->reply[0] & 0x01) | ||
656 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | ||
657 | else | ||
658 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | ||
659 | |||
660 | if (mb == PMAC_TYPE_COMET) { | ||
661 | vmax_charged = 189; | ||
662 | vmax_charging = 213; | ||
663 | lmax = 6500; | ||
664 | } else { | ||
665 | vmax_charged = 330; | ||
666 | vmax_charging = 330; | ||
667 | lmax = 6500; | ||
668 | } | ||
669 | vmax = vmax_charged; | ||
670 | |||
671 | /* If battery installed */ | ||
672 | if (req->reply[0] & 0x04) { | ||
673 | bat_flags |= PMU_BATT_PRESENT; | ||
674 | if (req->reply[0] & 0x02) | ||
675 | bat_flags |= PMU_BATT_CHARGING; | ||
676 | vb = (req->reply[1] << 8) | req->reply[2]; | ||
677 | voltage = (vb * 265 + 72665) / 10; | ||
678 | amperage = req->reply[5]; | ||
679 | if ((req->reply[0] & 0x01) == 0) { | ||
680 | if (amperage > 200) | ||
681 | vb += ((amperage - 200) * 15)/100; | ||
682 | } else if (req->reply[0] & 0x02) { | ||
683 | vb = (vb * 97) / 100; | ||
684 | vmax = vmax_charging; | ||
685 | } | ||
686 | charge = (100 * vb) / vmax; | ||
687 | if (req->reply[0] & 0x40) { | ||
688 | pcharge = (req->reply[6] << 8) + req->reply[7]; | ||
689 | if (pcharge > lmax) | ||
690 | pcharge = lmax; | ||
691 | pcharge *= 100; | ||
692 | pcharge = 100 - pcharge / lmax; | ||
693 | if (pcharge < charge) | ||
694 | charge = pcharge; | ||
695 | } | ||
696 | if (amperage > 0) | ||
697 | time = (charge * 16440) / amperage; | ||
698 | else | ||
699 | time = 0; | ||
700 | max = 100; | ||
701 | amperage = -amperage; | ||
702 | } else | ||
703 | charge = max = amperage = voltage = time = 0; | ||
704 | |||
705 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | ||
706 | pmu_batteries[pmu_cur_battery].charge = charge; | ||
707 | pmu_batteries[pmu_cur_battery].max_charge = max; | ||
708 | pmu_batteries[pmu_cur_battery].amperage = amperage; | ||
709 | pmu_batteries[pmu_cur_battery].voltage = voltage; | ||
710 | pmu_batteries[pmu_cur_battery].time_remaining = time; | ||
711 | |||
712 | clear_bit(0, &async_req_locks); | ||
713 | } | ||
714 | |||
715 | static void __pmac | ||
716 | done_battery_state_smart(struct adb_request* req) | ||
717 | { | ||
718 | /* format: | ||
719 | * [0] : format of this structure (known: 3,4,5) | ||
720 | * [1] : flags | ||
721 | * | ||
722 | * format 3 & 4: | ||
723 | * | ||
724 | * [2] : charge | ||
725 | * [3] : max charge | ||
726 | * [4] : current | ||
727 | * [5] : voltage | ||
728 | * | ||
729 | * format 5: | ||
730 | * | ||
731 | * [2][3] : charge | ||
732 | * [4][5] : max charge | ||
733 | * [6][7] : current | ||
734 | * [8][9] : voltage | ||
735 | */ | ||
736 | |||
737 | unsigned int bat_flags = PMU_BATT_TYPE_SMART; | ||
738 | int amperage; | ||
739 | unsigned int capa, max, voltage; | ||
740 | |||
741 | if (req->reply[1] & 0x01) | ||
742 | pmu_power_flags |= PMU_PWR_AC_PRESENT; | ||
743 | else | ||
744 | pmu_power_flags &= ~PMU_PWR_AC_PRESENT; | ||
745 | |||
746 | |||
747 | capa = max = amperage = voltage = 0; | ||
748 | |||
749 | if (req->reply[1] & 0x04) { | ||
750 | bat_flags |= PMU_BATT_PRESENT; | ||
751 | switch(req->reply[0]) { | ||
752 | case 3: | ||
753 | case 4: capa = req->reply[2]; | ||
754 | max = req->reply[3]; | ||
755 | amperage = *((signed char *)&req->reply[4]); | ||
756 | voltage = req->reply[5]; | ||
757 | break; | ||
758 | case 5: capa = (req->reply[2] << 8) | req->reply[3]; | ||
759 | max = (req->reply[4] << 8) | req->reply[5]; | ||
760 | amperage = *((signed short *)&req->reply[6]); | ||
761 | voltage = (req->reply[8] << 8) | req->reply[9]; | ||
762 | break; | ||
763 | default: | ||
764 | printk(KERN_WARNING "pmu.c : unrecognized battery info, len: %d, %02x %02x %02x %02x\n", | ||
765 | req->reply_len, req->reply[0], req->reply[1], req->reply[2], req->reply[3]); | ||
766 | break; | ||
767 | } | ||
768 | } | ||
769 | |||
770 | if ((req->reply[1] & 0x01) && (amperage > 0)) | ||
771 | bat_flags |= PMU_BATT_CHARGING; | ||
772 | |||
773 | pmu_batteries[pmu_cur_battery].flags = bat_flags; | ||
774 | pmu_batteries[pmu_cur_battery].charge = capa; | ||
775 | pmu_batteries[pmu_cur_battery].max_charge = max; | ||
776 | pmu_batteries[pmu_cur_battery].amperage = amperage; | ||
777 | pmu_batteries[pmu_cur_battery].voltage = voltage; | ||
778 | if (amperage) { | ||
779 | if ((req->reply[1] & 0x01) && (amperage > 0)) | ||
780 | pmu_batteries[pmu_cur_battery].time_remaining | ||
781 | = ((max-capa) * 3600) / amperage; | ||
782 | else | ||
783 | pmu_batteries[pmu_cur_battery].time_remaining | ||
784 | = (capa * 3600) / (-amperage); | ||
785 | } else | ||
786 | pmu_batteries[pmu_cur_battery].time_remaining = 0; | ||
787 | |||
788 | pmu_cur_battery = (pmu_cur_battery + 1) % pmu_battery_count; | ||
789 | |||
790 | clear_bit(0, &async_req_locks); | ||
791 | } | ||
792 | |||
793 | static void __pmac | ||
794 | query_battery_state(void) | ||
795 | { | ||
796 | if (test_and_set_bit(0, &async_req_locks)) | ||
797 | return; | ||
798 | if (pmu_kind == PMU_OHARE_BASED) | ||
799 | pmu_request(&batt_req, done_battery_state_ohare, | ||
800 | 1, PMU_BATTERY_STATE); | ||
801 | else | ||
802 | pmu_request(&batt_req, done_battery_state_smart, | ||
803 | 2, PMU_SMART_BATTERY_STATE, pmu_cur_battery+1); | ||
804 | } | ||
805 | |||
806 | #endif /* CONFIG_PMAC_PBOOK */ | ||
807 | |||
808 | static int __pmac | ||
809 | proc_get_info(char *page, char **start, off_t off, | ||
810 | int count, int *eof, void *data) | ||
811 | { | ||
812 | char* p = page; | ||
813 | |||
814 | p += sprintf(p, "PMU driver version : %d\n", PMU_DRIVER_VERSION); | ||
815 | p += sprintf(p, "PMU firmware version : %02x\n", pmu_version); | ||
816 | #ifdef CONFIG_PMAC_PBOOK | ||
817 | p += sprintf(p, "AC Power : %d\n", | ||
818 | ((pmu_power_flags & PMU_PWR_AC_PRESENT) != 0)); | ||
819 | p += sprintf(p, "Battery count : %d\n", pmu_battery_count); | ||
820 | #endif /* CONFIG_PMAC_PBOOK */ | ||
821 | |||
822 | return p - page; | ||
823 | } | ||
824 | |||
825 | static int __pmac | ||
826 | proc_get_irqstats(char *page, char **start, off_t off, | ||
827 | int count, int *eof, void *data) | ||
828 | { | ||
829 | int i; | ||
830 | char* p = page; | ||
831 | static const char *irq_names[] = { | ||
832 | "Total CB1 triggered events", | ||
833 | "Total GPIO1 triggered events", | ||
834 | "PC-Card eject button", | ||
835 | "Sound/Brightness button", | ||
836 | "ADB message", | ||
837 | "Battery state change", | ||
838 | "Environment interrupt", | ||
839 | "Tick timer", | ||
840 | "Ghost interrupt (zero len)", | ||
841 | "Empty interrupt (empty mask)", | ||
842 | "Max irqs in a row" | ||
843 | }; | ||
844 | |||
845 | for (i=0; i<11; i++) { | ||
846 | p += sprintf(p, " %2u: %10u (%s)\n", | ||
847 | i, pmu_irq_stats[i], irq_names[i]); | ||
848 | } | ||
849 | return p - page; | ||
850 | } | ||
851 | |||
852 | #ifdef CONFIG_PMAC_PBOOK | ||
853 | static int __pmac | ||
854 | proc_get_batt(char *page, char **start, off_t off, | ||
855 | int count, int *eof, void *data) | ||
856 | { | ||
857 | int batnum = (int)data; | ||
858 | char *p = page; | ||
859 | |||
860 | p += sprintf(p, "\n"); | ||
861 | p += sprintf(p, "flags : %08x\n", | ||
862 | pmu_batteries[batnum].flags); | ||
863 | p += sprintf(p, "charge : %d\n", | ||
864 | pmu_batteries[batnum].charge); | ||
865 | p += sprintf(p, "max_charge : %d\n", | ||
866 | pmu_batteries[batnum].max_charge); | ||
867 | p += sprintf(p, "current : %d\n", | ||
868 | pmu_batteries[batnum].amperage); | ||
869 | p += sprintf(p, "voltage : %d\n", | ||
870 | pmu_batteries[batnum].voltage); | ||
871 | p += sprintf(p, "time rem. : %d\n", | ||
872 | pmu_batteries[batnum].time_remaining); | ||
873 | |||
874 | return p - page; | ||
875 | } | ||
876 | #endif /* CONFIG_PMAC_PBOOK */ | ||
877 | |||
878 | static int __pmac | ||
879 | proc_read_options(char *page, char **start, off_t off, | ||
880 | int count, int *eof, void *data) | ||
881 | { | ||
882 | char *p = page; | ||
883 | |||
884 | #ifdef CONFIG_PMAC_PBOOK | ||
885 | if (pmu_kind == PMU_KEYLARGO_BASED && | ||
886 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | ||
887 | p += sprintf(p, "lid_wakeup=%d\n", option_lid_wakeup); | ||
888 | #endif /* CONFIG_PMAC_PBOOK */ | ||
889 | if (pmu_kind == PMU_KEYLARGO_BASED) | ||
890 | p += sprintf(p, "server_mode=%d\n", option_server_mode); | ||
891 | |||
892 | return p - page; | ||
893 | } | ||
894 | |||
895 | static int __pmac | ||
896 | proc_write_options(struct file *file, const char __user *buffer, | ||
897 | unsigned long count, void *data) | ||
898 | { | ||
899 | char tmp[33]; | ||
900 | char *label, *val; | ||
901 | unsigned long fcount = count; | ||
902 | |||
903 | if (!count) | ||
904 | return -EINVAL; | ||
905 | if (count > 32) | ||
906 | count = 32; | ||
907 | if (copy_from_user(tmp, buffer, count)) | ||
908 | return -EFAULT; | ||
909 | tmp[count] = 0; | ||
910 | |||
911 | label = tmp; | ||
912 | while(*label == ' ') | ||
913 | label++; | ||
914 | val = label; | ||
915 | while(*val && (*val != '=')) { | ||
916 | if (*val == ' ') | ||
917 | *val = 0; | ||
918 | val++; | ||
919 | } | ||
920 | if ((*val) == 0) | ||
921 | return -EINVAL; | ||
922 | *(val++) = 0; | ||
923 | while(*val == ' ') | ||
924 | val++; | ||
925 | #ifdef CONFIG_PMAC_PBOOK | ||
926 | if (pmu_kind == PMU_KEYLARGO_BASED && | ||
927 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) >= 0) | ||
928 | if (!strcmp(label, "lid_wakeup")) | ||
929 | option_lid_wakeup = ((*val) == '1'); | ||
930 | #endif /* CONFIG_PMAC_PBOOK */ | ||
931 | if (pmu_kind == PMU_KEYLARGO_BASED && !strcmp(label, "server_mode")) { | ||
932 | int new_value; | ||
933 | new_value = ((*val) == '1'); | ||
934 | if (new_value != option_server_mode) | ||
935 | pmu_set_server_mode(new_value); | ||
936 | } | ||
937 | return fcount; | ||
938 | } | ||
939 | |||
940 | #ifdef CONFIG_ADB | ||
941 | /* Send an ADB command */ | ||
942 | static int __pmac | ||
943 | pmu_send_request(struct adb_request *req, int sync) | ||
944 | { | ||
945 | int i, ret; | ||
946 | |||
947 | if ((vias == NULL) || (!pmu_fully_inited)) { | ||
948 | req->complete = 1; | ||
949 | return -ENXIO; | ||
950 | } | ||
951 | |||
952 | ret = -EINVAL; | ||
953 | |||
954 | switch (req->data[0]) { | ||
955 | case PMU_PACKET: | ||
956 | for (i = 0; i < req->nbytes - 1; ++i) | ||
957 | req->data[i] = req->data[i+1]; | ||
958 | --req->nbytes; | ||
959 | if (pmu_data_len[req->data[0]][1] != 0) { | ||
960 | req->reply[0] = ADB_RET_OK; | ||
961 | req->reply_len = 1; | ||
962 | } else | ||
963 | req->reply_len = 0; | ||
964 | ret = pmu_queue_request(req); | ||
965 | break; | ||
966 | case CUDA_PACKET: | ||
967 | switch (req->data[1]) { | ||
968 | case CUDA_GET_TIME: | ||
969 | if (req->nbytes != 2) | ||
970 | break; | ||
971 | req->data[0] = PMU_READ_RTC; | ||
972 | req->nbytes = 1; | ||
973 | req->reply_len = 3; | ||
974 | req->reply[0] = CUDA_PACKET; | ||
975 | req->reply[1] = 0; | ||
976 | req->reply[2] = CUDA_GET_TIME; | ||
977 | ret = pmu_queue_request(req); | ||
978 | break; | ||
979 | case CUDA_SET_TIME: | ||
980 | if (req->nbytes != 6) | ||
981 | break; | ||
982 | req->data[0] = PMU_SET_RTC; | ||
983 | req->nbytes = 5; | ||
984 | for (i = 1; i <= 4; ++i) | ||
985 | req->data[i] = req->data[i+1]; | ||
986 | req->reply_len = 3; | ||
987 | req->reply[0] = CUDA_PACKET; | ||
988 | req->reply[1] = 0; | ||
989 | req->reply[2] = CUDA_SET_TIME; | ||
990 | ret = pmu_queue_request(req); | ||
991 | break; | ||
992 | } | ||
993 | break; | ||
994 | case ADB_PACKET: | ||
995 | if (!pmu_has_adb) | ||
996 | return -ENXIO; | ||
997 | for (i = req->nbytes - 1; i > 1; --i) | ||
998 | req->data[i+2] = req->data[i]; | ||
999 | req->data[3] = req->nbytes - 2; | ||
1000 | req->data[2] = pmu_adb_flags; | ||
1001 | /*req->data[1] = req->data[1];*/ | ||
1002 | req->data[0] = PMU_ADB_CMD; | ||
1003 | req->nbytes += 2; | ||
1004 | req->reply_expected = 1; | ||
1005 | req->reply_len = 0; | ||
1006 | ret = pmu_queue_request(req); | ||
1007 | break; | ||
1008 | } | ||
1009 | if (ret) { | ||
1010 | req->complete = 1; | ||
1011 | return ret; | ||
1012 | } | ||
1013 | |||
1014 | if (sync) | ||
1015 | while (!req->complete) | ||
1016 | pmu_poll(); | ||
1017 | |||
1018 | return 0; | ||
1019 | } | ||
1020 | |||
1021 | /* Enable/disable autopolling */ | ||
1022 | static int __pmac | ||
1023 | pmu_adb_autopoll(int devs) | ||
1024 | { | ||
1025 | struct adb_request req; | ||
1026 | |||
1027 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | ||
1028 | return -ENXIO; | ||
1029 | |||
1030 | if (devs) { | ||
1031 | adb_dev_map = devs; | ||
1032 | pmu_request(&req, NULL, 5, PMU_ADB_CMD, 0, 0x86, | ||
1033 | adb_dev_map >> 8, adb_dev_map); | ||
1034 | pmu_adb_flags = 2; | ||
1035 | } else { | ||
1036 | pmu_request(&req, NULL, 1, PMU_ADB_POLL_OFF); | ||
1037 | pmu_adb_flags = 0; | ||
1038 | } | ||
1039 | while (!req.complete) | ||
1040 | pmu_poll(); | ||
1041 | return 0; | ||
1042 | } | ||
1043 | |||
1044 | /* Reset the ADB bus */ | ||
1045 | static int __pmac | ||
1046 | pmu_adb_reset_bus(void) | ||
1047 | { | ||
1048 | struct adb_request req; | ||
1049 | int save_autopoll = adb_dev_map; | ||
1050 | |||
1051 | if ((vias == NULL) || (!pmu_fully_inited) || !pmu_has_adb) | ||
1052 | return -ENXIO; | ||
1053 | |||
1054 | /* anyone got a better idea?? */ | ||
1055 | pmu_adb_autopoll(0); | ||
1056 | |||
1057 | req.nbytes = 5; | ||
1058 | req.done = NULL; | ||
1059 | req.data[0] = PMU_ADB_CMD; | ||
1060 | req.data[1] = 0; | ||
1061 | req.data[2] = ADB_BUSRESET; | ||
1062 | req.data[3] = 0; | ||
1063 | req.data[4] = 0; | ||
1064 | req.reply_len = 0; | ||
1065 | req.reply_expected = 1; | ||
1066 | if (pmu_queue_request(&req) != 0) { | ||
1067 | printk(KERN_ERR "pmu_adb_reset_bus: pmu_queue_request failed\n"); | ||
1068 | return -EIO; | ||
1069 | } | ||
1070 | pmu_wait_complete(&req); | ||
1071 | |||
1072 | if (save_autopoll != 0) | ||
1073 | pmu_adb_autopoll(save_autopoll); | ||
1074 | |||
1075 | return 0; | ||
1076 | } | ||
1077 | #endif /* CONFIG_ADB */ | ||
1078 | |||
1079 | /* Construct and send a pmu request */ | ||
1080 | int __openfirmware | ||
1081 | pmu_request(struct adb_request *req, void (*done)(struct adb_request *), | ||
1082 | int nbytes, ...) | ||
1083 | { | ||
1084 | va_list list; | ||
1085 | int i; | ||
1086 | |||
1087 | if (vias == NULL) | ||
1088 | return -ENXIO; | ||
1089 | |||
1090 | if (nbytes < 0 || nbytes > 32) { | ||
1091 | printk(KERN_ERR "pmu_request: bad nbytes (%d)\n", nbytes); | ||
1092 | req->complete = 1; | ||
1093 | return -EINVAL; | ||
1094 | } | ||
1095 | req->nbytes = nbytes; | ||
1096 | req->done = done; | ||
1097 | va_start(list, nbytes); | ||
1098 | for (i = 0; i < nbytes; ++i) | ||
1099 | req->data[i] = va_arg(list, int); | ||
1100 | va_end(list); | ||
1101 | req->reply_len = 0; | ||
1102 | req->reply_expected = 0; | ||
1103 | return pmu_queue_request(req); | ||
1104 | } | ||
1105 | |||
1106 | int __pmac | ||
1107 | pmu_queue_request(struct adb_request *req) | ||
1108 | { | ||
1109 | unsigned long flags; | ||
1110 | int nsend; | ||
1111 | |||
1112 | if (via == NULL) { | ||
1113 | req->complete = 1; | ||
1114 | return -ENXIO; | ||
1115 | } | ||
1116 | if (req->nbytes <= 0) { | ||
1117 | req->complete = 1; | ||
1118 | return 0; | ||
1119 | } | ||
1120 | nsend = pmu_data_len[req->data[0]][0]; | ||
1121 | if (nsend >= 0 && req->nbytes != nsend + 1) { | ||
1122 | req->complete = 1; | ||
1123 | return -EINVAL; | ||
1124 | } | ||
1125 | |||
1126 | req->next = NULL; | ||
1127 | req->sent = 0; | ||
1128 | req->complete = 0; | ||
1129 | |||
1130 | spin_lock_irqsave(&pmu_lock, flags); | ||
1131 | if (current_req != 0) { | ||
1132 | last_req->next = req; | ||
1133 | last_req = req; | ||
1134 | } else { | ||
1135 | current_req = req; | ||
1136 | last_req = req; | ||
1137 | if (pmu_state == idle) | ||
1138 | pmu_start(); | ||
1139 | } | ||
1140 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1141 | |||
1142 | return 0; | ||
1143 | } | ||
1144 | |||
1145 | static inline void | ||
1146 | wait_for_ack(void) | ||
1147 | { | ||
1148 | /* Sightly increased the delay, I had one occurrence of the message | ||
1149 | * reported | ||
1150 | */ | ||
1151 | int timeout = 4000; | ||
1152 | while ((in_8(&via[B]) & TACK) == 0) { | ||
1153 | if (--timeout < 0) { | ||
1154 | printk(KERN_ERR "PMU not responding (!ack)\n"); | ||
1155 | return; | ||
1156 | } | ||
1157 | udelay(10); | ||
1158 | } | ||
1159 | } | ||
1160 | |||
1161 | /* New PMU seems to be very sensitive to those timings, so we make sure | ||
1162 | * PCI is flushed immediately */ | ||
1163 | static inline void | ||
1164 | send_byte(int x) | ||
1165 | { | ||
1166 | volatile unsigned char __iomem *v = via; | ||
1167 | |||
1168 | out_8(&v[ACR], in_8(&v[ACR]) | SR_OUT | SR_EXT); | ||
1169 | out_8(&v[SR], x); | ||
1170 | out_8(&v[B], in_8(&v[B]) & ~TREQ); /* assert TREQ */ | ||
1171 | (void)in_8(&v[B]); | ||
1172 | } | ||
1173 | |||
1174 | static inline void | ||
1175 | recv_byte(void) | ||
1176 | { | ||
1177 | volatile unsigned char __iomem *v = via; | ||
1178 | |||
1179 | out_8(&v[ACR], (in_8(&v[ACR]) & ~SR_OUT) | SR_EXT); | ||
1180 | in_8(&v[SR]); /* resets SR */ | ||
1181 | out_8(&v[B], in_8(&v[B]) & ~TREQ); | ||
1182 | (void)in_8(&v[B]); | ||
1183 | } | ||
1184 | |||
1185 | static inline void | ||
1186 | pmu_done(struct adb_request *req) | ||
1187 | { | ||
1188 | void (*done)(struct adb_request *) = req->done; | ||
1189 | mb(); | ||
1190 | req->complete = 1; | ||
1191 | /* Here, we assume that if the request has a done member, the | ||
1192 | * struct request will survive to setting req->complete to 1 | ||
1193 | */ | ||
1194 | if (done) | ||
1195 | (*done)(req); | ||
1196 | } | ||
1197 | |||
1198 | static void __pmac | ||
1199 | pmu_start(void) | ||
1200 | { | ||
1201 | struct adb_request *req; | ||
1202 | |||
1203 | /* assert pmu_state == idle */ | ||
1204 | /* get the packet to send */ | ||
1205 | req = current_req; | ||
1206 | if (req == 0 || pmu_state != idle | ||
1207 | || (/*req->reply_expected && */req_awaiting_reply)) | ||
1208 | return; | ||
1209 | |||
1210 | pmu_state = sending; | ||
1211 | data_index = 1; | ||
1212 | data_len = pmu_data_len[req->data[0]][0]; | ||
1213 | |||
1214 | /* Sounds safer to make sure ACK is high before writing. This helped | ||
1215 | * kill a problem with ADB and some iBooks | ||
1216 | */ | ||
1217 | wait_for_ack(); | ||
1218 | /* set the shift register to shift out and send a byte */ | ||
1219 | send_byte(req->data[0]); | ||
1220 | } | ||
1221 | |||
1222 | void __openfirmware | ||
1223 | pmu_poll(void) | ||
1224 | { | ||
1225 | if (!via) | ||
1226 | return; | ||
1227 | if (disable_poll) | ||
1228 | return; | ||
1229 | via_pmu_interrupt(0, NULL, NULL); | ||
1230 | } | ||
1231 | |||
1232 | void __openfirmware | ||
1233 | pmu_poll_adb(void) | ||
1234 | { | ||
1235 | if (!via) | ||
1236 | return; | ||
1237 | if (disable_poll) | ||
1238 | return; | ||
1239 | /* Kicks ADB read when PMU is suspended */ | ||
1240 | adb_int_pending = 1; | ||
1241 | do { | ||
1242 | via_pmu_interrupt(0, NULL, NULL); | ||
1243 | } while (pmu_suspended && (adb_int_pending || pmu_state != idle | ||
1244 | || req_awaiting_reply)); | ||
1245 | } | ||
1246 | |||
1247 | void __openfirmware | ||
1248 | pmu_wait_complete(struct adb_request *req) | ||
1249 | { | ||
1250 | if (!via) | ||
1251 | return; | ||
1252 | while((pmu_state != idle && pmu_state != locked) || !req->complete) | ||
1253 | via_pmu_interrupt(0, NULL, NULL); | ||
1254 | } | ||
1255 | |||
1256 | /* This function loops until the PMU is idle and prevents it from | ||
1257 | * anwsering to ADB interrupts. pmu_request can still be called. | ||
1258 | * This is done to avoid spurrious shutdowns when we know we'll have | ||
1259 | * interrupts switched off for a long time | ||
1260 | */ | ||
1261 | void __openfirmware | ||
1262 | pmu_suspend(void) | ||
1263 | { | ||
1264 | unsigned long flags; | ||
1265 | #ifdef SUSPEND_USES_PMU | ||
1266 | struct adb_request *req; | ||
1267 | #endif | ||
1268 | if (!via) | ||
1269 | return; | ||
1270 | |||
1271 | spin_lock_irqsave(&pmu_lock, flags); | ||
1272 | pmu_suspended++; | ||
1273 | if (pmu_suspended > 1) { | ||
1274 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1275 | return; | ||
1276 | } | ||
1277 | |||
1278 | do { | ||
1279 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1280 | if (req_awaiting_reply) | ||
1281 | adb_int_pending = 1; | ||
1282 | via_pmu_interrupt(0, NULL, NULL); | ||
1283 | spin_lock_irqsave(&pmu_lock, flags); | ||
1284 | if (!adb_int_pending && pmu_state == idle && !req_awaiting_reply) { | ||
1285 | #ifdef SUSPEND_USES_PMU | ||
1286 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, 0); | ||
1287 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1288 | while(!req.complete) | ||
1289 | pmu_poll(); | ||
1290 | #else /* SUSPEND_USES_PMU */ | ||
1291 | if (gpio_irq >= 0) | ||
1292 | disable_irq_nosync(gpio_irq); | ||
1293 | out_8(&via[IER], CB1_INT | IER_CLR); | ||
1294 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1295 | #endif /* SUSPEND_USES_PMU */ | ||
1296 | break; | ||
1297 | } | ||
1298 | } while (1); | ||
1299 | } | ||
1300 | |||
1301 | void __openfirmware | ||
1302 | pmu_resume(void) | ||
1303 | { | ||
1304 | unsigned long flags; | ||
1305 | |||
1306 | if (!via || (pmu_suspended < 1)) | ||
1307 | return; | ||
1308 | |||
1309 | spin_lock_irqsave(&pmu_lock, flags); | ||
1310 | pmu_suspended--; | ||
1311 | if (pmu_suspended > 0) { | ||
1312 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1313 | return; | ||
1314 | } | ||
1315 | adb_int_pending = 1; | ||
1316 | #ifdef SUSPEND_USES_PMU | ||
1317 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | ||
1318 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1319 | while(!req.complete) | ||
1320 | pmu_poll(); | ||
1321 | #else /* SUSPEND_USES_PMU */ | ||
1322 | if (gpio_irq >= 0) | ||
1323 | enable_irq(gpio_irq); | ||
1324 | out_8(&via[IER], CB1_INT | IER_SET); | ||
1325 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1326 | pmu_poll(); | ||
1327 | #endif /* SUSPEND_USES_PMU */ | ||
1328 | } | ||
1329 | |||
1330 | /* Interrupt data could be the result data from an ADB cmd */ | ||
1331 | static void __pmac | ||
1332 | pmu_handle_data(unsigned char *data, int len, struct pt_regs *regs) | ||
1333 | { | ||
1334 | unsigned char ints, pirq; | ||
1335 | int i = 0; | ||
1336 | |||
1337 | asleep = 0; | ||
1338 | if (drop_interrupts || len < 1) { | ||
1339 | adb_int_pending = 0; | ||
1340 | pmu_irq_stats[8]++; | ||
1341 | return; | ||
1342 | } | ||
1343 | |||
1344 | /* Get PMU interrupt mask */ | ||
1345 | ints = data[0]; | ||
1346 | |||
1347 | /* Record zero interrupts for stats */ | ||
1348 | if (ints == 0) | ||
1349 | pmu_irq_stats[9]++; | ||
1350 | |||
1351 | /* Hack to deal with ADB autopoll flag */ | ||
1352 | if (ints & PMU_INT_ADB) | ||
1353 | ints &= ~(PMU_INT_ADB_AUTO | PMU_INT_AUTO_SRQ_POLL); | ||
1354 | |||
1355 | next: | ||
1356 | |||
1357 | if (ints == 0) { | ||
1358 | if (i > pmu_irq_stats[10]) | ||
1359 | pmu_irq_stats[10] = i; | ||
1360 | return; | ||
1361 | } | ||
1362 | |||
1363 | for (pirq = 0; pirq < 8; pirq++) | ||
1364 | if (ints & (1 << pirq)) | ||
1365 | break; | ||
1366 | pmu_irq_stats[pirq]++; | ||
1367 | i++; | ||
1368 | ints &= ~(1 << pirq); | ||
1369 | |||
1370 | /* Note: for some reason, we get an interrupt with len=1, | ||
1371 | * data[0]==0 after each normal ADB interrupt, at least | ||
1372 | * on the Pismo. Still investigating... --BenH | ||
1373 | */ | ||
1374 | if ((1 << pirq) & PMU_INT_ADB) { | ||
1375 | if ((data[0] & PMU_INT_ADB_AUTO) == 0) { | ||
1376 | struct adb_request *req = req_awaiting_reply; | ||
1377 | if (req == 0) { | ||
1378 | printk(KERN_ERR "PMU: extra ADB reply\n"); | ||
1379 | return; | ||
1380 | } | ||
1381 | req_awaiting_reply = NULL; | ||
1382 | if (len <= 2) | ||
1383 | req->reply_len = 0; | ||
1384 | else { | ||
1385 | memcpy(req->reply, data + 1, len - 1); | ||
1386 | req->reply_len = len - 1; | ||
1387 | } | ||
1388 | pmu_done(req); | ||
1389 | } else { | ||
1390 | #if defined(CONFIG_XMON) && !defined(CONFIG_PPC64) | ||
1391 | if (len == 4 && data[1] == 0x2c) { | ||
1392 | extern int xmon_wants_key, xmon_adb_keycode; | ||
1393 | if (xmon_wants_key) { | ||
1394 | xmon_adb_keycode = data[2]; | ||
1395 | return; | ||
1396 | } | ||
1397 | } | ||
1398 | #endif /* defined(CONFIG_XMON) && !defined(CONFIG_PPC64) */ | ||
1399 | #ifdef CONFIG_ADB | ||
1400 | /* | ||
1401 | * XXX On the [23]400 the PMU gives us an up | ||
1402 | * event for keycodes 0x74 or 0x75 when the PC | ||
1403 | * card eject buttons are released, so we | ||
1404 | * ignore those events. | ||
1405 | */ | ||
1406 | if (!(pmu_kind == PMU_OHARE_BASED && len == 4 | ||
1407 | && data[1] == 0x2c && data[3] == 0xff | ||
1408 | && (data[2] & ~1) == 0xf4)) | ||
1409 | adb_input(data+1, len-1, regs, 1); | ||
1410 | #endif /* CONFIG_ADB */ | ||
1411 | } | ||
1412 | } | ||
1413 | /* Sound/brightness button pressed */ | ||
1414 | else if ((1 << pirq) & PMU_INT_SNDBRT) { | ||
1415 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
1416 | if (len == 3) | ||
1417 | #ifdef CONFIG_INPUT_ADBHID | ||
1418 | if (!disable_kernel_backlight) | ||
1419 | #endif /* CONFIG_INPUT_ADBHID */ | ||
1420 | set_backlight_level(data[1] >> 4); | ||
1421 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
1422 | } | ||
1423 | /* Tick interrupt */ | ||
1424 | else if ((1 << pirq) & PMU_INT_TICK) { | ||
1425 | #ifdef CONFIG_PMAC_PBOOK | ||
1426 | /* Environement or tick interrupt, query batteries */ | ||
1427 | if (pmu_battery_count) { | ||
1428 | if ((--query_batt_timer) == 0) { | ||
1429 | query_battery_state(); | ||
1430 | query_batt_timer = BATTERY_POLLING_COUNT; | ||
1431 | } | ||
1432 | } | ||
1433 | } | ||
1434 | else if ((1 << pirq) & PMU_INT_ENVIRONMENT) { | ||
1435 | if (pmu_battery_count) | ||
1436 | query_battery_state(); | ||
1437 | pmu_pass_intr(data, len); | ||
1438 | } else { | ||
1439 | pmu_pass_intr(data, len); | ||
1440 | #endif /* CONFIG_PMAC_PBOOK */ | ||
1441 | } | ||
1442 | goto next; | ||
1443 | } | ||
1444 | |||
1445 | static struct adb_request* __pmac | ||
1446 | pmu_sr_intr(struct pt_regs *regs) | ||
1447 | { | ||
1448 | struct adb_request *req; | ||
1449 | int bite = 0; | ||
1450 | |||
1451 | if (via[B] & TREQ) { | ||
1452 | printk(KERN_ERR "PMU: spurious SR intr (%x)\n", via[B]); | ||
1453 | out_8(&via[IFR], SR_INT); | ||
1454 | return NULL; | ||
1455 | } | ||
1456 | /* The ack may not yet be low when we get the interrupt */ | ||
1457 | while ((in_8(&via[B]) & TACK) != 0) | ||
1458 | ; | ||
1459 | |||
1460 | /* if reading grab the byte, and reset the interrupt */ | ||
1461 | if (pmu_state == reading || pmu_state == reading_intr) | ||
1462 | bite = in_8(&via[SR]); | ||
1463 | |||
1464 | /* reset TREQ and wait for TACK to go high */ | ||
1465 | out_8(&via[B], in_8(&via[B]) | TREQ); | ||
1466 | wait_for_ack(); | ||
1467 | |||
1468 | switch (pmu_state) { | ||
1469 | case sending: | ||
1470 | req = current_req; | ||
1471 | if (data_len < 0) { | ||
1472 | data_len = req->nbytes - 1; | ||
1473 | send_byte(data_len); | ||
1474 | break; | ||
1475 | } | ||
1476 | if (data_index <= data_len) { | ||
1477 | send_byte(req->data[data_index++]); | ||
1478 | break; | ||
1479 | } | ||
1480 | req->sent = 1; | ||
1481 | data_len = pmu_data_len[req->data[0]][1]; | ||
1482 | if (data_len == 0) { | ||
1483 | pmu_state = idle; | ||
1484 | current_req = req->next; | ||
1485 | if (req->reply_expected) | ||
1486 | req_awaiting_reply = req; | ||
1487 | else | ||
1488 | return req; | ||
1489 | } else { | ||
1490 | pmu_state = reading; | ||
1491 | data_index = 0; | ||
1492 | reply_ptr = req->reply + req->reply_len; | ||
1493 | recv_byte(); | ||
1494 | } | ||
1495 | break; | ||
1496 | |||
1497 | case intack: | ||
1498 | data_index = 0; | ||
1499 | data_len = -1; | ||
1500 | pmu_state = reading_intr; | ||
1501 | reply_ptr = interrupt_data[int_data_last]; | ||
1502 | recv_byte(); | ||
1503 | if (gpio_irq >= 0 && !gpio_irq_enabled) { | ||
1504 | enable_irq(gpio_irq); | ||
1505 | gpio_irq_enabled = 1; | ||
1506 | } | ||
1507 | break; | ||
1508 | |||
1509 | case reading: | ||
1510 | case reading_intr: | ||
1511 | if (data_len == -1) { | ||
1512 | data_len = bite; | ||
1513 | if (bite > 32) | ||
1514 | printk(KERN_ERR "PMU: bad reply len %d\n", bite); | ||
1515 | } else if (data_index < 32) { | ||
1516 | reply_ptr[data_index++] = bite; | ||
1517 | } | ||
1518 | if (data_index < data_len) { | ||
1519 | recv_byte(); | ||
1520 | break; | ||
1521 | } | ||
1522 | |||
1523 | if (pmu_state == reading_intr) { | ||
1524 | pmu_state = idle; | ||
1525 | int_data_state[int_data_last] = int_data_ready; | ||
1526 | interrupt_data_len[int_data_last] = data_len; | ||
1527 | } else { | ||
1528 | req = current_req; | ||
1529 | /* | ||
1530 | * For PMU sleep and freq change requests, we lock the | ||
1531 | * PMU until it's explicitely unlocked. This avoids any | ||
1532 | * spurrious event polling getting in | ||
1533 | */ | ||
1534 | current_req = req->next; | ||
1535 | req->reply_len += data_index; | ||
1536 | if (req->data[0] == PMU_SLEEP || req->data[0] == PMU_CPU_SPEED) | ||
1537 | pmu_state = locked; | ||
1538 | else | ||
1539 | pmu_state = idle; | ||
1540 | return req; | ||
1541 | } | ||
1542 | break; | ||
1543 | |||
1544 | default: | ||
1545 | printk(KERN_ERR "via_pmu_interrupt: unknown state %d?\n", | ||
1546 | pmu_state); | ||
1547 | } | ||
1548 | return NULL; | ||
1549 | } | ||
1550 | |||
1551 | static irqreturn_t __pmac | ||
1552 | via_pmu_interrupt(int irq, void *arg, struct pt_regs *regs) | ||
1553 | { | ||
1554 | unsigned long flags; | ||
1555 | int intr; | ||
1556 | int nloop = 0; | ||
1557 | int int_data = -1; | ||
1558 | struct adb_request *req = NULL; | ||
1559 | int handled = 0; | ||
1560 | |||
1561 | /* This is a bit brutal, we can probably do better */ | ||
1562 | spin_lock_irqsave(&pmu_lock, flags); | ||
1563 | ++disable_poll; | ||
1564 | |||
1565 | for (;;) { | ||
1566 | intr = in_8(&via[IFR]) & (SR_INT | CB1_INT); | ||
1567 | if (intr == 0) | ||
1568 | break; | ||
1569 | handled = 1; | ||
1570 | if (++nloop > 1000) { | ||
1571 | printk(KERN_DEBUG "PMU: stuck in intr loop, " | ||
1572 | "intr=%x, ier=%x pmu_state=%d\n", | ||
1573 | intr, in_8(&via[IER]), pmu_state); | ||
1574 | break; | ||
1575 | } | ||
1576 | out_8(&via[IFR], intr); | ||
1577 | if (intr & CB1_INT) { | ||
1578 | adb_int_pending = 1; | ||
1579 | pmu_irq_stats[0]++; | ||
1580 | } | ||
1581 | if (intr & SR_INT) { | ||
1582 | req = pmu_sr_intr(regs); | ||
1583 | if (req) | ||
1584 | break; | ||
1585 | } | ||
1586 | } | ||
1587 | |||
1588 | recheck: | ||
1589 | if (pmu_state == idle) { | ||
1590 | if (adb_int_pending) { | ||
1591 | if (int_data_state[0] == int_data_empty) | ||
1592 | int_data_last = 0; | ||
1593 | else if (int_data_state[1] == int_data_empty) | ||
1594 | int_data_last = 1; | ||
1595 | else | ||
1596 | goto no_free_slot; | ||
1597 | pmu_state = intack; | ||
1598 | int_data_state[int_data_last] = int_data_fill; | ||
1599 | /* Sounds safer to make sure ACK is high before writing. | ||
1600 | * This helped kill a problem with ADB and some iBooks | ||
1601 | */ | ||
1602 | wait_for_ack(); | ||
1603 | send_byte(PMU_INT_ACK); | ||
1604 | adb_int_pending = 0; | ||
1605 | } else if (current_req) | ||
1606 | pmu_start(); | ||
1607 | } | ||
1608 | no_free_slot: | ||
1609 | /* Mark the oldest buffer for flushing */ | ||
1610 | if (int_data_state[!int_data_last] == int_data_ready) { | ||
1611 | int_data_state[!int_data_last] = int_data_flush; | ||
1612 | int_data = !int_data_last; | ||
1613 | } else if (int_data_state[int_data_last] == int_data_ready) { | ||
1614 | int_data_state[int_data_last] = int_data_flush; | ||
1615 | int_data = int_data_last; | ||
1616 | } | ||
1617 | --disable_poll; | ||
1618 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1619 | |||
1620 | /* Deal with completed PMU requests outside of the lock */ | ||
1621 | if (req) { | ||
1622 | pmu_done(req); | ||
1623 | req = NULL; | ||
1624 | } | ||
1625 | |||
1626 | /* Deal with interrupt datas outside of the lock */ | ||
1627 | if (int_data >= 0) { | ||
1628 | pmu_handle_data(interrupt_data[int_data], interrupt_data_len[int_data], regs); | ||
1629 | spin_lock_irqsave(&pmu_lock, flags); | ||
1630 | ++disable_poll; | ||
1631 | int_data_state[int_data] = int_data_empty; | ||
1632 | int_data = -1; | ||
1633 | goto recheck; | ||
1634 | } | ||
1635 | |||
1636 | return IRQ_RETVAL(handled); | ||
1637 | } | ||
1638 | |||
1639 | void __pmac | ||
1640 | pmu_unlock(void) | ||
1641 | { | ||
1642 | unsigned long flags; | ||
1643 | |||
1644 | spin_lock_irqsave(&pmu_lock, flags); | ||
1645 | if (pmu_state == locked) | ||
1646 | pmu_state = idle; | ||
1647 | adb_int_pending = 1; | ||
1648 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1649 | } | ||
1650 | |||
1651 | |||
1652 | static irqreturn_t __pmac | ||
1653 | gpio1_interrupt(int irq, void *arg, struct pt_regs *regs) | ||
1654 | { | ||
1655 | unsigned long flags; | ||
1656 | |||
1657 | if ((in_8(gpio_reg + 0x9) & 0x02) == 0) { | ||
1658 | spin_lock_irqsave(&pmu_lock, flags); | ||
1659 | if (gpio_irq_enabled > 0) { | ||
1660 | disable_irq_nosync(gpio_irq); | ||
1661 | gpio_irq_enabled = 0; | ||
1662 | } | ||
1663 | pmu_irq_stats[1]++; | ||
1664 | adb_int_pending = 1; | ||
1665 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
1666 | via_pmu_interrupt(0, NULL, NULL); | ||
1667 | return IRQ_HANDLED; | ||
1668 | } | ||
1669 | return IRQ_NONE; | ||
1670 | } | ||
1671 | |||
1672 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
1673 | static int backlight_to_bright[] __pmacdata = { | ||
1674 | 0x7f, 0x46, 0x42, 0x3e, 0x3a, 0x36, 0x32, 0x2e, | ||
1675 | 0x2a, 0x26, 0x22, 0x1e, 0x1a, 0x16, 0x12, 0x0e | ||
1676 | }; | ||
1677 | |||
1678 | static int __openfirmware | ||
1679 | pmu_set_backlight_enable(int on, int level, void* data) | ||
1680 | { | ||
1681 | struct adb_request req; | ||
1682 | |||
1683 | if (vias == NULL) | ||
1684 | return -ENODEV; | ||
1685 | |||
1686 | if (on) { | ||
1687 | pmu_request(&req, NULL, 2, PMU_BACKLIGHT_BRIGHT, | ||
1688 | backlight_to_bright[level]); | ||
1689 | pmu_wait_complete(&req); | ||
1690 | } | ||
1691 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | ||
1692 | PMU_POW_BACKLIGHT | (on ? PMU_POW_ON : PMU_POW_OFF)); | ||
1693 | pmu_wait_complete(&req); | ||
1694 | |||
1695 | return 0; | ||
1696 | } | ||
1697 | |||
1698 | static void __openfirmware | ||
1699 | pmu_bright_complete(struct adb_request *req) | ||
1700 | { | ||
1701 | if (req == &bright_req_1) | ||
1702 | clear_bit(1, &async_req_locks); | ||
1703 | if (req == &bright_req_2) | ||
1704 | clear_bit(2, &async_req_locks); | ||
1705 | } | ||
1706 | |||
1707 | static int __openfirmware | ||
1708 | pmu_set_backlight_level(int level, void* data) | ||
1709 | { | ||
1710 | if (vias == NULL) | ||
1711 | return -ENODEV; | ||
1712 | |||
1713 | if (test_and_set_bit(1, &async_req_locks)) | ||
1714 | return -EAGAIN; | ||
1715 | pmu_request(&bright_req_1, pmu_bright_complete, 2, PMU_BACKLIGHT_BRIGHT, | ||
1716 | backlight_to_bright[level]); | ||
1717 | if (test_and_set_bit(2, &async_req_locks)) | ||
1718 | return -EAGAIN; | ||
1719 | pmu_request(&bright_req_2, pmu_bright_complete, 2, PMU_POWER_CTRL, | ||
1720 | PMU_POW_BACKLIGHT | (level > BACKLIGHT_OFF ? | ||
1721 | PMU_POW_ON : PMU_POW_OFF)); | ||
1722 | |||
1723 | return 0; | ||
1724 | } | ||
1725 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
1726 | |||
1727 | void __pmac | ||
1728 | pmu_enable_irled(int on) | ||
1729 | { | ||
1730 | struct adb_request req; | ||
1731 | |||
1732 | if (vias == NULL) | ||
1733 | return ; | ||
1734 | if (pmu_kind == PMU_KEYLARGO_BASED) | ||
1735 | return ; | ||
1736 | |||
1737 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, PMU_POW_IRLED | | ||
1738 | (on ? PMU_POW_ON : PMU_POW_OFF)); | ||
1739 | pmu_wait_complete(&req); | ||
1740 | } | ||
1741 | |||
1742 | void __pmac | ||
1743 | pmu_restart(void) | ||
1744 | { | ||
1745 | struct adb_request req; | ||
1746 | |||
1747 | if (via == NULL) | ||
1748 | return; | ||
1749 | |||
1750 | local_irq_disable(); | ||
1751 | |||
1752 | drop_interrupts = 1; | ||
1753 | |||
1754 | if (pmu_kind != PMU_KEYLARGO_BASED) { | ||
1755 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | ||
1756 | PMU_INT_TICK ); | ||
1757 | while(!req.complete) | ||
1758 | pmu_poll(); | ||
1759 | } | ||
1760 | |||
1761 | pmu_request(&req, NULL, 1, PMU_RESET); | ||
1762 | pmu_wait_complete(&req); | ||
1763 | for (;;) | ||
1764 | ; | ||
1765 | } | ||
1766 | |||
1767 | void __pmac | ||
1768 | pmu_shutdown(void) | ||
1769 | { | ||
1770 | struct adb_request req; | ||
1771 | |||
1772 | if (via == NULL) | ||
1773 | return; | ||
1774 | |||
1775 | local_irq_disable(); | ||
1776 | |||
1777 | drop_interrupts = 1; | ||
1778 | |||
1779 | if (pmu_kind != PMU_KEYLARGO_BASED) { | ||
1780 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, PMU_INT_ADB | | ||
1781 | PMU_INT_TICK ); | ||
1782 | pmu_wait_complete(&req); | ||
1783 | } else { | ||
1784 | /* Disable server mode on shutdown or we'll just | ||
1785 | * wake up again | ||
1786 | */ | ||
1787 | pmu_set_server_mode(0); | ||
1788 | } | ||
1789 | |||
1790 | pmu_request(&req, NULL, 5, PMU_SHUTDOWN, | ||
1791 | 'M', 'A', 'T', 'T'); | ||
1792 | pmu_wait_complete(&req); | ||
1793 | for (;;) | ||
1794 | ; | ||
1795 | } | ||
1796 | |||
1797 | int | ||
1798 | pmu_present(void) | ||
1799 | { | ||
1800 | return via != 0; | ||
1801 | } | ||
1802 | |||
1803 | struct pmu_i2c_hdr { | ||
1804 | u8 bus; | ||
1805 | u8 mode; | ||
1806 | u8 bus2; | ||
1807 | u8 address; | ||
1808 | u8 sub_addr; | ||
1809 | u8 comb_addr; | ||
1810 | u8 count; | ||
1811 | }; | ||
1812 | |||
1813 | int | ||
1814 | pmu_i2c_combined_read(int bus, int addr, int subaddr, u8* data, int len) | ||
1815 | { | ||
1816 | struct adb_request req; | ||
1817 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | ||
1818 | int retry; | ||
1819 | int rc; | ||
1820 | |||
1821 | for (retry=0; retry<16; retry++) { | ||
1822 | memset(&req, 0, sizeof(req)); | ||
1823 | |||
1824 | hdr->bus = bus; | ||
1825 | hdr->address = addr & 0xfe; | ||
1826 | hdr->mode = PMU_I2C_MODE_COMBINED; | ||
1827 | hdr->bus2 = 0; | ||
1828 | hdr->sub_addr = subaddr; | ||
1829 | hdr->comb_addr = addr | 1; | ||
1830 | hdr->count = len; | ||
1831 | |||
1832 | req.nbytes = sizeof(struct pmu_i2c_hdr) + 1; | ||
1833 | req.reply_expected = 0; | ||
1834 | req.reply_len = 0; | ||
1835 | req.data[0] = PMU_I2C_CMD; | ||
1836 | req.reply[0] = 0xff; | ||
1837 | rc = pmu_queue_request(&req); | ||
1838 | if (rc) | ||
1839 | return rc; | ||
1840 | while(!req.complete) | ||
1841 | pmu_poll(); | ||
1842 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
1843 | break; | ||
1844 | mdelay(15); | ||
1845 | } | ||
1846 | if (req.reply[0] != PMU_I2C_STATUS_OK) | ||
1847 | return -1; | ||
1848 | |||
1849 | for (retry=0; retry<16; retry++) { | ||
1850 | memset(&req, 0, sizeof(req)); | ||
1851 | |||
1852 | mdelay(15); | ||
1853 | |||
1854 | hdr->bus = PMU_I2C_BUS_STATUS; | ||
1855 | req.reply[0] = 0xff; | ||
1856 | |||
1857 | req.nbytes = 2; | ||
1858 | req.reply_expected = 0; | ||
1859 | req.reply_len = 0; | ||
1860 | req.data[0] = PMU_I2C_CMD; | ||
1861 | rc = pmu_queue_request(&req); | ||
1862 | if (rc) | ||
1863 | return rc; | ||
1864 | while(!req.complete) | ||
1865 | pmu_poll(); | ||
1866 | if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) { | ||
1867 | memcpy(data, &req.reply[1], req.reply_len - 1); | ||
1868 | return req.reply_len - 1; | ||
1869 | } | ||
1870 | } | ||
1871 | return -1; | ||
1872 | } | ||
1873 | |||
1874 | int | ||
1875 | pmu_i2c_stdsub_write(int bus, int addr, int subaddr, u8* data, int len) | ||
1876 | { | ||
1877 | struct adb_request req; | ||
1878 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | ||
1879 | int retry; | ||
1880 | int rc; | ||
1881 | |||
1882 | for (retry=0; retry<16; retry++) { | ||
1883 | memset(&req, 0, sizeof(req)); | ||
1884 | |||
1885 | hdr->bus = bus; | ||
1886 | hdr->address = addr & 0xfe; | ||
1887 | hdr->mode = PMU_I2C_MODE_STDSUB; | ||
1888 | hdr->bus2 = 0; | ||
1889 | hdr->sub_addr = subaddr; | ||
1890 | hdr->comb_addr = addr & 0xfe; | ||
1891 | hdr->count = len; | ||
1892 | |||
1893 | req.data[0] = PMU_I2C_CMD; | ||
1894 | memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len); | ||
1895 | req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1; | ||
1896 | req.reply_expected = 0; | ||
1897 | req.reply_len = 0; | ||
1898 | req.reply[0] = 0xff; | ||
1899 | rc = pmu_queue_request(&req); | ||
1900 | if (rc) | ||
1901 | return rc; | ||
1902 | while(!req.complete) | ||
1903 | pmu_poll(); | ||
1904 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
1905 | break; | ||
1906 | mdelay(15); | ||
1907 | } | ||
1908 | if (req.reply[0] != PMU_I2C_STATUS_OK) | ||
1909 | return -1; | ||
1910 | |||
1911 | for (retry=0; retry<16; retry++) { | ||
1912 | memset(&req, 0, sizeof(req)); | ||
1913 | |||
1914 | mdelay(15); | ||
1915 | |||
1916 | hdr->bus = PMU_I2C_BUS_STATUS; | ||
1917 | req.reply[0] = 0xff; | ||
1918 | |||
1919 | req.nbytes = 2; | ||
1920 | req.reply_expected = 0; | ||
1921 | req.reply_len = 0; | ||
1922 | req.data[0] = PMU_I2C_CMD; | ||
1923 | rc = pmu_queue_request(&req); | ||
1924 | if (rc) | ||
1925 | return rc; | ||
1926 | while(!req.complete) | ||
1927 | pmu_poll(); | ||
1928 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
1929 | return len; | ||
1930 | } | ||
1931 | return -1; | ||
1932 | } | ||
1933 | |||
1934 | int | ||
1935 | pmu_i2c_simple_read(int bus, int addr, u8* data, int len) | ||
1936 | { | ||
1937 | struct adb_request req; | ||
1938 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | ||
1939 | int retry; | ||
1940 | int rc; | ||
1941 | |||
1942 | for (retry=0; retry<16; retry++) { | ||
1943 | memset(&req, 0, sizeof(req)); | ||
1944 | |||
1945 | hdr->bus = bus; | ||
1946 | hdr->address = addr | 1; | ||
1947 | hdr->mode = PMU_I2C_MODE_SIMPLE; | ||
1948 | hdr->bus2 = 0; | ||
1949 | hdr->sub_addr = 0; | ||
1950 | hdr->comb_addr = 0; | ||
1951 | hdr->count = len; | ||
1952 | |||
1953 | req.data[0] = PMU_I2C_CMD; | ||
1954 | req.nbytes = sizeof(struct pmu_i2c_hdr) + 1; | ||
1955 | req.reply_expected = 0; | ||
1956 | req.reply_len = 0; | ||
1957 | req.reply[0] = 0xff; | ||
1958 | rc = pmu_queue_request(&req); | ||
1959 | if (rc) | ||
1960 | return rc; | ||
1961 | while(!req.complete) | ||
1962 | pmu_poll(); | ||
1963 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
1964 | break; | ||
1965 | mdelay(15); | ||
1966 | } | ||
1967 | if (req.reply[0] != PMU_I2C_STATUS_OK) | ||
1968 | return -1; | ||
1969 | |||
1970 | for (retry=0; retry<16; retry++) { | ||
1971 | memset(&req, 0, sizeof(req)); | ||
1972 | |||
1973 | mdelay(15); | ||
1974 | |||
1975 | hdr->bus = PMU_I2C_BUS_STATUS; | ||
1976 | req.reply[0] = 0xff; | ||
1977 | |||
1978 | req.nbytes = 2; | ||
1979 | req.reply_expected = 0; | ||
1980 | req.reply_len = 0; | ||
1981 | req.data[0] = PMU_I2C_CMD; | ||
1982 | rc = pmu_queue_request(&req); | ||
1983 | if (rc) | ||
1984 | return rc; | ||
1985 | while(!req.complete) | ||
1986 | pmu_poll(); | ||
1987 | if (req.reply[0] == PMU_I2C_STATUS_DATAREAD) { | ||
1988 | memcpy(data, &req.reply[1], req.reply_len - 1); | ||
1989 | return req.reply_len - 1; | ||
1990 | } | ||
1991 | } | ||
1992 | return -1; | ||
1993 | } | ||
1994 | |||
1995 | int | ||
1996 | pmu_i2c_simple_write(int bus, int addr, u8* data, int len) | ||
1997 | { | ||
1998 | struct adb_request req; | ||
1999 | struct pmu_i2c_hdr *hdr = (struct pmu_i2c_hdr *)&req.data[1]; | ||
2000 | int retry; | ||
2001 | int rc; | ||
2002 | |||
2003 | for (retry=0; retry<16; retry++) { | ||
2004 | memset(&req, 0, sizeof(req)); | ||
2005 | |||
2006 | hdr->bus = bus; | ||
2007 | hdr->address = addr & 0xfe; | ||
2008 | hdr->mode = PMU_I2C_MODE_SIMPLE; | ||
2009 | hdr->bus2 = 0; | ||
2010 | hdr->sub_addr = 0; | ||
2011 | hdr->comb_addr = 0; | ||
2012 | hdr->count = len; | ||
2013 | |||
2014 | req.data[0] = PMU_I2C_CMD; | ||
2015 | memcpy(&req.data[sizeof(struct pmu_i2c_hdr) + 1], data, len); | ||
2016 | req.nbytes = sizeof(struct pmu_i2c_hdr) + len + 1; | ||
2017 | req.reply_expected = 0; | ||
2018 | req.reply_len = 0; | ||
2019 | req.reply[0] = 0xff; | ||
2020 | rc = pmu_queue_request(&req); | ||
2021 | if (rc) | ||
2022 | return rc; | ||
2023 | while(!req.complete) | ||
2024 | pmu_poll(); | ||
2025 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
2026 | break; | ||
2027 | mdelay(15); | ||
2028 | } | ||
2029 | if (req.reply[0] != PMU_I2C_STATUS_OK) | ||
2030 | return -1; | ||
2031 | |||
2032 | for (retry=0; retry<16; retry++) { | ||
2033 | memset(&req, 0, sizeof(req)); | ||
2034 | |||
2035 | mdelay(15); | ||
2036 | |||
2037 | hdr->bus = PMU_I2C_BUS_STATUS; | ||
2038 | req.reply[0] = 0xff; | ||
2039 | |||
2040 | req.nbytes = 2; | ||
2041 | req.reply_expected = 0; | ||
2042 | req.reply_len = 0; | ||
2043 | req.data[0] = PMU_I2C_CMD; | ||
2044 | rc = pmu_queue_request(&req); | ||
2045 | if (rc) | ||
2046 | return rc; | ||
2047 | while(!req.complete) | ||
2048 | pmu_poll(); | ||
2049 | if (req.reply[0] == PMU_I2C_STATUS_OK) | ||
2050 | return len; | ||
2051 | } | ||
2052 | return -1; | ||
2053 | } | ||
2054 | |||
2055 | #ifdef CONFIG_PMAC_PBOOK | ||
2056 | |||
2057 | static LIST_HEAD(sleep_notifiers); | ||
2058 | |||
2059 | int | ||
2060 | pmu_register_sleep_notifier(struct pmu_sleep_notifier *n) | ||
2061 | { | ||
2062 | struct list_head *list; | ||
2063 | struct pmu_sleep_notifier *notifier; | ||
2064 | |||
2065 | for (list = sleep_notifiers.next; list != &sleep_notifiers; | ||
2066 | list = list->next) { | ||
2067 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | ||
2068 | if (n->priority > notifier->priority) | ||
2069 | break; | ||
2070 | } | ||
2071 | __list_add(&n->list, list->prev, list); | ||
2072 | return 0; | ||
2073 | } | ||
2074 | |||
2075 | int | ||
2076 | pmu_unregister_sleep_notifier(struct pmu_sleep_notifier* n) | ||
2077 | { | ||
2078 | if (n->list.next == 0) | ||
2079 | return -ENOENT; | ||
2080 | list_del(&n->list); | ||
2081 | n->list.next = NULL; | ||
2082 | return 0; | ||
2083 | } | ||
2084 | |||
2085 | /* Sleep is broadcast last-to-first */ | ||
2086 | static int __pmac | ||
2087 | broadcast_sleep(int when, int fallback) | ||
2088 | { | ||
2089 | int ret = PBOOK_SLEEP_OK; | ||
2090 | struct list_head *list; | ||
2091 | struct pmu_sleep_notifier *notifier; | ||
2092 | |||
2093 | for (list = sleep_notifiers.prev; list != &sleep_notifiers; | ||
2094 | list = list->prev) { | ||
2095 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | ||
2096 | ret = notifier->notifier_call(notifier, when); | ||
2097 | if (ret != PBOOK_SLEEP_OK) { | ||
2098 | printk(KERN_DEBUG "sleep %d rejected by %p (%p)\n", | ||
2099 | when, notifier, notifier->notifier_call); | ||
2100 | for (; list != &sleep_notifiers; list = list->next) { | ||
2101 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | ||
2102 | notifier->notifier_call(notifier, fallback); | ||
2103 | } | ||
2104 | return ret; | ||
2105 | } | ||
2106 | } | ||
2107 | return ret; | ||
2108 | } | ||
2109 | |||
2110 | /* Wake is broadcast first-to-last */ | ||
2111 | static int __pmac | ||
2112 | broadcast_wake(void) | ||
2113 | { | ||
2114 | int ret = PBOOK_SLEEP_OK; | ||
2115 | struct list_head *list; | ||
2116 | struct pmu_sleep_notifier *notifier; | ||
2117 | |||
2118 | for (list = sleep_notifiers.next; list != &sleep_notifiers; | ||
2119 | list = list->next) { | ||
2120 | notifier = list_entry(list, struct pmu_sleep_notifier, list); | ||
2121 | notifier->notifier_call(notifier, PBOOK_WAKE); | ||
2122 | } | ||
2123 | return ret; | ||
2124 | } | ||
2125 | |||
2126 | /* | ||
2127 | * This struct is used to store config register values for | ||
2128 | * PCI devices which may get powered off when we sleep. | ||
2129 | */ | ||
2130 | static struct pci_save { | ||
2131 | #ifndef HACKED_PCI_SAVE | ||
2132 | u16 command; | ||
2133 | u16 cache_lat; | ||
2134 | u16 intr; | ||
2135 | u32 rom_address; | ||
2136 | #else | ||
2137 | u32 config[16]; | ||
2138 | #endif | ||
2139 | } *pbook_pci_saves; | ||
2140 | static int pbook_npci_saves; | ||
2141 | |||
2142 | static void __pmac | ||
2143 | pbook_alloc_pci_save(void) | ||
2144 | { | ||
2145 | int npci; | ||
2146 | struct pci_dev *pd = NULL; | ||
2147 | |||
2148 | npci = 0; | ||
2149 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | ||
2150 | ++npci; | ||
2151 | } | ||
2152 | if (npci == 0) | ||
2153 | return; | ||
2154 | pbook_pci_saves = (struct pci_save *) | ||
2155 | kmalloc(npci * sizeof(struct pci_save), GFP_KERNEL); | ||
2156 | pbook_npci_saves = npci; | ||
2157 | } | ||
2158 | |||
2159 | static void __pmac | ||
2160 | pbook_free_pci_save(void) | ||
2161 | { | ||
2162 | if (pbook_pci_saves == NULL) | ||
2163 | return; | ||
2164 | kfree(pbook_pci_saves); | ||
2165 | pbook_pci_saves = NULL; | ||
2166 | pbook_npci_saves = 0; | ||
2167 | } | ||
2168 | |||
2169 | static void __pmac | ||
2170 | pbook_pci_save(void) | ||
2171 | { | ||
2172 | struct pci_save *ps = pbook_pci_saves; | ||
2173 | struct pci_dev *pd = NULL; | ||
2174 | int npci = pbook_npci_saves; | ||
2175 | |||
2176 | if (ps == NULL) | ||
2177 | return; | ||
2178 | |||
2179 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | ||
2180 | if (npci-- == 0) | ||
2181 | return; | ||
2182 | #ifndef HACKED_PCI_SAVE | ||
2183 | pci_read_config_word(pd, PCI_COMMAND, &ps->command); | ||
2184 | pci_read_config_word(pd, PCI_CACHE_LINE_SIZE, &ps->cache_lat); | ||
2185 | pci_read_config_word(pd, PCI_INTERRUPT_LINE, &ps->intr); | ||
2186 | pci_read_config_dword(pd, PCI_ROM_ADDRESS, &ps->rom_address); | ||
2187 | #else | ||
2188 | int i; | ||
2189 | for (i=1;i<16;i++) | ||
2190 | pci_read_config_dword(pd, i<<4, &ps->config[i]); | ||
2191 | #endif | ||
2192 | ++ps; | ||
2193 | } | ||
2194 | } | ||
2195 | |||
2196 | /* For this to work, we must take care of a few things: If gmac was enabled | ||
2197 | * during boot, it will be in the pci dev list. If it's disabled at this point | ||
2198 | * (and it will probably be), then you can't access it's config space. | ||
2199 | */ | ||
2200 | static void __pmac | ||
2201 | pbook_pci_restore(void) | ||
2202 | { | ||
2203 | u16 cmd; | ||
2204 | struct pci_save *ps = pbook_pci_saves - 1; | ||
2205 | struct pci_dev *pd = NULL; | ||
2206 | int npci = pbook_npci_saves; | ||
2207 | int j; | ||
2208 | |||
2209 | while ((pd = pci_find_device(PCI_ANY_ID, PCI_ANY_ID, pd)) != NULL) { | ||
2210 | #ifdef HACKED_PCI_SAVE | ||
2211 | int i; | ||
2212 | if (npci-- == 0) | ||
2213 | return; | ||
2214 | ps++; | ||
2215 | for (i=2;i<16;i++) | ||
2216 | pci_write_config_dword(pd, i<<4, ps->config[i]); | ||
2217 | pci_write_config_dword(pd, 4, ps->config[1]); | ||
2218 | #else | ||
2219 | if (npci-- == 0) | ||
2220 | return; | ||
2221 | ps++; | ||
2222 | if (ps->command == 0) | ||
2223 | continue; | ||
2224 | pci_read_config_word(pd, PCI_COMMAND, &cmd); | ||
2225 | if ((ps->command & ~cmd) == 0) | ||
2226 | continue; | ||
2227 | switch (pd->hdr_type) { | ||
2228 | case PCI_HEADER_TYPE_NORMAL: | ||
2229 | for (j = 0; j < 6; ++j) | ||
2230 | pci_write_config_dword(pd, | ||
2231 | PCI_BASE_ADDRESS_0 + j*4, | ||
2232 | pd->resource[j].start); | ||
2233 | pci_write_config_dword(pd, PCI_ROM_ADDRESS, | ||
2234 | ps->rom_address); | ||
2235 | pci_write_config_word(pd, PCI_CACHE_LINE_SIZE, | ||
2236 | ps->cache_lat); | ||
2237 | pci_write_config_word(pd, PCI_INTERRUPT_LINE, | ||
2238 | ps->intr); | ||
2239 | pci_write_config_word(pd, PCI_COMMAND, ps->command); | ||
2240 | break; | ||
2241 | } | ||
2242 | #endif | ||
2243 | } | ||
2244 | } | ||
2245 | |||
2246 | #ifdef DEBUG_SLEEP | ||
2247 | /* N.B. This doesn't work on the 3400 */ | ||
2248 | void __pmac | ||
2249 | pmu_blink(int n) | ||
2250 | { | ||
2251 | struct adb_request req; | ||
2252 | |||
2253 | memset(&req, 0, sizeof(req)); | ||
2254 | |||
2255 | for (; n > 0; --n) { | ||
2256 | req.nbytes = 4; | ||
2257 | req.done = NULL; | ||
2258 | req.data[0] = 0xee; | ||
2259 | req.data[1] = 4; | ||
2260 | req.data[2] = 0; | ||
2261 | req.data[3] = 1; | ||
2262 | req.reply[0] = ADB_RET_OK; | ||
2263 | req.reply_len = 1; | ||
2264 | req.reply_expected = 0; | ||
2265 | pmu_polled_request(&req); | ||
2266 | mdelay(50); | ||
2267 | req.nbytes = 4; | ||
2268 | req.done = NULL; | ||
2269 | req.data[0] = 0xee; | ||
2270 | req.data[1] = 4; | ||
2271 | req.data[2] = 0; | ||
2272 | req.data[3] = 0; | ||
2273 | req.reply[0] = ADB_RET_OK; | ||
2274 | req.reply_len = 1; | ||
2275 | req.reply_expected = 0; | ||
2276 | pmu_polled_request(&req); | ||
2277 | mdelay(50); | ||
2278 | } | ||
2279 | mdelay(50); | ||
2280 | } | ||
2281 | #endif | ||
2282 | |||
2283 | /* | ||
2284 | * Put the powerbook to sleep. | ||
2285 | */ | ||
2286 | |||
2287 | static u32 save_via[8] __pmacdata; | ||
2288 | |||
2289 | static void __pmac | ||
2290 | save_via_state(void) | ||
2291 | { | ||
2292 | save_via[0] = in_8(&via[ANH]); | ||
2293 | save_via[1] = in_8(&via[DIRA]); | ||
2294 | save_via[2] = in_8(&via[B]); | ||
2295 | save_via[3] = in_8(&via[DIRB]); | ||
2296 | save_via[4] = in_8(&via[PCR]); | ||
2297 | save_via[5] = in_8(&via[ACR]); | ||
2298 | save_via[6] = in_8(&via[T1CL]); | ||
2299 | save_via[7] = in_8(&via[T1CH]); | ||
2300 | } | ||
2301 | static void __pmac | ||
2302 | restore_via_state(void) | ||
2303 | { | ||
2304 | out_8(&via[ANH], save_via[0]); | ||
2305 | out_8(&via[DIRA], save_via[1]); | ||
2306 | out_8(&via[B], save_via[2]); | ||
2307 | out_8(&via[DIRB], save_via[3]); | ||
2308 | out_8(&via[PCR], save_via[4]); | ||
2309 | out_8(&via[ACR], save_via[5]); | ||
2310 | out_8(&via[T1CL], save_via[6]); | ||
2311 | out_8(&via[T1CH], save_via[7]); | ||
2312 | out_8(&via[IER], IER_CLR | 0x7f); /* disable all intrs */ | ||
2313 | out_8(&via[IFR], 0x7f); /* clear IFR */ | ||
2314 | out_8(&via[IER], IER_SET | SR_INT | CB1_INT); | ||
2315 | } | ||
2316 | |||
2317 | static int __pmac | ||
2318 | pmac_suspend_devices(void) | ||
2319 | { | ||
2320 | int ret; | ||
2321 | |||
2322 | pm_prepare_console(); | ||
2323 | |||
2324 | /* Notify old-style device drivers & userland */ | ||
2325 | ret = broadcast_sleep(PBOOK_SLEEP_REQUEST, PBOOK_SLEEP_REJECT); | ||
2326 | if (ret != PBOOK_SLEEP_OK) { | ||
2327 | printk(KERN_ERR "Sleep rejected by drivers\n"); | ||
2328 | return -EBUSY; | ||
2329 | } | ||
2330 | |||
2331 | /* Sync the disks. */ | ||
2332 | /* XXX It would be nice to have some way to ensure that | ||
2333 | * nobody is dirtying any new buffers while we wait. That | ||
2334 | * could be achieved using the refrigerator for processes | ||
2335 | * that swsusp uses | ||
2336 | */ | ||
2337 | sys_sync(); | ||
2338 | |||
2339 | /* Sleep can fail now. May not be very robust but useful for debugging */ | ||
2340 | ret = broadcast_sleep(PBOOK_SLEEP_NOW, PBOOK_WAKE); | ||
2341 | if (ret != PBOOK_SLEEP_OK) { | ||
2342 | printk(KERN_ERR "Driver sleep failed\n"); | ||
2343 | return -EBUSY; | ||
2344 | } | ||
2345 | |||
2346 | /* Send suspend call to devices, hold the device core's dpm_sem */ | ||
2347 | ret = device_suspend(PMSG_SUSPEND); | ||
2348 | if (ret) { | ||
2349 | broadcast_wake(); | ||
2350 | printk(KERN_ERR "Driver sleep failed\n"); | ||
2351 | return -EBUSY; | ||
2352 | } | ||
2353 | |||
2354 | preempt_disable(); | ||
2355 | |||
2356 | /* Make sure the decrementer won't interrupt us */ | ||
2357 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | ||
2358 | /* Make sure any pending DEC interrupt occurring while we did | ||
2359 | * the above didn't re-enable the DEC */ | ||
2360 | mb(); | ||
2361 | asm volatile("mtdec %0" : : "r" (0x7fffffff)); | ||
2362 | |||
2363 | /* We can now disable MSR_EE. This code of course works properly only | ||
2364 | * on UP machines... For SMP, if we ever implement sleep, we'll have to | ||
2365 | * stop the "other" CPUs way before we do all that stuff. | ||
2366 | */ | ||
2367 | local_irq_disable(); | ||
2368 | |||
2369 | /* Broadcast power down irq | ||
2370 | * This isn't that useful in most cases (only directly wired devices can | ||
2371 | * use this but still... This will take care of sysdev's as well, so | ||
2372 | * we exit from here with local irqs disabled and PIC off. | ||
2373 | */ | ||
2374 | ret = device_power_down(PM_SUSPEND_MEM); | ||
2375 | if (ret) { | ||
2376 | wakeup_decrementer(); | ||
2377 | local_irq_enable(); | ||
2378 | preempt_enable(); | ||
2379 | device_resume(); | ||
2380 | broadcast_wake(); | ||
2381 | printk(KERN_ERR "Driver powerdown failed\n"); | ||
2382 | return -EBUSY; | ||
2383 | } | ||
2384 | |||
2385 | /* Wait for completion of async backlight requests */ | ||
2386 | while (!bright_req_1.complete || !bright_req_2.complete || | ||
2387 | !batt_req.complete) | ||
2388 | pmu_poll(); | ||
2389 | |||
2390 | /* Giveup the lazy FPU & vec so we don't have to back them | ||
2391 | * up from the low level code | ||
2392 | */ | ||
2393 | enable_kernel_fp(); | ||
2394 | |||
2395 | #ifdef CONFIG_ALTIVEC | ||
2396 | if (cpu_has_feature(CPU_FTR_ALTIVEC)) | ||
2397 | enable_kernel_altivec(); | ||
2398 | #endif /* CONFIG_ALTIVEC */ | ||
2399 | |||
2400 | return 0; | ||
2401 | } | ||
2402 | |||
2403 | static int __pmac | ||
2404 | pmac_wakeup_devices(void) | ||
2405 | { | ||
2406 | mdelay(100); | ||
2407 | |||
2408 | /* Power back up system devices (including the PIC) */ | ||
2409 | device_power_up(); | ||
2410 | |||
2411 | /* Force a poll of ADB interrupts */ | ||
2412 | adb_int_pending = 1; | ||
2413 | via_pmu_interrupt(0, NULL, NULL); | ||
2414 | |||
2415 | /* Restart jiffies & scheduling */ | ||
2416 | wakeup_decrementer(); | ||
2417 | |||
2418 | /* Re-enable local CPU interrupts */ | ||
2419 | local_irq_enable(); | ||
2420 | |||
2421 | mdelay(100); | ||
2422 | |||
2423 | preempt_enable(); | ||
2424 | |||
2425 | /* Resume devices */ | ||
2426 | device_resume(); | ||
2427 | |||
2428 | /* Notify old style drivers */ | ||
2429 | broadcast_wake(); | ||
2430 | |||
2431 | pm_restore_console(); | ||
2432 | |||
2433 | return 0; | ||
2434 | } | ||
2435 | |||
2436 | #define GRACKLE_PM (1<<7) | ||
2437 | #define GRACKLE_DOZE (1<<5) | ||
2438 | #define GRACKLE_NAP (1<<4) | ||
2439 | #define GRACKLE_SLEEP (1<<3) | ||
2440 | |||
2441 | int __pmac | ||
2442 | powerbook_sleep_grackle(void) | ||
2443 | { | ||
2444 | unsigned long save_l2cr; | ||
2445 | unsigned short pmcr1; | ||
2446 | struct adb_request req; | ||
2447 | int ret; | ||
2448 | struct pci_dev *grackle; | ||
2449 | |||
2450 | grackle = pci_find_slot(0, 0); | ||
2451 | if (!grackle) | ||
2452 | return -ENODEV; | ||
2453 | |||
2454 | ret = pmac_suspend_devices(); | ||
2455 | if (ret) { | ||
2456 | printk(KERN_ERR "Sleep rejected by devices\n"); | ||
2457 | return ret; | ||
2458 | } | ||
2459 | |||
2460 | /* Turn off various things. Darwin does some retry tests here... */ | ||
2461 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, PMU_POW0_OFF|PMU_POW0_HARD_DRIVE); | ||
2462 | pmu_wait_complete(&req); | ||
2463 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | ||
2464 | PMU_POW_OFF|PMU_POW_BACKLIGHT|PMU_POW_IRLED|PMU_POW_MEDIABAY); | ||
2465 | pmu_wait_complete(&req); | ||
2466 | |||
2467 | /* For 750, save backside cache setting and disable it */ | ||
2468 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | ||
2469 | |||
2470 | if (!__fake_sleep) { | ||
2471 | /* Ask the PMU to put us to sleep */ | ||
2472 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | ||
2473 | pmu_wait_complete(&req); | ||
2474 | } | ||
2475 | |||
2476 | /* The VIA is supposed not to be restored correctly*/ | ||
2477 | save_via_state(); | ||
2478 | /* We shut down some HW */ | ||
2479 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | ||
2480 | |||
2481 | pci_read_config_word(grackle, 0x70, &pmcr1); | ||
2482 | /* Apparently, MacOS uses NAP mode for Grackle ??? */ | ||
2483 | pmcr1 &= ~(GRACKLE_DOZE|GRACKLE_SLEEP); | ||
2484 | pmcr1 |= GRACKLE_PM|GRACKLE_NAP; | ||
2485 | pci_write_config_word(grackle, 0x70, pmcr1); | ||
2486 | |||
2487 | /* Call low-level ASM sleep handler */ | ||
2488 | if (__fake_sleep) | ||
2489 | mdelay(5000); | ||
2490 | else | ||
2491 | low_sleep_handler(); | ||
2492 | |||
2493 | /* We're awake again, stop grackle PM */ | ||
2494 | pci_read_config_word(grackle, 0x70, &pmcr1); | ||
2495 | pmcr1 &= ~(GRACKLE_PM|GRACKLE_DOZE|GRACKLE_SLEEP|GRACKLE_NAP); | ||
2496 | pci_write_config_word(grackle, 0x70, pmcr1); | ||
2497 | |||
2498 | /* Make sure the PMU is idle */ | ||
2499 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | ||
2500 | restore_via_state(); | ||
2501 | |||
2502 | /* Restore L2 cache */ | ||
2503 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | ||
2504 | _set_L2CR(save_l2cr); | ||
2505 | |||
2506 | /* Restore userland MMU context */ | ||
2507 | set_context(current->active_mm->context, current->active_mm->pgd); | ||
2508 | |||
2509 | /* Power things up */ | ||
2510 | pmu_unlock(); | ||
2511 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | ||
2512 | pmu_wait_complete(&req); | ||
2513 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL0, | ||
2514 | PMU_POW0_ON|PMU_POW0_HARD_DRIVE); | ||
2515 | pmu_wait_complete(&req); | ||
2516 | pmu_request(&req, NULL, 2, PMU_POWER_CTRL, | ||
2517 | PMU_POW_ON|PMU_POW_BACKLIGHT|PMU_POW_CHARGER|PMU_POW_IRLED|PMU_POW_MEDIABAY); | ||
2518 | pmu_wait_complete(&req); | ||
2519 | |||
2520 | pmac_wakeup_devices(); | ||
2521 | |||
2522 | return 0; | ||
2523 | } | ||
2524 | |||
2525 | static int __pmac | ||
2526 | powerbook_sleep_Core99(void) | ||
2527 | { | ||
2528 | unsigned long save_l2cr; | ||
2529 | unsigned long save_l3cr; | ||
2530 | struct adb_request req; | ||
2531 | int ret; | ||
2532 | |||
2533 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) { | ||
2534 | printk(KERN_ERR "Sleep mode not supported on this machine\n"); | ||
2535 | return -ENOSYS; | ||
2536 | } | ||
2537 | |||
2538 | if (num_online_cpus() > 1 || cpu_is_offline(0)) | ||
2539 | return -EAGAIN; | ||
2540 | |||
2541 | ret = pmac_suspend_devices(); | ||
2542 | if (ret) { | ||
2543 | printk(KERN_ERR "Sleep rejected by devices\n"); | ||
2544 | return ret; | ||
2545 | } | ||
2546 | |||
2547 | printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1)); | ||
2548 | |||
2549 | /* Tell PMU what events will wake us up */ | ||
2550 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_CLR_WAKEUP_EVENTS, | ||
2551 | 0xff, 0xff); | ||
2552 | pmu_wait_complete(&req); | ||
2553 | pmu_request(&req, NULL, 4, PMU_POWER_EVENTS, PMU_PWR_SET_WAKEUP_EVENTS, | ||
2554 | 0, PMU_PWR_WAKEUP_KEY | | ||
2555 | (option_lid_wakeup ? PMU_PWR_WAKEUP_LID_OPEN : 0)); | ||
2556 | pmu_wait_complete(&req); | ||
2557 | |||
2558 | /* Save the state of the L2 and L3 caches */ | ||
2559 | save_l3cr = _get_L3CR(); /* (returns -1 if not available) */ | ||
2560 | save_l2cr = _get_L2CR(); /* (returns -1 if not available) */ | ||
2561 | |||
2562 | if (!__fake_sleep) { | ||
2563 | /* Ask the PMU to put us to sleep */ | ||
2564 | pmu_request(&req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | ||
2565 | pmu_wait_complete(&req); | ||
2566 | } | ||
2567 | |||
2568 | /* The VIA is supposed not to be restored correctly*/ | ||
2569 | save_via_state(); | ||
2570 | |||
2571 | /* Shut down various ASICs. There's a chance that we can no longer | ||
2572 | * talk to the PMU after this, so I moved it to _after_ sending the | ||
2573 | * sleep command to it. Still need to be checked. | ||
2574 | */ | ||
2575 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 1); | ||
2576 | |||
2577 | /* Call low-level ASM sleep handler */ | ||
2578 | if (__fake_sleep) | ||
2579 | mdelay(5000); | ||
2580 | else | ||
2581 | low_sleep_handler(); | ||
2582 | |||
2583 | /* Restore Apple core ASICs state */ | ||
2584 | pmac_call_feature(PMAC_FTR_SLEEP_STATE, NULL, 0, 0); | ||
2585 | |||
2586 | /* Restore VIA */ | ||
2587 | restore_via_state(); | ||
2588 | |||
2589 | /* Restore video */ | ||
2590 | pmac_call_early_video_resume(); | ||
2591 | |||
2592 | /* Restore L2 cache */ | ||
2593 | if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0) | ||
2594 | _set_L2CR(save_l2cr); | ||
2595 | /* Restore L3 cache */ | ||
2596 | if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0) | ||
2597 | _set_L3CR(save_l3cr); | ||
2598 | |||
2599 | /* Restore userland MMU context */ | ||
2600 | set_context(current->active_mm->context, current->active_mm->pgd); | ||
2601 | |||
2602 | /* Tell PMU we are ready */ | ||
2603 | pmu_unlock(); | ||
2604 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | ||
2605 | pmu_wait_complete(&req); | ||
2606 | pmu_request(&req, NULL, 2, PMU_SET_INTR_MASK, pmu_intr_mask); | ||
2607 | pmu_wait_complete(&req); | ||
2608 | |||
2609 | printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1)); | ||
2610 | |||
2611 | pmac_wakeup_devices(); | ||
2612 | |||
2613 | return 0; | ||
2614 | } | ||
2615 | |||
2616 | #define PB3400_MEM_CTRL 0xf8000000 | ||
2617 | #define PB3400_MEM_CTRL_SLEEP 0x70 | ||
2618 | |||
2619 | static int __pmac | ||
2620 | powerbook_sleep_3400(void) | ||
2621 | { | ||
2622 | int ret, i, x; | ||
2623 | unsigned int hid0; | ||
2624 | unsigned long p; | ||
2625 | struct adb_request sleep_req; | ||
2626 | void __iomem *mem_ctrl; | ||
2627 | unsigned int __iomem *mem_ctrl_sleep; | ||
2628 | |||
2629 | /* first map in the memory controller registers */ | ||
2630 | mem_ctrl = ioremap(PB3400_MEM_CTRL, 0x100); | ||
2631 | if (mem_ctrl == NULL) { | ||
2632 | printk("powerbook_sleep_3400: ioremap failed\n"); | ||
2633 | return -ENOMEM; | ||
2634 | } | ||
2635 | mem_ctrl_sleep = mem_ctrl + PB3400_MEM_CTRL_SLEEP; | ||
2636 | |||
2637 | /* Allocate room for PCI save */ | ||
2638 | pbook_alloc_pci_save(); | ||
2639 | |||
2640 | ret = pmac_suspend_devices(); | ||
2641 | if (ret) { | ||
2642 | pbook_free_pci_save(); | ||
2643 | printk(KERN_ERR "Sleep rejected by devices\n"); | ||
2644 | return ret; | ||
2645 | } | ||
2646 | |||
2647 | /* Save the state of PCI config space for some slots */ | ||
2648 | pbook_pci_save(); | ||
2649 | |||
2650 | /* Set the memory controller to keep the memory refreshed | ||
2651 | while we're asleep */ | ||
2652 | for (i = 0x403f; i >= 0x4000; --i) { | ||
2653 | out_be32(mem_ctrl_sleep, i); | ||
2654 | do { | ||
2655 | x = (in_be32(mem_ctrl_sleep) >> 16) & 0x3ff; | ||
2656 | } while (x == 0); | ||
2657 | if (x >= 0x100) | ||
2658 | break; | ||
2659 | } | ||
2660 | |||
2661 | /* Ask the PMU to put us to sleep */ | ||
2662 | pmu_request(&sleep_req, NULL, 5, PMU_SLEEP, 'M', 'A', 'T', 'T'); | ||
2663 | while (!sleep_req.complete) | ||
2664 | mb(); | ||
2665 | |||
2666 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,1); | ||
2667 | |||
2668 | /* displacement-flush the L2 cache - necessary? */ | ||
2669 | for (p = KERNELBASE; p < KERNELBASE + 0x100000; p += 0x1000) | ||
2670 | i = *(volatile int *)p; | ||
2671 | asleep = 1; | ||
2672 | |||
2673 | /* Put the CPU into sleep mode */ | ||
2674 | asm volatile("mfspr %0,1008" : "=r" (hid0) :); | ||
2675 | hid0 = (hid0 & ~(HID0_NAP | HID0_DOZE)) | HID0_SLEEP; | ||
2676 | asm volatile("mtspr 1008,%0" : : "r" (hid0)); | ||
2677 | _nmask_and_or_msr(0, MSR_POW | MSR_EE); | ||
2678 | udelay(10); | ||
2679 | |||
2680 | /* OK, we're awake again, start restoring things */ | ||
2681 | out_be32(mem_ctrl_sleep, 0x3f); | ||
2682 | pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,0); | ||
2683 | pbook_pci_restore(); | ||
2684 | pmu_unlock(); | ||
2685 | |||
2686 | /* wait for the PMU interrupt sequence to complete */ | ||
2687 | while (asleep) | ||
2688 | mb(); | ||
2689 | |||
2690 | pmac_wakeup_devices(); | ||
2691 | pbook_free_pci_save(); | ||
2692 | iounmap(mem_ctrl); | ||
2693 | |||
2694 | return 0; | ||
2695 | } | ||
2696 | |||
2697 | /* | ||
2698 | * Support for /dev/pmu device | ||
2699 | */ | ||
2700 | #define RB_SIZE 0x10 | ||
2701 | struct pmu_private { | ||
2702 | struct list_head list; | ||
2703 | int rb_get; | ||
2704 | int rb_put; | ||
2705 | struct rb_entry { | ||
2706 | unsigned short len; | ||
2707 | unsigned char data[16]; | ||
2708 | } rb_buf[RB_SIZE]; | ||
2709 | wait_queue_head_t wait; | ||
2710 | spinlock_t lock; | ||
2711 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | ||
2712 | int backlight_locker; | ||
2713 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | ||
2714 | }; | ||
2715 | |||
2716 | static LIST_HEAD(all_pmu_pvt); | ||
2717 | static DEFINE_SPINLOCK(all_pvt_lock __pmacdata); | ||
2718 | |||
2719 | static void __pmac | ||
2720 | pmu_pass_intr(unsigned char *data, int len) | ||
2721 | { | ||
2722 | struct pmu_private *pp; | ||
2723 | struct list_head *list; | ||
2724 | int i; | ||
2725 | unsigned long flags; | ||
2726 | |||
2727 | if (len > sizeof(pp->rb_buf[0].data)) | ||
2728 | len = sizeof(pp->rb_buf[0].data); | ||
2729 | spin_lock_irqsave(&all_pvt_lock, flags); | ||
2730 | for (list = &all_pmu_pvt; (list = list->next) != &all_pmu_pvt; ) { | ||
2731 | pp = list_entry(list, struct pmu_private, list); | ||
2732 | spin_lock(&pp->lock); | ||
2733 | i = pp->rb_put + 1; | ||
2734 | if (i >= RB_SIZE) | ||
2735 | i = 0; | ||
2736 | if (i != pp->rb_get) { | ||
2737 | struct rb_entry *rp = &pp->rb_buf[pp->rb_put]; | ||
2738 | rp->len = len; | ||
2739 | memcpy(rp->data, data, len); | ||
2740 | pp->rb_put = i; | ||
2741 | wake_up_interruptible(&pp->wait); | ||
2742 | } | ||
2743 | spin_unlock(&pp->lock); | ||
2744 | } | ||
2745 | spin_unlock_irqrestore(&all_pvt_lock, flags); | ||
2746 | } | ||
2747 | |||
2748 | static int __pmac | ||
2749 | pmu_open(struct inode *inode, struct file *file) | ||
2750 | { | ||
2751 | struct pmu_private *pp; | ||
2752 | unsigned long flags; | ||
2753 | |||
2754 | pp = kmalloc(sizeof(struct pmu_private), GFP_KERNEL); | ||
2755 | if (pp == 0) | ||
2756 | return -ENOMEM; | ||
2757 | pp->rb_get = pp->rb_put = 0; | ||
2758 | spin_lock_init(&pp->lock); | ||
2759 | init_waitqueue_head(&pp->wait); | ||
2760 | spin_lock_irqsave(&all_pvt_lock, flags); | ||
2761 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | ||
2762 | pp->backlight_locker = 0; | ||
2763 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | ||
2764 | list_add(&pp->list, &all_pmu_pvt); | ||
2765 | spin_unlock_irqrestore(&all_pvt_lock, flags); | ||
2766 | file->private_data = pp; | ||
2767 | return 0; | ||
2768 | } | ||
2769 | |||
2770 | static ssize_t __pmac | ||
2771 | pmu_read(struct file *file, char __user *buf, | ||
2772 | size_t count, loff_t *ppos) | ||
2773 | { | ||
2774 | struct pmu_private *pp = file->private_data; | ||
2775 | DECLARE_WAITQUEUE(wait, current); | ||
2776 | unsigned long flags; | ||
2777 | int ret = 0; | ||
2778 | |||
2779 | if (count < 1 || pp == 0) | ||
2780 | return -EINVAL; | ||
2781 | if (!access_ok(VERIFY_WRITE, buf, count)) | ||
2782 | return -EFAULT; | ||
2783 | |||
2784 | spin_lock_irqsave(&pp->lock, flags); | ||
2785 | add_wait_queue(&pp->wait, &wait); | ||
2786 | current->state = TASK_INTERRUPTIBLE; | ||
2787 | |||
2788 | for (;;) { | ||
2789 | ret = -EAGAIN; | ||
2790 | if (pp->rb_get != pp->rb_put) { | ||
2791 | int i = pp->rb_get; | ||
2792 | struct rb_entry *rp = &pp->rb_buf[i]; | ||
2793 | ret = rp->len; | ||
2794 | spin_unlock_irqrestore(&pp->lock, flags); | ||
2795 | if (ret > count) | ||
2796 | ret = count; | ||
2797 | if (ret > 0 && copy_to_user(buf, rp->data, ret)) | ||
2798 | ret = -EFAULT; | ||
2799 | if (++i >= RB_SIZE) | ||
2800 | i = 0; | ||
2801 | spin_lock_irqsave(&pp->lock, flags); | ||
2802 | pp->rb_get = i; | ||
2803 | } | ||
2804 | if (ret >= 0) | ||
2805 | break; | ||
2806 | if (file->f_flags & O_NONBLOCK) | ||
2807 | break; | ||
2808 | ret = -ERESTARTSYS; | ||
2809 | if (signal_pending(current)) | ||
2810 | break; | ||
2811 | spin_unlock_irqrestore(&pp->lock, flags); | ||
2812 | schedule(); | ||
2813 | spin_lock_irqsave(&pp->lock, flags); | ||
2814 | } | ||
2815 | current->state = TASK_RUNNING; | ||
2816 | remove_wait_queue(&pp->wait, &wait); | ||
2817 | spin_unlock_irqrestore(&pp->lock, flags); | ||
2818 | |||
2819 | return ret; | ||
2820 | } | ||
2821 | |||
2822 | static ssize_t __pmac | ||
2823 | pmu_write(struct file *file, const char __user *buf, | ||
2824 | size_t count, loff_t *ppos) | ||
2825 | { | ||
2826 | return 0; | ||
2827 | } | ||
2828 | |||
2829 | static unsigned int __pmac | ||
2830 | pmu_fpoll(struct file *filp, poll_table *wait) | ||
2831 | { | ||
2832 | struct pmu_private *pp = filp->private_data; | ||
2833 | unsigned int mask = 0; | ||
2834 | unsigned long flags; | ||
2835 | |||
2836 | if (pp == 0) | ||
2837 | return 0; | ||
2838 | poll_wait(filp, &pp->wait, wait); | ||
2839 | spin_lock_irqsave(&pp->lock, flags); | ||
2840 | if (pp->rb_get != pp->rb_put) | ||
2841 | mask |= POLLIN; | ||
2842 | spin_unlock_irqrestore(&pp->lock, flags); | ||
2843 | return mask; | ||
2844 | } | ||
2845 | |||
2846 | static int __pmac | ||
2847 | pmu_release(struct inode *inode, struct file *file) | ||
2848 | { | ||
2849 | struct pmu_private *pp = file->private_data; | ||
2850 | unsigned long flags; | ||
2851 | |||
2852 | lock_kernel(); | ||
2853 | if (pp != 0) { | ||
2854 | file->private_data = NULL; | ||
2855 | spin_lock_irqsave(&all_pvt_lock, flags); | ||
2856 | list_del(&pp->list); | ||
2857 | spin_unlock_irqrestore(&all_pvt_lock, flags); | ||
2858 | #if defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) | ||
2859 | if (pp->backlight_locker) { | ||
2860 | spin_lock_irqsave(&pmu_lock, flags); | ||
2861 | disable_kernel_backlight--; | ||
2862 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
2863 | } | ||
2864 | #endif /* defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_PMAC_BACKLIGHT) */ | ||
2865 | kfree(pp); | ||
2866 | } | ||
2867 | unlock_kernel(); | ||
2868 | return 0; | ||
2869 | } | ||
2870 | |||
2871 | /* Note: removed __openfirmware here since it causes link errors */ | ||
2872 | static int __pmac | ||
2873 | pmu_ioctl(struct inode * inode, struct file *filp, | ||
2874 | u_int cmd, u_long arg) | ||
2875 | { | ||
2876 | struct pmu_private *pp = filp->private_data; | ||
2877 | __u32 __user *argp = (__u32 __user *)arg; | ||
2878 | int error; | ||
2879 | |||
2880 | switch (cmd) { | ||
2881 | case PMU_IOC_SLEEP: | ||
2882 | if (!capable(CAP_SYS_ADMIN)) | ||
2883 | return -EACCES; | ||
2884 | if (sleep_in_progress) | ||
2885 | return -EBUSY; | ||
2886 | sleep_in_progress = 1; | ||
2887 | switch (pmu_kind) { | ||
2888 | case PMU_OHARE_BASED: | ||
2889 | error = powerbook_sleep_3400(); | ||
2890 | break; | ||
2891 | case PMU_HEATHROW_BASED: | ||
2892 | case PMU_PADDINGTON_BASED: | ||
2893 | error = powerbook_sleep_grackle(); | ||
2894 | break; | ||
2895 | case PMU_KEYLARGO_BASED: | ||
2896 | error = powerbook_sleep_Core99(); | ||
2897 | break; | ||
2898 | default: | ||
2899 | error = -ENOSYS; | ||
2900 | } | ||
2901 | sleep_in_progress = 0; | ||
2902 | return error; | ||
2903 | case PMU_IOC_CAN_SLEEP: | ||
2904 | if (pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,0,-1) < 0) | ||
2905 | return put_user(0, argp); | ||
2906 | else | ||
2907 | return put_user(1, argp); | ||
2908 | |||
2909 | #ifdef CONFIG_PMAC_BACKLIGHT | ||
2910 | /* Backlight should have its own device or go via | ||
2911 | * the fbdev | ||
2912 | */ | ||
2913 | case PMU_IOC_GET_BACKLIGHT: | ||
2914 | if (sleep_in_progress) | ||
2915 | return -EBUSY; | ||
2916 | error = get_backlight_level(); | ||
2917 | if (error < 0) | ||
2918 | return error; | ||
2919 | return put_user(error, argp); | ||
2920 | case PMU_IOC_SET_BACKLIGHT: | ||
2921 | { | ||
2922 | __u32 value; | ||
2923 | if (sleep_in_progress) | ||
2924 | return -EBUSY; | ||
2925 | error = get_user(value, argp); | ||
2926 | if (!error) | ||
2927 | error = set_backlight_level(value); | ||
2928 | return error; | ||
2929 | } | ||
2930 | #ifdef CONFIG_INPUT_ADBHID | ||
2931 | case PMU_IOC_GRAB_BACKLIGHT: { | ||
2932 | unsigned long flags; | ||
2933 | if (pp->backlight_locker) | ||
2934 | return 0; | ||
2935 | pp->backlight_locker = 1; | ||
2936 | spin_lock_irqsave(&pmu_lock, flags); | ||
2937 | disable_kernel_backlight++; | ||
2938 | spin_unlock_irqrestore(&pmu_lock, flags); | ||
2939 | return 0; | ||
2940 | } | ||
2941 | #endif /* CONFIG_INPUT_ADBHID */ | ||
2942 | #endif /* CONFIG_PMAC_BACKLIGHT */ | ||
2943 | case PMU_IOC_GET_MODEL: | ||
2944 | return put_user(pmu_kind, argp); | ||
2945 | case PMU_IOC_HAS_ADB: | ||
2946 | return put_user(pmu_has_adb, argp); | ||
2947 | } | ||
2948 | return -EINVAL; | ||
2949 | } | ||
2950 | |||
2951 | static struct file_operations pmu_device_fops __pmacdata = { | ||
2952 | .read = pmu_read, | ||
2953 | .write = pmu_write, | ||
2954 | .poll = pmu_fpoll, | ||
2955 | .ioctl = pmu_ioctl, | ||
2956 | .open = pmu_open, | ||
2957 | .release = pmu_release, | ||
2958 | }; | ||
2959 | |||
2960 | static struct miscdevice pmu_device __pmacdata = { | ||
2961 | PMU_MINOR, "pmu", &pmu_device_fops | ||
2962 | }; | ||
2963 | |||
2964 | void pmu_device_init(void) | ||
2965 | { | ||
2966 | if (!via) | ||
2967 | return; | ||
2968 | if (misc_register(&pmu_device) < 0) | ||
2969 | printk(KERN_ERR "via-pmu: cannot register misc device.\n"); | ||
2970 | } | ||
2971 | #endif /* CONFIG_PMAC_PBOOK */ | ||
2972 | |||
2973 | #ifdef DEBUG_SLEEP | ||
2974 | static inline void __pmac | ||
2975 | polled_handshake(volatile unsigned char __iomem *via) | ||
2976 | { | ||
2977 | via[B] &= ~TREQ; eieio(); | ||
2978 | while ((via[B] & TACK) != 0) | ||
2979 | ; | ||
2980 | via[B] |= TREQ; eieio(); | ||
2981 | while ((via[B] & TACK) == 0) | ||
2982 | ; | ||
2983 | } | ||
2984 | |||
2985 | static inline void __pmac | ||
2986 | polled_send_byte(volatile unsigned char __iomem *via, int x) | ||
2987 | { | ||
2988 | via[ACR] |= SR_OUT | SR_EXT; eieio(); | ||
2989 | via[SR] = x; eieio(); | ||
2990 | polled_handshake(via); | ||
2991 | } | ||
2992 | |||
2993 | static inline int __pmac | ||
2994 | polled_recv_byte(volatile unsigned char __iomem *via) | ||
2995 | { | ||
2996 | int x; | ||
2997 | |||
2998 | via[ACR] = (via[ACR] & ~SR_OUT) | SR_EXT; eieio(); | ||
2999 | x = via[SR]; eieio(); | ||
3000 | polled_handshake(via); | ||
3001 | x = via[SR]; eieio(); | ||
3002 | return x; | ||
3003 | } | ||
3004 | |||
3005 | int __pmac | ||
3006 | pmu_polled_request(struct adb_request *req) | ||
3007 | { | ||
3008 | unsigned long flags; | ||
3009 | int i, l, c; | ||
3010 | volatile unsigned char __iomem *v = via; | ||
3011 | |||
3012 | req->complete = 1; | ||
3013 | c = req->data[0]; | ||
3014 | l = pmu_data_len[c][0]; | ||
3015 | if (l >= 0 && req->nbytes != l + 1) | ||
3016 | return -EINVAL; | ||
3017 | |||
3018 | local_irq_save(flags); | ||
3019 | while (pmu_state != idle) | ||
3020 | pmu_poll(); | ||
3021 | |||
3022 | while ((via[B] & TACK) == 0) | ||
3023 | ; | ||
3024 | polled_send_byte(v, c); | ||
3025 | if (l < 0) { | ||
3026 | l = req->nbytes - 1; | ||
3027 | polled_send_byte(v, l); | ||
3028 | } | ||
3029 | for (i = 1; i <= l; ++i) | ||
3030 | polled_send_byte(v, req->data[i]); | ||
3031 | |||
3032 | l = pmu_data_len[c][1]; | ||
3033 | if (l < 0) | ||
3034 | l = polled_recv_byte(v); | ||
3035 | for (i = 0; i < l; ++i) | ||
3036 | req->reply[i + req->reply_len] = polled_recv_byte(v); | ||
3037 | |||
3038 | if (req->done) | ||
3039 | (*req->done)(req); | ||
3040 | |||
3041 | local_irq_restore(flags); | ||
3042 | return 0; | ||
3043 | } | ||
3044 | #endif /* DEBUG_SLEEP */ | ||
3045 | |||
3046 | |||
3047 | /* FIXME: This is a temporary set of callbacks to enable us | ||
3048 | * to do suspend-to-disk. | ||
3049 | */ | ||
3050 | |||
3051 | #ifdef CONFIG_PM | ||
3052 | |||
3053 | static int pmu_sys_suspended = 0; | ||
3054 | |||
3055 | static int pmu_sys_suspend(struct sys_device *sysdev, u32 state) | ||
3056 | { | ||
3057 | if (state != PM_SUSPEND_DISK || pmu_sys_suspended) | ||
3058 | return 0; | ||
3059 | |||
3060 | /* Suspend PMU event interrupts */ | ||
3061 | pmu_suspend(); | ||
3062 | |||
3063 | pmu_sys_suspended = 1; | ||
3064 | return 0; | ||
3065 | } | ||
3066 | |||
3067 | static int pmu_sys_resume(struct sys_device *sysdev) | ||
3068 | { | ||
3069 | struct adb_request req; | ||
3070 | |||
3071 | if (!pmu_sys_suspended) | ||
3072 | return 0; | ||
3073 | |||
3074 | /* Tell PMU we are ready */ | ||
3075 | pmu_request(&req, NULL, 2, PMU_SYSTEM_READY, 2); | ||
3076 | pmu_wait_complete(&req); | ||
3077 | |||
3078 | /* Resume PMU event interrupts */ | ||
3079 | pmu_resume(); | ||
3080 | |||
3081 | pmu_sys_suspended = 0; | ||
3082 | |||
3083 | return 0; | ||
3084 | } | ||
3085 | |||
3086 | #endif /* CONFIG_PM */ | ||
3087 | |||
3088 | static struct sysdev_class pmu_sysclass = { | ||
3089 | set_kset_name("pmu"), | ||
3090 | }; | ||
3091 | |||
3092 | static struct sys_device device_pmu = { | ||
3093 | .id = 0, | ||
3094 | .cls = &pmu_sysclass, | ||
3095 | }; | ||
3096 | |||
3097 | static struct sysdev_driver driver_pmu = { | ||
3098 | #ifdef CONFIG_PM | ||
3099 | .suspend = &pmu_sys_suspend, | ||
3100 | .resume = &pmu_sys_resume, | ||
3101 | #endif /* CONFIG_PM */ | ||
3102 | }; | ||
3103 | |||
3104 | static int __init init_pmu_sysfs(void) | ||
3105 | { | ||
3106 | int rc; | ||
3107 | |||
3108 | rc = sysdev_class_register(&pmu_sysclass); | ||
3109 | if (rc) { | ||
3110 | printk(KERN_ERR "Failed registering PMU sys class\n"); | ||
3111 | return -ENODEV; | ||
3112 | } | ||
3113 | rc = sysdev_register(&device_pmu); | ||
3114 | if (rc) { | ||
3115 | printk(KERN_ERR "Failed registering PMU sys device\n"); | ||
3116 | return -ENODEV; | ||
3117 | } | ||
3118 | rc = sysdev_driver_register(&pmu_sysclass, &driver_pmu); | ||
3119 | if (rc) { | ||
3120 | printk(KERN_ERR "Failed registering PMU sys driver\n"); | ||
3121 | return -ENODEV; | ||
3122 | } | ||
3123 | return 0; | ||
3124 | } | ||
3125 | |||
3126 | subsys_initcall(init_pmu_sysfs); | ||
3127 | |||
3128 | EXPORT_SYMBOL(pmu_request); | ||
3129 | EXPORT_SYMBOL(pmu_poll); | ||
3130 | EXPORT_SYMBOL(pmu_poll_adb); | ||
3131 | EXPORT_SYMBOL(pmu_wait_complete); | ||
3132 | EXPORT_SYMBOL(pmu_suspend); | ||
3133 | EXPORT_SYMBOL(pmu_resume); | ||
3134 | EXPORT_SYMBOL(pmu_unlock); | ||
3135 | EXPORT_SYMBOL(pmu_i2c_combined_read); | ||
3136 | EXPORT_SYMBOL(pmu_i2c_stdsub_write); | ||
3137 | EXPORT_SYMBOL(pmu_i2c_simple_read); | ||
3138 | EXPORT_SYMBOL(pmu_i2c_simple_write); | ||
3139 | #ifdef CONFIG_PMAC_PBOOK | ||
3140 | EXPORT_SYMBOL(pmu_register_sleep_notifier); | ||
3141 | EXPORT_SYMBOL(pmu_unregister_sleep_notifier); | ||
3142 | EXPORT_SYMBOL(pmu_enable_irled); | ||
3143 | EXPORT_SYMBOL(pmu_battery_count); | ||
3144 | EXPORT_SYMBOL(pmu_batteries); | ||
3145 | EXPORT_SYMBOL(pmu_power_flags); | ||
3146 | #endif /* CONFIG_PMAC_PBOOK */ | ||
3147 | |||