diff options
author | Eddie Dong <eddie.dong@intel.com> | 2007-07-18 05:03:39 -0400 |
---|---|---|
committer | Avi Kivity <avi@qumranet.com> | 2007-10-13 04:18:25 -0400 |
commit | 1fd4f2a5ed8f80cf6e23d2bdf78554f6a1ac7997 (patch) | |
tree | eb7d79c7f39788547a5dd9844295814085fcccc6 /drivers/kvm | |
parent | 97222cc8316328965851ed28d23f6b64b4c912d2 (diff) |
KVM: In-kernel I/O APIC model
This allows in-kernel host-side device drivers to raise guest interrupts
without going to userspace.
[avi: fix level-triggered interrupt redelivery on eoi]
[avi: add missing #include]
[avi: avoid redelivery of edge-triggered interrupt]
[avi: implement polarity]
[avi: don't deliver edge-triggered interrupts when unmasking]
[avi: fix host oops on invalid guest access]
Signed-off-by: Yaozu (Eddie) Dong <eddie.dong@intel.com>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm')
-rw-r--r-- | drivers/kvm/Makefile | 2 | ||||
-rw-r--r-- | drivers/kvm/ioapic.c | 388 | ||||
-rw-r--r-- | drivers/kvm/irq.c | 4 | ||||
-rw-r--r-- | drivers/kvm/irq.h | 51 | ||||
-rw-r--r-- | drivers/kvm/kvm.h | 6 | ||||
-rw-r--r-- | drivers/kvm/kvm_main.c | 15 |
6 files changed, 458 insertions, 8 deletions
diff --git a/drivers/kvm/Makefile b/drivers/kvm/Makefile index 3bf7276b032d..e5a8f4d3e973 100644 --- a/drivers/kvm/Makefile +++ b/drivers/kvm/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for Kernel-based Virtual Machine module | 2 | # Makefile for Kernel-based Virtual Machine module |
3 | # | 3 | # |
4 | 4 | ||
5 | kvm-objs := kvm_main.o mmu.o x86_emulate.o i8259.o irq.o lapic.o | 5 | kvm-objs := kvm_main.o mmu.o x86_emulate.o i8259.o irq.o lapic.o ioapic.o |
6 | obj-$(CONFIG_KVM) += kvm.o | 6 | obj-$(CONFIG_KVM) += kvm.o |
7 | kvm-intel-objs = vmx.o | 7 | kvm-intel-objs = vmx.o |
8 | obj-$(CONFIG_KVM_INTEL) += kvm-intel.o | 8 | obj-$(CONFIG_KVM_INTEL) += kvm-intel.o |
diff --git a/drivers/kvm/ioapic.c b/drivers/kvm/ioapic.c new file mode 100644 index 000000000000..c7992e667fdb --- /dev/null +++ b/drivers/kvm/ioapic.c | |||
@@ -0,0 +1,388 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2001 MandrakeSoft S.A. | ||
3 | * | ||
4 | * MandrakeSoft S.A. | ||
5 | * 43, rue d'Aboukir | ||
6 | * 75002 Paris - France | ||
7 | * http://www.linux-mandrake.com/ | ||
8 | * http://www.mandrakesoft.com/ | ||
9 | * | ||
10 | * This library is free software; you can redistribute it and/or | ||
11 | * modify it under the terms of the GNU Lesser General Public | ||
12 | * License as published by the Free Software Foundation; either | ||
13 | * version 2 of the License, or (at your option) any later version. | ||
14 | * | ||
15 | * This library is distributed in the hope that it will be useful, | ||
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
18 | * Lesser General Public License for more details. | ||
19 | * | ||
20 | * You should have received a copy of the GNU Lesser General Public | ||
21 | * License along with this library; if not, write to the Free Software | ||
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
23 | * | ||
24 | * Yunhong Jiang <yunhong.jiang@intel.com> | ||
25 | * Yaozu (Eddie) Dong <eddie.dong@intel.com> | ||
26 | * Based on Xen 3.1 code. | ||
27 | */ | ||
28 | |||
29 | #include "kvm.h" | ||
30 | #include <linux/kvm.h> | ||
31 | #include <linux/mm.h> | ||
32 | #include <linux/highmem.h> | ||
33 | #include <linux/smp.h> | ||
34 | #include <linux/hrtimer.h> | ||
35 | #include <linux/io.h> | ||
36 | #include <asm/processor.h> | ||
37 | #include <asm/msr.h> | ||
38 | #include <asm/page.h> | ||
39 | #include <asm/current.h> | ||
40 | #include <asm/apicdef.h> | ||
41 | #include <asm/io_apic.h> | ||
42 | #include "irq.h" | ||
43 | /* #define ioapic_debug(fmt,arg...) printk(KERN_WARNING fmt,##arg) */ | ||
44 | #define ioapic_debug(fmt, arg...) | ||
45 | static void ioapic_deliver(struct kvm_ioapic *vioapic, int irq); | ||
46 | |||
47 | static unsigned long ioapic_read_indirect(struct kvm_ioapic *ioapic, | ||
48 | unsigned long addr, | ||
49 | unsigned long length) | ||
50 | { | ||
51 | unsigned long result = 0; | ||
52 | |||
53 | switch (ioapic->ioregsel) { | ||
54 | case IOAPIC_REG_VERSION: | ||
55 | result = ((((IOAPIC_NUM_PINS - 1) & 0xff) << 16) | ||
56 | | (IOAPIC_VERSION_ID & 0xff)); | ||
57 | break; | ||
58 | |||
59 | case IOAPIC_REG_APIC_ID: | ||
60 | case IOAPIC_REG_ARB_ID: | ||
61 | result = ((ioapic->id & 0xf) << 24); | ||
62 | break; | ||
63 | |||
64 | default: | ||
65 | { | ||
66 | u32 redir_index = (ioapic->ioregsel - 0x10) >> 1; | ||
67 | u64 redir_content; | ||
68 | |||
69 | ASSERT(redir_index < IOAPIC_NUM_PINS); | ||
70 | |||
71 | redir_content = ioapic->redirtbl[redir_index].bits; | ||
72 | result = (ioapic->ioregsel & 0x1) ? | ||
73 | (redir_content >> 32) & 0xffffffff : | ||
74 | redir_content & 0xffffffff; | ||
75 | break; | ||
76 | } | ||
77 | } | ||
78 | |||
79 | return result; | ||
80 | } | ||
81 | |||
82 | static void ioapic_service(struct kvm_ioapic *ioapic, unsigned int idx) | ||
83 | { | ||
84 | union ioapic_redir_entry *pent; | ||
85 | |||
86 | pent = &ioapic->redirtbl[idx]; | ||
87 | |||
88 | if (!pent->fields.mask) { | ||
89 | ioapic_deliver(ioapic, idx); | ||
90 | if (pent->fields.trig_mode == IOAPIC_LEVEL_TRIG) | ||
91 | pent->fields.remote_irr = 1; | ||
92 | } | ||
93 | if (!pent->fields.trig_mode) | ||
94 | ioapic->irr &= ~(1 << idx); | ||
95 | } | ||
96 | |||
97 | static void ioapic_write_indirect(struct kvm_ioapic *ioapic, u32 val) | ||
98 | { | ||
99 | unsigned index; | ||
100 | |||
101 | switch (ioapic->ioregsel) { | ||
102 | case IOAPIC_REG_VERSION: | ||
103 | /* Writes are ignored. */ | ||
104 | break; | ||
105 | |||
106 | case IOAPIC_REG_APIC_ID: | ||
107 | ioapic->id = (val >> 24) & 0xf; | ||
108 | break; | ||
109 | |||
110 | case IOAPIC_REG_ARB_ID: | ||
111 | break; | ||
112 | |||
113 | default: | ||
114 | index = (ioapic->ioregsel - 0x10) >> 1; | ||
115 | |||
116 | ioapic_debug("change redir index %x val %x", index, val); | ||
117 | if (index >= IOAPIC_NUM_PINS) | ||
118 | return; | ||
119 | if (ioapic->ioregsel & 1) { | ||
120 | ioapic->redirtbl[index].bits &= 0xffffffff; | ||
121 | ioapic->redirtbl[index].bits |= (u64) val << 32; | ||
122 | } else { | ||
123 | ioapic->redirtbl[index].bits &= ~0xffffffffULL; | ||
124 | ioapic->redirtbl[index].bits |= (u32) val; | ||
125 | ioapic->redirtbl[index].fields.remote_irr = 0; | ||
126 | } | ||
127 | if (ioapic->irr & (1 << index)) | ||
128 | ioapic_service(ioapic, index); | ||
129 | break; | ||
130 | } | ||
131 | } | ||
132 | |||
133 | static void ioapic_inj_irq(struct kvm_ioapic *ioapic, | ||
134 | struct kvm_lapic *target, | ||
135 | u8 vector, u8 trig_mode, u8 delivery_mode) | ||
136 | { | ||
137 | ioapic_debug("irq %d trig %d deliv %d", vector, trig_mode, | ||
138 | delivery_mode); | ||
139 | |||
140 | ASSERT((delivery_mode == dest_Fixed) || | ||
141 | (delivery_mode == dest_LowestPrio)); | ||
142 | |||
143 | kvm_apic_set_irq(target, vector, trig_mode); | ||
144 | } | ||
145 | |||
146 | static u32 ioapic_get_delivery_bitmask(struct kvm_ioapic *ioapic, u8 dest, | ||
147 | u8 dest_mode) | ||
148 | { | ||
149 | u32 mask = 0; | ||
150 | int i; | ||
151 | struct kvm *kvm = ioapic->kvm; | ||
152 | struct kvm_vcpu *vcpu; | ||
153 | |||
154 | ioapic_debug("dest %d dest_mode %d", dest, dest_mode); | ||
155 | |||
156 | if (dest_mode == 0) { /* Physical mode. */ | ||
157 | if (dest == 0xFF) { /* Broadcast. */ | ||
158 | for (i = 0; i < KVM_MAX_VCPUS; ++i) | ||
159 | if (kvm->vcpus[i] && kvm->vcpus[i]->apic) | ||
160 | mask |= 1 << i; | ||
161 | return mask; | ||
162 | } | ||
163 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | ||
164 | vcpu = kvm->vcpus[i]; | ||
165 | if (!vcpu) | ||
166 | continue; | ||
167 | if (kvm_apic_match_physical_addr(vcpu->apic, dest)) { | ||
168 | if (vcpu->apic) | ||
169 | mask = 1 << i; | ||
170 | break; | ||
171 | } | ||
172 | } | ||
173 | } else if (dest != 0) /* Logical mode, MDA non-zero. */ | ||
174 | for (i = 0; i < KVM_MAX_VCPUS; ++i) { | ||
175 | vcpu = kvm->vcpus[i]; | ||
176 | if (!vcpu) | ||
177 | continue; | ||
178 | if (vcpu->apic && | ||
179 | kvm_apic_match_logical_addr(vcpu->apic, dest)) | ||
180 | mask |= 1 << vcpu->vcpu_id; | ||
181 | } | ||
182 | ioapic_debug("mask %x", mask); | ||
183 | return mask; | ||
184 | } | ||
185 | |||
186 | static void ioapic_deliver(struct kvm_ioapic *ioapic, int irq) | ||
187 | { | ||
188 | u8 dest = ioapic->redirtbl[irq].fields.dest_id; | ||
189 | u8 dest_mode = ioapic->redirtbl[irq].fields.dest_mode; | ||
190 | u8 delivery_mode = ioapic->redirtbl[irq].fields.delivery_mode; | ||
191 | u8 vector = ioapic->redirtbl[irq].fields.vector; | ||
192 | u8 trig_mode = ioapic->redirtbl[irq].fields.trig_mode; | ||
193 | u32 deliver_bitmask; | ||
194 | struct kvm_lapic *target; | ||
195 | struct kvm_vcpu *vcpu; | ||
196 | int vcpu_id; | ||
197 | |||
198 | ioapic_debug("dest=%x dest_mode=%x delivery_mode=%x " | ||
199 | "vector=%x trig_mode=%x", | ||
200 | dest, dest_mode, delivery_mode, vector, trig_mode); | ||
201 | |||
202 | deliver_bitmask = ioapic_get_delivery_bitmask(ioapic, dest, dest_mode); | ||
203 | if (!deliver_bitmask) { | ||
204 | ioapic_debug("no target on destination"); | ||
205 | return; | ||
206 | } | ||
207 | |||
208 | switch (delivery_mode) { | ||
209 | case dest_LowestPrio: | ||
210 | target = | ||
211 | kvm_apic_round_robin(ioapic->kvm, vector, deliver_bitmask); | ||
212 | if (target != NULL) | ||
213 | ioapic_inj_irq(ioapic, target, vector, | ||
214 | trig_mode, delivery_mode); | ||
215 | else | ||
216 | ioapic_debug("null round robin: " | ||
217 | "mask=%x vector=%x delivery_mode=%x", | ||
218 | deliver_bitmask, vector, dest_LowestPrio); | ||
219 | break; | ||
220 | case dest_Fixed: | ||
221 | for (vcpu_id = 0; deliver_bitmask != 0; vcpu_id++) { | ||
222 | if (!(deliver_bitmask & (1 << vcpu_id))) | ||
223 | continue; | ||
224 | deliver_bitmask &= ~(1 << vcpu_id); | ||
225 | vcpu = ioapic->kvm->vcpus[vcpu_id]; | ||
226 | if (vcpu) { | ||
227 | target = vcpu->apic; | ||
228 | ioapic_inj_irq(ioapic, target, vector, | ||
229 | trig_mode, delivery_mode); | ||
230 | } | ||
231 | } | ||
232 | break; | ||
233 | |||
234 | /* TODO: NMI */ | ||
235 | default: | ||
236 | printk(KERN_WARNING "Unsupported delivery mode %d\n", | ||
237 | delivery_mode); | ||
238 | break; | ||
239 | } | ||
240 | } | ||
241 | |||
242 | void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level) | ||
243 | { | ||
244 | u32 old_irr = ioapic->irr; | ||
245 | u32 mask = 1 << irq; | ||
246 | union ioapic_redir_entry entry; | ||
247 | |||
248 | if (irq >= 0 && irq < IOAPIC_NUM_PINS) { | ||
249 | entry = ioapic->redirtbl[irq]; | ||
250 | level ^= entry.fields.polarity; | ||
251 | if (!level) | ||
252 | ioapic->irr &= ~mask; | ||
253 | else { | ||
254 | ioapic->irr |= mask; | ||
255 | if ((!entry.fields.trig_mode && old_irr != ioapic->irr) | ||
256 | || !entry.fields.remote_irr) | ||
257 | ioapic_service(ioapic, irq); | ||
258 | } | ||
259 | } | ||
260 | } | ||
261 | |||
262 | static int get_eoi_gsi(struct kvm_ioapic *ioapic, int vector) | ||
263 | { | ||
264 | int i; | ||
265 | |||
266 | for (i = 0; i < IOAPIC_NUM_PINS; i++) | ||
267 | if (ioapic->redirtbl[i].fields.vector == vector) | ||
268 | return i; | ||
269 | return -1; | ||
270 | } | ||
271 | |||
272 | void kvm_ioapic_update_eoi(struct kvm *kvm, int vector) | ||
273 | { | ||
274 | struct kvm_ioapic *ioapic = kvm->vioapic; | ||
275 | union ioapic_redir_entry *ent; | ||
276 | int gsi; | ||
277 | |||
278 | gsi = get_eoi_gsi(ioapic, vector); | ||
279 | if (gsi == -1) { | ||
280 | printk(KERN_WARNING "Can't find redir item for %d EOI\n", | ||
281 | vector); | ||
282 | return; | ||
283 | } | ||
284 | |||
285 | ent = &ioapic->redirtbl[gsi]; | ||
286 | ASSERT(ent->fields.trig_mode == IOAPIC_LEVEL_TRIG); | ||
287 | |||
288 | ent->fields.remote_irr = 0; | ||
289 | if (!ent->fields.mask && (ioapic->irr & (1 << gsi))) | ||
290 | ioapic_deliver(ioapic, gsi); | ||
291 | } | ||
292 | |||
293 | static int ioapic_in_range(struct kvm_io_device *this, gpa_t addr) | ||
294 | { | ||
295 | struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private; | ||
296 | |||
297 | return ((addr >= ioapic->base_address && | ||
298 | (addr < ioapic->base_address + IOAPIC_MEM_LENGTH))); | ||
299 | } | ||
300 | |||
301 | static void ioapic_mmio_read(struct kvm_io_device *this, gpa_t addr, int len, | ||
302 | void *val) | ||
303 | { | ||
304 | struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private; | ||
305 | u32 result; | ||
306 | |||
307 | ioapic_debug("addr %lx", (unsigned long)addr); | ||
308 | ASSERT(!(addr & 0xf)); /* check alignment */ | ||
309 | |||
310 | addr &= 0xff; | ||
311 | switch (addr) { | ||
312 | case IOAPIC_REG_SELECT: | ||
313 | result = ioapic->ioregsel; | ||
314 | break; | ||
315 | |||
316 | case IOAPIC_REG_WINDOW: | ||
317 | result = ioapic_read_indirect(ioapic, addr, len); | ||
318 | break; | ||
319 | |||
320 | default: | ||
321 | result = 0; | ||
322 | break; | ||
323 | } | ||
324 | switch (len) { | ||
325 | case 8: | ||
326 | *(u64 *) val = result; | ||
327 | break; | ||
328 | case 1: | ||
329 | case 2: | ||
330 | case 4: | ||
331 | memcpy(val, (char *)&result, len); | ||
332 | break; | ||
333 | default: | ||
334 | printk(KERN_WARNING "ioapic: wrong length %d\n", len); | ||
335 | } | ||
336 | } | ||
337 | |||
338 | static void ioapic_mmio_write(struct kvm_io_device *this, gpa_t addr, int len, | ||
339 | const void *val) | ||
340 | { | ||
341 | struct kvm_ioapic *ioapic = (struct kvm_ioapic *)this->private; | ||
342 | u32 data; | ||
343 | |||
344 | ioapic_debug("ioapic_mmio_write addr=%lx len=%d val=%p\n", | ||
345 | addr, len, val); | ||
346 | ASSERT(!(addr & 0xf)); /* check alignment */ | ||
347 | if (len == 4 || len == 8) | ||
348 | data = *(u32 *) val; | ||
349 | else { | ||
350 | printk(KERN_WARNING "ioapic: Unsupported size %d\n", len); | ||
351 | return; | ||
352 | } | ||
353 | |||
354 | addr &= 0xff; | ||
355 | switch (addr) { | ||
356 | case IOAPIC_REG_SELECT: | ||
357 | ioapic->ioregsel = data; | ||
358 | break; | ||
359 | |||
360 | case IOAPIC_REG_WINDOW: | ||
361 | ioapic_write_indirect(ioapic, data); | ||
362 | break; | ||
363 | |||
364 | default: | ||
365 | break; | ||
366 | } | ||
367 | } | ||
368 | |||
369 | int kvm_ioapic_init(struct kvm *kvm) | ||
370 | { | ||
371 | struct kvm_ioapic *ioapic; | ||
372 | int i; | ||
373 | |||
374 | ioapic = kzalloc(sizeof(struct kvm_ioapic), GFP_KERNEL); | ||
375 | if (!ioapic) | ||
376 | return -ENOMEM; | ||
377 | kvm->vioapic = ioapic; | ||
378 | for (i = 0; i < IOAPIC_NUM_PINS; i++) | ||
379 | ioapic->redirtbl[i].fields.mask = 1; | ||
380 | ioapic->base_address = IOAPIC_DEFAULT_BASE_ADDRESS; | ||
381 | ioapic->dev.read = ioapic_mmio_read; | ||
382 | ioapic->dev.write = ioapic_mmio_write; | ||
383 | ioapic->dev.in_range = ioapic_in_range; | ||
384 | ioapic->dev.private = ioapic; | ||
385 | ioapic->kvm = kvm; | ||
386 | kvm_io_bus_register_dev(&kvm->mmio_bus, &ioapic->dev); | ||
387 | return 0; | ||
388 | } | ||
diff --git a/drivers/kvm/irq.c b/drivers/kvm/irq.c index 0b4430a0cae0..5265f8267b3b 100644 --- a/drivers/kvm/irq.c +++ b/drivers/kvm/irq.c | |||
@@ -74,7 +74,3 @@ void kvm_vcpu_kick(struct kvm_vcpu *vcpu) | |||
74 | smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0); | 74 | smp_call_function_single(ipi_pcpu, vcpu_kick_intr, vcpu, 0, 0); |
75 | } | 75 | } |
76 | 76 | ||
77 | void kvm_ioapic_update_eoi(struct kvm *kvm, int vector) | ||
78 | { | ||
79 | /* TODO: for kernel IOAPIC */ | ||
80 | } | ||
diff --git a/drivers/kvm/irq.h b/drivers/kvm/irq.h index 57e23bdac530..6ed856a41e23 100644 --- a/drivers/kvm/irq.h +++ b/drivers/kvm/irq.h | |||
@@ -60,6 +60,50 @@ int kvm_pic_read_irq(struct kvm_pic *s); | |||
60 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); | 60 | int kvm_cpu_get_interrupt(struct kvm_vcpu *v); |
61 | int kvm_cpu_has_interrupt(struct kvm_vcpu *v); | 61 | int kvm_cpu_has_interrupt(struct kvm_vcpu *v); |
62 | 62 | ||
63 | #define IOAPIC_NUM_PINS 24 | ||
64 | #define IOAPIC_VERSION_ID 0x11 /* IOAPIC version */ | ||
65 | #define IOAPIC_EDGE_TRIG 0 | ||
66 | #define IOAPIC_LEVEL_TRIG 1 | ||
67 | |||
68 | #define IOAPIC_DEFAULT_BASE_ADDRESS 0xfec00000 | ||
69 | #define IOAPIC_MEM_LENGTH 0x100 | ||
70 | |||
71 | /* Direct registers. */ | ||
72 | #define IOAPIC_REG_SELECT 0x00 | ||
73 | #define IOAPIC_REG_WINDOW 0x10 | ||
74 | #define IOAPIC_REG_EOI 0x40 /* IA64 IOSAPIC only */ | ||
75 | |||
76 | /* Indirect registers. */ | ||
77 | #define IOAPIC_REG_APIC_ID 0x00 /* x86 IOAPIC only */ | ||
78 | #define IOAPIC_REG_VERSION 0x01 | ||
79 | #define IOAPIC_REG_ARB_ID 0x02 /* x86 IOAPIC only */ | ||
80 | |||
81 | struct kvm_ioapic { | ||
82 | u64 base_address; | ||
83 | u32 ioregsel; | ||
84 | u32 id; | ||
85 | u32 irr; | ||
86 | u32 pad; | ||
87 | union ioapic_redir_entry { | ||
88 | u64 bits; | ||
89 | struct { | ||
90 | u8 vector; | ||
91 | u8 delivery_mode:3; | ||
92 | u8 dest_mode:1; | ||
93 | u8 delivery_status:1; | ||
94 | u8 polarity:1; | ||
95 | u8 remote_irr:1; | ||
96 | u8 trig_mode:1; | ||
97 | u8 mask:1; | ||
98 | u8 reserve:7; | ||
99 | u8 reserved[4]; | ||
100 | u8 dest_id; | ||
101 | } fields; | ||
102 | } redirtbl[IOAPIC_NUM_PINS]; | ||
103 | struct kvm_io_device dev; | ||
104 | struct kvm *kvm; | ||
105 | }; | ||
106 | |||
63 | struct kvm_lapic { | 107 | struct kvm_lapic { |
64 | unsigned long base_address; | 108 | unsigned long base_address; |
65 | struct kvm_io_device dev; | 109 | struct kvm_io_device dev; |
@@ -96,8 +140,15 @@ void kvm_free_apic(struct kvm_lapic *apic); | |||
96 | u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu); | 140 | u64 kvm_lapic_get_cr8(struct kvm_vcpu *vcpu); |
97 | void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8); | 141 | void kvm_lapic_set_tpr(struct kvm_vcpu *vcpu, unsigned long cr8); |
98 | void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value); | 142 | void kvm_lapic_set_base(struct kvm_vcpu *vcpu, u64 value); |
143 | struct kvm_lapic *kvm_apic_round_robin(struct kvm *kvm, u8 vector, | ||
144 | unsigned long bitmap); | ||
99 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu); | 145 | u64 kvm_get_apic_base(struct kvm_vcpu *vcpu); |
100 | void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data); | 146 | void kvm_set_apic_base(struct kvm_vcpu *vcpu, u64 data); |
147 | int kvm_apic_match_physical_addr(struct kvm_lapic *apic, u16 dest); | ||
101 | void kvm_ioapic_update_eoi(struct kvm *kvm, int vector); | 148 | void kvm_ioapic_update_eoi(struct kvm *kvm, int vector); |
149 | int kvm_apic_match_logical_addr(struct kvm_lapic *apic, u8 mda); | ||
150 | int kvm_apic_set_irq(struct kvm_lapic *apic, u8 vec, u8 trig); | ||
151 | int kvm_ioapic_init(struct kvm *kvm); | ||
152 | void kvm_ioapic_set_irq(struct kvm_ioapic *ioapic, int irq, int level); | ||
102 | 153 | ||
103 | #endif | 154 | #endif |
diff --git a/drivers/kvm/kvm.h b/drivers/kvm/kvm.h index a5790cb21ffc..8d07a993af94 100644 --- a/drivers/kvm/kvm.h +++ b/drivers/kvm/kvm.h | |||
@@ -410,6 +410,7 @@ struct kvm { | |||
410 | struct kvm_io_bus mmio_bus; | 410 | struct kvm_io_bus mmio_bus; |
411 | struct kvm_io_bus pio_bus; | 411 | struct kvm_io_bus pio_bus; |
412 | struct kvm_pic *vpic; | 412 | struct kvm_pic *vpic; |
413 | struct kvm_ioapic *vioapic; | ||
413 | }; | 414 | }; |
414 | 415 | ||
415 | static inline struct kvm_pic *pic_irqchip(struct kvm *kvm) | 416 | static inline struct kvm_pic *pic_irqchip(struct kvm *kvm) |
@@ -417,6 +418,11 @@ static inline struct kvm_pic *pic_irqchip(struct kvm *kvm) | |||
417 | return kvm->vpic; | 418 | return kvm->vpic; |
418 | } | 419 | } |
419 | 420 | ||
421 | static inline struct kvm_ioapic *ioapic_irqchip(struct kvm *kvm) | ||
422 | { | ||
423 | return kvm->vioapic; | ||
424 | } | ||
425 | |||
420 | static inline int irqchip_in_kernel(struct kvm *kvm) | 426 | static inline int irqchip_in_kernel(struct kvm *kvm) |
421 | { | 427 | { |
422 | return pic_irqchip(kvm) != 0; | 428 | return pic_irqchip(kvm) != 0; |
diff --git a/drivers/kvm/kvm_main.c b/drivers/kvm/kvm_main.c index 401e3cdc4607..ffbdadd87971 100644 --- a/drivers/kvm/kvm_main.c +++ b/drivers/kvm/kvm_main.c | |||
@@ -381,6 +381,7 @@ static void kvm_destroy_vm(struct kvm *kvm) | |||
381 | kvm_io_bus_destroy(&kvm->pio_bus); | 381 | kvm_io_bus_destroy(&kvm->pio_bus); |
382 | kvm_io_bus_destroy(&kvm->mmio_bus); | 382 | kvm_io_bus_destroy(&kvm->mmio_bus); |
383 | kfree(kvm->vpic); | 383 | kfree(kvm->vpic); |
384 | kfree(kvm->vioapic); | ||
384 | kvm_free_vcpus(kvm); | 385 | kvm_free_vcpus(kvm); |
385 | kvm_free_physmem(kvm); | 386 | kvm_free_physmem(kvm); |
386 | kfree(kvm); | 387 | kfree(kvm); |
@@ -2771,8 +2772,14 @@ static long kvm_vm_ioctl(struct file *filp, | |||
2771 | case KVM_CREATE_IRQCHIP: | 2772 | case KVM_CREATE_IRQCHIP: |
2772 | r = -ENOMEM; | 2773 | r = -ENOMEM; |
2773 | kvm->vpic = kvm_create_pic(kvm); | 2774 | kvm->vpic = kvm_create_pic(kvm); |
2774 | if (kvm->vpic) | 2775 | if (kvm->vpic) { |
2775 | r = 0; | 2776 | r = kvm_ioapic_init(kvm); |
2777 | if (r) { | ||
2778 | kfree(kvm->vpic); | ||
2779 | kvm->vpic = NULL; | ||
2780 | goto out; | ||
2781 | } | ||
2782 | } | ||
2776 | else | 2783 | else |
2777 | goto out; | 2784 | goto out; |
2778 | break; | 2785 | break; |
@@ -2787,7 +2794,9 @@ static long kvm_vm_ioctl(struct file *filp, | |||
2787 | kvm_pic_set_irq(pic_irqchip(kvm), | 2794 | kvm_pic_set_irq(pic_irqchip(kvm), |
2788 | irq_event.irq, | 2795 | irq_event.irq, |
2789 | irq_event.level); | 2796 | irq_event.level); |
2790 | /* TODO: IOAPIC */ | 2797 | kvm_ioapic_set_irq(kvm->vioapic, |
2798 | irq_event.irq, | ||
2799 | irq_event.level); | ||
2791 | r = 0; | 2800 | r = 0; |
2792 | } | 2801 | } |
2793 | break; | 2802 | break; |