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authorKevin Pedretti <kevin.pedretti@gmail.com>2007-10-21 02:54:53 -0400
committerAvi Kivity <avi@qumranet.com>2007-10-22 06:03:29 -0400
commitb33ac88b4c23330043acad930517282eb486db1d (patch)
tree749cef5dcdc31bf0221f793ab7260559cfb54226 /drivers/kvm
parent0552f73b9a81d39d50b71a5c06cf36efff80b6fd (diff)
KVM: Fix local apic timer divide by zero
kvm_lapic_reset() was initializing apic->timer.divide_count to 0, which could potentially lead to a divide by zero error in apic_get_tmcct(). Any guest that reads the APIC's CCR (current count) register before setting DCR (divide configuration) would trigger a divide by zero exception in the host kernel, leading to a host-OS crash. This patch results in apic->timer.divide_count being initialized to 2 at reset, eliminating the bug (DCR=0 at reset, meaning divide by 2). Signed-off-by: Kevin Pedretti <kevin.pedretti@gmail.com> Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm')
-rw-r--r--drivers/kvm/lapic.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/kvm/lapic.c b/drivers/kvm/lapic.c
index a190587cf6a5..443730e689e3 100644
--- a/drivers/kvm/lapic.c
+++ b/drivers/kvm/lapic.c
@@ -853,7 +853,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
853 apic_set_reg(apic, APIC_ISR + 0x10 * i, 0); 853 apic_set_reg(apic, APIC_ISR + 0x10 * i, 0);
854 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0); 854 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
855 } 855 }
856 apic->timer.divide_count = 0; 856 update_divide_count(apic);
857 atomic_set(&apic->timer.pending, 0); 857 atomic_set(&apic->timer.pending, 0);
858 if (vcpu->vcpu_id == 0) 858 if (vcpu->vcpu_id == 0)
859 vcpu->apic_base |= MSR_IA32_APICBASE_BSP; 859 vcpu->apic_base |= MSR_IA32_APICBASE_BSP;