diff options
author | Laurent Vivier <Laurent.Vivier@bull.net> | 2007-07-30 06:35:24 -0400 |
---|---|---|
committer | Avi Kivity <avi@qumranet.com> | 2007-10-13 04:18:21 -0400 |
commit | cebff02b11b02a81d21b6cc8390938dc9bdf0a12 (patch) | |
tree | 99641f1b444835fca8218a5f5b10d2d1bd6ad429 /drivers/kvm/x86_emulate.c | |
parent | 0e5017d4ae981b0311a3ec1ca04806a4ae7d7446 (diff) |
KVM: Change the emulator_{read,write,cmpxchg}_* functions to take a vcpu
... instead of a x86_emulate_ctxt, so that other callers can use it easily.
Signed-off-by: Laurent Vivier <Laurent.Vivier@bull.net>
Signed-off-by: Avi Kivity <avi@qumranet.com>
Diffstat (limited to 'drivers/kvm/x86_emulate.c')
-rw-r--r-- | drivers/kvm/x86_emulate.c | 35 |
1 files changed, 20 insertions, 15 deletions
diff --git a/drivers/kvm/x86_emulate.c b/drivers/kvm/x86_emulate.c index 2136da5d6976..44eb28d31499 100644 --- a/drivers/kvm/x86_emulate.c +++ b/drivers/kvm/x86_emulate.c | |||
@@ -420,7 +420,7 @@ struct operand { | |||
420 | #define insn_fetch(_type, _size, _eip) \ | 420 | #define insn_fetch(_type, _size, _eip) \ |
421 | ({ unsigned long _x; \ | 421 | ({ unsigned long _x; \ |
422 | rc = ops->read_std((unsigned long)(_eip) + ctxt->cs_base, &_x, \ | 422 | rc = ops->read_std((unsigned long)(_eip) + ctxt->cs_base, &_x, \ |
423 | (_size), ctxt); \ | 423 | (_size), ctxt->vcpu); \ |
424 | if ( rc != 0 ) \ | 424 | if ( rc != 0 ) \ |
425 | goto done; \ | 425 | goto done; \ |
426 | (_eip) += (_size); \ | 426 | (_eip) += (_size); \ |
@@ -469,10 +469,12 @@ static int read_descriptor(struct x86_emulate_ctxt *ctxt, | |||
469 | if (op_bytes == 2) | 469 | if (op_bytes == 2) |
470 | op_bytes = 3; | 470 | op_bytes = 3; |
471 | *address = 0; | 471 | *address = 0; |
472 | rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, ctxt); | 472 | rc = ops->read_std((unsigned long)ptr, (unsigned long *)size, 2, |
473 | ctxt->vcpu); | ||
473 | if (rc) | 474 | if (rc) |
474 | return rc; | 475 | return rc; |
475 | rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, ctxt); | 476 | rc = ops->read_std((unsigned long)ptr + 2, address, op_bytes, |
477 | ctxt->vcpu); | ||
476 | return rc; | 478 | return rc; |
477 | } | 479 | } |
478 | 480 | ||
@@ -780,7 +782,7 @@ done_prefixes: | |||
780 | src.type = OP_MEM; | 782 | src.type = OP_MEM; |
781 | src.ptr = (unsigned long *)cr2; | 783 | src.ptr = (unsigned long *)cr2; |
782 | if ((rc = ops->read_emulated((unsigned long)src.ptr, | 784 | if ((rc = ops->read_emulated((unsigned long)src.ptr, |
783 | &src.val, src.bytes, ctxt)) != 0) | 785 | &src.val, src.bytes, ctxt->vcpu)) != 0) |
784 | goto done; | 786 | goto done; |
785 | src.orig_val = src.val; | 787 | src.orig_val = src.val; |
786 | break; | 788 | break; |
@@ -850,7 +852,7 @@ done_prefixes: | |||
850 | } | 852 | } |
851 | if (!(d & Mov) && /* optimisation - avoid slow emulated read */ | 853 | if (!(d & Mov) && /* optimisation - avoid slow emulated read */ |
852 | ((rc = ops->read_emulated((unsigned long)dst.ptr, | 854 | ((rc = ops->read_emulated((unsigned long)dst.ptr, |
853 | &dst.val, dst.bytes, ctxt)) != 0)) | 855 | &dst.val, dst.bytes, ctxt->vcpu)) != 0)) |
854 | goto done; | 856 | goto done; |
855 | break; | 857 | break; |
856 | } | 858 | } |
@@ -963,7 +965,7 @@ done_prefixes: | |||
963 | dst.bytes = 8; | 965 | dst.bytes = 8; |
964 | if ((rc = ops->read_std(register_address(ctxt->ss_base, | 966 | if ((rc = ops->read_std(register_address(ctxt->ss_base, |
965 | _regs[VCPU_REGS_RSP]), | 967 | _regs[VCPU_REGS_RSP]), |
966 | &dst.val, dst.bytes, ctxt)) != 0) | 968 | &dst.val, dst.bytes, ctxt->vcpu)) != 0) |
967 | goto done; | 969 | goto done; |
968 | register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes); | 970 | register_address_increment(_regs[VCPU_REGS_RSP], dst.bytes); |
969 | break; | 971 | break; |
@@ -1048,7 +1050,7 @@ done_prefixes: | |||
1048 | dst.bytes = 8; | 1050 | dst.bytes = 8; |
1049 | if ((rc = ops->read_std((unsigned long)dst.ptr, | 1051 | if ((rc = ops->read_std((unsigned long)dst.ptr, |
1050 | &dst.val, 8, | 1052 | &dst.val, 8, |
1051 | ctxt)) != 0) | 1053 | ctxt->vcpu)) != 0) |
1052 | goto done; | 1054 | goto done; |
1053 | } | 1055 | } |
1054 | register_address_increment(_regs[VCPU_REGS_RSP], | 1056 | register_address_increment(_regs[VCPU_REGS_RSP], |
@@ -1056,7 +1058,7 @@ done_prefixes: | |||
1056 | if ((rc = ops->write_std( | 1058 | if ((rc = ops->write_std( |
1057 | register_address(ctxt->ss_base, | 1059 | register_address(ctxt->ss_base, |
1058 | _regs[VCPU_REGS_RSP]), | 1060 | _regs[VCPU_REGS_RSP]), |
1059 | &dst.val, dst.bytes, ctxt)) != 0) | 1061 | &dst.val, dst.bytes, ctxt->vcpu)) != 0) |
1060 | goto done; | 1062 | goto done; |
1061 | no_wb = 1; | 1063 | no_wb = 1; |
1062 | break; | 1064 | break; |
@@ -1091,11 +1093,11 @@ writeback: | |||
1091 | rc = ops->cmpxchg_emulated((unsigned long)dst. | 1093 | rc = ops->cmpxchg_emulated((unsigned long)dst. |
1092 | ptr, &dst.orig_val, | 1094 | ptr, &dst.orig_val, |
1093 | &dst.val, dst.bytes, | 1095 | &dst.val, dst.bytes, |
1094 | ctxt); | 1096 | ctxt->vcpu); |
1095 | else | 1097 | else |
1096 | rc = ops->write_emulated((unsigned long)dst.ptr, | 1098 | rc = ops->write_emulated((unsigned long)dst.ptr, |
1097 | &dst.val, dst.bytes, | 1099 | &dst.val, dst.bytes, |
1098 | ctxt); | 1100 | ctxt->vcpu); |
1099 | if (rc != 0) | 1101 | if (rc != 0) |
1100 | goto done; | 1102 | goto done; |
1101 | default: | 1103 | default: |
@@ -1130,7 +1132,7 @@ special_insn: | |||
1130 | _regs[VCPU_REGS_RDI]); | 1132 | _regs[VCPU_REGS_RDI]); |
1131 | if ((rc = ops->read_emulated(register_address( | 1133 | if ((rc = ops->read_emulated(register_address( |
1132 | override_base ? *override_base : ctxt->ds_base, | 1134 | override_base ? *override_base : ctxt->ds_base, |
1133 | _regs[VCPU_REGS_RSI]), &dst.val, dst.bytes, ctxt)) != 0) | 1135 | _regs[VCPU_REGS_RSI]), &dst.val, dst.bytes, ctxt->vcpu)) != 0) |
1134 | goto done; | 1136 | goto done; |
1135 | register_address_increment(_regs[VCPU_REGS_RSI], | 1137 | register_address_increment(_regs[VCPU_REGS_RSI], |
1136 | (_eflags & EFLG_DF) ? -dst.bytes : dst.bytes); | 1138 | (_eflags & EFLG_DF) ? -dst.bytes : dst.bytes); |
@@ -1152,7 +1154,8 @@ special_insn: | |||
1152 | dst.type = OP_REG; | 1154 | dst.type = OP_REG; |
1153 | dst.bytes = (d & ByteOp) ? 1 : op_bytes; | 1155 | dst.bytes = (d & ByteOp) ? 1 : op_bytes; |
1154 | dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX]; | 1156 | dst.ptr = (unsigned long *)&_regs[VCPU_REGS_RAX]; |
1155 | if ((rc = ops->read_emulated(cr2, &dst.val, dst.bytes, ctxt)) != 0) | 1157 | if ((rc = ops->read_emulated(cr2, &dst.val, dst.bytes, |
1158 | ctxt->vcpu)) != 0) | ||
1156 | goto done; | 1159 | goto done; |
1157 | register_address_increment(_regs[VCPU_REGS_RSI], | 1160 | register_address_increment(_regs[VCPU_REGS_RSI], |
1158 | (_eflags & EFLG_DF) ? -dst.bytes : dst.bytes); | 1161 | (_eflags & EFLG_DF) ? -dst.bytes : dst.bytes); |
@@ -1171,7 +1174,8 @@ special_insn: | |||
1171 | 1174 | ||
1172 | pop_instruction: | 1175 | pop_instruction: |
1173 | if ((rc = ops->read_std(register_address(ctxt->ss_base, | 1176 | if ((rc = ops->read_std(register_address(ctxt->ss_base, |
1174 | _regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt)) != 0) | 1177 | _regs[VCPU_REGS_RSP]), dst.ptr, op_bytes, ctxt->vcpu)) |
1178 | != 0) | ||
1175 | goto done; | 1179 | goto done; |
1176 | 1180 | ||
1177 | register_address_increment(_regs[VCPU_REGS_RSP], op_bytes); | 1181 | register_address_increment(_regs[VCPU_REGS_RSP], op_bytes); |
@@ -1378,7 +1382,8 @@ twobyte_special_insn: | |||
1378 | case 0xc7: /* Grp9 (cmpxchg8b) */ | 1382 | case 0xc7: /* Grp9 (cmpxchg8b) */ |
1379 | { | 1383 | { |
1380 | u64 old, new; | 1384 | u64 old, new; |
1381 | if ((rc = ops->read_emulated(cr2, &old, 8, ctxt)) != 0) | 1385 | if ((rc = ops->read_emulated(cr2, &old, 8, ctxt->vcpu)) |
1386 | != 0) | ||
1382 | goto done; | 1387 | goto done; |
1383 | if (((u32) (old >> 0) != (u32) _regs[VCPU_REGS_RAX]) || | 1388 | if (((u32) (old >> 0) != (u32) _regs[VCPU_REGS_RAX]) || |
1384 | ((u32) (old >> 32) != (u32) _regs[VCPU_REGS_RDX])) { | 1389 | ((u32) (old >> 32) != (u32) _regs[VCPU_REGS_RDX])) { |
@@ -1389,7 +1394,7 @@ twobyte_special_insn: | |||
1389 | new = ((u64)_regs[VCPU_REGS_RCX] << 32) | 1394 | new = ((u64)_regs[VCPU_REGS_RCX] << 32) |
1390 | | (u32) _regs[VCPU_REGS_RBX]; | 1395 | | (u32) _regs[VCPU_REGS_RBX]; |
1391 | if ((rc = ops->cmpxchg_emulated(cr2, &old, | 1396 | if ((rc = ops->cmpxchg_emulated(cr2, &old, |
1392 | &new, 8, ctxt)) != 0) | 1397 | &new, 8, ctxt->vcpu)) != 0) |
1393 | goto done; | 1398 | goto done; |
1394 | _eflags |= EFLG_ZF; | 1399 | _eflags |= EFLG_ZF; |
1395 | } | 1400 | } |