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authorAvi Kivity <avi@qumranet.com>2006-12-29 19:49:48 -0500
committerLinus Torvalds <torvalds@woody.osdl.org>2006-12-30 13:56:44 -0500
commit3bab1f5dda3443043cc8fe68c5ae75530339f28f (patch)
treed1b675e8f5328094c1a3d651da5e7563ad692252 /drivers/kvm/vmx.c
parent671d6564796e0c90398aab30f89b5e48fc5a3fbe (diff)
[PATCH] KVM: Move common msr handling to arch independent code
Signed-off-by: Avi Kivity <avi@qumranet.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/kvm/vmx.c')
-rw-r--r--drivers/kvm/vmx.c59
1 files changed, 11 insertions, 48 deletions
diff --git a/drivers/kvm/vmx.c b/drivers/kvm/vmx.c
index e5358a8b01f1..5561c5936c3d 100644
--- a/drivers/kvm/vmx.c
+++ b/drivers/kvm/vmx.c
@@ -344,8 +344,7 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
344 data = vmcs_readl(GUEST_GS_BASE); 344 data = vmcs_readl(GUEST_GS_BASE);
345 break; 345 break;
346 case MSR_EFER: 346 case MSR_EFER:
347 data = vcpu->shadow_efer; 347 return kvm_get_msr_common(vcpu, msr_index, pdata);
348 break;
349#endif 348#endif
350 case MSR_IA32_TIME_STAMP_COUNTER: 349 case MSR_IA32_TIME_STAMP_COUNTER:
351 data = guest_read_tsc(); 350 data = guest_read_tsc();
@@ -359,36 +358,13 @@ static int vmx_get_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata)
359 case MSR_IA32_SYSENTER_ESP: 358 case MSR_IA32_SYSENTER_ESP:
360 data = vmcs_read32(GUEST_SYSENTER_ESP); 359 data = vmcs_read32(GUEST_SYSENTER_ESP);
361 break; 360 break;
362 case 0xc0010010: /* SYSCFG */
363 case 0xc0010015: /* HWCR */
364 case MSR_IA32_PLATFORM_ID:
365 case MSR_IA32_P5_MC_ADDR:
366 case MSR_IA32_P5_MC_TYPE:
367 case MSR_IA32_MC0_CTL:
368 case MSR_IA32_MCG_STATUS:
369 case MSR_IA32_MCG_CAP:
370 case MSR_IA32_MC0_MISC:
371 case MSR_IA32_MC0_MISC+4:
372 case MSR_IA32_MC0_MISC+8:
373 case MSR_IA32_MC0_MISC+12:
374 case MSR_IA32_MC0_MISC+16:
375 case MSR_IA32_UCODE_REV:
376 /* MTRR registers */
377 case 0xfe:
378 case 0x200 ... 0x2ff:
379 data = 0;
380 break;
381 case MSR_IA32_APICBASE:
382 data = vcpu->apic_base;
383 break;
384 default: 361 default:
385 msr = find_msr_entry(vcpu, msr_index); 362 msr = find_msr_entry(vcpu, msr_index);
386 if (!msr) { 363 if (msr) {
387 printk(KERN_ERR "kvm: unhandled rdmsr: %x\n", msr_index); 364 data = msr->data;
388 return 1; 365 break;
389 } 366 }
390 data = msr->data; 367 return kvm_get_msr_common(vcpu, msr_index, pdata);
391 break;
392 } 368 }
393 369
394 *pdata = data; 370 *pdata = data;
@@ -405,6 +381,8 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
405 struct vmx_msr_entry *msr; 381 struct vmx_msr_entry *msr;
406 switch (msr_index) { 382 switch (msr_index) {
407#ifdef CONFIG_X86_64 383#ifdef CONFIG_X86_64
384 case MSR_EFER:
385 return kvm_set_msr_common(vcpu, msr_index, data);
408 case MSR_FS_BASE: 386 case MSR_FS_BASE:
409 vmcs_writel(GUEST_FS_BASE, data); 387 vmcs_writel(GUEST_FS_BASE, data);
410 break; 388 break;
@@ -421,32 +399,17 @@ static int vmx_set_msr(struct kvm_vcpu *vcpu, u32 msr_index, u64 data)
421 case MSR_IA32_SYSENTER_ESP: 399 case MSR_IA32_SYSENTER_ESP:
422 vmcs_write32(GUEST_SYSENTER_ESP, data); 400 vmcs_write32(GUEST_SYSENTER_ESP, data);
423 break; 401 break;
424#ifdef __x86_64
425 case MSR_EFER:
426 set_efer(vcpu, data);
427 break;
428 case MSR_IA32_MC0_STATUS:
429 printk(KERN_WARNING "%s: MSR_IA32_MC0_STATUS 0x%llx, nop\n"
430 , __FUNCTION__, data);
431 break;
432#endif
433 case MSR_IA32_TIME_STAMP_COUNTER: { 402 case MSR_IA32_TIME_STAMP_COUNTER: {
434 guest_write_tsc(data); 403 guest_write_tsc(data);
435 break; 404 break;
436 } 405 }
437 case MSR_IA32_UCODE_REV:
438 case MSR_IA32_UCODE_WRITE:
439 case 0x200 ... 0x2ff: /* MTRRs */
440 break;
441 case MSR_IA32_APICBASE:
442 vcpu->apic_base = data;
443 break;
444 default: 406 default:
445 msr = find_msr_entry(vcpu, msr_index); 407 msr = find_msr_entry(vcpu, msr_index);
446 if (!msr) { 408 if (msr) {
447 printk(KERN_ERR "kvm: unhandled wrmsr: 0x%x\n", msr_index); 409 msr->data = data;
448 return 1; 410 break;
449 } 411 }
412 return kvm_set_msr_common(vcpu, msr_index, data);
450 msr->data = data; 413 msr->data = data;
451 break; 414 break;
452 } 415 }