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authorJoe Perches <joe@perches.com>2012-02-19 22:52:38 -0500
committerJoe Perches <joe@perches.com>2012-02-21 12:04:01 -0500
commit475be4d85a274d0961593db41cf85689db1d583c (patch)
treeb2b8931eb747794730522c3cf1898e46948527b9 /drivers/isdn/hisax
parent0b0a635f79f91f3755b6518627ea06dd0dbfd523 (diff)
isdn: whitespace coding style cleanup
isdn source code uses a not-current coding style. Update the coding style used on a per-line basis so that git diff -w shows only elided blank lines at EOF. Done with emacs and some scripts and some typing. Built x86 allyesconfig. No detected change in objdump -d or size. Signed-off-by: Joe Perches <joe@perches.com>
Diffstat (limited to 'drivers/isdn/hisax')
-rw-r--r--drivers/isdn/hisax/amd7930_fn.c786
-rw-r--r--drivers/isdn/hisax/arcofi.c88
-rw-r--r--drivers/isdn/hisax/arcofi.h2
-rw-r--r--drivers/isdn/hisax/asuscom.c110
-rw-r--r--drivers/isdn/hisax/avm_a1.c42
-rw-r--r--drivers/isdn/hisax/avm_a1p.c152
-rw-r--r--drivers/isdn/hisax/avm_pci.c324
-rw-r--r--drivers/isdn/hisax/avma1_cs.c124
-rw-r--r--drivers/isdn/hisax/bkm_a4t.c92
-rw-r--r--drivers/isdn/hisax/bkm_a8.c184
-rw-r--r--drivers/isdn/hisax/bkm_ax.h78
-rw-r--r--drivers/isdn/hisax/callc.c1074
-rw-r--r--drivers/isdn/hisax/config.c126
-rw-r--r--drivers/isdn/hisax/diva.c334
-rw-r--r--drivers/isdn/hisax/elsa.c500
-rw-r--r--drivers/isdn/hisax/elsa_cs.c164
-rw-r--r--drivers/isdn/hisax/elsa_ser.c178
-rw-r--r--drivers/isdn/hisax/enternow_pci.c200
-rw-r--r--drivers/isdn/hisax/fsm.c38
-rw-r--r--drivers/isdn/hisax/fsm.h4
-rw-r--r--drivers/isdn/hisax/gazel.c518
-rw-r--r--drivers/isdn/hisax/hfc4s8s_l1.c648
-rw-r--r--drivers/isdn/hisax/hfc4s8s_l1.h8
-rw-r--r--drivers/isdn/hisax/hfc_2bds0.c484
-rw-r--r--drivers/isdn/hisax/hfc_2bds0.h28
-rw-r--r--drivers/isdn/hisax/hfc_2bs0.c284
-rw-r--r--drivers/isdn/hisax/hfc_2bs0.h6
-rw-r--r--drivers/isdn/hisax/hfc_pci.c714
-rw-r--r--drivers/isdn/hisax/hfc_pci.h96
-rw-r--r--drivers/isdn/hisax/hfc_sx.c1126
-rw-r--r--drivers/isdn/hisax/hfc_sx.h30
-rw-r--r--drivers/isdn/hisax/hfc_usb.c586
-rw-r--r--drivers/isdn/hisax/hfc_usb.h10
-rw-r--r--drivers/isdn/hisax/hfcscard.c96
-rw-r--r--drivers/isdn/hisax/hisax.h172
-rw-r--r--drivers/isdn/hisax/hisax_cfg.h6
-rw-r--r--drivers/isdn/hisax/hisax_debug.h42
-rw-r--r--drivers/isdn/hisax/hisax_fcpcipnp.c92
-rw-r--r--drivers/isdn/hisax/hisax_fcpcipnp.h3
-rw-r--r--drivers/isdn/hisax/hisax_if.h4
-rw-r--r--drivers/isdn/hisax/hisax_isac.c44
-rw-r--r--drivers/isdn/hisax/hscx.c136
-rw-r--r--drivers/isdn/hisax/hscx.h2
-rw-r--r--drivers/isdn/hisax/hscx_irq.c18
-rw-r--r--drivers/isdn/hisax/icc.c314
-rw-r--r--drivers/isdn/hisax/icc.h6
-rw-r--r--drivers/isdn/hisax/ipac.h2
-rw-r--r--drivers/isdn/hisax/ipacx.c675
-rw-r--r--drivers/isdn/hisax/isac.c320
-rw-r--r--drivers/isdn/hisax/isac.h2
-rw-r--r--drivers/isdn/hisax/isar.c1796
-rw-r--r--drivers/isdn/hisax/isar.h14
-rw-r--r--drivers/isdn/hisax/isdnl1.c262
-rw-r--r--drivers/isdn/hisax/isdnl2.c342
-rw-r--r--drivers/isdn/hisax/isdnl2.h1
-rw-r--r--drivers/isdn/hisax/isdnl3.c174
-rw-r--r--drivers/isdn/hisax/isdnl3.h3
-rw-r--r--drivers/isdn/hisax/isurf.c118
-rw-r--r--drivers/isdn/hisax/ix1_micro.c100
-rw-r--r--drivers/isdn/hisax/jade.c209
-rw-r--r--drivers/isdn/hisax/jade.h156
-rw-r--r--drivers/isdn/hisax/jade_irq.c48
-rw-r--r--drivers/isdn/hisax/l3_1tr6.c196
-rw-r--r--drivers/isdn/hisax/l3dss1.c1900
-rw-r--r--drivers/isdn/hisax/l3dss1.h20
-rw-r--r--drivers/isdn/hisax/l3ni1.c1838
-rw-r--r--drivers/isdn/hisax/l3ni1.h28
-rw-r--r--drivers/isdn/hisax/lmgr.c28
-rw-r--r--drivers/isdn/hisax/mic.c64
-rw-r--r--drivers/isdn/hisax/netjet.c623
-rw-r--r--drivers/isdn/hisax/netjet.h5
-rw-r--r--drivers/isdn/hisax/niccy.c78
-rw-r--r--drivers/isdn/hisax/nj_s.c112
-rw-r--r--drivers/isdn/hisax/nj_u.c100
-rw-r--r--drivers/isdn/hisax/q931.c240
-rw-r--r--drivers/isdn/hisax/s0box.c132
-rw-r--r--drivers/isdn/hisax/saphir.c122
-rw-r--r--drivers/isdn/hisax/sedlbauer.c328
-rw-r--r--drivers/isdn/hisax/sedlbauer_cs.c176
-rw-r--r--drivers/isdn/hisax/sportster.c126
-rw-r--r--drivers/isdn/hisax/st5481.h98
-rw-r--r--drivers/isdn/hisax/st5481_b.c124
-rw-r--r--drivers/isdn/hisax/st5481_d.c194
-rw-r--r--drivers/isdn/hisax/st5481_init.c64
-rw-r--r--drivers/isdn/hisax/st5481_usb.c269
-rw-r--r--drivers/isdn/hisax/tei.c76
-rw-r--r--drivers/isdn/hisax/teleint.c126
-rw-r--r--drivers/isdn/hisax/teles0.c126
-rw-r--r--drivers/isdn/hisax/teles3.c156
-rw-r--r--drivers/isdn/hisax/teles_cs.c134
-rw-r--r--drivers/isdn/hisax/telespci.c80
-rw-r--r--drivers/isdn/hisax/w6692.c412
-rw-r--r--drivers/isdn/hisax/w6692.h10
93 files changed, 11136 insertions, 11144 deletions
diff --git a/drivers/isdn/hisax/amd7930_fn.c b/drivers/isdn/hisax/amd7930_fn.c
index 5d7278397878..89342f7e0c5b 100644
--- a/drivers/isdn/hisax/amd7930_fn.c
+++ b/drivers/isdn/hisax/amd7930_fn.c
@@ -101,26 +101,26 @@ static WORD initAMD[] = {
101static void /* macro wWordAMD */ 101static void /* macro wWordAMD */
102WriteWordAmd7930(struct IsdnCardState *cs, BYTE reg, WORD val) 102WriteWordAmd7930(struct IsdnCardState *cs, BYTE reg, WORD val)
103{ 103{
104 wByteAMD(cs, 0x00, reg); 104 wByteAMD(cs, 0x00, reg);
105 wByteAMD(cs, 0x01, LOBYTE(val)); 105 wByteAMD(cs, 0x01, LOBYTE(val));
106 wByteAMD(cs, 0x01, HIBYTE(val)); 106 wByteAMD(cs, 0x01, HIBYTE(val));
107} 107}
108 108
109static WORD /* macro rWordAMD */ 109static WORD /* macro rWordAMD */
110ReadWordAmd7930(struct IsdnCardState *cs, BYTE reg) 110ReadWordAmd7930(struct IsdnCardState *cs, BYTE reg)
111{ 111{
112 WORD res; 112 WORD res;
113 /* direct access register */ 113 /* direct access register */
114 if(reg < 8) { 114 if (reg < 8) {
115 res = rByteAMD(cs, reg); 115 res = rByteAMD(cs, reg);
116 res += 256*rByteAMD(cs, reg); 116 res += 256 * rByteAMD(cs, reg);
117 } 117 }
118 /* indirect access register */ 118 /* indirect access register */
119 else { 119 else {
120 wByteAMD(cs, 0x00, reg); 120 wByteAMD(cs, 0x00, reg);
121 res = rByteAMD(cs, 0x01); 121 res = rByteAMD(cs, 0x01);
122 res += 256*rByteAMD(cs, 0x01); 122 res += 256 * rByteAMD(cs, 0x01);
123 } 123 }
124 return (res); 124 return (res);
125} 125}
126 126
@@ -131,23 +131,23 @@ Amd7930_ph_command(struct IsdnCardState *cs, u_char command, char *s)
131 if (cs->debug & L1_DEB_ISAC) 131 if (cs->debug & L1_DEB_ISAC)
132 debugl1(cs, "AMD7930: %s: ph_command 0x%02X", s, command); 132 debugl1(cs, "AMD7930: %s: ph_command 0x%02X", s, command);
133 133
134 cs->dc.amd7930.lmr1 = command; 134 cs->dc.amd7930.lmr1 = command;
135 wByteAMD(cs, 0xA3, command); 135 wByteAMD(cs, 0xA3, command);
136} 136}
137 137
138 138
139 139
140static BYTE i430States[] = { 140static BYTE i430States[] = {
141// to reset F3 F4 F5 F6 F7 F8 AR from 141// to reset F3 F4 F5 F6 F7 F8 AR from
142 0x01, 0x02, 0x00, 0x00, 0x00, 0x07, 0x05, 0x00, // init 142 0x01, 0x02, 0x00, 0x00, 0x00, 0x07, 0x05, 0x00, // init
143 0x01, 0x02, 0x00, 0x00, 0x00, 0x07, 0x05, 0x00, // reset 143 0x01, 0x02, 0x00, 0x00, 0x00, 0x07, 0x05, 0x00, // reset
144 0x01, 0x02, 0x00, 0x00, 0x00, 0x09, 0x05, 0x04, // F3 144 0x01, 0x02, 0x00, 0x00, 0x00, 0x09, 0x05, 0x04, // F3
145 0x01, 0x02, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, // F4 145 0x01, 0x02, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, // F4
146 0x01, 0x02, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, // F5 146 0x01, 0x02, 0x00, 0x00, 0x1B, 0x00, 0x00, 0x00, // F5
147 0x01, 0x03, 0x00, 0x00, 0x00, 0x06, 0x05, 0x00, // F6 147 0x01, 0x03, 0x00, 0x00, 0x00, 0x06, 0x05, 0x00, // F6
148 0x11, 0x13, 0x00, 0x00, 0x1B, 0x00, 0x15, 0x00, // F7 148 0x11, 0x13, 0x00, 0x00, 0x1B, 0x00, 0x15, 0x00, // F7
149 0x01, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // F8 149 0x01, 0x03, 0x00, 0x00, 0x00, 0x06, 0x00, 0x00, // F8
150 0x01, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x0A}; // AR 150 0x01, 0x03, 0x00, 0x00, 0x00, 0x09, 0x00, 0x0A}; // AR
151 151
152 152
153/* Row init - reset F3 F4 F5 F6 F7 F8 AR */ 153/* Row init - reset F3 F4 F5 F6 F7 F8 AR */
@@ -158,9 +158,9 @@ static BYTE stateHelper[] = { 0x00, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x
158 158
159static void 159static void
160Amd7930_get_state(struct IsdnCardState *cs) { 160Amd7930_get_state(struct IsdnCardState *cs) {
161 BYTE lsr = rByteAMD(cs, 0xA1); 161 BYTE lsr = rByteAMD(cs, 0xA1);
162 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2; 162 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
163 Amd7930_new_ph(cs); 163 Amd7930_new_ph(cs);
164} 164}
165 165
166 166
@@ -168,65 +168,65 @@ Amd7930_get_state(struct IsdnCardState *cs) {
168static void 168static void
169Amd7930_new_ph(struct IsdnCardState *cs) 169Amd7930_new_ph(struct IsdnCardState *cs)
170{ 170{
171 u_char index = stateHelper[cs->dc.amd7930.old_state]*8 + stateHelper[cs->dc.amd7930.ph_state]-1; 171 u_char index = stateHelper[cs->dc.amd7930.old_state] * 8 + stateHelper[cs->dc.amd7930.ph_state] - 1;
172 u_char message = i430States[index]; 172 u_char message = i430States[index];
173 173
174 if (cs->debug & L1_DEB_ISAC) 174 if (cs->debug & L1_DEB_ISAC)
175 debugl1(cs, "AMD7930: new_ph %d, old_ph %d, message %d, index %d", 175 debugl1(cs, "AMD7930: new_ph %d, old_ph %d, message %d, index %d",
176 cs->dc.amd7930.ph_state, cs->dc.amd7930.old_state, message & 0x0f, index); 176 cs->dc.amd7930.ph_state, cs->dc.amd7930.old_state, message & 0x0f, index);
177 177
178 cs->dc.amd7930.old_state = cs->dc.amd7930.ph_state; 178 cs->dc.amd7930.old_state = cs->dc.amd7930.ph_state;
179 179
180 /* abort transmit if nessesary */ 180 /* abort transmit if nessesary */
181 if ((message & 0xf0) && (cs->tx_skb)) { 181 if ((message & 0xf0) && (cs->tx_skb)) {
182 wByteAMD(cs, 0x21, 0xC2); 182 wByteAMD(cs, 0x21, 0xC2);
183 wByteAMD(cs, 0x21, 0x02); 183 wByteAMD(cs, 0x21, 0x02);
184 } 184 }
185 185
186 switch (message & 0x0f) { 186 switch (message & 0x0f) {
187 187
188 case (1): 188 case (1):
189 l1_msg(cs, HW_RESET | INDICATION, NULL); 189 l1_msg(cs, HW_RESET | INDICATION, NULL);
190 Amd7930_get_state(cs); 190 Amd7930_get_state(cs);
191 break; 191 break;
192 case (2): /* init, Card starts in F3 */ 192 case (2): /* init, Card starts in F3 */
193 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL); 193 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
194 break; 194 break;
195 case (3): 195 case (3):
196 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 196 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
197 break; 197 break;
198 case (4): 198 case (4):
199 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 199 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
200 Amd7930_ph_command(cs, 0x50, "HW_ENABLE REQUEST"); 200 Amd7930_ph_command(cs, 0x50, "HW_ENABLE REQUEST");
201 break; 201 break;
202 case (5): 202 case (5):
203 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 203 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
204 break; 204 break;
205 case (6): 205 case (6):
206 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 206 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
207 break; 207 break;
208 case (7): /* init, Card starts in F7 */ 208 case (7): /* init, Card starts in F7 */
209 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 209 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
210 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 210 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
211 break; 211 break;
212 case (8): 212 case (8):
213 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 213 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
214 /* fall through */ 214 /* fall through */
215 case (9): 215 case (9):
216 Amd7930_ph_command(cs, 0x40, "HW_ENABLE REQ cleared if set"); 216 Amd7930_ph_command(cs, 0x40, "HW_ENABLE REQ cleared if set");
217 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 217 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
218 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 218 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
219 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 219 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
220 break; 220 break;
221 case (10): 221 case (10):
222 Amd7930_ph_command(cs, 0x40, "T3 expired, HW_ENABLE REQ cleared"); 222 Amd7930_ph_command(cs, 0x40, "T3 expired, HW_ENABLE REQ cleared");
223 cs->dc.amd7930.old_state = 3; 223 cs->dc.amd7930.old_state = 3;
224 break; 224 break;
225 case (11): 225 case (11):
226 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 226 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
227 break; 227 break;
228 default: 228 default:
229 break; 229 break;
230 } 230 }
231} 231}
232 232
@@ -237,10 +237,10 @@ Amd7930_bh(struct work_struct *work)
237{ 237{
238 struct IsdnCardState *cs = 238 struct IsdnCardState *cs =
239 container_of(work, struct IsdnCardState, tqueue); 239 container_of(work, struct IsdnCardState, tqueue);
240 struct PStack *stptr; 240 struct PStack *stptr;
241 241
242 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) { 242 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
243 if (cs->debug) 243 if (cs->debug)
244 debugl1(cs, "Amd7930: bh, D-Channel Busy cleared"); 244 debugl1(cs, "Amd7930: bh, D-Channel Busy cleared");
245 stptr = cs->stlist; 245 stptr = cs->stlist;
246 while (stptr != NULL) { 246 while (stptr != NULL) {
@@ -249,29 +249,29 @@ Amd7930_bh(struct work_struct *work)
249 } 249 }
250 } 250 }
251 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) { 251 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
252 if (cs->debug & L1_DEB_ISAC) 252 if (cs->debug & L1_DEB_ISAC)
253 debugl1(cs, "AMD7930: bh, D_L1STATECHANGE"); 253 debugl1(cs, "AMD7930: bh, D_L1STATECHANGE");
254 Amd7930_new_ph(cs); 254 Amd7930_new_ph(cs);
255 } 255 }
256 256
257 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) { 257 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) {
258 if (cs->debug & L1_DEB_ISAC) 258 if (cs->debug & L1_DEB_ISAC)
259 debugl1(cs, "AMD7930: bh, D_RCVBUFREADY"); 259 debugl1(cs, "AMD7930: bh, D_RCVBUFREADY");
260 DChannel_proc_rcv(cs); 260 DChannel_proc_rcv(cs);
261 } 261 }
262 262
263 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) { 263 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) {
264 if (cs->debug & L1_DEB_ISAC) 264 if (cs->debug & L1_DEB_ISAC)
265 debugl1(cs, "AMD7930: bh, D_XMTBUFREADY"); 265 debugl1(cs, "AMD7930: bh, D_XMTBUFREADY");
266 DChannel_proc_xmt(cs); 266 DChannel_proc_xmt(cs);
267 } 267 }
268} 268}
269 269
270static void 270static void
271Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag) 271Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
272{ 272{
273 273
274 BYTE stat, der; 274 BYTE stat, der;
275 BYTE *ptr; 275 BYTE *ptr;
276 struct sk_buff *skb; 276 struct sk_buff *skb;
277 277
@@ -288,54 +288,54 @@ Amd7930_empty_Dfifo(struct IsdnCardState *cs, int flag)
288 /* read D-Channel-Fifo*/ 288 /* read D-Channel-Fifo*/
289 stat = rByteAMD(cs, 0x07); // DSR2 289 stat = rByteAMD(cs, 0x07); // DSR2
290 290
291 /* while Data in Fifo ... */ 291 /* while Data in Fifo ... */
292 while ( (stat & 2) && ((ptr-cs->rcvbuf) < MAX_DFRAME_LEN_L1) ) { 292 while ((stat & 2) && ((ptr-cs->rcvbuf) < MAX_DFRAME_LEN_L1)) {
293 *ptr = rByteAMD(cs, 0x04); // DCRB 293 *ptr = rByteAMD(cs, 0x04); // DCRB
294 ptr++; 294 ptr++;
295 stat = rByteAMD(cs, 0x07); // DSR2 295 stat = rByteAMD(cs, 0x07); // DSR2
296 cs->rcvidx = ptr - cs->rcvbuf; 296 cs->rcvidx = ptr - cs->rcvbuf;
297 297
298 /* Paket ready? */ 298 /* Paket ready? */
299 if (stat & 1) { 299 if (stat & 1) {
300 300
301 der = rWordAMD(cs, 0x03); 301 der = rWordAMD(cs, 0x03);
302 302
303 /* no errors, packet ok */ 303 /* no errors, packet ok */
304 if(!der && !flag) { 304 if (!der && !flag) {
305 rWordAMD(cs, 0x89); // clear DRCR 305 rWordAMD(cs, 0x89); // clear DRCR
306 306
307 if ((cs->rcvidx) > 0) { 307 if ((cs->rcvidx) > 0) {
308 if (!(skb = alloc_skb(cs->rcvidx, GFP_ATOMIC))) 308 if (!(skb = alloc_skb(cs->rcvidx, GFP_ATOMIC)))
309 printk(KERN_WARNING "HiSax: Amd7930: empty_Dfifo, D receive out of memory!\n"); 309 printk(KERN_WARNING "HiSax: Amd7930: empty_Dfifo, D receive out of memory!\n");
310 else { 310 else {
311 /* Debugging */ 311 /* Debugging */
312 if (cs->debug & L1_DEB_ISAC_FIFO) { 312 if (cs->debug & L1_DEB_ISAC_FIFO) {
313 char *t = cs->dlog; 313 char *t = cs->dlog;
314 314
315 t += sprintf(t, "Amd7930: empty_Dfifo cnt: %d |", cs->rcvidx); 315 t += sprintf(t, "Amd7930: empty_Dfifo cnt: %d |", cs->rcvidx);
316 QuickHex(t, cs->rcvbuf, cs->rcvidx); 316 QuickHex(t, cs->rcvbuf, cs->rcvidx);
317 debugl1(cs, cs->dlog); 317 debugl1(cs, cs->dlog);
318 }
319 /* moves received data in sk-buffer */
320 memcpy(skb_put(skb, cs->rcvidx), cs->rcvbuf, cs->rcvidx);
321 skb_queue_tail(&cs->rq, skb);
322 } 318 }
319 /* moves received data in sk-buffer */
320 memcpy(skb_put(skb, cs->rcvidx), cs->rcvbuf, cs->rcvidx);
321 skb_queue_tail(&cs->rq, skb);
323 } 322 }
324
325 } 323 }
326 /* throw damaged packets away, reset receive-buffer, indicate RX */ 324
327 ptr = cs->rcvbuf;
328 cs->rcvidx = 0;
329 schedule_event(cs, D_RCVBUFREADY);
330 } 325 }
331 } 326 /* throw damaged packets away, reset receive-buffer, indicate RX */
332 /* Packet to long, overflow */ 327 ptr = cs->rcvbuf;
333 if(cs->rcvidx >= MAX_DFRAME_LEN_L1) {
334 if (cs->debug & L1_DEB_WARN)
335 debugl1(cs, "AMD7930: empty_Dfifo L2-Framelength overrun");
336 cs->rcvidx = 0; 328 cs->rcvidx = 0;
337 return; 329 schedule_event(cs, D_RCVBUFREADY);
338 } 330 }
331 }
332 /* Packet to long, overflow */
333 if (cs->rcvidx >= MAX_DFRAME_LEN_L1) {
334 if (cs->debug & L1_DEB_WARN)
335 debugl1(cs, "AMD7930: empty_Dfifo L2-Framelength overrun");
336 cs->rcvidx = 0;
337 return;
338 }
339 /* AMD interrupts on */ 339 /* AMD interrupts on */
340 AmdIrqOn(cs); 340 AmdIrqOn(cs);
341} 341}
@@ -345,9 +345,9 @@ static void
345Amd7930_fill_Dfifo(struct IsdnCardState *cs) 345Amd7930_fill_Dfifo(struct IsdnCardState *cs)
346{ 346{
347 347
348 WORD dtcrr, dtcrw, len, count; 348 WORD dtcrr, dtcrw, len, count;
349 BYTE txstat, dmr3; 349 BYTE txstat, dmr3;
350 BYTE *ptr, *deb_ptr; 350 BYTE *ptr, *deb_ptr;
351 351
352 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO)) 352 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
353 debugl1(cs, "Amd7930: fill_Dfifo"); 353 debugl1(cs, "Amd7930: fill_Dfifo");
@@ -355,43 +355,43 @@ Amd7930_fill_Dfifo(struct IsdnCardState *cs)
355 if ((!cs->tx_skb) || (cs->tx_skb->len <= 0)) 355 if ((!cs->tx_skb) || (cs->tx_skb->len <= 0))
356 return; 356 return;
357 357
358 dtcrw = 0; 358 dtcrw = 0;
359 if(!cs->dc.amd7930.tx_xmtlen) 359 if (!cs->dc.amd7930.tx_xmtlen)
360 /* new Frame */ 360 /* new Frame */
361 len = dtcrw = cs->tx_skb->len; 361 len = dtcrw = cs->tx_skb->len;
362 /* continue frame */ 362 /* continue frame */
363 else len = cs->dc.amd7930.tx_xmtlen; 363 else len = cs->dc.amd7930.tx_xmtlen;
364 364
365 365
366 /* AMD interrupts off */ 366 /* AMD interrupts off */
367 AmdIrqOff(cs); 367 AmdIrqOff(cs);
368 368
369 deb_ptr = ptr = cs->tx_skb->data; 369 deb_ptr = ptr = cs->tx_skb->data;
370 370
371 /* while free place in tx-fifo available and data in sk-buffer */ 371 /* while free place in tx-fifo available and data in sk-buffer */
372 txstat = 0x10; 372 txstat = 0x10;
373 while((txstat & 0x10) && (cs->tx_cnt < len)) { 373 while ((txstat & 0x10) && (cs->tx_cnt < len)) {
374 wByteAMD(cs, 0x04, *ptr); 374 wByteAMD(cs, 0x04, *ptr);
375 ptr++; 375 ptr++;
376 cs->tx_cnt++; 376 cs->tx_cnt++;
377 txstat= rByteAMD(cs, 0x07); 377 txstat = rByteAMD(cs, 0x07);
378 } 378 }
379 count = ptr - cs->tx_skb->data; 379 count = ptr - cs->tx_skb->data;
380 skb_pull(cs->tx_skb, count); 380 skb_pull(cs->tx_skb, count);
381 381
382 382
383 dtcrr = rWordAMD(cs, 0x85); // DTCR 383 dtcrr = rWordAMD(cs, 0x85); // DTCR
384 dmr3 = rByteAMD(cs, 0x8E); 384 dmr3 = rByteAMD(cs, 0x8E);
385 385
386 if (cs->debug & L1_DEB_ISAC) { 386 if (cs->debug & L1_DEB_ISAC) {
387 debugl1(cs, "Amd7930: fill_Dfifo, DMR3: 0x%02X, DTCR read: 0x%04X write: 0x%02X 0x%02X", dmr3, dtcrr, LOBYTE(dtcrw), HIBYTE(dtcrw)); 387 debugl1(cs, "Amd7930: fill_Dfifo, DMR3: 0x%02X, DTCR read: 0x%04X write: 0x%02X 0x%02X", dmr3, dtcrr, LOBYTE(dtcrw), HIBYTE(dtcrw));
388 } 388 }
389 389
390 /* writeing of dtcrw starts transmit */ 390 /* writeing of dtcrw starts transmit */
391 if(!cs->dc.amd7930.tx_xmtlen) { 391 if (!cs->dc.amd7930.tx_xmtlen) {
392 wWordAMD(cs, 0x85, dtcrw); 392 wWordAMD(cs, 0x85, dtcrw);
393 cs->dc.amd7930.tx_xmtlen = dtcrw; 393 cs->dc.amd7930.tx_xmtlen = dtcrw;
394 } 394 }
395 395
396 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 396 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
397 debugl1(cs, "Amd7930: fill_Dfifo dbusytimer running"); 397 debugl1(cs, "Amd7930: fill_Dfifo dbusytimer running");
@@ -409,260 +409,260 @@ Amd7930_fill_Dfifo(struct IsdnCardState *cs)
409 debugl1(cs, cs->dlog); 409 debugl1(cs, cs->dlog);
410 } 410 }
411 /* AMD interrupts on */ 411 /* AMD interrupts on */
412 AmdIrqOn(cs); 412 AmdIrqOn(cs);
413} 413}
414 414
415 415
416void Amd7930_interrupt(struct IsdnCardState *cs, BYTE irflags) 416void Amd7930_interrupt(struct IsdnCardState *cs, BYTE irflags)
417{ 417{
418 BYTE dsr1, dsr2, lsr; 418 BYTE dsr1, dsr2, lsr;
419 WORD der; 419 WORD der;
420 420
421 while (irflags) 421 while (irflags)
422 { 422 {
423 423
424 dsr1 = rByteAMD(cs, 0x02); 424 dsr1 = rByteAMD(cs, 0x02);
425 der = rWordAMD(cs, 0x03); 425 der = rWordAMD(cs, 0x03);
426 dsr2 = rByteAMD(cs, 0x07); 426 dsr2 = rByteAMD(cs, 0x07);
427 lsr = rByteAMD(cs, 0xA1); 427 lsr = rByteAMD(cs, 0xA1);
428 428
429 if (cs->debug & L1_DEB_ISAC) 429 if (cs->debug & L1_DEB_ISAC)
430 debugl1(cs, "Amd7930: interrupt: flags: 0x%02X, DSR1: 0x%02X, DSR2: 0x%02X, LSR: 0x%02X, DER=0x%04X", irflags, dsr1, dsr2, lsr, der); 430 debugl1(cs, "Amd7930: interrupt: flags: 0x%02X, DSR1: 0x%02X, DSR2: 0x%02X, LSR: 0x%02X, DER=0x%04X", irflags, dsr1, dsr2, lsr, der);
431 431
432 /* D error -> read DER and DSR2 bit 2 */ 432 /* D error -> read DER and DSR2 bit 2 */
433 if (der || (dsr2 & 4)) { 433 if (der || (dsr2 & 4)) {
434 434
435 if (cs->debug & L1_DEB_WARN) 435 if (cs->debug & L1_DEB_WARN)
436 debugl1(cs, "Amd7930: interrupt: D error DER=0x%04X", der); 436 debugl1(cs, "Amd7930: interrupt: D error DER=0x%04X", der);
437
438 /* RX, TX abort if collision detected */
439 if (der & 2) {
440 wByteAMD(cs, 0x21, 0xC2);
441 wByteAMD(cs, 0x21, 0x02);
442 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
443 del_timer(&cs->dbusytimer);
444 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
445 schedule_event(cs, D_CLEARBUSY);
446 /* restart frame */
447 if (cs->tx_skb) {
448 skb_push(cs->tx_skb, cs->tx_cnt);
449 cs->tx_cnt = 0;
450 cs->dc.amd7930.tx_xmtlen = 0;
451 Amd7930_fill_Dfifo(cs);
452 } else {
453 printk(KERN_WARNING "HiSax: Amd7930 D-Collision, no skb\n");
454 debugl1(cs, "Amd7930: interrupt: D-Collision, no skb");
455 }
456 }
457 /* remove damaged data from fifo */
458 Amd7930_empty_Dfifo(cs, 1);
437 459
438 /* RX, TX abort if collision detected */
439 if (der & 2) {
440 wByteAMD(cs, 0x21, 0xC2);
441 wByteAMD(cs, 0x21, 0x02);
442 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 460 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
443 del_timer(&cs->dbusytimer); 461 del_timer(&cs->dbusytimer);
444 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 462 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
445 schedule_event(cs, D_CLEARBUSY); 463 schedule_event(cs, D_CLEARBUSY);
446 /* restart frame */ 464 /* restart TX-Frame */
447 if (cs->tx_skb) { 465 if (cs->tx_skb) {
448 skb_push(cs->tx_skb, cs->tx_cnt); 466 skb_push(cs->tx_skb, cs->tx_cnt);
449 cs->tx_cnt = 0; 467 cs->tx_cnt = 0;
450 cs->dc.amd7930.tx_xmtlen = 0; 468 cs->dc.amd7930.tx_xmtlen = 0;
451 Amd7930_fill_Dfifo(cs); 469 Amd7930_fill_Dfifo(cs);
452 } else {
453 printk(KERN_WARNING "HiSax: Amd7930 D-Collision, no skb\n");
454 debugl1(cs, "Amd7930: interrupt: D-Collision, no skb");
455 } 470 }
456 }
457 /* remove damaged data from fifo */
458 Amd7930_empty_Dfifo(cs, 1);
459
460 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
461 del_timer(&cs->dbusytimer);
462 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
463 schedule_event(cs, D_CLEARBUSY);
464 /* restart TX-Frame */
465 if (cs->tx_skb) {
466 skb_push(cs->tx_skb, cs->tx_cnt);
467 cs->tx_cnt = 0;
468 cs->dc.amd7930.tx_xmtlen = 0;
469 Amd7930_fill_Dfifo(cs);
470 } 471 }
471 }
472 472
473 /* D TX FIFO empty -> fill */ 473 /* D TX FIFO empty -> fill */
474 if (irflags & 1) { 474 if (irflags & 1) {
475 if (cs->debug & L1_DEB_ISAC) 475 if (cs->debug & L1_DEB_ISAC)
476 debugl1(cs, "Amd7930: interrupt: clear Timer and fill D-TX-FIFO if data"); 476 debugl1(cs, "Amd7930: interrupt: clear Timer and fill D-TX-FIFO if data");
477 477
478 /* AMD interrupts off */ 478 /* AMD interrupts off */
479 AmdIrqOff(cs); 479 AmdIrqOff(cs);
480 480
481 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 481 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
482 del_timer(&cs->dbusytimer); 482 del_timer(&cs->dbusytimer);
483 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 483 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
484 schedule_event(cs, D_CLEARBUSY); 484 schedule_event(cs, D_CLEARBUSY);
485 if (cs->tx_skb) { 485 if (cs->tx_skb) {
486 if (cs->tx_skb->len) 486 if (cs->tx_skb->len)
487 Amd7930_fill_Dfifo(cs); 487 Amd7930_fill_Dfifo(cs);
488 }
489 /* AMD interrupts on */
490 AmdIrqOn(cs);
488 } 491 }
489 /* AMD interrupts on */
490 AmdIrqOn(cs);
491 }
492 492
493 493
494 /* D RX FIFO full or tiny packet in Fifo -> empty */ 494 /* D RX FIFO full or tiny packet in Fifo -> empty */
495 if ((irflags & 2) || (dsr1 & 2)) { 495 if ((irflags & 2) || (dsr1 & 2)) {
496 if (cs->debug & L1_DEB_ISAC) 496 if (cs->debug & L1_DEB_ISAC)
497 debugl1(cs, "Amd7930: interrupt: empty D-FIFO"); 497 debugl1(cs, "Amd7930: interrupt: empty D-FIFO");
498 Amd7930_empty_Dfifo(cs, 0); 498 Amd7930_empty_Dfifo(cs, 0);
499 } 499 }
500 500
501 501
502 /* D-Frame transmit complete */ 502 /* D-Frame transmit complete */
503 if (dsr1 & 64) { 503 if (dsr1 & 64) {
504 if (cs->debug & L1_DEB_ISAC) { 504 if (cs->debug & L1_DEB_ISAC) {
505 debugl1(cs, "Amd7930: interrupt: transmit packet ready"); 505 debugl1(cs, "Amd7930: interrupt: transmit packet ready");
506 } 506 }
507 /* AMD interrupts off */ 507 /* AMD interrupts off */
508 AmdIrqOff(cs); 508 AmdIrqOff(cs);
509 509
510 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 510 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
511 del_timer(&cs->dbusytimer); 511 del_timer(&cs->dbusytimer);
512 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 512 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
513 schedule_event(cs, D_CLEARBUSY); 513 schedule_event(cs, D_CLEARBUSY);
514 514
515 if (cs->tx_skb) { 515 if (cs->tx_skb) {
516 if (cs->debug & L1_DEB_ISAC) 516 if (cs->debug & L1_DEB_ISAC)
517 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, freeing skb"); 517 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, freeing skb");
518 dev_kfree_skb_irq(cs->tx_skb); 518 dev_kfree_skb_irq(cs->tx_skb);
519 cs->tx_cnt = 0; 519 cs->tx_cnt = 0;
520 cs->dc.amd7930.tx_xmtlen=0; 520 cs->dc.amd7930.tx_xmtlen = 0;
521 cs->tx_skb = NULL; 521 cs->tx_skb = NULL;
522 } 522 }
523 if ((cs->tx_skb = skb_dequeue(&cs->sq))) { 523 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
524 if (cs->debug & L1_DEB_ISAC) 524 if (cs->debug & L1_DEB_ISAC)
525 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, next packet dequeued"); 525 debugl1(cs, "Amd7930: interrupt: TX-Packet ready, next packet dequeued");
526 cs->tx_cnt = 0; 526 cs->tx_cnt = 0;
527 cs->dc.amd7930.tx_xmtlen=0; 527 cs->dc.amd7930.tx_xmtlen = 0;
528 Amd7930_fill_Dfifo(cs); 528 Amd7930_fill_Dfifo(cs);
529 }
530 else
531 schedule_event(cs, D_XMTBUFREADY);
532 /* AMD interrupts on */
533 AmdIrqOn(cs);
529 } 534 }
530 else
531 schedule_event(cs, D_XMTBUFREADY);
532 /* AMD interrupts on */
533 AmdIrqOn(cs);
534 }
535 535
536 /* LIU status interrupt -> read LSR, check statechanges */ 536 /* LIU status interrupt -> read LSR, check statechanges */
537 if (lsr & 0x38) { 537 if (lsr & 0x38) {
538 /* AMD interrupts off */ 538 /* AMD interrupts off */
539 AmdIrqOff(cs); 539 AmdIrqOff(cs);
540 540
541 if (cs->debug & L1_DEB_ISAC) 541 if (cs->debug & L1_DEB_ISAC)
542 debugl1(cs, "Amd: interrupt: LSR=0x%02X, LIU is in state %d", lsr, ((lsr & 0x7) +2)); 542 debugl1(cs, "Amd: interrupt: LSR=0x%02X, LIU is in state %d", lsr, ((lsr & 0x7) + 2));
543 543
544 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2; 544 cs->dc.amd7930.ph_state = (lsr & 0x7) + 2;
545 545
546 schedule_event(cs, D_L1STATECHANGE); 546 schedule_event(cs, D_L1STATECHANGE);
547 /* AMD interrupts on */ 547 /* AMD interrupts on */
548 AmdIrqOn(cs); 548 AmdIrqOn(cs);
549 } 549 }
550 550
551 /* reads Interrupt-Register again. If there is a new interrupt-flag: restart handler */ 551 /* reads Interrupt-Register again. If there is a new interrupt-flag: restart handler */
552 irflags = rByteAMD(cs, 0x00); 552 irflags = rByteAMD(cs, 0x00);
553 } 553 }
554 554
555} 555}
556 556
557static void 557static void
558Amd7930_l1hw(struct PStack *st, int pr, void *arg) 558Amd7930_l1hw(struct PStack *st, int pr, void *arg)
559{ 559{
560 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; 560 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
561 struct sk_buff *skb = arg; 561 struct sk_buff *skb = arg;
562 u_long flags; 562 u_long flags;
563 563
564 if (cs->debug & L1_DEB_ISAC) 564 if (cs->debug & L1_DEB_ISAC)
565 debugl1(cs, "Amd7930: l1hw called, pr: 0x%04X", pr); 565 debugl1(cs, "Amd7930: l1hw called, pr: 0x%04X", pr);
566 566
567 switch (pr) { 567 switch (pr) {
568 case (PH_DATA | REQUEST): 568 case (PH_DATA | REQUEST):
569 if (cs->debug & DEB_DLOG_HEX) 569 if (cs->debug & DEB_DLOG_HEX)
570 LogFrame(cs, skb->data, skb->len); 570 LogFrame(cs, skb->data, skb->len);
571 if (cs->debug & DEB_DLOG_VERBOSE) 571 if (cs->debug & DEB_DLOG_VERBOSE)
572 dlogframe(cs, skb, 0); 572 dlogframe(cs, skb, 0);
573 spin_lock_irqsave(&cs->lock, flags); 573 spin_lock_irqsave(&cs->lock, flags);
574 if (cs->tx_skb) { 574 if (cs->tx_skb) {
575 skb_queue_tail(&cs->sq, skb); 575 skb_queue_tail(&cs->sq, skb);
576#ifdef L2FRAME_DEBUG /* psa */
577 if (cs->debug & L1_DEB_LAPD)
578 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA Queued", 0);
579#endif
580 } else {
581 cs->tx_skb = skb;
582 cs->tx_cnt = 0;
583 cs->dc.amd7930.tx_xmtlen=0;
584#ifdef L2FRAME_DEBUG /* psa */ 576#ifdef L2FRAME_DEBUG /* psa */
585 if (cs->debug & L1_DEB_LAPD) 577 if (cs->debug & L1_DEB_LAPD)
586 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA", 0); 578 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA Queued", 0);
587#endif 579#endif
588 Amd7930_fill_Dfifo(cs); 580 } else {
589 }
590 spin_unlock_irqrestore(&cs->lock, flags);
591 break;
592 case (PH_PULL | INDICATION):
593 spin_lock_irqsave(&cs->lock, flags);
594 if (cs->tx_skb) {
595 if (cs->debug & L1_DEB_WARN)
596 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
597 skb_queue_tail(&cs->sq, skb);
598 spin_unlock_irqrestore(&cs->lock, flags);
599 break;
600 }
601 if (cs->debug & DEB_DLOG_HEX)
602 LogFrame(cs, skb->data, skb->len);
603 if (cs->debug & DEB_DLOG_VERBOSE)
604 dlogframe(cs, skb, 0);
605 cs->tx_skb = skb; 581 cs->tx_skb = skb;
606 cs->tx_cnt = 0; 582 cs->tx_cnt = 0;
607 cs->dc.amd7930.tx_xmtlen=0; 583 cs->dc.amd7930.tx_xmtlen = 0;
608#ifdef L2FRAME_DEBUG /* psa */ 584#ifdef L2FRAME_DEBUG /* psa */
609 if (cs->debug & L1_DEB_LAPD) 585 if (cs->debug & L1_DEB_LAPD)
610 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA_PULLED", 0); 586 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA", 0);
611#endif 587#endif
612 Amd7930_fill_Dfifo(cs); 588 Amd7930_fill_Dfifo(cs);
589 }
590 spin_unlock_irqrestore(&cs->lock, flags);
591 break;
592 case (PH_PULL | INDICATION):
593 spin_lock_irqsave(&cs->lock, flags);
594 if (cs->tx_skb) {
595 if (cs->debug & L1_DEB_WARN)
596 debugl1(cs, "Amd7930: l1hw: l2l1 tx_skb exist this shouldn't happen");
597 skb_queue_tail(&cs->sq, skb);
613 spin_unlock_irqrestore(&cs->lock, flags); 598 spin_unlock_irqrestore(&cs->lock, flags);
614 break; 599 break;
615 case (PH_PULL | REQUEST): 600 }
601 if (cs->debug & DEB_DLOG_HEX)
602 LogFrame(cs, skb->data, skb->len);
603 if (cs->debug & DEB_DLOG_VERBOSE)
604 dlogframe(cs, skb, 0);
605 cs->tx_skb = skb;
606 cs->tx_cnt = 0;
607 cs->dc.amd7930.tx_xmtlen = 0;
616#ifdef L2FRAME_DEBUG /* psa */ 608#ifdef L2FRAME_DEBUG /* psa */
617 if (cs->debug & L1_DEB_LAPD) 609 if (cs->debug & L1_DEB_LAPD)
618 debugl1(cs, "Amd7930: l1hw: -> PH_REQUEST_PULL, skb: %s", (cs->tx_skb)? "yes":"no"); 610 Logl2Frame(cs, skb, "Amd7930: l1hw: PH_DATA_PULLED", 0);
619#endif 611#endif
620 if (!cs->tx_skb) { 612 Amd7930_fill_Dfifo(cs);
621 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 613 spin_unlock_irqrestore(&cs->lock, flags);
622 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 614 break;
623 } else 615 case (PH_PULL | REQUEST):
624 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 616#ifdef L2FRAME_DEBUG /* psa */
625 break; 617 if (cs->debug & L1_DEB_LAPD)
626 case (HW_RESET | REQUEST): 618 debugl1(cs, "Amd7930: l1hw: -> PH_REQUEST_PULL, skb: %s", (cs->tx_skb) ? "yes" : "no");
627 spin_lock_irqsave(&cs->lock, flags); 619#endif
628 if ((cs->dc.amd7930.ph_state == 8)) { 620 if (!cs->tx_skb) {
629 /* b-channels off, PH-AR cleared 621 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
630 * change to F3 */ 622 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
631 Amd7930_ph_command(cs, 0x20, "HW_RESET REQEST"); //LMR1 bit 5 623 } else
632 spin_unlock_irqrestore(&cs->lock, flags); 624 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
633 } else { 625 break;
634 Amd7930_ph_command(cs, 0x40, "HW_RESET REQUEST"); 626 case (HW_RESET | REQUEST):
635 cs->dc.amd7930.ph_state = 2; 627 spin_lock_irqsave(&cs->lock, flags);
636 spin_unlock_irqrestore(&cs->lock, flags); 628 if ((cs->dc.amd7930.ph_state == 8)) {
637 Amd7930_new_ph(cs); 629 /* b-channels off, PH-AR cleared
638 } 630 * change to F3 */
639 break; 631 Amd7930_ph_command(cs, 0x20, "HW_RESET REQEST"); //LMR1 bit 5
640 case (HW_ENABLE | REQUEST): 632 spin_unlock_irqrestore(&cs->lock, flags);
641 cs->dc.amd7930.ph_state = 9; 633 } else {
642 Amd7930_new_ph(cs); 634 Amd7930_ph_command(cs, 0x40, "HW_RESET REQUEST");
643 break; 635 cs->dc.amd7930.ph_state = 2;
644 case (HW_INFO3 | REQUEST): 636 spin_unlock_irqrestore(&cs->lock, flags);
645 // automatic 637 Amd7930_new_ph(cs);
646 break; 638 }
647 case (HW_TESTLOOP | REQUEST): 639 break;
648 /* not implemented yet */ 640 case (HW_ENABLE | REQUEST):
649 break; 641 cs->dc.amd7930.ph_state = 9;
650 case (HW_DEACTIVATE | RESPONSE): 642 Amd7930_new_ph(cs);
651 skb_queue_purge(&cs->rq); 643 break;
652 skb_queue_purge(&cs->sq); 644 case (HW_INFO3 | REQUEST):
653 if (cs->tx_skb) { 645 // automatic
654 dev_kfree_skb(cs->tx_skb); 646 break;
655 cs->tx_skb = NULL; 647 case (HW_TESTLOOP | REQUEST):
656 } 648 /* not implemented yet */
657 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 649 break;
658 del_timer(&cs->dbusytimer); 650 case (HW_DEACTIVATE | RESPONSE):
659 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 651 skb_queue_purge(&cs->rq);
660 schedule_event(cs, D_CLEARBUSY); 652 skb_queue_purge(&cs->sq);
661 break; 653 if (cs->tx_skb) {
662 default: 654 dev_kfree_skb(cs->tx_skb);
663 if (cs->debug & L1_DEB_WARN) 655 cs->tx_skb = NULL;
664 debugl1(cs, "Amd7930: l1hw: unknown %04x", pr); 656 }
665 break; 657 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
658 del_timer(&cs->dbusytimer);
659 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
660 schedule_event(cs, D_CLEARBUSY);
661 break;
662 default:
663 if (cs->debug & L1_DEB_WARN)
664 debugl1(cs, "Amd7930: l1hw: unknown %04x", pr);
665 break;
666 } 666 }
667} 667}
668 668
@@ -670,16 +670,16 @@ static void
670setstack_Amd7930(struct PStack *st, struct IsdnCardState *cs) 670setstack_Amd7930(struct PStack *st, struct IsdnCardState *cs)
671{ 671{
672 672
673 if (cs->debug & L1_DEB_ISAC) 673 if (cs->debug & L1_DEB_ISAC)
674 debugl1(cs, "Amd7930: setstack called"); 674 debugl1(cs, "Amd7930: setstack called");
675 675
676 st->l1.l1hw = Amd7930_l1hw; 676 st->l1.l1hw = Amd7930_l1hw;
677} 677}
678 678
679 679
680static void 680static void
681DC_Close_Amd7930(struct IsdnCardState *cs) { 681DC_Close_Amd7930(struct IsdnCardState *cs) {
682 if (cs->debug & L1_DEB_ISAC) 682 if (cs->debug & L1_DEB_ISAC)
683 debugl1(cs, "Amd7930: DC_Close called"); 683 debugl1(cs, "Amd7930: DC_Close called");
684} 684}
685 685
@@ -689,23 +689,23 @@ dbusy_timer_handler(struct IsdnCardState *cs)
689{ 689{
690 u_long flags; 690 u_long flags;
691 struct PStack *stptr; 691 struct PStack *stptr;
692 WORD dtcr, der; 692 WORD dtcr, der;
693 BYTE dsr1, dsr2; 693 BYTE dsr1, dsr2;
694 694
695 695
696 if (cs->debug & L1_DEB_ISAC) 696 if (cs->debug & L1_DEB_ISAC)
697 debugl1(cs, "Amd7930: dbusy_timer expired!"); 697 debugl1(cs, "Amd7930: dbusy_timer expired!");
698 698
699 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 699 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
700 spin_lock_irqsave(&cs->lock, flags); 700 spin_lock_irqsave(&cs->lock, flags);
701 /* D Transmit Byte Count Register: 701 /* D Transmit Byte Count Register:
702 * Counts down packet's number of Bytes, 0 if packet ready */ 702 * Counts down packet's number of Bytes, 0 if packet ready */
703 dtcr = rWordAMD(cs, 0x85); 703 dtcr = rWordAMD(cs, 0x85);
704 dsr1 = rByteAMD(cs, 0x02); 704 dsr1 = rByteAMD(cs, 0x02);
705 dsr2 = rByteAMD(cs, 0x07); 705 dsr2 = rByteAMD(cs, 0x07);
706 der = rWordAMD(cs, 0x03); 706 der = rWordAMD(cs, 0x03);
707 707
708 if (cs->debug & L1_DEB_ISAC) 708 if (cs->debug & L1_DEB_ISAC)
709 debugl1(cs, "Amd7930: dbusy_timer_handler: DSR1=0x%02X, DSR2=0x%02X, DER=0x%04X, cs->tx_skb->len=%u, tx_stat=%u, dtcr=%u, cs->tx_cnt=%u", dsr1, dsr2, der, cs->tx_skb->len, cs->dc.amd7930.tx_xmtlen, dtcr, cs->tx_cnt); 709 debugl1(cs, "Amd7930: dbusy_timer_handler: DSR1=0x%02X, DSR2=0x%02X, DER=0x%04X, cs->tx_skb->len=%u, tx_stat=%u, dtcr=%u, cs->tx_cnt=%u", dsr1, dsr2, der, cs->tx_skb->len, cs->dc.amd7930.tx_xmtlen, dtcr, cs->tx_cnt);
710 710
711 if ((cs->dc.amd7930.tx_xmtlen - dtcr) < cs->tx_cnt) { /* D-Channel Busy */ 711 if ((cs->dc.amd7930.tx_xmtlen - dtcr) < cs->tx_cnt) { /* D-Channel Busy */
@@ -724,7 +724,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
724 dev_kfree_skb_any(cs->tx_skb); 724 dev_kfree_skb_any(cs->tx_skb);
725 cs->tx_cnt = 0; 725 cs->tx_cnt = 0;
726 cs->tx_skb = NULL; 726 cs->tx_skb = NULL;
727 cs->dc.amd7930.tx_xmtlen = 0; 727 cs->dc.amd7930.tx_xmtlen = 0;
728 } else { 728 } else {
729 printk(KERN_WARNING "HiSax: Amd7930: D-Channel Busy no skb\n"); 729 printk(KERN_WARNING "HiSax: Amd7930: D-Channel Busy no skb\n");
730 debugl1(cs, "Amd7930: D-Channel Busy no skb"); 730 debugl1(cs, "Amd7930: D-Channel Busy no skb");
@@ -736,7 +736,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
736 spin_unlock_irqrestore(&cs->lock, flags); 736 spin_unlock_irqrestore(&cs->lock, flags);
737 cs->irq_func(cs->irq, cs); 737 cs->irq_func(cs->irq, cs);
738 738
739 if (cs->debug & L1_DEB_ISAC) 739 if (cs->debug & L1_DEB_ISAC)
740 debugl1(cs, "Amd7930: dbusy_timer_handler: Transmitter reset"); 740 debugl1(cs, "Amd7930: dbusy_timer_handler: Transmitter reset");
741 } 741 }
742 } 742 }
@@ -746,16 +746,16 @@ dbusy_timer_handler(struct IsdnCardState *cs)
746 746
747void Amd7930_init(struct IsdnCardState *cs) 747void Amd7930_init(struct IsdnCardState *cs)
748{ 748{
749 WORD *ptr; 749 WORD *ptr;
750 BYTE cmd, cnt; 750 BYTE cmd, cnt;
751 751
752 if (cs->debug & L1_DEB_ISAC) 752 if (cs->debug & L1_DEB_ISAC)
753 debugl1(cs, "Amd7930: initamd called"); 753 debugl1(cs, "Amd7930: initamd called");
754 754
755 cs->dc.amd7930.tx_xmtlen = 0; 755 cs->dc.amd7930.tx_xmtlen = 0;
756 cs->dc.amd7930.old_state = 0; 756 cs->dc.amd7930.old_state = 0;
757 cs->dc.amd7930.lmr1 = 0x40; 757 cs->dc.amd7930.lmr1 = 0x40;
758 cs->dc.amd7930.ph_command = Amd7930_ph_command; 758 cs->dc.amd7930.ph_command = Amd7930_ph_command;
759 cs->setstack_d = setstack_Amd7930; 759 cs->setstack_d = setstack_Amd7930;
760 cs->DC_Close = DC_Close_Amd7930; 760 cs->DC_Close = DC_Close_Amd7930;
761 761
@@ -763,19 +763,19 @@ void Amd7930_init(struct IsdnCardState *cs)
763 for (ptr = initAMD; *ptr != 0xFFFF; ) { 763 for (ptr = initAMD; *ptr != 0xFFFF; ) {
764 cmd = LOBYTE(*ptr); 764 cmd = LOBYTE(*ptr);
765 765
766 /* read */ 766 /* read */
767 if (*ptr++ >= 0x100) { 767 if (*ptr++ >= 0x100) {
768 if (cmd < 8) 768 if (cmd < 8)
769 /* reset register */ 769 /* reset register */
770 rByteAMD(cs, cmd); 770 rByteAMD(cs, cmd);
771 else { 771 else {
772 wByteAMD(cs, 0x00, cmd); 772 wByteAMD(cs, 0x00, cmd);
773 for (cnt = *ptr++; cnt > 0; cnt--) 773 for (cnt = *ptr++; cnt > 0; cnt--)
774 rByteAMD(cs, 0x01); 774 rByteAMD(cs, 0x01);
775 } 775 }
776 } 776 }
777 /* write */ 777 /* write */
778 else if (cmd < 8) 778 else if (cmd < 8)
779 wByteAMD(cs, cmd, LOBYTE(*ptr++)); 779 wByteAMD(cs, cmd, LOBYTE(*ptr++));
780 780
781 else { 781 else {
@@ -789,7 +789,7 @@ void Amd7930_init(struct IsdnCardState *cs)
789void __devinit 789void __devinit
790setup_Amd7930(struct IsdnCardState *cs) 790setup_Amd7930(struct IsdnCardState *cs)
791{ 791{
792 INIT_WORK(&cs->tqueue, Amd7930_bh); 792 INIT_WORK(&cs->tqueue, Amd7930_bh);
793 cs->dbusytimer.function = (void *) dbusy_timer_handler; 793 cs->dbusytimer.function = (void *) dbusy_timer_handler;
794 cs->dbusytimer.data = (long) cs; 794 cs->dbusytimer.data = (long) cs;
795 init_timer(&cs->dbusytimer); 795 init_timer(&cs->dbusytimer);
diff --git a/drivers/isdn/hisax/arcofi.c b/drivers/isdn/hisax/arcofi.c
index 21cbbe1d5563..29ec2dfbd155 100644
--- a/drivers/isdn/hisax/arcofi.c
+++ b/drivers/isdn/hisax/arcofi.c
@@ -9,7 +9,7 @@
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13#include <linux/sched.h> 13#include <linux/sched.h>
14#include "hisax.h" 14#include "hisax.h"
15#include "isdnl1.h" 15#include "isdnl1.h"
@@ -22,9 +22,9 @@ static void
22add_arcofi_timer(struct IsdnCardState *cs) { 22add_arcofi_timer(struct IsdnCardState *cs) {
23 if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) { 23 if (test_and_set_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
24 del_timer(&cs->dc.isac.arcofitimer); 24 del_timer(&cs->dc.isac.arcofitimer);
25 } 25 }
26 init_timer(&cs->dc.isac.arcofitimer); 26 init_timer(&cs->dc.isac.arcofitimer);
27 cs->dc.isac.arcofitimer.expires = jiffies + ((ARCOFI_TIMER_VALUE * HZ)/1000); 27 cs->dc.isac.arcofitimer.expires = jiffies + ((ARCOFI_TIMER_VALUE * HZ) / 1000);
28 add_timer(&cs->dc.isac.arcofitimer); 28 add_timer(&cs->dc.isac.arcofitimer);
29} 29}
30 30
@@ -34,11 +34,11 @@ send_arcofi(struct IsdnCardState *cs) {
34 cs->dc.isac.mon_txp = 0; 34 cs->dc.isac.mon_txp = 0;
35 cs->dc.isac.mon_txc = cs->dc.isac.arcofi_list->len; 35 cs->dc.isac.mon_txc = cs->dc.isac.arcofi_list->len;
36 memcpy(cs->dc.isac.mon_tx, cs->dc.isac.arcofi_list->msg, cs->dc.isac.mon_txc); 36 memcpy(cs->dc.isac.mon_tx, cs->dc.isac.arcofi_list->msg, cs->dc.isac.mon_txc);
37 switch(cs->dc.isac.arcofi_bc) { 37 switch (cs->dc.isac.arcofi_bc) {
38 case 0: break; 38 case 0: break;
39 case 1: cs->dc.isac.mon_tx[1] |= 0x40; 39 case 1: cs->dc.isac.mon_tx[1] |= 0x40;
40 break; 40 break;
41 default: break; 41 default: break;
42 } 42 }
43 cs->dc.isac.mocr &= 0x0f; 43 cs->dc.isac.mocr &= 0x0f;
44 cs->dc.isac.mocr |= 0xa0; 44 cs->dc.isac.mocr |= 0xa0;
@@ -58,42 +58,25 @@ arcofi_fsm(struct IsdnCardState *cs, int event, void *data) {
58 cs->dc.isac.arcofi_state = ARCOFI_NOP; 58 cs->dc.isac.arcofi_state = ARCOFI_NOP;
59 test_and_set_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags); 59 test_and_set_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags);
60 wake_up(&cs->dc.isac.arcofi_wait); 60 wake_up(&cs->dc.isac.arcofi_wait);
61 return(1); 61 return (1);
62 } 62 }
63 switch (cs->dc.isac.arcofi_state) { 63 switch (cs->dc.isac.arcofi_state) {
64 case ARCOFI_NOP: 64 case ARCOFI_NOP:
65 if (event == ARCOFI_START) { 65 if (event == ARCOFI_START) {
66 cs->dc.isac.arcofi_list = data; 66 cs->dc.isac.arcofi_list = data;
67 cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT; 67 cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
68 send_arcofi(cs); 68 send_arcofi(cs);
69 } 69 }
70 break; 70 break;
71 case ARCOFI_TRANSMIT: 71 case ARCOFI_TRANSMIT:
72 if (event == ARCOFI_TX_END) { 72 if (event == ARCOFI_TX_END) {
73 if (cs->dc.isac.arcofi_list->receive) { 73 if (cs->dc.isac.arcofi_list->receive) {
74 add_arcofi_timer(cs); 74 add_arcofi_timer(cs);
75 cs->dc.isac.arcofi_state = ARCOFI_RECEIVE; 75 cs->dc.isac.arcofi_state = ARCOFI_RECEIVE;
76 } else { 76 } else {
77 if (cs->dc.isac.arcofi_list->next) {
78 cs->dc.isac.arcofi_list =
79 cs->dc.isac.arcofi_list->next;
80 send_arcofi(cs);
81 } else {
82 if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
83 del_timer(&cs->dc.isac.arcofitimer);
84 }
85 cs->dc.isac.arcofi_state = ARCOFI_NOP;
86 wake_up(&cs->dc.isac.arcofi_wait);
87 }
88 }
89 }
90 break;
91 case ARCOFI_RECEIVE:
92 if (event == ARCOFI_RX_END) {
93 if (cs->dc.isac.arcofi_list->next) { 77 if (cs->dc.isac.arcofi_list->next) {
94 cs->dc.isac.arcofi_list = 78 cs->dc.isac.arcofi_list =
95 cs->dc.isac.arcofi_list->next; 79 cs->dc.isac.arcofi_list->next;
96 cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
97 send_arcofi(cs); 80 send_arcofi(cs);
98 } else { 81 } else {
99 if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) { 82 if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
@@ -103,12 +86,29 @@ arcofi_fsm(struct IsdnCardState *cs, int event, void *data) {
103 wake_up(&cs->dc.isac.arcofi_wait); 86 wake_up(&cs->dc.isac.arcofi_wait);
104 } 87 }
105 } 88 }
106 break; 89 }
107 default: 90 break;
108 debugl1(cs, "Arcofi unknown state %x", cs->dc.isac.arcofi_state); 91 case ARCOFI_RECEIVE:
109 return(2); 92 if (event == ARCOFI_RX_END) {
93 if (cs->dc.isac.arcofi_list->next) {
94 cs->dc.isac.arcofi_list =
95 cs->dc.isac.arcofi_list->next;
96 cs->dc.isac.arcofi_state = ARCOFI_TRANSMIT;
97 send_arcofi(cs);
98 } else {
99 if (test_and_clear_bit(FLG_ARCOFI_TIMER, &cs->HW_Flags)) {
100 del_timer(&cs->dc.isac.arcofitimer);
101 }
102 cs->dc.isac.arcofi_state = ARCOFI_NOP;
103 wake_up(&cs->dc.isac.arcofi_wait);
104 }
105 }
106 break;
107 default:
108 debugl1(cs, "Arcofi unknown state %x", cs->dc.isac.arcofi_state);
109 return (2);
110 } 110 }
111 return(0); 111 return (0);
112} 112}
113 113
114static void 114static void
diff --git a/drivers/isdn/hisax/arcofi.h b/drivers/isdn/hisax/arcofi.h
index 00c44d3ce972..b9c77529fabf 100644
--- a/drivers/isdn/hisax/arcofi.h
+++ b/drivers/isdn/hisax/arcofi.h
@@ -9,7 +9,7 @@
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13#define ARCOFI_USE 1 13#define ARCOFI_USE 1
14 14
15/* states */ 15/* states */
diff --git a/drivers/isdn/hisax/asuscom.c b/drivers/isdn/hisax/asuscom.c
index 1f879b500d83..2b74a40ad2a0 100644
--- a/drivers/isdn/hisax/asuscom.c
+++ b/drivers/isdn/hisax/asuscom.c
@@ -22,7 +22,7 @@
22 22
23static const char *Asuscom_revision = "$Revision: 1.14.2.4 $"; 23static const char *Asuscom_revision = "$Revision: 1.14.2.4 $";
24 24
25#define byteout(addr,val) outb(val,addr) 25#define byteout(addr, val) outb(val, addr)
26#define bytein(addr) inb(addr) 26#define bytein(addr) inb(addr)
27 27
28#define ASUS_ISAC 0 28#define ASUS_ISAC 0
@@ -51,7 +51,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
51} 51}
52 52
53static inline void 53static inline void
54readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 54readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
55{ 55{
56 byteout(ale, off); 56 byteout(ale, off);
57 insb(adr, data, size); 57 insb(adr, data, size);
@@ -66,7 +66,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
66} 66}
67 67
68static inline void 68static inline void
69writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 69writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
70{ 70{
71 byteout(ale, off); 71 byteout(ale, off);
72 outsb(adr, data, size); 72 outsb(adr, data, size);
@@ -87,13 +87,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
87} 87}
88 88
89static void 89static void
90ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 90ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
91{ 91{
92 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); 92 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
93} 93}
94 94
95static void 95static void
96WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 96WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
97{ 97{
98 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size); 98 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0, data, size);
99} 99}
@@ -101,23 +101,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
101static u_char 101static u_char
102ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) 102ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
103{ 103{
104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80)); 104 return (readreg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80));
105} 105}
106 106
107static void 107static void
108WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) 108WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
109{ 109{
110 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset|0x80, value); 110 writereg(cs->hw.asus.adr, cs->hw.asus.isac, offset | 0x80, value);
111} 111}
112 112
113static void 113static void
114ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 114ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
115{ 115{
116 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size); 116 readfifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
117} 117}
118 118
119static void 119static void
120WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 120WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
121{ 121{
122 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size); 122 writefifo(cs->hw.asus.adr, cs->hw.asus.isac, 0x80, data, size);
123} 123}
@@ -140,16 +140,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
140 * fast interrupt HSCX stuff goes here 140 * fast interrupt HSCX stuff goes here
141 */ 141 */
142 142
143#define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \ 143#define READHSCX(cs, nr, reg) readreg(cs->hw.asus.adr, \
144 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0)) 144 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0))
145#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \ 145#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.asus.adr, \
146 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data) 146 cs->hw.asus.hscx, reg + (nr ? 0x40 : 0), data)
147 147
148#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \ 148#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.asus.adr, \
149 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt) 149 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
150 150
151#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \ 151#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.asus.adr, \
152 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt) 152 cs->hw.asus.hscx, (nr ? 0x40 : 0), ptr, cnt)
153 153
154#include "hscx_irq.c" 154#include "hscx_irq.c"
155 155
@@ -162,11 +162,11 @@ asuscom_interrupt(int intno, void *dev_id)
162 162
163 spin_lock_irqsave(&cs->lock, flags); 163 spin_lock_irqsave(&cs->lock, flags);
164 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); 164 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
165 Start_HSCX: 165Start_HSCX:
166 if (val) 166 if (val)
167 hscx_int_main(cs, val); 167 hscx_int_main(cs, val);
168 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA); 168 val = readreg(cs->hw.asus.adr, cs->hw.asus.isac, ISAC_ISTA);
169 Start_ISAC: 169Start_ISAC:
170 if (val) 170 if (val)
171 isac_interrupt(cs, val); 171 isac_interrupt(cs, val);
172 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40); 172 val = readreg(cs->hw.asus.adr, cs->hw.asus.hscx, HSCX_ISTA + 0x40);
@@ -274,39 +274,39 @@ Asus_card_msg(struct IsdnCardState *cs, int mt, void *arg)
274 u_long flags; 274 u_long flags;
275 275
276 switch (mt) { 276 switch (mt) {
277 case CARD_RESET: 277 case CARD_RESET:
278 spin_lock_irqsave(&cs->lock, flags); 278 spin_lock_irqsave(&cs->lock, flags);
279 reset_asuscom(cs); 279 reset_asuscom(cs);
280 spin_unlock_irqrestore(&cs->lock, flags); 280 spin_unlock_irqrestore(&cs->lock, flags);
281 return(0); 281 return (0);
282 case CARD_RELEASE: 282 case CARD_RELEASE:
283 release_io_asuscom(cs); 283 release_io_asuscom(cs);
284 return(0); 284 return (0);
285 case CARD_INIT: 285 case CARD_INIT:
286 spin_lock_irqsave(&cs->lock, flags); 286 spin_lock_irqsave(&cs->lock, flags);
287 cs->debug |= L1_DEB_IPAC; 287 cs->debug |= L1_DEB_IPAC;
288 inithscxisac(cs, 3); 288 inithscxisac(cs, 3);
289 spin_unlock_irqrestore(&cs->lock, flags); 289 spin_unlock_irqrestore(&cs->lock, flags);
290 return(0); 290 return (0);
291 case CARD_TEST: 291 case CARD_TEST:
292 return(0); 292 return (0);
293 } 293 }
294 return(0); 294 return (0);
295} 295}
296 296
297#ifdef __ISAPNP__ 297#ifdef __ISAPNP__
298static struct isapnp_device_id asus_ids[] __devinitdata = { 298static struct isapnp_device_id asus_ids[] __devinitdata = {
299 { ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688), 299 { ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688),
300 ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688), 300 ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1688),
301 (unsigned long) "Asus1688 PnP" }, 301 (unsigned long) "Asus1688 PnP" },
302 { ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690), 302 { ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690),
303 ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690), 303 ISAPNP_VENDOR('A', 'S', 'U'), ISAPNP_FUNCTION(0x1690),
304 (unsigned long) "Asus1690 PnP" }, 304 (unsigned long) "Asus1690 PnP" },
305 { ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020), 305 { ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020),
306 ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020), 306 ISAPNP_VENDOR('S', 'I', 'E'), ISAPNP_FUNCTION(0x0020),
307 (unsigned long) "Isurf2 PnP" }, 307 (unsigned long) "Isurf2 PnP" },
308 { ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000), 308 { ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000),
309 ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000), 309 ISAPNP_VENDOR('E', 'L', 'F'), ISAPNP_FUNCTION(0x0000),
310 (unsigned long) "Iscas TE320" }, 310 (unsigned long) "Iscas TE320" },
311 { 0, } 311 { 0, }
312}; 312};
@@ -330,30 +330,30 @@ setup_asuscom(struct IsdnCard *card)
330#ifdef __ISAPNP__ 330#ifdef __ISAPNP__
331 if (!card->para[1] && isapnp_present()) { 331 if (!card->para[1] && isapnp_present()) {
332 struct pnp_dev *pnp_d; 332 struct pnp_dev *pnp_d;
333 while(ipid->card_vendor) { 333 while (ipid->card_vendor) {
334 if ((pnp_c = pnp_find_card(ipid->card_vendor, 334 if ((pnp_c = pnp_find_card(ipid->card_vendor,
335 ipid->card_device, pnp_c))) { 335 ipid->card_device, pnp_c))) {
336 pnp_d = NULL; 336 pnp_d = NULL;
337 if ((pnp_d = pnp_find_dev(pnp_c, 337 if ((pnp_d = pnp_find_dev(pnp_c,
338 ipid->vendor, ipid->function, pnp_d))) { 338 ipid->vendor, ipid->function, pnp_d))) {
339 int err; 339 int err;
340 340
341 printk(KERN_INFO "HiSax: %s detected\n", 341 printk(KERN_INFO "HiSax: %s detected\n",
342 (char *)ipid->driver_data); 342 (char *)ipid->driver_data);
343 pnp_disable_dev(pnp_d); 343 pnp_disable_dev(pnp_d);
344 err = pnp_activate_dev(pnp_d); 344 err = pnp_activate_dev(pnp_d);
345 if (err<0) { 345 if (err < 0) {
346 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 346 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
347 __func__, err); 347 __func__, err);
348 return(0); 348 return (0);
349 } 349 }
350 card->para[1] = pnp_port_start(pnp_d, 0); 350 card->para[1] = pnp_port_start(pnp_d, 0);
351 card->para[0] = pnp_irq(pnp_d, 0); 351 card->para[0] = pnp_irq(pnp_d, 0);
352 if (!card->para[0] || !card->para[1]) { 352 if (!card->para[0] || !card->para[1]) {
353 printk(KERN_ERR "AsusPnP:some resources are missing %ld/%lx\n", 353 printk(KERN_ERR "AsusPnP:some resources are missing %ld/%lx\n",
354 card->para[0], card->para[1]); 354 card->para[0], card->para[1]);
355 pnp_disable_dev(pnp_d); 355 pnp_disable_dev(pnp_d);
356 return(0); 356 return (0);
357 } 357 }
358 break; 358 break;
359 } else { 359 } else {
@@ -362,10 +362,10 @@ setup_asuscom(struct IsdnCard *card)
362 } 362 }
363 ipid++; 363 ipid++;
364 pnp_c = NULL; 364 pnp_c = NULL;
365 } 365 }
366 if (!ipid->card_vendor) { 366 if (!ipid->card_vendor) {
367 printk(KERN_INFO "AsusPnP: no ISAPnP card found\n"); 367 printk(KERN_INFO "AsusPnP: no ISAPnP card found\n");
368 return(0); 368 return (0);
369 } 369 }
370 } 370 }
371#endif 371#endif
@@ -380,14 +380,14 @@ setup_asuscom(struct IsdnCard *card)
380 return (0); 380 return (0);
381 } 381 }
382 printk(KERN_INFO "ISDNLink: defined at 0x%x IRQ %d\n", 382 printk(KERN_INFO "ISDNLink: defined at 0x%x IRQ %d\n",
383 cs->hw.asus.cfg_reg, cs->irq); 383 cs->hw.asus.cfg_reg, cs->irq);
384 setup_isac(cs); 384 setup_isac(cs);
385 cs->BC_Read_Reg = &ReadHSCX; 385 cs->BC_Read_Reg = &ReadHSCX;
386 cs->BC_Write_Reg = &WriteHSCX; 386 cs->BC_Write_Reg = &WriteHSCX;
387 cs->BC_Send_Data = &hscx_fill_fifo; 387 cs->BC_Send_Data = &hscx_fill_fifo;
388 cs->cardmsg = &Asus_card_msg; 388 cs->cardmsg = &Asus_card_msg;
389 val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE, 389 val = readreg(cs->hw.asus.cfg_reg + ASUS_IPAC_ALE,
390 cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID); 390 cs->hw.asus.cfg_reg + ASUS_IPAC_DATA, IPAC_ID);
391 if ((val == 1) || (val == 2)) { 391 if ((val == 1) || (val == 2)) {
392 cs->subtyp = ASUS_IPAC; 392 cs->subtyp = ASUS_IPAC;
393 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE; 393 cs->hw.asus.adr = cs->hw.asus.cfg_reg + ASUS_IPAC_ALE;
@@ -415,7 +415,7 @@ setup_asuscom(struct IsdnCard *card)
415 ISACVersion(cs, "ISDNLink:"); 415 ISACVersion(cs, "ISDNLink:");
416 if (HscxVersion(cs, "ISDNLink:")) { 416 if (HscxVersion(cs, "ISDNLink:")) {
417 printk(KERN_WARNING 417 printk(KERN_WARNING
418 "ISDNLink: wrong HSCX versions check IO address\n"); 418 "ISDNLink: wrong HSCX versions check IO address\n");
419 release_io_asuscom(cs); 419 release_io_asuscom(cs);
420 return (0); 420 return (0);
421 } 421 }
diff --git a/drivers/isdn/hisax/avm_a1.c b/drivers/isdn/hisax/avm_a1.c
index eb6b432e261f..402d489cbbf1 100644
--- a/drivers/isdn/hisax/avm_a1.c
+++ b/drivers/isdn/hisax/avm_a1.c
@@ -22,7 +22,7 @@ static const char *avm_revision = "$Revision: 2.15.2.4 $";
22#define AVM_A1_STAT_HSCX 0x02 22#define AVM_A1_STAT_HSCX 0x02
23#define AVM_A1_STAT_TIMER 0x04 23#define AVM_A1_STAT_TIMER 0x04
24 24
25#define byteout(addr,val) outb(val,addr) 25#define byteout(addr, val) outb(val, addr)
26#define bytein(addr) inb(addr) 26#define bytein(addr) inb(addr)
27 27
28static inline u_char 28static inline u_char
@@ -39,13 +39,13 @@ writereg(unsigned int adr, u_char off, u_char data)
39 39
40 40
41static inline void 41static inline void
42read_fifo(unsigned int adr, u_char * data, int size) 42read_fifo(unsigned int adr, u_char *data, int size)
43{ 43{
44 insb(adr, data, size); 44 insb(adr, data, size);
45} 45}
46 46
47static void 47static void
48write_fifo(unsigned int adr, u_char * data, int size) 48write_fifo(unsigned int adr, u_char *data, int size)
49{ 49{
50 outsb(adr, data, size); 50 outsb(adr, data, size);
51} 51}
@@ -65,13 +65,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
65} 65}
66 66
67static void 67static void
68ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 68ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
69{ 69{
70 read_fifo(cs->hw.avm.isacfifo, data, size); 70 read_fifo(cs->hw.avm.isacfifo, data, size);
71} 71}
72 72
73static void 73static void
74WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 74WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
75{ 75{
76 write_fifo(cs->hw.avm.isacfifo, data, size); 76 write_fifo(cs->hw.avm.isacfifo, data, size);
77} 77}
@@ -158,23 +158,23 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
158 u_long flags; 158 u_long flags;
159 159
160 switch (mt) { 160 switch (mt) {
161 case CARD_RESET: 161 case CARD_RESET:
162 return(0); 162 return (0);
163 case CARD_RELEASE: 163 case CARD_RELEASE:
164 release_ioregs(cs, 0x3f); 164 release_ioregs(cs, 0x3f);
165 return(0); 165 return (0);
166 case CARD_INIT: 166 case CARD_INIT:
167 spin_lock_irqsave(&cs->lock, flags); 167 spin_lock_irqsave(&cs->lock, flags);
168 inithscxisac(cs, 1); 168 inithscxisac(cs, 1);
169 byteout(cs->hw.avm.cfg_reg, 0x16); 169 byteout(cs->hw.avm.cfg_reg, 0x16);
170 byteout(cs->hw.avm.cfg_reg, 0x1E); 170 byteout(cs->hw.avm.cfg_reg, 0x1E);
171 inithscxisac(cs, 2); 171 inithscxisac(cs, 2);
172 spin_unlock_irqrestore(&cs->lock, flags); 172 spin_unlock_irqrestore(&cs->lock, flags);
173 return(0); 173 return (0);
174 case CARD_TEST: 174 case CARD_TEST:
175 return(0); 175 return (0);
176 } 176 }
177 return(0); 177 return (0);
178} 178}
179 179
180int __devinit 180int __devinit
diff --git a/drivers/isdn/hisax/avm_a1p.c b/drivers/isdn/hisax/avm_a1p.c
index 3039c6d68fc4..39347198d643 100644
--- a/drivers/isdn/hisax/avm_a1p.c
+++ b/drivers/isdn/hisax/avm_a1p.c
@@ -39,7 +39,7 @@
39#define ASL0_R_ISAC 0x20 /* active low */ 39#define ASL0_R_ISAC 0x20 /* active low */
40#define ASL0_R_HSCX 0x40 /* active low */ 40#define ASL0_R_HSCX 0x40 /* active low */
41#define ASL0_R_TESTBIT 0x80 41#define ASL0_R_TESTBIT 0x80
42#define ASL0_R_IRQPENDING (ASL0_R_ISAC|ASL0_R_HSCX|ASL0_R_TIMER) 42#define ASL0_R_IRQPENDING (ASL0_R_ISAC | ASL0_R_HSCX | ASL0_R_TIMER)
43 43
44/* write bits ASL0 */ 44/* write bits ASL0 */
45#define ASL0_W_RESET 0x01 45#define ASL0_W_RESET 0x01
@@ -52,8 +52,8 @@
52#define ASL1_W_LED0 0x10 52#define ASL1_W_LED0 0x10
53#define ASL1_W_LED1 0x20 53#define ASL1_W_LED1 0x20
54#define ASL1_W_ENABLE_S0 0xC0 54#define ASL1_W_ENABLE_S0 0xC0
55 55
56#define byteout(addr,val) outb(val,addr) 56#define byteout(addr, val) outb(val, addr)
57#define bytein(addr) inb(addr) 57#define bytein(addr) inb(addr)
58 58
59static const char *avm_revision = "$Revision: 2.9.2.5 $"; 59static const char *avm_revision = "$Revision: 2.9.2.5 $";
@@ -61,34 +61,34 @@ static const char *avm_revision = "$Revision: 2.9.2.5 $";
61static inline u_char 61static inline u_char
62ReadISAC(struct IsdnCardState *cs, u_char offset) 62ReadISAC(struct IsdnCardState *cs, u_char offset)
63{ 63{
64 u_char ret; 64 u_char ret;
65 65
66 offset -= 0x20; 66 offset -= 0x20;
67 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset); 67 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset);
68 ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET); 68 ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET);
69 return ret; 69 return ret;
70} 70}
71 71
72static inline void 72static inline void
73WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value) 73WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
74{ 74{
75 offset -= 0x20; 75 offset -= 0x20;
76 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_REG_OFFSET+offset); 76 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_REG_OFFSET + offset);
77 byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value); 77 byteout(cs->hw.avm.cfg_reg + DATAREG_OFFSET, value);
78} 78}
79 79
80static inline void 80static inline void
81ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 81ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
82{ 82{
83 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET); 83 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET);
84 insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); 84 insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
85} 85}
86 86
87static inline void 87static inline void
88WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 88WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
89{ 89{
90 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET,ISAC_FIFO_OFFSET); 90 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET, ISAC_FIFO_OFFSET);
91 outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); 91 outsb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
92} 92}
93 93
94static inline u_char 94static inline u_char
@@ -96,36 +96,36 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
96{ 96{
97 u_char ret; 97 u_char ret;
98 98
99 offset -= 0x20; 99 offset -= 0x20;
100 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, 100 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
101 HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset); 101 HSCX_REG_OFFSET + hscx * HSCX_CH_DIFF + offset);
102 ret = bytein(cs->hw.avm.cfg_reg+DATAREG_OFFSET); 102 ret = bytein(cs->hw.avm.cfg_reg + DATAREG_OFFSET);
103 return ret; 103 return ret;
104} 104}
105 105
106static inline void 106static inline void
107WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) 107WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
108{ 108{
109 offset -= 0x20; 109 offset -= 0x20;
110 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, 110 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
111 HSCX_REG_OFFSET+hscx*HSCX_CH_DIFF+offset); 111 HSCX_REG_OFFSET + hscx * HSCX_CH_DIFF + offset);
112 byteout(cs->hw.avm.cfg_reg+DATAREG_OFFSET, value); 112 byteout(cs->hw.avm.cfg_reg + DATAREG_OFFSET, value);
113} 113}
114 114
115static inline void 115static inline void
116ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) 116ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
117{ 117{
118 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, 118 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
119 HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF); 119 HSCX_FIFO_OFFSET + hscx * HSCX_CH_DIFF);
120 insb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); 120 insb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
121} 121}
122 122
123static inline void 123static inline void
124WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) 124WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
125{ 125{
126 byteout(cs->hw.avm.cfg_reg+ADDRREG_OFFSET, 126 byteout(cs->hw.avm.cfg_reg + ADDRREG_OFFSET,
127 HSCX_FIFO_OFFSET+hscx*HSCX_CH_DIFF); 127 HSCX_FIFO_OFFSET + hscx * HSCX_CH_DIFF);
128 outsb(cs->hw.avm.cfg_reg+DATAREG_OFFSET, data, size); 128 outsb(cs->hw.avm.cfg_reg + DATAREG_OFFSET, data, size);
129} 129}
130 130
131/* 131/*
@@ -134,7 +134,7 @@ WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
134 134
135#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg) 135#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
136#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data) 136#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
137#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt) 137#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
138#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt) 138#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
139 139
140#include "hscx_irq.c" 140#include "hscx_irq.c"
@@ -147,11 +147,11 @@ avm_a1p_interrupt(int intno, void *dev_id)
147 u_long flags; 147 u_long flags;
148 148
149 spin_lock_irqsave(&cs->lock, flags); 149 spin_lock_irqsave(&cs->lock, flags);
150 while ((sval = (~bytein(cs->hw.avm.cfg_reg+ASL0_OFFSET) & ASL0_R_IRQPENDING))) { 150 while ((sval = (~bytein(cs->hw.avm.cfg_reg + ASL0_OFFSET) & ASL0_R_IRQPENDING))) {
151 if (cs->debug & L1_DEB_INTSTAT) 151 if (cs->debug & L1_DEB_INTSTAT)
152 debugl1(cs, "avm IntStatus %x", sval); 152 debugl1(cs, "avm IntStatus %x", sval);
153 if (sval & ASL0_R_HSCX) { 153 if (sval & ASL0_R_HSCX) {
154 val = ReadHSCX(cs, 1, HSCX_ISTA); 154 val = ReadHSCX(cs, 1, HSCX_ISTA);
155 if (val) 155 if (val)
156 hscx_int_main(cs, val); 156 hscx_int_main(cs, val);
157 } 157 }
@@ -177,38 +177,38 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
177 u_long flags; 177 u_long flags;
178 178
179 switch (mt) { 179 switch (mt) {
180 case CARD_RESET: 180 case CARD_RESET:
181 spin_lock_irqsave(&cs->lock, flags); 181 spin_lock_irqsave(&cs->lock, flags);
182 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00); 182 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
183 HZDELAY(HZ / 5 + 1); 183 HZDELAY(HZ / 5 + 1);
184 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET); 184 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_RESET);
185 HZDELAY(HZ / 5 + 1); 185 HZDELAY(HZ / 5 + 1);
186 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00); 186 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
187 spin_unlock_irqrestore(&cs->lock, flags); 187 spin_unlock_irqrestore(&cs->lock, flags);
188 return 0; 188 return 0;
189 189
190 case CARD_RELEASE: 190 case CARD_RELEASE:
191 /* free_irq is done in HiSax_closecard(). */ 191 /* free_irq is done in HiSax_closecard(). */
192 /* free_irq(cs->irq, cs); */ 192 /* free_irq(cs->irq, cs); */
193 return 0; 193 return 0;
194 194
195 case CARD_INIT: 195 case CARD_INIT:
196 spin_lock_irqsave(&cs->lock, flags); 196 spin_lock_irqsave(&cs->lock, flags);
197 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_TDISABLE|ASL0_W_TRESET|ASL0_W_IRQENABLE); 197 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_TDISABLE | ASL0_W_TRESET | ASL0_W_IRQENABLE);
198 clear_pending_isac_ints(cs); 198 clear_pending_isac_ints(cs);
199 clear_pending_hscx_ints(cs); 199 clear_pending_hscx_ints(cs);
200 inithscxisac(cs, 1); 200 inithscxisac(cs, 1);
201 inithscxisac(cs, 2); 201 inithscxisac(cs, 2);
202 spin_unlock_irqrestore(&cs->lock, flags); 202 spin_unlock_irqrestore(&cs->lock, flags);
203 return 0; 203 return 0;
204 204
205 case CARD_TEST: 205 case CARD_TEST:
206 /* we really don't need it for the PCMCIA Version */ 206 /* we really don't need it for the PCMCIA Version */
207 return 0; 207 return 0;
208 208
209 default: 209 default:
210 /* all card drivers ignore others, so we do the same */ 210 /* all card drivers ignore others, so we do the same */
211 return 0; 211 return 0;
212 } 212 }
213 return 0; 213 return 0;
214} 214}
@@ -222,7 +222,7 @@ int __devinit setup_avm_a1_pcmcia(struct IsdnCard *card)
222 222
223 strcpy(tmp, avm_revision); 223 strcpy(tmp, avm_revision);
224 printk(KERN_INFO "HiSax: AVM A1 PCMCIA driver Rev. %s\n", 224 printk(KERN_INFO "HiSax: AVM A1 PCMCIA driver Rev. %s\n",
225 HiSax_getrev(tmp)); 225 HiSax_getrev(tmp));
226 if (cs->typ != ISDN_CTYPE_A1_PCMCIA) 226 if (cs->typ != ISDN_CTYPE_A1_PCMCIA)
227 return (0); 227 return (0);
228 228
@@ -230,20 +230,20 @@ int __devinit setup_avm_a1_pcmcia(struct IsdnCard *card)
230 cs->irq = card->para[0]; 230 cs->irq = card->para[0];
231 231
232 232
233 byteout(cs->hw.avm.cfg_reg+ASL1_OFFSET, ASL1_W_ENABLE_S0); 233 byteout(cs->hw.avm.cfg_reg + ASL1_OFFSET, ASL1_W_ENABLE_S0);
234 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00); 234 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
235 HZDELAY(HZ / 5 + 1); 235 HZDELAY(HZ / 5 + 1);
236 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,ASL0_W_RESET); 236 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_RESET);
237 HZDELAY(HZ / 5 + 1); 237 HZDELAY(HZ / 5 + 1);
238 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET,0x00); 238 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, 0x00);
239 239
240 byteout(cs->hw.avm.cfg_reg+ASL0_OFFSET, ASL0_W_TDISABLE|ASL0_W_TRESET); 240 byteout(cs->hw.avm.cfg_reg + ASL0_OFFSET, ASL0_W_TDISABLE | ASL0_W_TRESET);
241 241
242 model = bytein(cs->hw.avm.cfg_reg+MODREG_OFFSET); 242 model = bytein(cs->hw.avm.cfg_reg + MODREG_OFFSET);
243 vers = bytein(cs->hw.avm.cfg_reg+VERREG_OFFSET); 243 vers = bytein(cs->hw.avm.cfg_reg + VERREG_OFFSET);
244 244
245 printk(KERN_INFO "AVM A1 PCMCIA: io 0x%x irq %d model %d version %d\n", 245 printk(KERN_INFO "AVM A1 PCMCIA: io 0x%x irq %d model %d version %d\n",
246 cs->hw.avm.cfg_reg, cs->irq, model, vers); 246 cs->hw.avm.cfg_reg, cs->irq, model, vers);
247 247
248 setup_isac(cs); 248 setup_isac(cs);
249 cs->readisac = &ReadISAC; 249 cs->readisac = &ReadISAC;
diff --git a/drivers/isdn/hisax/avm_pci.c b/drivers/isdn/hisax/avm_pci.c
index 0e66af1decd4..979492d69dae 100644
--- a/drivers/isdn/hisax/avm_pci.c
+++ b/drivers/isdn/hisax/avm_pci.c
@@ -95,14 +95,14 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
95} 95}
96 96
97static void 97static void
98ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 98ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
99{ 99{
100 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); 100 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
101 insb(cs->hw.avm.isac, data, size); 101 insb(cs->hw.avm.isac, data, size);
102} 102}
103 103
104static void 104static void
105WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 105WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
106{ 106{
107 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4); 107 outb(AVM_ISAC_FIFO, cs->hw.avm.cfg_reg + 4);
108 outsb(cs->hw.avm.isac, data, size); 108 outsb(cs->hw.avm.isac, data, size);
@@ -151,7 +151,7 @@ WriteHDLCPnP(struct IsdnCardState *cs, int chan, u_char offset, u_char value)
151static u_char 151static u_char
152ReadHDLC_s(struct IsdnCardState *cs, int chan, u_char offset) 152ReadHDLC_s(struct IsdnCardState *cs, int chan, u_char offset)
153{ 153{
154 return(0xff & ReadHDLCPCI(cs, chan, offset)); 154 return (0xff & ReadHDLCPCI(cs, chan, offset));
155} 155}
156 156
157static void 157static void
@@ -164,11 +164,11 @@ static inline
164struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel) 164struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
165{ 165{
166 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) 166 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel))
167 return(&cs->bcs[0]); 167 return (&cs->bcs[0]);
168 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) 168 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel))
169 return(&cs->bcs[1]); 169 return (&cs->bcs[1]);
170 else 170 else
171 return(NULL); 171 return (NULL);
172} 172}
173 173
174static void 174static void
@@ -182,13 +182,13 @@ write_ctrl(struct BCState *bcs, int which) {
182 } else { 182 } else {
183 if (which & 4) 183 if (which & 4)
184 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 2, 184 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 2,
185 bcs->hw.hdlc.ctrl.sr.mode); 185 bcs->hw.hdlc.ctrl.sr.mode);
186 if (which & 2) 186 if (which & 2)
187 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 1, 187 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS + 1,
188 bcs->hw.hdlc.ctrl.sr.xml); 188 bcs->hw.hdlc.ctrl.sr.xml);
189 if (which & 1) 189 if (which & 1)
190 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS, 190 WriteHDLCPnP(bcs->cs, bcs->channel, HDLC_STATUS,
191 bcs->hw.hdlc.ctrl.sr.cmd); 191 bcs->hw.hdlc.ctrl.sr.cmd);
192 } 192 }
193} 193}
194 194
@@ -203,41 +203,41 @@ modehdlc(struct BCState *bcs, int mode, int bc)
203 'A' + hdlc, bcs->mode, mode, hdlc, bc); 203 'A' + hdlc, bcs->mode, mode, hdlc, bc);
204 bcs->hw.hdlc.ctrl.ctrl = 0; 204 bcs->hw.hdlc.ctrl.ctrl = 0;
205 switch (mode) { 205 switch (mode) {
206 case (-1): /* used for init */ 206 case (-1): /* used for init */
207 bcs->mode = 1; 207 bcs->mode = 1;
208 bcs->channel = bc; 208 bcs->channel = bc;
209 bc = 0; 209 bc = 0;
210 case (L1_MODE_NULL): 210 case (L1_MODE_NULL):
211 if (bcs->mode == L1_MODE_NULL) 211 if (bcs->mode == L1_MODE_NULL)
212 return; 212 return;
213 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; 213 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
214 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; 214 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
215 write_ctrl(bcs, 5); 215 write_ctrl(bcs, 5);
216 bcs->mode = L1_MODE_NULL; 216 bcs->mode = L1_MODE_NULL;
217 bcs->channel = bc; 217 bcs->channel = bc;
218 break; 218 break;
219 case (L1_MODE_TRANS): 219 case (L1_MODE_TRANS):
220 bcs->mode = mode; 220 bcs->mode = mode;
221 bcs->channel = bc; 221 bcs->channel = bc;
222 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; 222 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
223 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS; 223 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_TRANS;
224 write_ctrl(bcs, 5); 224 write_ctrl(bcs, 5);
225 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; 225 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
226 write_ctrl(bcs, 1); 226 write_ctrl(bcs, 1);
227 bcs->hw.hdlc.ctrl.sr.cmd = 0; 227 bcs->hw.hdlc.ctrl.sr.cmd = 0;
228 schedule_event(bcs, B_XMTBUFREADY); 228 schedule_event(bcs, B_XMTBUFREADY);
229 break; 229 break;
230 case (L1_MODE_HDLC): 230 case (L1_MODE_HDLC):
231 bcs->mode = mode; 231 bcs->mode = mode;
232 bcs->channel = bc; 232 bcs->channel = bc;
233 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS; 233 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS | HDLC_CMD_RRS;
234 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG; 234 bcs->hw.hdlc.ctrl.sr.mode = HDLC_MODE_ITF_FLG;
235 write_ctrl(bcs, 5); 235 write_ctrl(bcs, 5);
236 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS; 236 bcs->hw.hdlc.ctrl.sr.cmd = HDLC_CMD_XRS;
237 write_ctrl(bcs, 1); 237 write_ctrl(bcs, 1);
238 bcs->hw.hdlc.ctrl.sr.cmd = 0; 238 bcs->hw.hdlc.ctrl.sr.cmd = 0;
239 schedule_event(bcs, B_XMTBUFREADY); 239 schedule_event(bcs, B_XMTBUFREADY);
240 break; 240 break;
241 } 241 }
242} 242}
243 243
@@ -247,7 +247,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
247 register u_int *ptr; 247 register u_int *ptr;
248 u_char *p; 248 u_char *p;
249 u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1; 249 u_char idx = bcs->channel ? AVM_HDLC_2 : AVM_HDLC_1;
250 int cnt=0; 250 int cnt = 0;
251 struct IsdnCardState *cs = bcs->cs; 251 struct IsdnCardState *cs = bcs->cs;
252 252
253 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 253 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
@@ -264,7 +264,7 @@ hdlc_empty_fifo(struct BCState *bcs, int count)
264 outl(idx, cs->hw.avm.cfg_reg + 4); 264 outl(idx, cs->hw.avm.cfg_reg + 4);
265 while (cnt < count) { 265 while (cnt < count) {
266#ifdef __powerpc__ 266#ifdef __powerpc__
267 *ptr++ = in_be32((unsigned *)(cs->hw.avm.isac +_IO_BASE)); 267 *ptr++ = in_be32((unsigned *)(cs->hw.avm.isac + _IO_BASE));
268#else 268#else
269 *ptr++ = inl(cs->hw.avm.isac); 269 *ptr++ = inl(cs->hw.avm.isac);
270#endif /* __powerpc__ */ 270#endif /* __powerpc__ */
@@ -293,7 +293,7 @@ static inline void
293hdlc_fill_fifo(struct BCState *bcs) 293hdlc_fill_fifo(struct BCState *bcs)
294{ 294{
295 struct IsdnCardState *cs = bcs->cs; 295 struct IsdnCardState *cs = bcs->cs;
296 int count, cnt =0; 296 int count, cnt = 0;
297 int fifo_size = 32; 297 int fifo_size = 32;
298 u_char *p; 298 u_char *p;
299 u_int *ptr; 299 u_int *ptr;
@@ -323,16 +323,16 @@ hdlc_fill_fifo(struct BCState *bcs)
323 bcs->hw.hdlc.ctrl.sr.xml = ((count == fifo_size) ? 0 : count); 323 bcs->hw.hdlc.ctrl.sr.xml = ((count == fifo_size) ? 0 : count);
324 write_ctrl(bcs, 3); /* sets the correct index too */ 324 write_ctrl(bcs, 3); /* sets the correct index too */
325 if (cs->subtyp == AVM_FRITZ_PCI) { 325 if (cs->subtyp == AVM_FRITZ_PCI) {
326 while (cnt<count) { 326 while (cnt < count) {
327#ifdef __powerpc__ 327#ifdef __powerpc__
328 out_be32((unsigned *)(cs->hw.avm.isac +_IO_BASE), *ptr++); 328 out_be32((unsigned *)(cs->hw.avm.isac + _IO_BASE), *ptr++);
329#else 329#else
330 outl(*ptr++, cs->hw.avm.isac); 330 outl(*ptr++, cs->hw.avm.isac);
331#endif /* __powerpc__ */ 331#endif /* __powerpc__ */
332 cnt += 4; 332 cnt += 4;
333 } 333 }
334 } else { 334 } else {
335 while (cnt<count) { 335 while (cnt < count) {
336 outb(*p++, cs->hw.avm.isac); 336 outb(*p++, cs->hw.avm.isac);
337 cnt++; 337 cnt++;
338 } 338 }
@@ -369,17 +369,17 @@ HDLC_irq(struct BCState *bcs, u_int stat) {
369 write_ctrl(bcs, 1); 369 write_ctrl(bcs, 1);
370 bcs->hw.hdlc.rcvidx = 0; 370 bcs->hw.hdlc.rcvidx = 0;
371 } else { 371 } else {
372 if (!(len = (stat & HDLC_STAT_RML_MASK)>>8)) 372 if (!(len = (stat & HDLC_STAT_RML_MASK) >> 8))
373 len = 32; 373 len = 32;
374 hdlc_empty_fifo(bcs, len); 374 hdlc_empty_fifo(bcs, len);
375 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) { 375 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
376 if (((stat & HDLC_STAT_CRCVFRRAB)==HDLC_STAT_CRCVFR) || 376 if (((stat & HDLC_STAT_CRCVFRRAB) == HDLC_STAT_CRCVFR) ||
377 (bcs->mode == L1_MODE_TRANS)) { 377 (bcs->mode == L1_MODE_TRANS)) {
378 if (!(skb = dev_alloc_skb(bcs->hw.hdlc.rcvidx))) 378 if (!(skb = dev_alloc_skb(bcs->hw.hdlc.rcvidx)))
379 printk(KERN_WARNING "HDLC: receive out of memory\n"); 379 printk(KERN_WARNING "HDLC: receive out of memory\n");
380 else { 380 else {
381 memcpy(skb_put(skb, bcs->hw.hdlc.rcvidx), 381 memcpy(skb_put(skb, bcs->hw.hdlc.rcvidx),
382 bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx); 382 bcs->hw.hdlc.rcvbuf, bcs->hw.hdlc.rcvidx);
383 skb_queue_tail(&bcs->rqueue, skb); 383 skb_queue_tail(&bcs->rqueue, skb);
384 } 384 }
385 bcs->hw.hdlc.rcvidx = 0; 385 bcs->hw.hdlc.rcvidx = 0;
@@ -418,9 +418,9 @@ HDLC_irq(struct BCState *bcs, u_int stat) {
418 hdlc_fill_fifo(bcs); 418 hdlc_fill_fifo(bcs);
419 return; 419 return;
420 } else { 420 } else {
421 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 421 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
422 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 422 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
423 u_long flags; 423 u_long flags;
424 spin_lock_irqsave(&bcs->aclock, flags); 424 spin_lock_irqsave(&bcs->aclock, flags);
425 bcs->ackcnt += bcs->hw.hdlc.count; 425 bcs->ackcnt += bcs->hw.hdlc.count;
426 spin_unlock_irqrestore(&bcs->aclock, flags); 426 spin_unlock_irqrestore(&bcs->aclock, flags);
@@ -453,7 +453,7 @@ HDLC_irq_main(struct IsdnCardState *cs)
453 } else { 453 } else {
454 stat = ReadHDLCPnP(cs, 0, HDLC_STATUS); 454 stat = ReadHDLCPnP(cs, 0, HDLC_STATUS);
455 if (stat & HDLC_INT_RPR) 455 if (stat & HDLC_INT_RPR)
456 stat |= (ReadHDLCPnP(cs, 0, HDLC_STATUS+1))<<8; 456 stat |= (ReadHDLCPnP(cs, 0, HDLC_STATUS + 1)) << 8;
457 } 457 }
458 if (stat & HDLC_INT_MASK) { 458 if (stat & HDLC_INT_MASK) {
459 if (!(bcs = Sel_BCS(cs, 0))) { 459 if (!(bcs = Sel_BCS(cs, 0))) {
@@ -467,7 +467,7 @@ HDLC_irq_main(struct IsdnCardState *cs)
467 } else { 467 } else {
468 stat = ReadHDLCPnP(cs, 1, HDLC_STATUS); 468 stat = ReadHDLCPnP(cs, 1, HDLC_STATUS);
469 if (stat & HDLC_INT_RPR) 469 if (stat & HDLC_INT_RPR)
470 stat |= (ReadHDLCPnP(cs, 1, HDLC_STATUS+1))<<8; 470 stat |= (ReadHDLCPnP(cs, 1, HDLC_STATUS + 1)) << 8;
471 } 471 }
472 if (stat & HDLC_INT_MASK) { 472 if (stat & HDLC_INT_MASK) {
473 if (!(bcs = Sel_BCS(cs, 1))) { 473 if (!(bcs = Sel_BCS(cs, 1))) {
@@ -486,55 +486,55 @@ hdlc_l2l1(struct PStack *st, int pr, void *arg)
486 u_long flags; 486 u_long flags;
487 487
488 switch (pr) { 488 switch (pr) {
489 case (PH_DATA | REQUEST): 489 case (PH_DATA | REQUEST):
490 spin_lock_irqsave(&bcs->cs->lock, flags); 490 spin_lock_irqsave(&bcs->cs->lock, flags);
491 if (bcs->tx_skb) { 491 if (bcs->tx_skb) {
492 skb_queue_tail(&bcs->squeue, skb); 492 skb_queue_tail(&bcs->squeue, skb);
493 } else { 493 } else {
494 bcs->tx_skb = skb; 494 bcs->tx_skb = skb;
495 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 495 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
496 bcs->hw.hdlc.count = 0; 496 bcs->hw.hdlc.count = 0;
497 bcs->cs->BC_Send_Data(bcs); 497 bcs->cs->BC_Send_Data(bcs);
498 } 498 }
499 spin_unlock_irqrestore(&bcs->cs->lock, flags); 499 spin_unlock_irqrestore(&bcs->cs->lock, flags);
500 break; 500 break;
501 case (PH_PULL | INDICATION): 501 case (PH_PULL | INDICATION):
502 spin_lock_irqsave(&bcs->cs->lock, flags); 502 spin_lock_irqsave(&bcs->cs->lock, flags);
503 if (bcs->tx_skb) { 503 if (bcs->tx_skb) {
504 printk(KERN_WARNING "hdlc_l2l1: this shouldn't happen\n"); 504 printk(KERN_WARNING "hdlc_l2l1: this shouldn't happen\n");
505 } else { 505 } else {
506 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 506 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
507 bcs->tx_skb = skb; 507 bcs->tx_skb = skb;
508 bcs->hw.hdlc.count = 0; 508 bcs->hw.hdlc.count = 0;
509 bcs->cs->BC_Send_Data(bcs); 509 bcs->cs->BC_Send_Data(bcs);
510 } 510 }
511 spin_unlock_irqrestore(&bcs->cs->lock, flags); 511 spin_unlock_irqrestore(&bcs->cs->lock, flags);
512 break; 512 break;
513 case (PH_PULL | REQUEST): 513 case (PH_PULL | REQUEST):
514 if (!bcs->tx_skb) { 514 if (!bcs->tx_skb) {
515 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 515 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
516 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 516 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
517 } else 517 } else
518 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 518 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
519 break; 519 break;
520 case (PH_ACTIVATE | REQUEST): 520 case (PH_ACTIVATE | REQUEST):
521 spin_lock_irqsave(&bcs->cs->lock, flags); 521 spin_lock_irqsave(&bcs->cs->lock, flags);
522 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 522 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
523 modehdlc(bcs, st->l1.mode, st->l1.bc); 523 modehdlc(bcs, st->l1.mode, st->l1.bc);
524 spin_unlock_irqrestore(&bcs->cs->lock, flags); 524 spin_unlock_irqrestore(&bcs->cs->lock, flags);
525 l1_msg_b(st, pr, arg); 525 l1_msg_b(st, pr, arg);
526 break; 526 break;
527 case (PH_DEACTIVATE | REQUEST): 527 case (PH_DEACTIVATE | REQUEST):
528 l1_msg_b(st, pr, arg); 528 l1_msg_b(st, pr, arg);
529 break; 529 break;
530 case (PH_DEACTIVATE | CONFIRM): 530 case (PH_DEACTIVATE | CONFIRM):
531 spin_lock_irqsave(&bcs->cs->lock, flags); 531 spin_lock_irqsave(&bcs->cs->lock, flags);
532 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 532 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
533 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 533 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
534 modehdlc(bcs, 0, st->l1.bc); 534 modehdlc(bcs, 0, st->l1.bc);
535 spin_unlock_irqrestore(&bcs->cs->lock, flags); 535 spin_unlock_irqrestore(&bcs->cs->lock, flags);
536 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 536 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
537 break; 537 break;
538 } 538 }
539} 539}
540 540
@@ -568,7 +568,7 @@ open_hdlcstate(struct IsdnCardState *cs, struct BCState *bcs)
568 } 568 }
569 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { 569 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
570 printk(KERN_WARNING 570 printk(KERN_WARNING
571 "HiSax: No memory for bcs->blog\n"); 571 "HiSax: No memory for bcs->blog\n");
572 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); 572 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
573 kfree(bcs->hw.hdlc.rcvbuf); 573 kfree(bcs->hw.hdlc.rcvbuf);
574 bcs->hw.hdlc.rcvbuf = NULL; 574 bcs->hw.hdlc.rcvbuf = NULL;
@@ -688,34 +688,34 @@ AVM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
688 u_long flags; 688 u_long flags;
689 689
690 switch (mt) { 690 switch (mt) {
691 case CARD_RESET: 691 case CARD_RESET:
692 spin_lock_irqsave(&cs->lock, flags); 692 spin_lock_irqsave(&cs->lock, flags);
693 reset_avmpcipnp(cs); 693 reset_avmpcipnp(cs);
694 spin_unlock_irqrestore(&cs->lock, flags); 694 spin_unlock_irqrestore(&cs->lock, flags);
695 return(0); 695 return (0);
696 case CARD_RELEASE: 696 case CARD_RELEASE:
697 outb(0, cs->hw.avm.cfg_reg + 2); 697 outb(0, cs->hw.avm.cfg_reg + 2);
698 release_region(cs->hw.avm.cfg_reg, 32); 698 release_region(cs->hw.avm.cfg_reg, 32);
699 return(0); 699 return (0);
700 case CARD_INIT: 700 case CARD_INIT:
701 spin_lock_irqsave(&cs->lock, flags); 701 spin_lock_irqsave(&cs->lock, flags);
702 reset_avmpcipnp(cs); 702 reset_avmpcipnp(cs);
703 clear_pending_isac_ints(cs); 703 clear_pending_isac_ints(cs);
704 initisac(cs); 704 initisac(cs);
705 inithdlc(cs); 705 inithdlc(cs);
706 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER, 706 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER,
707 cs->hw.avm.cfg_reg + 2); 707 cs->hw.avm.cfg_reg + 2);
708 WriteISAC(cs, ISAC_MASK, 0); 708 WriteISAC(cs, ISAC_MASK, 0);
709 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER | 709 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
710 AVM_STATUS0_ENA_IRQ, cs->hw.avm.cfg_reg + 2); 710 AVM_STATUS0_ENA_IRQ, cs->hw.avm.cfg_reg + 2);
711 /* RESET Receiver and Transmitter */ 711 /* RESET Receiver and Transmitter */
712 WriteISAC(cs, ISAC_CMDR, 0x41); 712 WriteISAC(cs, ISAC_CMDR, 0x41);
713 spin_unlock_irqrestore(&cs->lock, flags); 713 spin_unlock_irqrestore(&cs->lock, flags);
714 return(0); 714 return (0);
715 case CARD_TEST: 715 case CARD_TEST:
716 return(0); 716 return (0);
717 } 717 }
718 return(0); 718 return (0);
719} 719}
720 720
721static int __devinit avm_setup_rest(struct IsdnCardState *cs) 721static int __devinit avm_setup_rest(struct IsdnCardState *cs)
@@ -724,7 +724,7 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
724 724
725 cs->hw.avm.isac = cs->hw.avm.cfg_reg + 0x10; 725 cs->hw.avm.isac = cs->hw.avm.cfg_reg + 0x10;
726 if (!request_region(cs->hw.avm.cfg_reg, 32, 726 if (!request_region(cs->hw.avm.cfg_reg, 32,
727 (cs->subtyp == AVM_FRITZ_PCI) ? "avm PCI" : "avm PnP")) { 727 (cs->subtyp == AVM_FRITZ_PCI) ? "avm PCI" : "avm PnP")) {
728 printk(KERN_WARNING 728 printk(KERN_WARNING
729 "HiSax: Fritz!PCI/PNP config port %x-%x already in use\n", 729 "HiSax: Fritz!PCI/PNP config port %x-%x already in use\n",
730 cs->hw.avm.cfg_reg, 730 cs->hw.avm.cfg_reg,
@@ -732,28 +732,28 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
732 return (0); 732 return (0);
733 } 733 }
734 switch (cs->subtyp) { 734 switch (cs->subtyp) {
735 case AVM_FRITZ_PCI: 735 case AVM_FRITZ_PCI:
736 val = inl(cs->hw.avm.cfg_reg); 736 val = inl(cs->hw.avm.cfg_reg);
737 printk(KERN_INFO "AVM PCI: stat %#x\n", val); 737 printk(KERN_INFO "AVM PCI: stat %#x\n", val);
738 printk(KERN_INFO "AVM PCI: Class %X Rev %d\n", 738 printk(KERN_INFO "AVM PCI: Class %X Rev %d\n",
739 val & 0xff, (val>>8) & 0xff); 739 val & 0xff, (val >> 8) & 0xff);
740 cs->BC_Read_Reg = &ReadHDLC_s; 740 cs->BC_Read_Reg = &ReadHDLC_s;
741 cs->BC_Write_Reg = &WriteHDLC_s; 741 cs->BC_Write_Reg = &WriteHDLC_s;
742 break; 742 break;
743 case AVM_FRITZ_PNP: 743 case AVM_FRITZ_PNP:
744 val = inb(cs->hw.avm.cfg_reg); 744 val = inb(cs->hw.avm.cfg_reg);
745 ver = inb(cs->hw.avm.cfg_reg + 1); 745 ver = inb(cs->hw.avm.cfg_reg + 1);
746 printk(KERN_INFO "AVM PnP: Class %X Rev %d\n", val, ver); 746 printk(KERN_INFO "AVM PnP: Class %X Rev %d\n", val, ver);
747 cs->BC_Read_Reg = &ReadHDLCPnP; 747 cs->BC_Read_Reg = &ReadHDLCPnP;
748 cs->BC_Write_Reg = &WriteHDLCPnP; 748 cs->BC_Write_Reg = &WriteHDLCPnP;
749 break; 749 break;
750 default: 750 default:
751 printk(KERN_WARNING "AVM unknown subtype %d\n", cs->subtyp); 751 printk(KERN_WARNING "AVM unknown subtype %d\n", cs->subtyp);
752 return(0); 752 return (0);
753 } 753 }
754 printk(KERN_INFO "HiSax: %s config irq:%d base:0x%X\n", 754 printk(KERN_INFO "HiSax: %s config irq:%d base:0x%X\n",
755 (cs->subtyp == AVM_FRITZ_PCI) ? "AVM Fritz!PCI" : "AVM Fritz!PnP", 755 (cs->subtyp == AVM_FRITZ_PCI) ? "AVM Fritz!PCI" : "AVM Fritz!PnP",
756 cs->irq, cs->hw.avm.cfg_reg); 756 cs->irq, cs->hw.avm.cfg_reg);
757 757
758 setup_isac(cs); 758 setup_isac(cs);
759 cs->readisac = &ReadISAC; 759 cs->readisac = &ReadISAC;
@@ -772,7 +772,7 @@ static int __devinit avm_setup_rest(struct IsdnCardState *cs)
772 772
773static int __devinit avm_pnp_setup(struct IsdnCardState *cs) 773static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
774{ 774{
775 return(1); /* no-op: success */ 775 return (1); /* no-op: success */
776} 776}
777 777
778#else 778#else
@@ -784,33 +784,33 @@ static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
784 struct pnp_dev *pnp_avm_d = NULL; 784 struct pnp_dev *pnp_avm_d = NULL;
785 785
786 if (!isapnp_present()) 786 if (!isapnp_present())
787 return(1); /* no-op: success */ 787 return (1); /* no-op: success */
788 788
789 if ((pnp_avm_c = pnp_find_card( 789 if ((pnp_avm_c = pnp_find_card(
790 ISAPNP_VENDOR('A', 'V', 'M'), 790 ISAPNP_VENDOR('A', 'V', 'M'),
791 ISAPNP_FUNCTION(0x0900), pnp_avm_c))) { 791 ISAPNP_FUNCTION(0x0900), pnp_avm_c))) {
792 if ((pnp_avm_d = pnp_find_dev(pnp_avm_c, 792 if ((pnp_avm_d = pnp_find_dev(pnp_avm_c,
793 ISAPNP_VENDOR('A', 'V', 'M'), 793 ISAPNP_VENDOR('A', 'V', 'M'),
794 ISAPNP_FUNCTION(0x0900), pnp_avm_d))) { 794 ISAPNP_FUNCTION(0x0900), pnp_avm_d))) {
795 int err; 795 int err;
796 796
797 pnp_disable_dev(pnp_avm_d); 797 pnp_disable_dev(pnp_avm_d);
798 err = pnp_activate_dev(pnp_avm_d); 798 err = pnp_activate_dev(pnp_avm_d);
799 if (err<0) { 799 if (err < 0) {
800 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 800 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
801 __func__, err); 801 __func__, err);
802 return(0); 802 return (0);
803 } 803 }
804 cs->hw.avm.cfg_reg = 804 cs->hw.avm.cfg_reg =
805 pnp_port_start(pnp_avm_d, 0); 805 pnp_port_start(pnp_avm_d, 0);
806 cs->irq = pnp_irq(pnp_avm_d, 0); 806 cs->irq = pnp_irq(pnp_avm_d, 0);
807 if (!cs->irq) { 807 if (!cs->irq) {
808 printk(KERN_ERR "FritzPnP:No IRQ\n"); 808 printk(KERN_ERR "FritzPnP:No IRQ\n");
809 return(0); 809 return (0);
810 } 810 }
811 if (!cs->hw.avm.cfg_reg) { 811 if (!cs->hw.avm.cfg_reg) {
812 printk(KERN_ERR "FritzPnP:No IO address\n"); 812 printk(KERN_ERR "FritzPnP:No IO address\n");
813 return(0); 813 return (0);
814 } 814 }
815 cs->subtyp = AVM_FRITZ_PNP; 815 cs->subtyp = AVM_FRITZ_PNP;
816 816
@@ -827,7 +827,7 @@ static int __devinit avm_pnp_setup(struct IsdnCardState *cs)
827 827
828static int __devinit avm_pci_setup(struct IsdnCardState *cs) 828static int __devinit avm_pci_setup(struct IsdnCardState *cs)
829{ 829{
830 return(1); /* no-op: success */ 830 return (1); /* no-op: success */
831} 831}
832 832
833#else 833#else
@@ -837,27 +837,27 @@ static struct pci_dev *dev_avm __devinitdata = NULL;
837static int __devinit avm_pci_setup(struct IsdnCardState *cs) 837static int __devinit avm_pci_setup(struct IsdnCardState *cs)
838{ 838{
839 if ((dev_avm = hisax_find_pci_device(PCI_VENDOR_ID_AVM, 839 if ((dev_avm = hisax_find_pci_device(PCI_VENDOR_ID_AVM,
840 PCI_DEVICE_ID_AVM_A1, dev_avm))) { 840 PCI_DEVICE_ID_AVM_A1, dev_avm))) {
841 841
842 if (pci_enable_device(dev_avm)) 842 if (pci_enable_device(dev_avm))
843 return(0); 843 return (0);
844 844
845 cs->irq = dev_avm->irq; 845 cs->irq = dev_avm->irq;
846 if (!cs->irq) { 846 if (!cs->irq) {
847 printk(KERN_ERR "FritzPCI: No IRQ for PCI card found\n"); 847 printk(KERN_ERR "FritzPCI: No IRQ for PCI card found\n");
848 return(0); 848 return (0);
849 } 849 }
850 850
851 cs->hw.avm.cfg_reg = pci_resource_start(dev_avm, 1); 851 cs->hw.avm.cfg_reg = pci_resource_start(dev_avm, 1);
852 if (!cs->hw.avm.cfg_reg) { 852 if (!cs->hw.avm.cfg_reg) {
853 printk(KERN_ERR "FritzPCI: No IO-Adr for PCI card found\n"); 853 printk(KERN_ERR "FritzPCI: No IO-Adr for PCI card found\n");
854 return(0); 854 return (0);
855 } 855 }
856 856
857 cs->subtyp = AVM_FRITZ_PCI; 857 cs->subtyp = AVM_FRITZ_PCI;
858 } else { 858 } else {
859 printk(KERN_WARNING "FritzPCI: No PCI card found\n"); 859 printk(KERN_WARNING "FritzPCI: No PCI card found\n");
860 return(0); 860 return (0);
861 } 861 }
862 862
863 cs->irq_flags |= IRQF_SHARED; 863 cs->irq_flags |= IRQF_SHARED;
diff --git a/drivers/isdn/hisax/avma1_cs.c b/drivers/isdn/hisax/avma1_cs.c
index 8f0ad2a52e87..33e3c94887d8 100644
--- a/drivers/isdn/hisax/avma1_cs.c
+++ b/drivers/isdn/hisax/avma1_cs.c
@@ -3,7 +3,7 @@
3 * 3 *
4 * Author Carsten Paeth 4 * Author Carsten Paeth
5 * Copyright 1998-2001 by Carsten Paeth <calle@calle.in-berlin.de> 5 * Copyright 1998-2001 by Carsten Paeth <calle@calle.in-berlin.de>
6 * 6 *
7 * This software may be used and distributed according to the terms 7 * This software may be used and distributed according to the terms
8 * of the GNU General Public License, incorporated herein by reference. 8 * of the GNU General Public License, incorporated herein by reference.
9 * 9 *
@@ -39,20 +39,20 @@ module_param(isdnprot, int, 0);
39 39
40/*====================================================================*/ 40/*====================================================================*/
41 41
42static int avma1cs_config(struct pcmcia_device *link) __devinit ; 42static int avma1cs_config(struct pcmcia_device *link) __devinit;
43static void avma1cs_release(struct pcmcia_device *link); 43static void avma1cs_release(struct pcmcia_device *link);
44static void avma1cs_detach(struct pcmcia_device *p_dev) __devexit ; 44static void avma1cs_detach(struct pcmcia_device *p_dev) __devexit;
45 45
46static int __devinit avma1cs_probe(struct pcmcia_device *p_dev) 46static int __devinit avma1cs_probe(struct pcmcia_device *p_dev)
47{ 47{
48 dev_dbg(&p_dev->dev, "avma1cs_attach()\n"); 48 dev_dbg(&p_dev->dev, "avma1cs_attach()\n");
49 49
50 /* General socket configuration */ 50 /* General socket configuration */
51 p_dev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; 51 p_dev->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
52 p_dev->config_index = 1; 52 p_dev->config_index = 1;
53 p_dev->config_regs = PRESENT_OPTION; 53 p_dev->config_regs = PRESENT_OPTION;
54 54
55 return avma1cs_config(p_dev); 55 return avma1cs_config(p_dev);
56} /* avma1cs_attach */ 56} /* avma1cs_attach */
57 57
58static void __devexit avma1cs_detach(struct pcmcia_device *link) 58static void __devexit avma1cs_detach(struct pcmcia_device *link)
@@ -75,63 +75,63 @@ static int avma1cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
75 75
76static int __devinit avma1cs_config(struct pcmcia_device *link) 76static int __devinit avma1cs_config(struct pcmcia_device *link)
77{ 77{
78 int i = -1; 78 int i = -1;
79 char devname[128]; 79 char devname[128];
80 IsdnCard_t icard; 80 IsdnCard_t icard;
81 int busy = 0; 81 int busy = 0;
82 82
83 dev_dbg(&link->dev, "avma1cs_config(0x%p)\n", link); 83 dev_dbg(&link->dev, "avma1cs_config(0x%p)\n", link);
84 84
85 devname[0] = 0; 85 devname[0] = 0;
86 if (link->prod_id[1]) 86 if (link->prod_id[1])
87 strlcpy(devname, link->prod_id[1], sizeof(devname)); 87 strlcpy(devname, link->prod_id[1], sizeof(devname));
88 88
89 if (pcmcia_loop_config(link, avma1cs_configcheck, NULL)) 89 if (pcmcia_loop_config(link, avma1cs_configcheck, NULL))
90 return -ENODEV; 90 return -ENODEV;
91 91
92 do { 92 do {
93 /* 93 /*
94 * allocate an interrupt line 94 * allocate an interrupt line
95 */ 95 */
96 if (!link->irq) { 96 if (!link->irq) {
97 /* undo */ 97 /* undo */
98 pcmcia_disable_device(link); 98 pcmcia_disable_device(link);
99 break; 99 break;
100 } 100 }
101 101
102 /* 102 /*
103 * configure the PCMCIA socket 103 * configure the PCMCIA socket
104 */ 104 */
105 i = pcmcia_enable_device(link); 105 i = pcmcia_enable_device(link);
106 if (i != 0) {
107 pcmcia_disable_device(link);
108 break;
109 }
110
111 } while (0);
112
113 /* If any step failed, release any partially configured state */
106 if (i != 0) { 114 if (i != 0) {
107 pcmcia_disable_device(link); 115 avma1cs_release(link);
108 break; 116 return -ENODEV;
109 } 117 }
110 118
111 } while (0); 119 icard.para[0] = link->irq;
112 120 icard.para[1] = link->resource[0]->start;
113 /* If any step failed, release any partially configured state */ 121 icard.protocol = isdnprot;
114 if (i != 0) { 122 icard.typ = ISDN_CTYPE_A1_PCMCIA;
115 avma1cs_release(link); 123
116 return -ENODEV; 124 i = hisax_init_pcmcia(link, &busy, &icard);
117 } 125 if (i < 0) {
118 126 printk(KERN_ERR "avma1_cs: failed to initialize AVM A1 "
119 icard.para[0] = link->irq; 127 "PCMCIA %d at i/o %#x\n", i,
120 icard.para[1] = link->resource[0]->start; 128 (unsigned int) link->resource[0]->start);
121 icard.protocol = isdnprot; 129 avma1cs_release(link);
122 icard.typ = ISDN_CTYPE_A1_PCMCIA; 130 return -ENODEV;
123 131 }
124 i = hisax_init_pcmcia(link, &busy, &icard); 132 link->priv = (void *) (unsigned long) i;
125 if (i < 0) {
126 printk(KERN_ERR "avma1_cs: failed to initialize AVM A1 "
127 "PCMCIA %d at i/o %#x\n", i,
128 (unsigned int) link->resource[0]->start);
129 avma1cs_release(link);
130 return -ENODEV;
131 }
132 link->priv = (void *) (unsigned long) i;
133 133
134 return 0; 134 return 0;
135} /* avma1cs_config */ 135} /* avma1cs_config */
136 136
137static void avma1cs_release(struct pcmcia_device *link) 137static void avma1cs_release(struct pcmcia_device *link)
diff --git a/drivers/isdn/hisax/bkm_a4t.c b/drivers/isdn/hisax/bkm_a4t.c
index 9f2009c0b69c..f6bf9c68892e 100644
--- a/drivers/isdn/hisax/bkm_a4t.c
+++ b/drivers/isdn/hisax/bkm_a4t.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -39,7 +39,7 @@ readreg(unsigned int ale, unsigned long adr, u_char off)
39 39
40 40
41static inline void 41static inline void
42readfifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size) 42readfifo(unsigned int ale, unsigned long adr, u_char off, u_char *data, int size)
43{ 43{
44 int i; 44 int i;
45 for (i = 0; i < size; i++) 45 for (i = 0; i < size; i++)
@@ -59,7 +59,7 @@ writereg(unsigned int ale, unsigned long adr, u_char off, u_char data)
59 59
60 60
61static inline void 61static inline void
62writefifo(unsigned int ale, unsigned long adr, u_char off, u_char * data, int size) 62writefifo(unsigned int ale, unsigned long adr, u_char off, u_char *data, int size)
63{ 63{
64 int i; 64 int i;
65 65
@@ -83,13 +83,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
83} 83}
84 84
85static void 85static void
86ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 86ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
87{ 87{
88 readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size); 88 readfifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
89} 89}
90 90
91static void 91static void
92WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 92WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
93{ 93{
94 writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size); 94 writefifo(cs->hw.ax.isac_ale, cs->hw.ax.isac_adr, 0, data, size);
95} 95}
@@ -110,15 +110,15 @@ WriteJADE(struct IsdnCardState *cs, int jade, u_char offset, u_char value)
110 * fast interrupt JADE stuff goes here 110 * fast interrupt JADE stuff goes here
111 */ 111 */
112 112
113#define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale,\ 113#define READJADE(cs, nr, reg) readreg(cs->hw.ax.jade_ale, \
114 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80))) 114 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)))
115#define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale,\ 115#define WRITEJADE(cs, nr, reg, data) writereg(cs->hw.ax.jade_ale, \
116 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data) 116 cs->hw.ax.jade_adr, reg + (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), data)
117 117
118#define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale,\ 118#define READJADEFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.jade_ale, \
119 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt) 119 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
120#define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo( cs->hw.ax.jade_ale,\ 120#define WRITEJADEFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.jade_ale, \
121 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt) 121 cs->hw.ax.jade_adr, (nr == -1 ? 0 : (nr ? 0xC0 : 0x80)), ptr, cnt)
122 122
123#include "jade_irq.c" 123#include "jade_irq.c"
124 124
@@ -201,11 +201,11 @@ reset_bkm(struct IsdnCardState *cs)
201 pI20_Regs->i20SysControl = sysRESET | sysCFG; 201 pI20_Regs->i20SysControl = sysRESET | sysCFG;
202 /* Issue ISDN reset */ 202 /* Issue ISDN reset */
203 pI20_Regs->i20GuestControl = guestWAIT_CFG | 203 pI20_Regs->i20GuestControl = guestWAIT_CFG |
204 g_A4T_JADE_RES | 204 g_A4T_JADE_RES |
205 g_A4T_ISAR_RES | 205 g_A4T_ISAR_RES |
206 g_A4T_ISAC_RES | 206 g_A4T_ISAC_RES |
207 g_A4T_JADE_BOOTR | 207 g_A4T_JADE_BOOTR |
208 g_A4T_ISAR_BOOTR; 208 g_A4T_ISAR_BOOTR;
209 mdelay(10); 209 mdelay(10);
210 210
211 /* Remove RESET state from ISDN */ 211 /* Remove RESET state from ISDN */
@@ -222,33 +222,33 @@ BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
222 u_long flags; 222 u_long flags;
223 223
224 switch (mt) { 224 switch (mt) {
225 case CARD_RESET: 225 case CARD_RESET:
226 /* Disable ints */ 226 /* Disable ints */
227 spin_lock_irqsave(&cs->lock, flags); 227 spin_lock_irqsave(&cs->lock, flags);
228 enable_bkm_int(cs, 0); 228 enable_bkm_int(cs, 0);
229 reset_bkm(cs); 229 reset_bkm(cs);
230 spin_unlock_irqrestore(&cs->lock, flags); 230 spin_unlock_irqrestore(&cs->lock, flags);
231 return (0); 231 return (0);
232 case CARD_RELEASE: 232 case CARD_RELEASE:
233 /* Sanity */ 233 /* Sanity */
234 spin_lock_irqsave(&cs->lock, flags); 234 spin_lock_irqsave(&cs->lock, flags);
235 enable_bkm_int(cs, 0); 235 enable_bkm_int(cs, 0);
236 reset_bkm(cs); 236 reset_bkm(cs);
237 spin_unlock_irqrestore(&cs->lock, flags); 237 spin_unlock_irqrestore(&cs->lock, flags);
238 release_io_bkm(cs); 238 release_io_bkm(cs);
239 return (0); 239 return (0);
240 case CARD_INIT: 240 case CARD_INIT:
241 spin_lock_irqsave(&cs->lock, flags); 241 spin_lock_irqsave(&cs->lock, flags);
242 clear_pending_isac_ints(cs); 242 clear_pending_isac_ints(cs);
243 clear_pending_jade_ints(cs); 243 clear_pending_jade_ints(cs);
244 initisac(cs); 244 initisac(cs);
245 initjade(cs); 245 initjade(cs);
246 /* Enable ints */ 246 /* Enable ints */
247 enable_bkm_int(cs, 1); 247 enable_bkm_int(cs, 1);
248 spin_unlock_irqrestore(&cs->lock, flags); 248 spin_unlock_irqrestore(&cs->lock, flags);
249 return (0); 249 return (0);
250 case CARD_TEST: 250 case CARD_TEST:
251 return (0); 251 return (0);
252 } 252 }
253 return (0); 253 return (0);
254} 254}
@@ -341,7 +341,7 @@ setup_bkm_a4t(struct IsdnCard *card)
341 return (0); 341 return (0);
342 342
343 while ((dev_a4t = hisax_find_pci_device(PCI_VENDOR_ID_ZORAN, 343 while ((dev_a4t = hisax_find_pci_device(PCI_VENDOR_ID_ZORAN,
344 PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) { 344 PCI_DEVICE_ID_ZORAN_36120, dev_a4t))) {
345 ret = a4t_pci_probe(dev_a4t, cs, &found, &pci_memaddr); 345 ret = a4t_pci_probe(dev_a4t, cs, &found, &pci_memaddr);
346 if (!ret) 346 if (!ret)
347 return (0); 347 return (0);
diff --git a/drivers/isdn/hisax/bkm_a8.c b/drivers/isdn/hisax/bkm_a8.c
index e775706c60e3..c9c98f071af6 100644
--- a/drivers/isdn/hisax/bkm_a8.c
+++ b/drivers/isdn/hisax/bkm_a8.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -34,7 +34,7 @@ static const char *sct_quadro_subtypes[] =
34}; 34};
35 35
36 36
37#define wordout(addr,val) outw(val,addr) 37#define wordout(addr, val) outw(val, addr)
38#define wordin(addr) inw(addr) 38#define wordin(addr) inw(addr)
39 39
40static inline u_char 40static inline u_char
@@ -47,7 +47,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
47} 47}
48 48
49static inline void 49static inline void
50readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 50readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
51{ 51{
52 int i; 52 int i;
53 wordout(ale, off); 53 wordout(ale, off);
@@ -64,7 +64,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
64} 64}
65 65
66static inline void 66static inline void
67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
68{ 68{
69 int i; 69 int i;
70 wordout(ale, off); 70 wordout(ale, off);
@@ -87,13 +87,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
87} 87}
88 88
89static void 89static void
90ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 90ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
91{ 91{
92 readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size); 92 readfifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
93} 93}
94 94
95static void 95static void
96WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 96WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
97{ 97{
98 writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size); 98 writefifo(cs->hw.ax.base, cs->hw.ax.data_adr, 0x80, data, size);
99} 99}
@@ -117,21 +117,21 @@ set_ipac_active(struct IsdnCardState *cs, u_int active)
117{ 117{
118 /* set irq mask */ 118 /* set irq mask */
119 writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK, 119 writereg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_MASK,
120 active ? 0xc0 : 0xff); 120 active ? 0xc0 : 0xff);
121} 121}
122 122
123/* 123/*
124 * fast interrupt HSCX stuff goes here 124 * fast interrupt HSCX stuff goes here
125 */ 125 */
126 126
127#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \ 127#define READHSCX(cs, nr, reg) readreg(cs->hw.ax.base, \
128 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0)) 128 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0))
129#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \ 129#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ax.base, \
130 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data) 130 cs->hw.ax.data_adr, reg + (nr ? 0x40 : 0), data)
131#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \ 131#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ax.base, \
132 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt) 132 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
133#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \ 133#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ax.base, \
134 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt) 134 cs->hw.ax.data_adr, (nr ? 0x40 : 0), ptr, cnt)
135 135
136#include "hscx_irq.c" 136#include "hscx_irq.c"
137 137
@@ -148,7 +148,7 @@ bkm_interrupt_ipac(int intno, void *dev_id)
148 spin_unlock_irqrestore(&cs->lock, flags); 148 spin_unlock_irqrestore(&cs->lock, flags);
149 return IRQ_NONE; 149 return IRQ_NONE;
150 } 150 }
151 Start_IPAC: 151Start_IPAC:
152 if (cs->debug & L1_DEB_IPAC) 152 if (cs->debug & L1_DEB_IPAC)
153 debugl1(cs, "IPAC ISTA %02X", ista); 153 debugl1(cs, "IPAC ISTA %02X", ista);
154 if (ista & 0x0f) { 154 if (ista & 0x0f) {
@@ -224,33 +224,33 @@ BKM_card_msg(struct IsdnCardState *cs, int mt, void *arg)
224 u_long flags; 224 u_long flags;
225 225
226 switch (mt) { 226 switch (mt) {
227 case CARD_RESET: 227 case CARD_RESET:
228 spin_lock_irqsave(&cs->lock, flags); 228 spin_lock_irqsave(&cs->lock, flags);
229 /* Disable ints */ 229 /* Disable ints */
230 set_ipac_active(cs, 0); 230 set_ipac_active(cs, 0);
231 enable_bkm_int(cs, 0); 231 enable_bkm_int(cs, 0);
232 reset_bkm(cs); 232 reset_bkm(cs);
233 spin_unlock_irqrestore(&cs->lock, flags); 233 spin_unlock_irqrestore(&cs->lock, flags);
234 return (0); 234 return (0);
235 case CARD_RELEASE: 235 case CARD_RELEASE:
236 /* Sanity */ 236 /* Sanity */
237 spin_lock_irqsave(&cs->lock, flags); 237 spin_lock_irqsave(&cs->lock, flags);
238 set_ipac_active(cs, 0); 238 set_ipac_active(cs, 0);
239 enable_bkm_int(cs, 0); 239 enable_bkm_int(cs, 0);
240 spin_unlock_irqrestore(&cs->lock, flags); 240 spin_unlock_irqrestore(&cs->lock, flags);
241 release_io_sct_quadro(cs); 241 release_io_sct_quadro(cs);
242 return (0); 242 return (0);
243 case CARD_INIT: 243 case CARD_INIT:
244 spin_lock_irqsave(&cs->lock, flags); 244 spin_lock_irqsave(&cs->lock, flags);
245 cs->debug |= L1_DEB_IPAC; 245 cs->debug |= L1_DEB_IPAC;
246 set_ipac_active(cs, 1); 246 set_ipac_active(cs, 1);
247 inithscxisac(cs, 3); 247 inithscxisac(cs, 3);
248 /* Enable ints */ 248 /* Enable ints */
249 enable_bkm_int(cs, 1); 249 enable_bkm_int(cs, 1);
250 spin_unlock_irqrestore(&cs->lock, flags); 250 spin_unlock_irqrestore(&cs->lock, flags);
251 return (0); 251 return (0);
252 case CARD_TEST: 252 case CARD_TEST:
253 return (0); 253 return (0);
254 } 254 }
255 return (0); 255 return (0);
256} 256}
@@ -260,11 +260,11 @@ sct_alloc_io(u_int adr, u_int len)
260{ 260{
261 if (!request_region(adr, len, "scitel")) { 261 if (!request_region(adr, len, "scitel")) {
262 printk(KERN_WARNING 262 printk(KERN_WARNING
263 "HiSax: Scitel port %#x-%#x already in use\n", 263 "HiSax: Scitel port %#x-%#x already in use\n",
264 adr, adr + len); 264 adr, adr + len);
265 return (1); 265 return (1);
266 } 266 }
267 return(0); 267 return (0);
268} 268}
269 269
270static struct pci_dev *dev_a8 __devinitdata = NULL; 270static struct pci_dev *dev_a8 __devinitdata = NULL;
@@ -298,18 +298,18 @@ setup_sct_quadro(struct IsdnCard *card)
298 return (0); 298 return (0);
299 } 299 }
300 if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) || 300 if ((cs->subtyp != SCT_1) && ((sub_sys_id != PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) ||
301 (sub_vendor_id != PCI_VENDOR_ID_BERKOM))) 301 (sub_vendor_id != PCI_VENDOR_ID_BERKOM)))
302 return (0); 302 return (0);
303 if (cs->subtyp == SCT_1) { 303 if (cs->subtyp == SCT_1) {
304 while ((dev_a8 = hisax_find_pci_device(PCI_VENDOR_ID_PLX, 304 while ((dev_a8 = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
305 PCI_DEVICE_ID_PLX_9050, dev_a8))) { 305 PCI_DEVICE_ID_PLX_9050, dev_a8))) {
306 306
307 sub_vendor_id = dev_a8->subsystem_vendor; 307 sub_vendor_id = dev_a8->subsystem_vendor;
308 sub_sys_id = dev_a8->subsystem_device; 308 sub_sys_id = dev_a8->subsystem_device;
309 if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) && 309 if ((sub_sys_id == PCI_DEVICE_ID_BERKOM_SCITEL_QUADRO) &&
310 (sub_vendor_id == PCI_VENDOR_ID_BERKOM)) { 310 (sub_vendor_id == PCI_VENDOR_ID_BERKOM)) {
311 if (pci_enable_device(dev_a8)) 311 if (pci_enable_device(dev_a8))
312 return(0); 312 return (0);
313 pci_ioaddr1 = pci_resource_start(dev_a8, 1); 313 pci_ioaddr1 = pci_resource_start(dev_a8, 1);
314 pci_irq = dev_a8->irq; 314 pci_irq = dev_a8->irq;
315 pci_bus = dev_a8->bus->number; 315 pci_bus = dev_a8->bus->number;
@@ -320,23 +320,23 @@ setup_sct_quadro(struct IsdnCard *card)
320 } 320 }
321 if (!found) { 321 if (!found) {
322 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): " 322 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
323 "Card not found\n", 323 "Card not found\n",
324 sct_quadro_subtypes[cs->subtyp]); 324 sct_quadro_subtypes[cs->subtyp]);
325 return (0); 325 return (0);
326 } 326 }
327#ifdef ATTEMPT_PCI_REMAPPING 327#ifdef ATTEMPT_PCI_REMAPPING
328/* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */ 328/* HACK: PLX revision 1 bug: PLX address bit 7 must not be set */
329 if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) { 329 if ((pci_ioaddr1 & 0x80) && (dev_a8->revision == 1)) {
330 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): " 330 printk(KERN_WARNING "HiSax: Scitel Quadro (%s): "
331 "PLX rev 1, remapping required!\n", 331 "PLX rev 1, remapping required!\n",
332 sct_quadro_subtypes[cs->subtyp]); 332 sct_quadro_subtypes[cs->subtyp]);
333 /* Restart PCI negotiation */ 333 /* Restart PCI negotiation */
334 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int) - 1); 334 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, (u_int)-1);
335 /* Move up by 0x80 byte */ 335 /* Move up by 0x80 byte */
336 pci_ioaddr1 += 0x80; 336 pci_ioaddr1 += 0x80;
337 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK; 337 pci_ioaddr1 &= PCI_BASE_ADDRESS_IO_MASK;
338 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1); 338 pci_write_config_dword(dev_a8, PCI_BASE_ADDRESS_1, pci_ioaddr1);
339 dev_a8->resource[ 1].start = pci_ioaddr1; 339 dev_a8->resource[1].start = pci_ioaddr1;
340 } 340 }
341#endif /* End HACK */ 341#endif /* End HACK */
342 } 342 }
@@ -371,39 +371,39 @@ setup_sct_quadro(struct IsdnCard *card)
371 /* pci_ioaddr5 is for the first subdevice only */ 371 /* pci_ioaddr5 is for the first subdevice only */
372 cs->hw.ax.plx_adr = pci_ioaddr1; 372 cs->hw.ax.plx_adr = pci_ioaddr1;
373 /* Enter all ipac_base addresses */ 373 /* Enter all ipac_base addresses */
374 switch(cs->subtyp) { 374 switch (cs->subtyp) {
375 case 1: 375 case 1:
376 cs->hw.ax.base = pci_ioaddr5 + 0x00; 376 cs->hw.ax.base = pci_ioaddr5 + 0x00;
377 if (sct_alloc_io(pci_ioaddr1, 128)) 377 if (sct_alloc_io(pci_ioaddr1, 128))
378 return(0); 378 return (0);
379 if (sct_alloc_io(pci_ioaddr5, 64)) 379 if (sct_alloc_io(pci_ioaddr5, 64))
380 return(0); 380 return (0);
381 /* disable all IPAC */ 381 /* disable all IPAC */
382 writereg(pci_ioaddr5, pci_ioaddr5 + 4, 382 writereg(pci_ioaddr5, pci_ioaddr5 + 4,
383 IPAC_MASK, 0xFF); 383 IPAC_MASK, 0xFF);
384 writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c, 384 writereg(pci_ioaddr4 + 0x08, pci_ioaddr4 + 0x0c,
385 IPAC_MASK, 0xFF); 385 IPAC_MASK, 0xFF);
386 writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14, 386 writereg(pci_ioaddr3 + 0x10, pci_ioaddr3 + 0x14,
387 IPAC_MASK, 0xFF); 387 IPAC_MASK, 0xFF);
388 writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24, 388 writereg(pci_ioaddr2 + 0x20, pci_ioaddr2 + 0x24,
389 IPAC_MASK, 0xFF); 389 IPAC_MASK, 0xFF);
390 break; 390 break;
391 case 2: 391 case 2:
392 cs->hw.ax.base = pci_ioaddr4 + 0x08; 392 cs->hw.ax.base = pci_ioaddr4 + 0x08;
393 if (sct_alloc_io(pci_ioaddr4, 64)) 393 if (sct_alloc_io(pci_ioaddr4, 64))
394 return(0); 394 return (0);
395 break; 395 break;
396 case 3: 396 case 3:
397 cs->hw.ax.base = pci_ioaddr3 + 0x10; 397 cs->hw.ax.base = pci_ioaddr3 + 0x10;
398 if (sct_alloc_io(pci_ioaddr3, 64)) 398 if (sct_alloc_io(pci_ioaddr3, 64))
399 return(0); 399 return (0);
400 break; 400 break;
401 case 4: 401 case 4:
402 cs->hw.ax.base = pci_ioaddr2 + 0x20; 402 cs->hw.ax.base = pci_ioaddr2 + 0x20;
403 if (sct_alloc_io(pci_ioaddr2, 64)) 403 if (sct_alloc_io(pci_ioaddr2, 64))
404 return(0); 404 return (0);
405 break; 405 break;
406 } 406 }
407 /* For isac and hscx data path */ 407 /* For isac and hscx data path */
408 cs->hw.ax.data_adr = cs->hw.ax.base + 4; 408 cs->hw.ax.data_adr = cs->hw.ax.base + 4;
409 409
@@ -429,7 +429,7 @@ setup_sct_quadro(struct IsdnCard *card)
429 cs->irq_func = &bkm_interrupt_ipac; 429 cs->irq_func = &bkm_interrupt_ipac;
430 430
431 printk(KERN_INFO "HiSax: Scitel Quadro (%s): IPAC Version %d\n", 431 printk(KERN_INFO "HiSax: Scitel Quadro (%s): IPAC Version %d\n",
432 sct_quadro_subtypes[cs->subtyp], 432 sct_quadro_subtypes[cs->subtyp],
433 readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID)); 433 readreg(cs->hw.ax.base, cs->hw.ax.data_adr, IPAC_ID));
434 return (1); 434 return (1);
435} 435}
diff --git a/drivers/isdn/hisax/bkm_ax.h b/drivers/isdn/hisax/bkm_ax.h
index 029e0a277661..27ff8a88679b 100644
--- a/drivers/isdn/hisax/bkm_ax.h
+++ b/drivers/isdn/hisax/bkm_ax.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -32,36 +32,36 @@
32 32
33/* Application specific registers I20 (Siemens SZB6120H) */ 33/* Application specific registers I20 (Siemens SZB6120H) */
34typedef struct { 34typedef struct {
35 /* Video front end horizontal configuration register */ 35 /* Video front end horizontal configuration register */
36 volatile u_int i20VFEHorzCfg; /* Offset 00 */ 36 volatile u_int i20VFEHorzCfg; /* Offset 00 */
37 /* Video front end vertical configuration register */ 37 /* Video front end vertical configuration register */
38 volatile u_int i20VFEVertCfg; /* Offset 04 */ 38 volatile u_int i20VFEVertCfg; /* Offset 04 */
39 /* Video front end scaler and pixel format register */ 39 /* Video front end scaler and pixel format register */
40 volatile u_int i20VFEScaler; /* Offset 08 */ 40 volatile u_int i20VFEScaler; /* Offset 08 */
41 /* Video display top register */ 41 /* Video display top register */
42 volatile u_int i20VDispTop; /* Offset 0C */ 42 volatile u_int i20VDispTop; /* Offset 0C */
43 /* Video display bottom register */ 43 /* Video display bottom register */
44 volatile u_int i20VDispBottom; /* Offset 10 */ 44 volatile u_int i20VDispBottom; /* Offset 10 */
45 /* Video stride, status and frame grab register */ 45 /* Video stride, status and frame grab register */
46 volatile u_int i20VidFrameGrab;/* Offset 14 */ 46 volatile u_int i20VidFrameGrab;/* Offset 14 */
47 /* Video display configuration register */ 47 /* Video display configuration register */
48 volatile u_int i20VDispCfg; /* Offset 18 */ 48 volatile u_int i20VDispCfg; /* Offset 18 */
49 /* Video masking map top */ 49 /* Video masking map top */
50 volatile u_int i20VMaskTop; /* Offset 1C */ 50 volatile u_int i20VMaskTop; /* Offset 1C */
51 /* Video masking map bottom */ 51 /* Video masking map bottom */
52 volatile u_int i20VMaskBottom; /* Offset 20 */ 52 volatile u_int i20VMaskBottom; /* Offset 20 */
53 /* Overlay control register */ 53 /* Overlay control register */
54 volatile u_int i20OvlyControl; /* Offset 24 */ 54 volatile u_int i20OvlyControl; /* Offset 24 */
55 /* System, PCI and general purpose pins control register */ 55 /* System, PCI and general purpose pins control register */
56 volatile u_int i20SysControl; /* Offset 28 */ 56 volatile u_int i20SysControl; /* Offset 28 */
57#define sysRESET 0x01000000 /* bit 24:Softreset (Low) */ 57#define sysRESET 0x01000000 /* bit 24:Softreset (Low) */
58 /* GPIO 4...0: Output fixed for our cfg! */ 58 /* GPIO 4...0: Output fixed for our cfg! */
59#define sysCFG 0x000000E0 /* GPIO 7,6,5: Input */ 59#define sysCFG 0x000000E0 /* GPIO 7,6,5: Input */
60 /* General purpose pins and guest bus control register */ 60 /* General purpose pins and guest bus control register */
61 volatile u_int i20GuestControl;/* Offset 2C */ 61 volatile u_int i20GuestControl;/* Offset 2C */
62#define guestWAIT_CFG 0x00005555 /* 4 PCI waits for all */ 62#define guestWAIT_CFG 0x00005555 /* 4 PCI waits for all */
63#define guestISDN_INT_E 0x01000000 /* ISDN Int en (low) */ 63#define guestISDN_INT_E 0x01000000 /* ISDN Int en (low) */
64#define guestVID_INT_E 0x02000000 /* Video interrupt en (low) */ 64#define guestVID_INT_E 0x02000000 /* Video interrupt en (low) */
65#define guestADI1_INT_R 0x04000000 /* ADI #1 int req (low) */ 65#define guestADI1_INT_R 0x04000000 /* ADI #1 int req (low) */
66#define guestADI2_INT_R 0x08000000 /* ADI #2 int req (low) */ 66#define guestADI2_INT_R 0x08000000 /* ADI #2 int req (low) */
67#define guestISDN_RES 0x10000000 /* ISDN reset bit (high) */ 67#define guestISDN_RES 0x10000000 /* ISDN reset bit (high) */
@@ -78,18 +78,18 @@ typedef struct {
78#define g_A4T_ISAR_INT_S 0x40000000 /* ISAR interrupt pnd (Low) */ 78#define g_A4T_ISAR_INT_S 0x40000000 /* ISAR interrupt pnd (Low) */
79#define g_A4T_ISAC_INT_S 0x80000000 /* ISAC interrupt pnd (Low) */ 79#define g_A4T_ISAC_INT_S 0x80000000 /* ISAC interrupt pnd (Low) */
80 80
81 volatile u_int i20CodeSource; /* Offset 30 */ 81 volatile u_int i20CodeSource; /* Offset 30 */
82 volatile u_int i20CodeXferCtrl;/* Offset 34 */ 82 volatile u_int i20CodeXferCtrl;/* Offset 34 */
83 volatile u_int i20CodeMemPtr; /* Offset 38 */ 83 volatile u_int i20CodeMemPtr; /* Offset 38 */
84 84
85 volatile u_int i20IntStatus; /* Offset 3C */ 85 volatile u_int i20IntStatus; /* Offset 3C */
86 volatile u_int i20IntCtrl; /* Offset 40 */ 86 volatile u_int i20IntCtrl; /* Offset 40 */
87#define intISDN 0x40000000 /* GIRQ1En (ISAC/ADI) (High) */ 87#define intISDN 0x40000000 /* GIRQ1En (ISAC/ADI) (High) */
88#define intVID 0x20000000 /* GIRQ0En (VSYNC) (High) */ 88#define intVID 0x20000000 /* GIRQ0En (VSYNC) (High) */
89#define intCOD 0x10000000 /* CodRepIrqEn (High) */ 89#define intCOD 0x10000000 /* CodRepIrqEn (High) */
90#define intPCI 0x01000000 /* PCI IntA enable (High) */ 90#define intPCI 0x01000000 /* PCI IntA enable (High) */
91 91
92 volatile u_int i20I2CCtrl; /* Offset 44 */ 92 volatile u_int i20I2CCtrl; /* Offset 44 */
93} I20_REGISTER_FILE, *PI20_REGISTER_FILE; 93} I20_REGISTER_FILE, *PI20_REGISTER_FILE;
94 94
95/* 95/*
@@ -98,7 +98,7 @@ typedef struct {
98 */ 98 */
99#define PO_OFFSET 0x00000200 /* Postoffice offset from base */ 99#define PO_OFFSET 0x00000200 /* Postoffice offset from base */
100 100
101#define GCS_0 0x00000000 /* Guest bus chip selects */ 101#define GCS_0 0x00000000 /* Guest bus chip selects */
102#define GCS_1 0x00100000 102#define GCS_1 0x00100000
103#define GCS_2 0x00200000 103#define GCS_2 0x00200000
104#define GCS_3 0x00300000 104#define GCS_3 0x00300000
@@ -108,12 +108,12 @@ typedef struct {
108 108
109#define PO_PEND 0x02000000 109#define PO_PEND 0x02000000
110 110
111#define POSTOFFICE(postoffice) *(volatile unsigned int*)(postoffice) 111#define POSTOFFICE(postoffice) *(volatile unsigned int *)(postoffice)
112 112
113/* Wait unlimited (don't worry) */ 113/* Wait unlimited (don't worry) */
114#define __WAITI20__(postoffice) \ 114#define __WAITI20__(postoffice) \
115do { \ 115 do { \
116 while ((POSTOFFICE(postoffice) & PO_PEND)) ; \ 116 while ((POSTOFFICE(postoffice) & PO_PEND)) ; \
117} while (0) 117 } while (0)
118 118
119#endif /* __BKM_AX_H__ */ 119#endif /* __BKM_AX_H__ */
diff --git a/drivers/isdn/hisax/callc.c b/drivers/isdn/hisax/callc.c
index 9ae92b41660f..a47637be0cc5 100644
--- a/drivers/isdn/hisax/callc.c
+++ b/drivers/isdn/hisax/callc.c
@@ -2,7 +2,7 @@
2 * 2 *
3 * Author Karsten Keil 3 * Author Karsten Keil
4 * Copyright by Karsten Keil <keil@isdn4linux.de> 4 * Copyright by Karsten Keil <keil@isdn4linux.de>
5 * 5 *
6 * This software may be used and distributed according to the terms 6 * This software may be used and distributed according to the terms
7 * of the GNU General Public License, incorporated herein by reference. 7 * of the GNU General Public License, incorporated herein by reference.
8 * 8 *
@@ -66,7 +66,7 @@ hisax_findcard(int driverid)
66} 66}
67 67
68static __printf(3, 4) void 68static __printf(3, 4) void
69link_debug(struct Channel *chanp, int direction, char *fmt, ...) 69 link_debug(struct Channel *chanp, int direction, char *fmt, ...)
70{ 70{
71 va_list args; 71 va_list args;
72 char tmp[16]; 72 char tmp[16];
@@ -91,9 +91,9 @@ enum {
91 ST_WAIT_DCOMMAND, /* 9 call clear. (receiver), awaiting DCHANNEL message */ 91 ST_WAIT_DCOMMAND, /* 9 call clear. (receiver), awaiting DCHANNEL message */
92 ST_WAIT_DRELEASE, /* 10 DISCONNECT sent, awaiting RELEASE */ 92 ST_WAIT_DRELEASE, /* 10 DISCONNECT sent, awaiting RELEASE */
93 ST_WAIT_D_REL_CNF, /* 11 RELEASE sent, awaiting RELEASE confirm */ 93 ST_WAIT_D_REL_CNF, /* 11 RELEASE sent, awaiting RELEASE confirm */
94 ST_IN_PROCEED_SEND, /* 12 incoming call, proceeding send */ 94 ST_IN_PROCEED_SEND, /* 12 incoming call, proceeding send */
95}; 95};
96 96
97 97
98#define STATE_COUNT (ST_IN_PROCEED_SEND + 1) 98#define STATE_COUNT (ST_IN_PROCEED_SEND + 1)
99 99
@@ -119,7 +119,7 @@ enum {
119 EV_SETUP_CNF, /* 1 */ 119 EV_SETUP_CNF, /* 1 */
120 EV_ACCEPTB, /* 2 */ 120 EV_ACCEPTB, /* 2 */
121 EV_DISCONNECT_IND, /* 3 */ 121 EV_DISCONNECT_IND, /* 3 */
122 EV_RELEASE, /* 4 */ 122 EV_RELEASE, /* 4 */
123 EV_LEASED, /* 5 */ 123 EV_LEASED, /* 5 */
124 EV_LEASED_REL, /* 6 */ 124 EV_LEASED_REL, /* 6 */
125 EV_SETUP_IND, /* 7 */ 125 EV_SETUP_IND, /* 7 */
@@ -136,8 +136,8 @@ enum {
136 EV_SETUP_ERR, /* 18 */ 136 EV_SETUP_ERR, /* 18 */
137 EV_CONNECT_ERR, /* 19 */ 137 EV_CONNECT_ERR, /* 19 */
138 EV_PROCEED, /* 20 */ 138 EV_PROCEED, /* 20 */
139 EV_ALERT, /* 21 */ 139 EV_ALERT, /* 21 */
140 EV_REDIR, /* 22 */ 140 EV_REDIR, /* 22 */
141}; 141};
142 142
143#define EVENT_COUNT (EV_REDIR + 1) 143#define EVENT_COUNT (EV_REDIR + 1)
@@ -232,8 +232,8 @@ lli_leased_in(struct FsmInst *fi, int event, void *arg)
232 ic.parm.setup.si2 = 0; 232 ic.parm.setup.si2 = 0;
233 ic.parm.setup.plan = 0; 233 ic.parm.setup.plan = 0;
234 ic.parm.setup.screen = 0; 234 ic.parm.setup.screen = 0;
235 sprintf(ic.parm.setup.eazmsn,"%d", chanp->chan + 1); 235 sprintf(ic.parm.setup.eazmsn, "%d", chanp->chan + 1);
236 sprintf(ic.parm.setup.phone,"LEASED%d", chanp->cs->myid); 236 sprintf(ic.parm.setup.phone, "LEASED%d", chanp->cs->myid);
237 ret = chanp->cs->iif.statcallb(&ic); 237 ret = chanp->cs->iif.statcallb(&ic);
238 if (chanp->debug & 1) 238 if (chanp->debug & 1)
239 link_debug(chanp, 1, "statcallb ret=%d", ret); 239 link_debug(chanp, 1, "statcallb ret=%d", ret);
@@ -356,33 +356,33 @@ lli_deliver_call(struct FsmInst *fi, int event, void *arg)
356 link_debug(chanp, 1, "statcallb ret=%d", ret); 356 link_debug(chanp, 1, "statcallb ret=%d", ret);
357 357
358 switch (ret) { 358 switch (ret) {
359 case 1: /* OK, someone likes this call */ 359 case 1: /* OK, someone likes this call */
360 FsmDelTimer(&chanp->drel_timer, 61); 360 FsmDelTimer(&chanp->drel_timer, 61);
361 FsmChangeState(fi, ST_IN_ALERT_SENT); 361 FsmChangeState(fi, ST_IN_ALERT_SENT);
362 chanp->d_st->lli.l4l3(chanp->d_st, CC_ALERTING | REQUEST, chanp->proc); 362 chanp->d_st->lli.l4l3(chanp->d_st, CC_ALERTING | REQUEST, chanp->proc);
363 break; 363 break;
364 case 5: /* direct redirect */ 364 case 5: /* direct redirect */
365 case 4: /* Proceeding desired */ 365 case 4: /* Proceeding desired */
366 FsmDelTimer(&chanp->drel_timer, 61); 366 FsmDelTimer(&chanp->drel_timer, 61);
367 FsmChangeState(fi, ST_IN_PROCEED_SEND); 367 FsmChangeState(fi, ST_IN_PROCEED_SEND);
368 chanp->d_st->lli.l4l3(chanp->d_st, CC_PROCEED_SEND | REQUEST, chanp->proc); 368 chanp->d_st->lli.l4l3(chanp->d_st, CC_PROCEED_SEND | REQUEST, chanp->proc);
369 if (ret == 5) { 369 if (ret == 5) {
370 memcpy(&chanp->setup, &ic.parm.setup, sizeof(setup_parm)); 370 memcpy(&chanp->setup, &ic.parm.setup, sizeof(setup_parm));
371 chanp->d_st->lli.l4l3(chanp->d_st, CC_REDIR | REQUEST, chanp->proc); 371 chanp->d_st->lli.l4l3(chanp->d_st, CC_REDIR | REQUEST, chanp->proc);
372 } 372 }
373 break; 373 break;
374 case 2: /* Rejecting Call */ 374 case 2: /* Rejecting Call */
375 break; 375 break;
376 case 3: /* incomplete number */ 376 case 3: /* incomplete number */
377 FsmDelTimer(&chanp->drel_timer, 61); 377 FsmDelTimer(&chanp->drel_timer, 61);
378 chanp->d_st->lli.l4l3(chanp->d_st, CC_MORE_INFO | REQUEST, chanp->proc); 378 chanp->d_st->lli.l4l3(chanp->d_st, CC_MORE_INFO | REQUEST, chanp->proc);
379 break; 379 break;
380 case 0: /* OK, nobody likes this call */ 380 case 0: /* OK, nobody likes this call */
381 default: /* statcallb problems */ 381 default: /* statcallb problems */
382 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc); 382 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc);
383 chanp->cs->cardmsg(chanp->cs, MDL_INFO_REL, (void *) (long)chanp->chan); 383 chanp->cs->cardmsg(chanp->cs, MDL_INFO_REL, (void *) (long)chanp->chan);
384 FsmChangeState(fi, ST_NULL); 384 FsmChangeState(fi, ST_NULL);
385 break; 385 break;
386 } 386 }
387 } else { 387 } else {
388 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc); 388 chanp->d_st->lli.l4l3(chanp->d_st, CC_IGNORE | REQUEST, chanp->proc);
@@ -487,7 +487,7 @@ lli_disconnect_req(struct FsmInst *fi, int event, void *arg)
487 if (chanp->proc) 487 if (chanp->proc)
488 chanp->proc->para.cause = 0x10; /* Normal Call Clearing */ 488 chanp->proc->para.cause = 0x10; /* Normal Call Clearing */
489 chanp->d_st->lli.l4l3(chanp->d_st, CC_DISCONNECT | REQUEST, 489 chanp->d_st->lli.l4l3(chanp->d_st, CC_DISCONNECT | REQUEST,
490 chanp->proc); 490 chanp->proc);
491 } 491 }
492} 492}
493 493
@@ -503,7 +503,7 @@ lli_disconnect_reject(struct FsmInst *fi, int event, void *arg)
503 if (chanp->proc) 503 if (chanp->proc)
504 chanp->proc->para.cause = 0x15; /* Call Rejected */ 504 chanp->proc->para.cause = 0x15; /* Call Rejected */
505 chanp->d_st->lli.l4l3(chanp->d_st, CC_DISCONNECT | REQUEST, 505 chanp->d_st->lli.l4l3(chanp->d_st, CC_DISCONNECT | REQUEST,
506 chanp->proc); 506 chanp->proc);
507 } 507 }
508} 508}
509 509
@@ -579,7 +579,7 @@ static void
579lli_bhup_disc(struct FsmInst *fi, int event, void *arg) 579lli_bhup_disc(struct FsmInst *fi, int event, void *arg)
580{ 580{
581 struct Channel *chanp = fi->userdata; 581 struct Channel *chanp = fi->userdata;
582 582
583 if (chanp->debug & 1) 583 if (chanp->debug & 1)
584 link_debug(chanp, 0, "STAT_BHUP"); 584 link_debug(chanp, 0, "STAT_BHUP");
585 HL_LL(chanp, ISDN_STAT_BHUP); 585 HL_LL(chanp, ISDN_STAT_BHUP);
@@ -639,7 +639,7 @@ lli_abort(struct FsmInst *fi, int event, void *arg)
639 chanp->b_st->lli.l4l3(chanp->b_st, DL_RELEASE | REQUEST, NULL); 639 chanp->b_st->lli.l4l3(chanp->b_st, DL_RELEASE | REQUEST, NULL);
640 lli_bhup_dhup(fi, event, arg); 640 lli_bhup_dhup(fi, event, arg);
641} 641}
642 642
643static void 643static void
644lli_release_req(struct FsmInst *fi, int event, void *arg) 644lli_release_req(struct FsmInst *fi, int event, void *arg)
645{ 645{
@@ -650,7 +650,7 @@ lli_release_req(struct FsmInst *fi, int event, void *arg)
650 } else { 650 } else {
651 FsmChangeState(fi, ST_WAIT_D_REL_CNF); 651 FsmChangeState(fi, ST_WAIT_D_REL_CNF);
652 chanp->d_st->lli.l4l3(chanp->d_st, CC_RELEASE | REQUEST, 652 chanp->d_st->lli.l4l3(chanp->d_st, CC_RELEASE | REQUEST,
653 chanp->proc); 653 chanp->proc);
654 } 654 }
655} 655}
656 656
@@ -667,7 +667,7 @@ static void
667lli_bhup_release_req(struct FsmInst *fi, int event, void *arg) 667lli_bhup_release_req(struct FsmInst *fi, int event, void *arg)
668{ 668{
669 struct Channel *chanp = fi->userdata; 669 struct Channel *chanp = fi->userdata;
670 670
671 if (chanp->debug & 1) 671 if (chanp->debug & 1)
672 link_debug(chanp, 0, "STAT_BHUP"); 672 link_debug(chanp, 0, "STAT_BHUP");
673 HL_LL(chanp, ISDN_STAT_BHUP); 673 HL_LL(chanp, ISDN_STAT_BHUP);
@@ -698,7 +698,7 @@ lli_dchan_not_ready(struct FsmInst *fi, int event, void *arg)
698 698
699 if (chanp->debug & 1) 699 if (chanp->debug & 1)
700 link_debug(chanp, 0, "STAT_DHUP"); 700 link_debug(chanp, 0, "STAT_DHUP");
701 HL_LL(chanp, ISDN_STAT_DHUP); 701 HL_LL(chanp, ISDN_STAT_DHUP);
702} 702}
703 703
704static void 704static void
@@ -709,7 +709,7 @@ lli_no_setup_rsp(struct FsmInst *fi, int event, void *arg)
709 if (chanp->debug & 1) 709 if (chanp->debug & 1)
710 link_debug(chanp, 0, "STAT_DHUP"); 710 link_debug(chanp, 0, "STAT_DHUP");
711 HL_LL(chanp, ISDN_STAT_DHUP); 711 HL_LL(chanp, ISDN_STAT_DHUP);
712 lli_close(fi); 712 lli_close(fi);
713} 713}
714 714
715static void 715static void
@@ -768,69 +768,69 @@ lli_failure_a(struct FsmInst *fi, int event, void *arg)
768/* *INDENT-OFF* */ 768/* *INDENT-OFF* */
769static struct FsmNode fnlist[] __initdata = 769static struct FsmNode fnlist[] __initdata =
770{ 770{
771 {ST_NULL, EV_DIAL, lli_prep_dialout}, 771 {ST_NULL, EV_DIAL, lli_prep_dialout},
772 {ST_NULL, EV_RESUME, lli_resume}, 772 {ST_NULL, EV_RESUME, lli_resume},
773 {ST_NULL, EV_SETUP_IND, lli_deliver_call}, 773 {ST_NULL, EV_SETUP_IND, lli_deliver_call},
774 {ST_NULL, EV_LEASED, lli_leased_in}, 774 {ST_NULL, EV_LEASED, lli_leased_in},
775 {ST_OUT_DIAL, EV_SETUP_CNF, lli_init_bchan_out}, 775 {ST_OUT_DIAL, EV_SETUP_CNF, lli_init_bchan_out},
776 {ST_OUT_DIAL, EV_HANGUP, lli_disconnect_req}, 776 {ST_OUT_DIAL, EV_HANGUP, lli_disconnect_req},
777 {ST_OUT_DIAL, EV_DISCONNECT_IND, lli_release_req}, 777 {ST_OUT_DIAL, EV_DISCONNECT_IND, lli_release_req},
778 {ST_OUT_DIAL, EV_RELEASE, lli_dhup_close}, 778 {ST_OUT_DIAL, EV_RELEASE, lli_dhup_close},
779 {ST_OUT_DIAL, EV_NOSETUP_RSP, lli_no_setup_rsp}, 779 {ST_OUT_DIAL, EV_NOSETUP_RSP, lli_no_setup_rsp},
780 {ST_OUT_DIAL, EV_SETUP_ERR, lli_error}, 780 {ST_OUT_DIAL, EV_SETUP_ERR, lli_error},
781 {ST_IN_WAIT_LL, EV_LEASED_REL, lli_failure_l}, 781 {ST_IN_WAIT_LL, EV_LEASED_REL, lli_failure_l},
782 {ST_IN_WAIT_LL, EV_ACCEPTD, lli_setup_rsp}, 782 {ST_IN_WAIT_LL, EV_ACCEPTD, lli_setup_rsp},
783 {ST_IN_WAIT_LL, EV_HANGUP, lli_reject_req}, 783 {ST_IN_WAIT_LL, EV_HANGUP, lli_reject_req},
784 {ST_IN_WAIT_LL, EV_DISCONNECT_IND, lli_release_req}, 784 {ST_IN_WAIT_LL, EV_DISCONNECT_IND, lli_release_req},
785 {ST_IN_WAIT_LL, EV_RELEASE, lli_dhup_close}, 785 {ST_IN_WAIT_LL, EV_RELEASE, lli_dhup_close},
786 {ST_IN_WAIT_LL, EV_SETUP_IND, lli_deliver_call}, 786 {ST_IN_WAIT_LL, EV_SETUP_IND, lli_deliver_call},
787 {ST_IN_WAIT_LL, EV_SETUP_ERR, lli_error}, 787 {ST_IN_WAIT_LL, EV_SETUP_ERR, lli_error},
788 {ST_IN_ALERT_SENT, EV_SETUP_CMPL_IND, lli_init_bchan_in}, 788 {ST_IN_ALERT_SENT, EV_SETUP_CMPL_IND, lli_init_bchan_in},
789 {ST_IN_ALERT_SENT, EV_ACCEPTD, lli_send_dconnect}, 789 {ST_IN_ALERT_SENT, EV_ACCEPTD, lli_send_dconnect},
790 {ST_IN_ALERT_SENT, EV_HANGUP, lli_disconnect_reject}, 790 {ST_IN_ALERT_SENT, EV_HANGUP, lli_disconnect_reject},
791 {ST_IN_ALERT_SENT, EV_DISCONNECT_IND, lli_release_req}, 791 {ST_IN_ALERT_SENT, EV_DISCONNECT_IND, lli_release_req},
792 {ST_IN_ALERT_SENT, EV_RELEASE, lli_dhup_close}, 792 {ST_IN_ALERT_SENT, EV_RELEASE, lli_dhup_close},
793 {ST_IN_ALERT_SENT, EV_REDIR, lli_send_redir}, 793 {ST_IN_ALERT_SENT, EV_REDIR, lli_send_redir},
794 {ST_IN_PROCEED_SEND, EV_REDIR, lli_send_redir}, 794 {ST_IN_PROCEED_SEND, EV_REDIR, lli_send_redir},
795 {ST_IN_PROCEED_SEND, EV_ALERT, lli_send_alert}, 795 {ST_IN_PROCEED_SEND, EV_ALERT, lli_send_alert},
796 {ST_IN_PROCEED_SEND, EV_ACCEPTD, lli_send_dconnect}, 796 {ST_IN_PROCEED_SEND, EV_ACCEPTD, lli_send_dconnect},
797 {ST_IN_PROCEED_SEND, EV_HANGUP, lli_disconnect_reject}, 797 {ST_IN_PROCEED_SEND, EV_HANGUP, lli_disconnect_reject},
798 {ST_IN_PROCEED_SEND, EV_DISCONNECT_IND, lli_dhup_close}, 798 {ST_IN_PROCEED_SEND, EV_DISCONNECT_IND, lli_dhup_close},
799 {ST_IN_ALERT_SENT, EV_RELEASE, lli_dhup_close}, 799 {ST_IN_ALERT_SENT, EV_RELEASE, lli_dhup_close},
800 {ST_IN_WAIT_CONN_ACK, EV_SETUP_CMPL_IND, lli_init_bchan_in}, 800 {ST_IN_WAIT_CONN_ACK, EV_SETUP_CMPL_IND, lli_init_bchan_in},
801 {ST_IN_WAIT_CONN_ACK, EV_HANGUP, lli_disconnect_req}, 801 {ST_IN_WAIT_CONN_ACK, EV_HANGUP, lli_disconnect_req},
802 {ST_IN_WAIT_CONN_ACK, EV_DISCONNECT_IND, lli_release_req}, 802 {ST_IN_WAIT_CONN_ACK, EV_DISCONNECT_IND, lli_release_req},
803 {ST_IN_WAIT_CONN_ACK, EV_RELEASE, lli_dhup_close}, 803 {ST_IN_WAIT_CONN_ACK, EV_RELEASE, lli_dhup_close},
804 {ST_IN_WAIT_CONN_ACK, EV_CONNECT_ERR, lli_error}, 804 {ST_IN_WAIT_CONN_ACK, EV_CONNECT_ERR, lli_error},
805 {ST_WAIT_BCONN, EV_BC_EST, lli_go_active}, 805 {ST_WAIT_BCONN, EV_BC_EST, lli_go_active},
806 {ST_WAIT_BCONN, EV_BC_REL, lli_rel_b_disc}, 806 {ST_WAIT_BCONN, EV_BC_REL, lli_rel_b_disc},
807 {ST_WAIT_BCONN, EV_HANGUP, lli_rel_b_disc}, 807 {ST_WAIT_BCONN, EV_HANGUP, lli_rel_b_disc},
808 {ST_WAIT_BCONN, EV_DISCONNECT_IND, lli_rel_b_release_req}, 808 {ST_WAIT_BCONN, EV_DISCONNECT_IND, lli_rel_b_release_req},
809 {ST_WAIT_BCONN, EV_RELEASE, lli_rel_b_dhup}, 809 {ST_WAIT_BCONN, EV_RELEASE, lli_rel_b_dhup},
810 {ST_WAIT_BCONN, EV_LEASED_REL, lli_rel_b_fail}, 810 {ST_WAIT_BCONN, EV_LEASED_REL, lli_rel_b_fail},
811 {ST_WAIT_BCONN, EV_CINF, lli_charge_info}, 811 {ST_WAIT_BCONN, EV_CINF, lli_charge_info},
812 {ST_ACTIVE, EV_CINF, lli_charge_info}, 812 {ST_ACTIVE, EV_CINF, lli_charge_info},
813 {ST_ACTIVE, EV_BC_REL, lli_bhup_rel_b}, 813 {ST_ACTIVE, EV_BC_REL, lli_bhup_rel_b},
814 {ST_ACTIVE, EV_SUSPEND, lli_suspend}, 814 {ST_ACTIVE, EV_SUSPEND, lli_suspend},
815 {ST_ACTIVE, EV_HANGUP, lli_disconn_bchan}, 815 {ST_ACTIVE, EV_HANGUP, lli_disconn_bchan},
816 {ST_ACTIVE, EV_DISCONNECT_IND, lli_release_bchan}, 816 {ST_ACTIVE, EV_DISCONNECT_IND, lli_release_bchan},
817 {ST_ACTIVE, EV_RELEASE, lli_abort}, 817 {ST_ACTIVE, EV_RELEASE, lli_abort},
818 {ST_ACTIVE, EV_LEASED_REL, lli_failure_a}, 818 {ST_ACTIVE, EV_LEASED_REL, lli_failure_a},
819 {ST_WAIT_BRELEASE, EV_BC_REL, lli_bhup_disc}, 819 {ST_WAIT_BRELEASE, EV_BC_REL, lli_bhup_disc},
820 {ST_WAIT_BRELEASE, EV_DISCONNECT_IND, lli_bhup_release_req}, 820 {ST_WAIT_BRELEASE, EV_DISCONNECT_IND, lli_bhup_release_req},
821 {ST_WAIT_BRELEASE, EV_RELEASE, lli_bhup_dhup}, 821 {ST_WAIT_BRELEASE, EV_RELEASE, lli_bhup_dhup},
822 {ST_WAIT_BRELEASE, EV_LEASED_REL, lli_bhup_fail}, 822 {ST_WAIT_BRELEASE, EV_LEASED_REL, lli_bhup_fail},
823 {ST_WAIT_BREL_DISC, EV_BC_REL, lli_bhup_release_req}, 823 {ST_WAIT_BREL_DISC, EV_BC_REL, lli_bhup_release_req},
824 {ST_WAIT_BREL_DISC, EV_RELEASE, lli_bhup_dhup}, 824 {ST_WAIT_BREL_DISC, EV_RELEASE, lli_bhup_dhup},
825 {ST_WAIT_DCOMMAND, EV_HANGUP, lli_start_disc}, 825 {ST_WAIT_DCOMMAND, EV_HANGUP, lli_start_disc},
826 {ST_WAIT_DCOMMAND, EV_DISCONNECT_IND, lli_release_req}, 826 {ST_WAIT_DCOMMAND, EV_DISCONNECT_IND, lli_release_req},
827 {ST_WAIT_DCOMMAND, EV_RELEASE, lli_dhup_close}, 827 {ST_WAIT_DCOMMAND, EV_RELEASE, lli_dhup_close},
828 {ST_WAIT_DCOMMAND, EV_LEASED_REL, lli_failure_l}, 828 {ST_WAIT_DCOMMAND, EV_LEASED_REL, lli_failure_l},
829 {ST_WAIT_DRELEASE, EV_RELEASE, lli_dhup_close}, 829 {ST_WAIT_DRELEASE, EV_RELEASE, lli_dhup_close},
830 {ST_WAIT_DRELEASE, EV_DIAL, lli_dchan_not_ready}, 830 {ST_WAIT_DRELEASE, EV_DIAL, lli_dchan_not_ready},
831 /* ETS 300-104 16.1 */ 831 /* ETS 300-104 16.1 */
832 {ST_WAIT_D_REL_CNF, EV_RELEASE, lli_dhup_close}, 832 {ST_WAIT_D_REL_CNF, EV_RELEASE, lli_dhup_close},
833 {ST_WAIT_D_REL_CNF, EV_DIAL, lli_dchan_not_ready}, 833 {ST_WAIT_D_REL_CNF, EV_DIAL, lli_dchan_not_ready},
834}; 834};
835/* *INDENT-ON* */ 835/* *INDENT-ON* */
836 836
@@ -855,21 +855,21 @@ release_b_st(struct Channel *chanp)
855{ 855{
856 struct PStack *st = chanp->b_st; 856 struct PStack *st = chanp->b_st;
857 857
858 if(test_and_clear_bit(FLG_START_B, &chanp->Flags)) { 858 if (test_and_clear_bit(FLG_START_B, &chanp->Flags)) {
859 chanp->bcs->BC_Close(chanp->bcs); 859 chanp->bcs->BC_Close(chanp->bcs);
860 switch (chanp->l2_active_protocol) { 860 switch (chanp->l2_active_protocol) {
861 case (ISDN_PROTO_L2_X75I): 861 case (ISDN_PROTO_L2_X75I):
862 releasestack_isdnl2(st); 862 releasestack_isdnl2(st);
863 break; 863 break;
864 case (ISDN_PROTO_L2_HDLC): 864 case (ISDN_PROTO_L2_HDLC):
865 case (ISDN_PROTO_L2_HDLC_56K): 865 case (ISDN_PROTO_L2_HDLC_56K):
866 case (ISDN_PROTO_L2_TRANS): 866 case (ISDN_PROTO_L2_TRANS):
867 case (ISDN_PROTO_L2_MODEM): 867 case (ISDN_PROTO_L2_MODEM):
868 case (ISDN_PROTO_L2_FAX): 868 case (ISDN_PROTO_L2_FAX):
869 releasestack_transl2(st); 869 releasestack_transl2(st);
870 break; 870 break;
871 } 871 }
872 } 872 }
873} 873}
874 874
875static struct Channel 875static struct Channel
@@ -880,9 +880,9 @@ static struct Channel
880 int i; 880 int i;
881 881
882 if (test_bit(FLG_TWO_DCHAN, &cs->HW_Flags)) 882 if (test_bit(FLG_TWO_DCHAN, &cs->HW_Flags))
883 i=1; 883 i = 1;
884 else 884 else
885 i=0; 885 i = 0;
886 886
887 if (!bch) { 887 if (!bch) {
888 i = 2; /* virtual channel */ 888 i = 2; /* virtual channel */
@@ -912,10 +912,10 @@ static struct Channel
912 912
913static void stat_redir_result(struct IsdnCardState *cs, int chan, ulong result) 913static void stat_redir_result(struct IsdnCardState *cs, int chan, ulong result)
914{ isdn_ctrl ic; 914{ isdn_ctrl ic;
915 915
916 ic.driver = cs->myid; 916 ic.driver = cs->myid;
917 ic.command = ISDN_STAT_REDIR; 917 ic.command = ISDN_STAT_REDIR;
918 ic.arg = chan; 918 ic.arg = chan;
919 ic.parm.num[0] = result; 919 ic.parm.num[0] = result;
920 cs->iif.statcallb(&ic); 920 cs->iif.statcallb(&ic);
921} /* stat_redir_result */ 921} /* stat_redir_result */
@@ -927,7 +927,7 @@ dchan_l3l4(struct PStack *st, int pr, void *arg)
927 struct IsdnCardState *cs = st->l1.hardware; 927 struct IsdnCardState *cs = st->l1.hardware;
928 struct Channel *chanp; 928 struct Channel *chanp;
929 929
930 if(!pc) 930 if (!pc)
931 return; 931 return;
932 932
933 if (pr == (CC_SETUP | INDICATION)) { 933 if (pr == (CC_SETUP | INDICATION)) {
@@ -945,63 +945,63 @@ dchan_l3l4(struct PStack *st, int pr, void *arg)
945 return; 945 return;
946 946
947 switch (pr) { 947 switch (pr) {
948 case (CC_MORE_INFO | INDICATION): 948 case (CC_MORE_INFO | INDICATION):
949 FsmEvent(&chanp->fi, EV_SETUP_IND, NULL); 949 FsmEvent(&chanp->fi, EV_SETUP_IND, NULL);
950 break; 950 break;
951 case (CC_DISCONNECT | INDICATION): 951 case (CC_DISCONNECT | INDICATION):
952 FsmEvent(&chanp->fi, EV_DISCONNECT_IND, NULL); 952 FsmEvent(&chanp->fi, EV_DISCONNECT_IND, NULL);
953 break; 953 break;
954 case (CC_RELEASE | CONFIRM): 954 case (CC_RELEASE | CONFIRM):
955 FsmEvent(&chanp->fi, EV_RELEASE, NULL); 955 FsmEvent(&chanp->fi, EV_RELEASE, NULL);
956 break; 956 break;
957 case (CC_SUSPEND | CONFIRM): 957 case (CC_SUSPEND | CONFIRM):
958 FsmEvent(&chanp->fi, EV_RELEASE, NULL); 958 FsmEvent(&chanp->fi, EV_RELEASE, NULL);
959 break; 959 break;
960 case (CC_RESUME | CONFIRM): 960 case (CC_RESUME | CONFIRM):
961 FsmEvent(&chanp->fi, EV_SETUP_CNF, NULL); 961 FsmEvent(&chanp->fi, EV_SETUP_CNF, NULL);
962 break; 962 break;
963 case (CC_RESUME_ERR): 963 case (CC_RESUME_ERR):
964 FsmEvent(&chanp->fi, EV_RELEASE, NULL); 964 FsmEvent(&chanp->fi, EV_RELEASE, NULL);
965 break; 965 break;
966 case (CC_RELEASE | INDICATION): 966 case (CC_RELEASE | INDICATION):
967 FsmEvent(&chanp->fi, EV_RELEASE, NULL); 967 FsmEvent(&chanp->fi, EV_RELEASE, NULL);
968 break; 968 break;
969 case (CC_SETUP_COMPL | INDICATION): 969 case (CC_SETUP_COMPL | INDICATION):
970 FsmEvent(&chanp->fi, EV_SETUP_CMPL_IND, NULL); 970 FsmEvent(&chanp->fi, EV_SETUP_CMPL_IND, NULL);
971 break; 971 break;
972 case (CC_SETUP | CONFIRM): 972 case (CC_SETUP | CONFIRM):
973 FsmEvent(&chanp->fi, EV_SETUP_CNF, NULL); 973 FsmEvent(&chanp->fi, EV_SETUP_CNF, NULL);
974 break; 974 break;
975 case (CC_CHARGE | INDICATION): 975 case (CC_CHARGE | INDICATION):
976 FsmEvent(&chanp->fi, EV_CINF, NULL); 976 FsmEvent(&chanp->fi, EV_CINF, NULL);
977 break; 977 break;
978 case (CC_NOSETUP_RSP): 978 case (CC_NOSETUP_RSP):
979 FsmEvent(&chanp->fi, EV_NOSETUP_RSP, NULL); 979 FsmEvent(&chanp->fi, EV_NOSETUP_RSP, NULL);
980 break; 980 break;
981 case (CC_SETUP_ERR): 981 case (CC_SETUP_ERR):
982 FsmEvent(&chanp->fi, EV_SETUP_ERR, NULL); 982 FsmEvent(&chanp->fi, EV_SETUP_ERR, NULL);
983 break; 983 break;
984 case (CC_CONNECT_ERR): 984 case (CC_CONNECT_ERR):
985 FsmEvent(&chanp->fi, EV_CONNECT_ERR, NULL); 985 FsmEvent(&chanp->fi, EV_CONNECT_ERR, NULL);
986 break; 986 break;
987 case (CC_RELEASE_ERR): 987 case (CC_RELEASE_ERR):
988 FsmEvent(&chanp->fi, EV_RELEASE, NULL); 988 FsmEvent(&chanp->fi, EV_RELEASE, NULL);
989 break; 989 break;
990 case (CC_PROCEED_SEND | INDICATION): 990 case (CC_PROCEED_SEND | INDICATION):
991 case (CC_PROCEEDING | INDICATION): 991 case (CC_PROCEEDING | INDICATION):
992 case (CC_ALERTING | INDICATION): 992 case (CC_ALERTING | INDICATION):
993 case (CC_PROGRESS | INDICATION): 993 case (CC_PROGRESS | INDICATION):
994 case (CC_NOTIFY | INDICATION): 994 case (CC_NOTIFY | INDICATION):
995 break; 995 break;
996 case (CC_REDIR | INDICATION): 996 case (CC_REDIR | INDICATION):
997 stat_redir_result(cs, chanp->chan, pc->redir_result); 997 stat_redir_result(cs, chanp->chan, pc->redir_result);
998 break; 998 break;
999 default: 999 default:
1000 if (chanp->debug & 0x800) { 1000 if (chanp->debug & 0x800) {
1001 HiSax_putstatus(chanp->cs, "Ch", 1001 HiSax_putstatus(chanp->cs, "Ch",
1002 "%d L3->L4 unknown primitiv %#x", 1002 "%d L3->L4 unknown primitiv %#x",
1003 chanp->chan, pr); 1003 chanp->chan, pr);
1004 } 1004 }
1005 } 1005 }
1006} 1006}
1007 1007
@@ -1069,7 +1069,7 @@ init_d_st(struct Channel *chanp)
1069} 1069}
1070 1070
1071static __printf(2, 3) void 1071static __printf(2, 3) void
1072callc_debug(struct FsmInst *fi, char *fmt, ...) 1072 callc_debug(struct FsmInst *fi, char *fmt, ...)
1073{ 1073{
1074 va_list args; 1074 va_list args;
1075 struct Channel *chanp = fi->userdata; 1075 struct Channel *chanp = fi->userdata;
@@ -1129,8 +1129,8 @@ CallcNewChan(struct IsdnCardState *csta) {
1129 return err; 1129 return err;
1130 printk(KERN_INFO "HiSax: 2 channels added\n"); 1130 printk(KERN_INFO "HiSax: 2 channels added\n");
1131 1131
1132 for (i = 0; i < MAX_WAITING_CALLS; i++) { 1132 for (i = 0; i < MAX_WAITING_CALLS; i++) {
1133 err = init_chan(i+2,csta); 1133 err = init_chan(i + 2, csta);
1134 if (err) 1134 if (err)
1135 return err; 1135 return err;
1136 } 1136 }
@@ -1138,7 +1138,7 @@ CallcNewChan(struct IsdnCardState *csta) {
1138 if (test_bit(FLG_PTP, &csta->channel->d_st->l2.flag)) { 1138 if (test_bit(FLG_PTP, &csta->channel->d_st->l2.flag)) {
1139 printk(KERN_INFO "LAYER2 WATCHING ESTABLISH\n"); 1139 printk(KERN_INFO "LAYER2 WATCHING ESTABLISH\n");
1140 csta->channel->d_st->lli.l4l3(csta->channel->d_st, 1140 csta->channel->d_st->lli.l4l3(csta->channel->d_st,
1141 DL_ESTABLISH | REQUEST, NULL); 1141 DL_ESTABLISH | REQUEST, NULL);
1142 } 1142 }
1143 return (0); 1143 return (0);
1144} 1144}
@@ -1187,28 +1187,28 @@ lldata_handler(struct PStack *st, int pr, void *arg)
1187 struct sk_buff *skb = arg; 1187 struct sk_buff *skb = arg;
1188 1188
1189 switch (pr) { 1189 switch (pr) {
1190 case (DL_DATA | INDICATION): 1190 case (DL_DATA | INDICATION):
1191 if (chanp->data_open) { 1191 if (chanp->data_open) {
1192 if (chanp->debug & 0x800) 1192 if (chanp->debug & 0x800)
1193 link_debug(chanp, 0, "lldata: %d", skb->len); 1193 link_debug(chanp, 0, "lldata: %d", skb->len);
1194 chanp->cs->iif.rcvcallb_skb(chanp->cs->myid, chanp->chan, skb); 1194 chanp->cs->iif.rcvcallb_skb(chanp->cs->myid, chanp->chan, skb);
1195 } else { 1195 } else {
1196 link_debug(chanp, 0, "lldata: channel not open"); 1196 link_debug(chanp, 0, "lldata: channel not open");
1197 dev_kfree_skb(skb); 1197 dev_kfree_skb(skb);
1198 } 1198 }
1199 break; 1199 break;
1200 case (DL_ESTABLISH | INDICATION): 1200 case (DL_ESTABLISH | INDICATION):
1201 case (DL_ESTABLISH | CONFIRM): 1201 case (DL_ESTABLISH | CONFIRM):
1202 FsmEvent(&chanp->fi, EV_BC_EST, NULL); 1202 FsmEvent(&chanp->fi, EV_BC_EST, NULL);
1203 break; 1203 break;
1204 case (DL_RELEASE | INDICATION): 1204 case (DL_RELEASE | INDICATION):
1205 case (DL_RELEASE | CONFIRM): 1205 case (DL_RELEASE | CONFIRM):
1206 FsmEvent(&chanp->fi, EV_BC_REL, NULL); 1206 FsmEvent(&chanp->fi, EV_BC_REL, NULL);
1207 break; 1207 break;
1208 default: 1208 default:
1209 printk(KERN_WARNING "lldata_handler unknown primitive %#x\n", 1209 printk(KERN_WARNING "lldata_handler unknown primitive %#x\n",
1210 pr); 1210 pr);
1211 break; 1211 break;
1212 } 1212 }
1213} 1213}
1214 1214
@@ -1219,28 +1219,28 @@ lltrans_handler(struct PStack *st, int pr, void *arg)
1219 struct sk_buff *skb = arg; 1219 struct sk_buff *skb = arg;
1220 1220
1221 switch (pr) { 1221 switch (pr) {
1222 case (PH_DATA | INDICATION): 1222 case (PH_DATA | INDICATION):
1223 if (chanp->data_open) { 1223 if (chanp->data_open) {
1224 if (chanp->debug & 0x800) 1224 if (chanp->debug & 0x800)
1225 link_debug(chanp, 0, "lltrans: %d", skb->len); 1225 link_debug(chanp, 0, "lltrans: %d", skb->len);
1226 chanp->cs->iif.rcvcallb_skb(chanp->cs->myid, chanp->chan, skb); 1226 chanp->cs->iif.rcvcallb_skb(chanp->cs->myid, chanp->chan, skb);
1227 } else { 1227 } else {
1228 link_debug(chanp, 0, "lltrans: channel not open"); 1228 link_debug(chanp, 0, "lltrans: channel not open");
1229 dev_kfree_skb(skb); 1229 dev_kfree_skb(skb);
1230 } 1230 }
1231 break; 1231 break;
1232 case (PH_ACTIVATE | INDICATION): 1232 case (PH_ACTIVATE | INDICATION):
1233 case (PH_ACTIVATE | CONFIRM): 1233 case (PH_ACTIVATE | CONFIRM):
1234 FsmEvent(&chanp->fi, EV_BC_EST, NULL); 1234 FsmEvent(&chanp->fi, EV_BC_EST, NULL);
1235 break; 1235 break;
1236 case (PH_DEACTIVATE | INDICATION): 1236 case (PH_DEACTIVATE | INDICATION):
1237 case (PH_DEACTIVATE | CONFIRM): 1237 case (PH_DEACTIVATE | CONFIRM):
1238 FsmEvent(&chanp->fi, EV_BC_REL, NULL); 1238 FsmEvent(&chanp->fi, EV_BC_REL, NULL);
1239 break; 1239 break;
1240 default: 1240 default:
1241 printk(KERN_WARNING "lltrans_handler unknown primitive %#x\n", 1241 printk(KERN_WARNING "lltrans_handler unknown primitive %#x\n",
1242 pr); 1242 pr);
1243 break; 1243 break;
1244 } 1244 }
1245} 1245}
1246 1246
@@ -1272,22 +1272,22 @@ init_b_st(struct Channel *chanp, int incoming)
1272 else 1272 else
1273 st->l1.bc = chanp->proc->para.bchannel - 1; 1273 st->l1.bc = chanp->proc->para.bchannel - 1;
1274 switch (chanp->l2_active_protocol) { 1274 switch (chanp->l2_active_protocol) {
1275 case (ISDN_PROTO_L2_X75I): 1275 case (ISDN_PROTO_L2_X75I):
1276 case (ISDN_PROTO_L2_HDLC): 1276 case (ISDN_PROTO_L2_HDLC):
1277 st->l1.mode = L1_MODE_HDLC; 1277 st->l1.mode = L1_MODE_HDLC;
1278 break; 1278 break;
1279 case (ISDN_PROTO_L2_HDLC_56K): 1279 case (ISDN_PROTO_L2_HDLC_56K):
1280 st->l1.mode = L1_MODE_HDLC_56K; 1280 st->l1.mode = L1_MODE_HDLC_56K;
1281 break; 1281 break;
1282 case (ISDN_PROTO_L2_TRANS): 1282 case (ISDN_PROTO_L2_TRANS):
1283 st->l1.mode = L1_MODE_TRANS; 1283 st->l1.mode = L1_MODE_TRANS;
1284 break; 1284 break;
1285 case (ISDN_PROTO_L2_MODEM): 1285 case (ISDN_PROTO_L2_MODEM):
1286 st->l1.mode = L1_MODE_V32; 1286 st->l1.mode = L1_MODE_V32;
1287 break; 1287 break;
1288 case (ISDN_PROTO_L2_FAX): 1288 case (ISDN_PROTO_L2_FAX):
1289 st->l1.mode = L1_MODE_FAX; 1289 st->l1.mode = L1_MODE_FAX;
1290 break; 1290 break;
1291 } 1291 }
1292 chanp->bcs->conmsg = NULL; 1292 chanp->bcs->conmsg = NULL;
1293 if (chanp->bcs->BC_SetStack(st, chanp->bcs)) 1293 if (chanp->bcs->BC_SetStack(st, chanp->bcs))
@@ -1303,29 +1303,29 @@ init_b_st(struct Channel *chanp, int incoming)
1303 st->l2.T203 = 5000; /* 5000 milliseconds */ 1303 st->l2.T203 = 5000; /* 5000 milliseconds */
1304 st->l3.debug = 0; 1304 st->l3.debug = 0;
1305 switch (chanp->l2_active_protocol) { 1305 switch (chanp->l2_active_protocol) {
1306 case (ISDN_PROTO_L2_X75I): 1306 case (ISDN_PROTO_L2_X75I):
1307 sprintf(tmp, "Ch%d X.75", chanp->chan); 1307 sprintf(tmp, "Ch%d X.75", chanp->chan);
1308 setstack_isdnl2(st, tmp); 1308 setstack_isdnl2(st, tmp);
1309 setstack_l3bc(st, chanp); 1309 setstack_l3bc(st, chanp);
1310 st->l2.l2l3 = lldata_handler; 1310 st->l2.l2l3 = lldata_handler;
1311 st->lli.userdata = chanp; 1311 st->lli.userdata = chanp;
1312 test_and_clear_bit(FLG_LLI_L1WAKEUP, &st->lli.flag); 1312 test_and_clear_bit(FLG_LLI_L1WAKEUP, &st->lli.flag);
1313 test_and_set_bit(FLG_LLI_L2WAKEUP, &st->lli.flag); 1313 test_and_set_bit(FLG_LLI_L2WAKEUP, &st->lli.flag);
1314 st->l2.l2m.debug = chanp->debug & 16; 1314 st->l2.l2m.debug = chanp->debug & 16;
1315 st->l2.debug = chanp->debug & 64; 1315 st->l2.debug = chanp->debug & 64;
1316 break; 1316 break;
1317 case (ISDN_PROTO_L2_HDLC): 1317 case (ISDN_PROTO_L2_HDLC):
1318 case (ISDN_PROTO_L2_HDLC_56K): 1318 case (ISDN_PROTO_L2_HDLC_56K):
1319 case (ISDN_PROTO_L2_TRANS): 1319 case (ISDN_PROTO_L2_TRANS):
1320 case (ISDN_PROTO_L2_MODEM): 1320 case (ISDN_PROTO_L2_MODEM):
1321 case (ISDN_PROTO_L2_FAX): 1321 case (ISDN_PROTO_L2_FAX):
1322 st->l1.l1l2 = lltrans_handler; 1322 st->l1.l1l2 = lltrans_handler;
1323 st->lli.userdata = chanp; 1323 st->lli.userdata = chanp;
1324 test_and_set_bit(FLG_LLI_L1WAKEUP, &st->lli.flag); 1324 test_and_set_bit(FLG_LLI_L1WAKEUP, &st->lli.flag);
1325 test_and_clear_bit(FLG_LLI_L2WAKEUP, &st->lli.flag); 1325 test_and_clear_bit(FLG_LLI_L2WAKEUP, &st->lli.flag);
1326 setstack_transl2(st); 1326 setstack_transl2(st);
1327 setstack_l3bc(st, chanp); 1327 setstack_l3bc(st, chanp);
1328 break; 1328 break;
1329 } 1329 }
1330 test_and_set_bit(FLG_START_B, &chanp->Flags); 1330 test_and_set_bit(FLG_START_B, &chanp->Flags);
1331 return (0); 1331 return (0);
@@ -1338,19 +1338,19 @@ leased_l4l3(struct PStack *st, int pr, void *arg)
1338 struct sk_buff *skb = arg; 1338 struct sk_buff *skb = arg;
1339 1339
1340 switch (pr) { 1340 switch (pr) {
1341 case (DL_DATA | REQUEST): 1341 case (DL_DATA | REQUEST):
1342 link_debug(chanp, 0, "leased line d-channel DATA"); 1342 link_debug(chanp, 0, "leased line d-channel DATA");
1343 dev_kfree_skb(skb); 1343 dev_kfree_skb(skb);
1344 break; 1344 break;
1345 case (DL_ESTABLISH | REQUEST): 1345 case (DL_ESTABLISH | REQUEST):
1346 st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL); 1346 st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL);
1347 break; 1347 break;
1348 case (DL_RELEASE | REQUEST): 1348 case (DL_RELEASE | REQUEST):
1349 break; 1349 break;
1350 default: 1350 default:
1351 printk(KERN_WARNING "transd_l4l3 unknown primitive %#x\n", 1351 printk(KERN_WARNING "transd_l4l3 unknown primitive %#x\n",
1352 pr); 1352 pr);
1353 break; 1353 break;
1354 } 1354 }
1355} 1355}
1356 1356
@@ -1359,32 +1359,32 @@ leased_l1l2(struct PStack *st, int pr, void *arg)
1359{ 1359{
1360 struct Channel *chanp = (struct Channel *) st->lli.userdata; 1360 struct Channel *chanp = (struct Channel *) st->lli.userdata;
1361 struct sk_buff *skb = arg; 1361 struct sk_buff *skb = arg;
1362 int i,event = EV_LEASED_REL; 1362 int i, event = EV_LEASED_REL;
1363 1363
1364 switch (pr) { 1364 switch (pr) {
1365 case (PH_DATA | INDICATION): 1365 case (PH_DATA | INDICATION):
1366 link_debug(chanp, 0, "leased line d-channel DATA"); 1366 link_debug(chanp, 0, "leased line d-channel DATA");
1367 dev_kfree_skb(skb); 1367 dev_kfree_skb(skb);
1368 break; 1368 break;
1369 case (PH_ACTIVATE | INDICATION): 1369 case (PH_ACTIVATE | INDICATION):
1370 case (PH_ACTIVATE | CONFIRM): 1370 case (PH_ACTIVATE | CONFIRM):
1371 event = EV_LEASED; 1371 event = EV_LEASED;
1372 case (PH_DEACTIVATE | INDICATION): 1372 case (PH_DEACTIVATE | INDICATION):
1373 case (PH_DEACTIVATE | CONFIRM): 1373 case (PH_DEACTIVATE | CONFIRM):
1374 if (test_bit(FLG_TWO_DCHAN, &chanp->cs->HW_Flags)) 1374 if (test_bit(FLG_TWO_DCHAN, &chanp->cs->HW_Flags))
1375 i = 1; 1375 i = 1;
1376 else 1376 else
1377 i = 0; 1377 i = 0;
1378 while (i < 2) { 1378 while (i < 2) {
1379 FsmEvent(&chanp->fi, event, NULL); 1379 FsmEvent(&chanp->fi, event, NULL);
1380 chanp++; 1380 chanp++;
1381 i++; 1381 i++;
1382 } 1382 }
1383 break; 1383 break;
1384 default: 1384 default:
1385 printk(KERN_WARNING 1385 printk(KERN_WARNING
1386 "transd_l1l2 unknown primitive %#x\n", pr); 1386 "transd_l1l2 unknown primitive %#x\n", pr);
1387 break; 1387 break;
1388 } 1388 }
1389} 1389}
1390 1390
@@ -1394,7 +1394,7 @@ distr_debug(struct IsdnCardState *csta, int debugflags)
1394 int i; 1394 int i;
1395 struct Channel *chanp = csta->channel; 1395 struct Channel *chanp = csta->channel;
1396 1396
1397 for (i = 0; i < (2 + MAX_WAITING_CALLS) ; i++) { 1397 for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
1398 chanp[i].debug = debugflags; 1398 chanp[i].debug = debugflags;
1399 chanp[i].fi.debug = debugflags & 2; 1399 chanp[i].fi.debug = debugflags & 2;
1400 chanp[i].d_st->l2.l2m.debug = debugflags & 8; 1400 chanp[i].d_st->l2.l2m.debug = debugflags & 8;
@@ -1421,9 +1421,9 @@ capi_debug(struct Channel *chanp, capi_msg *cm)
1421{ 1421{
1422 char *t = tmpbuf; 1422 char *t = tmpbuf;
1423 1423
1424 t += QuickHex(t, (u_char *)cm, (cm->Length>50)? 50: cm->Length); 1424 t += QuickHex(t, (u_char *)cm, (cm->Length > 50) ? 50 : cm->Length);
1425 t--; 1425 t--;
1426 *t= 0; 1426 *t = 0;
1427 HiSax_putstatus(chanp->cs, "Ch", "%d CAPIMSG %s", chanp->chan, tmpbuf); 1427 HiSax_putstatus(chanp->cs, "Ch", "%d CAPIMSG %s", chanp->chan, tmpbuf);
1428} 1428}
1429 1429
@@ -1431,31 +1431,31 @@ static void
1431lli_got_fac_req(struct Channel *chanp, capi_msg *cm) { 1431lli_got_fac_req(struct Channel *chanp, capi_msg *cm) {
1432 if ((cm->para[0] != 3) || (cm->para[1] != 0)) 1432 if ((cm->para[0] != 3) || (cm->para[1] != 0))
1433 return; 1433 return;
1434 if (cm->para[2]<3) 1434 if (cm->para[2] < 3)
1435 return; 1435 return;
1436 if (cm->para[4] != 0) 1436 if (cm->para[4] != 0)
1437 return; 1437 return;
1438 switch(cm->para[3]) { 1438 switch (cm->para[3]) {
1439 case 4: /* Suspend */ 1439 case 4: /* Suspend */
1440 strncpy(chanp->setup.phone, &cm->para[5], cm->para[5] +1); 1440 strncpy(chanp->setup.phone, &cm->para[5], cm->para[5] + 1);
1441 FsmEvent(&chanp->fi, EV_SUSPEND, cm); 1441 FsmEvent(&chanp->fi, EV_SUSPEND, cm);
1442 break; 1442 break;
1443 case 5: /* Resume */ 1443 case 5: /* Resume */
1444 strncpy(chanp->setup.phone, &cm->para[5], cm->para[5] +1); 1444 strncpy(chanp->setup.phone, &cm->para[5], cm->para[5] + 1);
1445 if (chanp->fi.state == ST_NULL) { 1445 if (chanp->fi.state == ST_NULL) {
1446 FsmEvent(&chanp->fi, EV_RESUME, cm); 1446 FsmEvent(&chanp->fi, EV_RESUME, cm);
1447 } else { 1447 } else {
1448 FsmDelTimer(&chanp->dial_timer, 72); 1448 FsmDelTimer(&chanp->dial_timer, 72);
1449 FsmAddTimer(&chanp->dial_timer, 80, EV_RESUME, cm, 73); 1449 FsmAddTimer(&chanp->dial_timer, 80, EV_RESUME, cm, 73);
1450 } 1450 }
1451 break; 1451 break;
1452 } 1452 }
1453} 1453}
1454 1454
1455static void 1455static void
1456lli_got_manufacturer(struct Channel *chanp, struct IsdnCardState *cs, capi_msg *cm) { 1456lli_got_manufacturer(struct Channel *chanp, struct IsdnCardState *cs, capi_msg *cm) {
1457 if ((cs->typ == ISDN_CTYPE_ELSA) || (cs->typ == ISDN_CTYPE_ELSA_PNP) || 1457 if ((cs->typ == ISDN_CTYPE_ELSA) || (cs->typ == ISDN_CTYPE_ELSA_PNP) ||
1458 (cs->typ == ISDN_CTYPE_ELSA_PCI)) { 1458 (cs->typ == ISDN_CTYPE_ELSA_PCI)) {
1459 if (cs->hw.elsa.MFlag) { 1459 if (cs->hw.elsa.MFlag) {
1460 cs->cardmsg(cs, CARD_AUX_IND, cm->para); 1460 cs->cardmsg(cs, CARD_AUX_IND, cm->para);
1461 } 1461 }
@@ -1466,14 +1466,14 @@ lli_got_manufacturer(struct Channel *chanp, struct IsdnCardState *cs, capi_msg *
1466/***************************************************************/ 1466/***************************************************************/
1467/* Limit the available number of channels for the current card */ 1467/* Limit the available number of channels for the current card */
1468/***************************************************************/ 1468/***************************************************************/
1469static int 1469static int
1470set_channel_limit(struct IsdnCardState *cs, int chanmax) 1470set_channel_limit(struct IsdnCardState *cs, int chanmax)
1471{ 1471{
1472 isdn_ctrl ic; 1472 isdn_ctrl ic;
1473 int i, ii; 1473 int i, ii;
1474 1474
1475 if ((chanmax < 0) || (chanmax > 2)) 1475 if ((chanmax < 0) || (chanmax > 2))
1476 return(-EINVAL); 1476 return (-EINVAL);
1477 cs->chanlimit = 0; 1477 cs->chanlimit = 0;
1478 for (ii = 0; ii < 2; ii++) { 1478 for (ii = 0; ii < 2; ii++) {
1479 ic.driver = cs->myid; 1479 ic.driver = cs->myid;
@@ -1483,16 +1483,16 @@ set_channel_limit(struct IsdnCardState *cs, int chanmax)
1483 ic.parm.num[0] = 0; /* disabled */ 1483 ic.parm.num[0] = 0; /* disabled */
1484 else 1484 else
1485 ic.parm.num[0] = 1; /* enabled */ 1485 ic.parm.num[0] = 1; /* enabled */
1486 i = cs->iif.statcallb(&ic); 1486 i = cs->iif.statcallb(&ic);
1487 if (i) return(-EINVAL); 1487 if (i) return (-EINVAL);
1488 if (ii < chanmax) 1488 if (ii < chanmax)
1489 cs->chanlimit++; 1489 cs->chanlimit++;
1490 } 1490 }
1491 return(0); 1491 return (0);
1492} /* set_channel_limit */ 1492} /* set_channel_limit */
1493 1493
1494int 1494int
1495HiSax_command(isdn_ctrl * ic) 1495HiSax_command(isdn_ctrl *ic)
1496{ 1496{
1497 struct IsdnCardState *csta = hisax_findcard(ic->driver); 1497 struct IsdnCardState *csta = hisax_findcard(ic->driver);
1498 struct PStack *st; 1498 struct PStack *st;
@@ -1502,236 +1502,236 @@ HiSax_command(isdn_ctrl * ic)
1502 1502
1503 if (!csta) { 1503 if (!csta) {
1504 printk(KERN_ERR 1504 printk(KERN_ERR
1505 "HiSax: if_command %d called with invalid driverId %d!\n", 1505 "HiSax: if_command %d called with invalid driverId %d!\n",
1506 ic->command, ic->driver); 1506 ic->command, ic->driver);
1507 return -ENODEV; 1507 return -ENODEV;
1508 } 1508 }
1509 switch (ic->command) { 1509 switch (ic->command) {
1510 case (ISDN_CMD_SETEAZ): 1510 case (ISDN_CMD_SETEAZ):
1511 chanp = csta->channel + ic->arg; 1511 chanp = csta->channel + ic->arg;
1512 break;
1513 case (ISDN_CMD_SETL2):
1514 chanp = csta->channel + (ic->arg & 0xff);
1515 if (chanp->debug & 1)
1516 link_debug(chanp, 1, "SETL2 card %d %ld",
1517 csta->cardnr + 1, ic->arg >> 8);
1518 chanp->l2_protocol = ic->arg >> 8;
1519 break;
1520 case (ISDN_CMD_SETL3):
1521 chanp = csta->channel + (ic->arg & 0xff);
1522 if (chanp->debug & 1)
1523 link_debug(chanp, 1, "SETL3 card %d %ld",
1524 csta->cardnr + 1, ic->arg >> 8);
1525 chanp->l3_protocol = ic->arg >> 8;
1526 break;
1527 case (ISDN_CMD_DIAL):
1528 chanp = csta->channel + (ic->arg & 0xff);
1529 if (chanp->debug & 1)
1530 link_debug(chanp, 1, "DIAL %s -> %s (%d,%d)",
1531 ic->parm.setup.eazmsn, ic->parm.setup.phone,
1532 ic->parm.setup.si1, ic->parm.setup.si2);
1533 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm));
1534 if (!strcmp(chanp->setup.eazmsn, "0"))
1535 chanp->setup.eazmsn[0] = '\0';
1536 /* this solution is dirty and may be change, if
1537 * we make a callreference based callmanager */
1538 if (chanp->fi.state == ST_NULL) {
1539 FsmEvent(&chanp->fi, EV_DIAL, NULL);
1540 } else {
1541 FsmDelTimer(&chanp->dial_timer, 70);
1542 FsmAddTimer(&chanp->dial_timer, 50, EV_DIAL, NULL, 71);
1543 }
1544 break;
1545 case (ISDN_CMD_ACCEPTB):
1546 chanp = csta->channel + ic->arg;
1547 if (chanp->debug & 1)
1548 link_debug(chanp, 1, "ACCEPTB");
1549 FsmEvent(&chanp->fi, EV_ACCEPTB, NULL);
1550 break;
1551 case (ISDN_CMD_ACCEPTD):
1552 chanp = csta->channel + ic->arg;
1553 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm));
1554 if (chanp->debug & 1)
1555 link_debug(chanp, 1, "ACCEPTD");
1556 FsmEvent(&chanp->fi, EV_ACCEPTD, NULL);
1557 break;
1558 case (ISDN_CMD_HANGUP):
1559 chanp = csta->channel + ic->arg;
1560 if (chanp->debug & 1)
1561 link_debug(chanp, 1, "HANGUP");
1562 FsmEvent(&chanp->fi, EV_HANGUP, NULL);
1563 break;
1564 case (CAPI_PUT_MESSAGE):
1565 chanp = csta->channel + ic->arg;
1566 if (chanp->debug & 1)
1567 capi_debug(chanp, &ic->parm.cmsg);
1568 if (ic->parm.cmsg.Length < 8)
1512 break; 1569 break;
1513 case (ISDN_CMD_SETL2): 1570 switch (ic->parm.cmsg.Command) {
1514 chanp = csta->channel + (ic->arg & 0xff); 1571 case CAPI_FACILITY:
1515 if (chanp->debug & 1) 1572 if (ic->parm.cmsg.Subcommand == CAPI_REQ)
1516 link_debug(chanp, 1, "SETL2 card %d %ld", 1573 lli_got_fac_req(chanp, &ic->parm.cmsg);
1517 csta->cardnr + 1, ic->arg >> 8);
1518 chanp->l2_protocol = ic->arg >> 8;
1519 break; 1574 break;
1520 case (ISDN_CMD_SETL3): 1575 case CAPI_MANUFACTURER:
1521 chanp = csta->channel + (ic->arg & 0xff); 1576 if (ic->parm.cmsg.Subcommand == CAPI_REQ)
1522 if (chanp->debug & 1) 1577 lli_got_manufacturer(chanp, csta, &ic->parm.cmsg);
1523 link_debug(chanp, 1, "SETL3 card %d %ld",
1524 csta->cardnr + 1, ic->arg >> 8);
1525 chanp->l3_protocol = ic->arg >> 8;
1526 break; 1578 break;
1527 case (ISDN_CMD_DIAL): 1579 default:
1528 chanp = csta->channel + (ic->arg & 0xff);
1529 if (chanp->debug & 1)
1530 link_debug(chanp, 1, "DIAL %s -> %s (%d,%d)",
1531 ic->parm.setup.eazmsn, ic->parm.setup.phone,
1532 ic->parm.setup.si1, ic->parm.setup.si2);
1533 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm));
1534 if (!strcmp(chanp->setup.eazmsn, "0"))
1535 chanp->setup.eazmsn[0] = '\0';
1536 /* this solution is dirty and may be change, if
1537 * we make a callreference based callmanager */
1538 if (chanp->fi.state == ST_NULL) {
1539 FsmEvent(&chanp->fi, EV_DIAL, NULL);
1540 } else {
1541 FsmDelTimer(&chanp->dial_timer, 70);
1542 FsmAddTimer(&chanp->dial_timer, 50, EV_DIAL, NULL, 71);
1543 }
1544 break; 1580 break;
1545 case (ISDN_CMD_ACCEPTB): 1581 }
1546 chanp = csta->channel + ic->arg; 1582 break;
1547 if (chanp->debug & 1) 1583 case (ISDN_CMD_IOCTL):
1548 link_debug(chanp, 1, "ACCEPTB"); 1584 switch (ic->arg) {
1549 FsmEvent(&chanp->fi, EV_ACCEPTB, NULL); 1585 case (0):
1586 num = *(unsigned int *) ic->parm.num;
1587 HiSax_reportcard(csta->cardnr, num);
1550 break; 1588 break;
1551 case (ISDN_CMD_ACCEPTD): 1589 case (1):
1552 chanp = csta->channel + ic->arg; 1590 num = *(unsigned int *) ic->parm.num;
1553 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm)); 1591 distr_debug(csta, num);
1554 if (chanp->debug & 1) 1592 printk(KERN_DEBUG "HiSax: debugging flags card %d set to %x\n",
1555 link_debug(chanp, 1, "ACCEPTD"); 1593 csta->cardnr + 1, num);
1556 FsmEvent(&chanp->fi, EV_ACCEPTD, NULL); 1594 HiSax_putstatus(csta, "debugging flags ",
1595 "card %d set to %x", csta->cardnr + 1, num);
1557 break; 1596 break;
1558 case (ISDN_CMD_HANGUP): 1597 case (2):
1559 chanp = csta->channel + ic->arg; 1598 num = *(unsigned int *) ic->parm.num;
1560 if (chanp->debug & 1) 1599 csta->channel[0].b_st->l1.delay = num;
1561 link_debug(chanp, 1, "HANGUP"); 1600 csta->channel[1].b_st->l1.delay = num;
1562 FsmEvent(&chanp->fi, EV_HANGUP, NULL); 1601 HiSax_putstatus(csta, "delay ", "card %d set to %d ms",
1602 csta->cardnr + 1, num);
1603 printk(KERN_DEBUG "HiSax: delay card %d set to %d ms\n",
1604 csta->cardnr + 1, num);
1563 break; 1605 break;
1564 case (CAPI_PUT_MESSAGE): 1606 case (5): /* set card in leased mode */
1565 chanp = csta->channel + ic->arg; 1607 num = *(unsigned int *) ic->parm.num;
1566 if (chanp->debug & 1) 1608 if ((num < 1) || (num > 2)) {
1567 capi_debug(chanp, &ic->parm.cmsg); 1609 HiSax_putstatus(csta, "Set LEASED ",
1568 if (ic->parm.cmsg.Length < 8) 1610 "wrong channel %d", num);
1569 break; 1611 printk(KERN_WARNING "HiSax: Set LEASED wrong channel %d\n",
1570 switch(ic->parm.cmsg.Command) { 1612 num);
1571 case CAPI_FACILITY: 1613 } else {
1572 if (ic->parm.cmsg.Subcommand == CAPI_REQ) 1614 num--;
1573 lli_got_fac_req(chanp, &ic->parm.cmsg); 1615 chanp = csta->channel + num;
1574 break; 1616 chanp->leased = 1;
1575 case CAPI_MANUFACTURER: 1617 HiSax_putstatus(csta, "Card",
1576 if (ic->parm.cmsg.Subcommand == CAPI_REQ) 1618 "%d channel %d set leased mode\n",
1577 lli_got_manufacturer(chanp, csta, &ic->parm.cmsg); 1619 csta->cardnr + 1, num + 1);
1578 break; 1620 chanp->d_st->l1.l1l2 = leased_l1l2;
1579 default: 1621 chanp->d_st->lli.l4l3 = leased_l4l3;
1580 break; 1622 chanp->d_st->lli.l4l3(chanp->d_st,
1623 DL_ESTABLISH | REQUEST, NULL);
1581 } 1624 }
1582 break; 1625 break;
1583 case (ISDN_CMD_IOCTL): 1626 case (6): /* set B-channel test loop */
1584 switch (ic->arg) { 1627 num = *(unsigned int *) ic->parm.num;
1585 case (0): 1628 if (csta->stlist)
1586 num = *(unsigned int *) ic->parm.num; 1629 csta->stlist->l2.l2l1(csta->stlist,
1587 HiSax_reportcard(csta->cardnr, num); 1630 PH_TESTLOOP | REQUEST, (void *) (long)num);
1588 break;
1589 case (1):
1590 num = *(unsigned int *) ic->parm.num;
1591 distr_debug(csta, num);
1592 printk(KERN_DEBUG "HiSax: debugging flags card %d set to %x\n",
1593 csta->cardnr + 1, num);
1594 HiSax_putstatus(csta, "debugging flags ",
1595 "card %d set to %x", csta->cardnr + 1, num);
1596 break;
1597 case (2):
1598 num = *(unsigned int *) ic->parm.num;
1599 csta->channel[0].b_st->l1.delay = num;
1600 csta->channel[1].b_st->l1.delay = num;
1601 HiSax_putstatus(csta, "delay ", "card %d set to %d ms",
1602 csta->cardnr + 1, num);
1603 printk(KERN_DEBUG "HiSax: delay card %d set to %d ms\n",
1604 csta->cardnr + 1, num);
1605 break;
1606 case (5): /* set card in leased mode */
1607 num = *(unsigned int *) ic->parm.num;
1608 if ((num <1) || (num > 2)) {
1609 HiSax_putstatus(csta, "Set LEASED ",
1610 "wrong channel %d", num);
1611 printk(KERN_WARNING "HiSax: Set LEASED wrong channel %d\n",
1612 num);
1613 } else {
1614 num--;
1615 chanp = csta->channel +num;
1616 chanp->leased = 1;
1617 HiSax_putstatus(csta, "Card",
1618 "%d channel %d set leased mode\n",
1619 csta->cardnr + 1, num + 1);
1620 chanp->d_st->l1.l1l2 = leased_l1l2;
1621 chanp->d_st->lli.l4l3 = leased_l4l3;
1622 chanp->d_st->lli.l4l3(chanp->d_st,
1623 DL_ESTABLISH | REQUEST, NULL);
1624 }
1625 break;
1626 case (6): /* set B-channel test loop */
1627 num = *(unsigned int *) ic->parm.num;
1628 if (csta->stlist)
1629 csta->stlist->l2.l2l1(csta->stlist,
1630 PH_TESTLOOP | REQUEST, (void *) (long)num);
1631 break;
1632 case (7): /* set card in PTP mode */
1633 num = *(unsigned int *) ic->parm.num;
1634 if (test_bit(FLG_TWO_DCHAN, &csta->HW_Flags)) {
1635 printk(KERN_ERR "HiSax PTP mode only with one TEI possible\n");
1636 } else if (num) {
1637 test_and_set_bit(FLG_PTP, &csta->channel[0].d_st->l2.flag);
1638 test_and_set_bit(FLG_FIXED_TEI, &csta->channel[0].d_st->l2.flag);
1639 csta->channel[0].d_st->l2.tei = 0;
1640 HiSax_putstatus(csta, "set card ", "in PTP mode");
1641 printk(KERN_DEBUG "HiSax: set card in PTP mode\n");
1642 printk(KERN_INFO "LAYER2 WATCHING ESTABLISH\n");
1643 csta->channel[0].d_st->lli.l4l3(csta->channel[0].d_st,
1644 DL_ESTABLISH | REQUEST, NULL);
1645 } else {
1646 test_and_clear_bit(FLG_PTP, &csta->channel[0].d_st->l2.flag);
1647 test_and_clear_bit(FLG_FIXED_TEI, &csta->channel[0].d_st->l2.flag);
1648 HiSax_putstatus(csta, "set card ", "in PTMP mode");
1649 printk(KERN_DEBUG "HiSax: set card in PTMP mode\n");
1650 }
1651 break;
1652 case (8): /* set card in FIXED TEI mode */
1653 num = *(unsigned int *) ic->parm.num;
1654 chanp = csta->channel + (num & 1);
1655 num = num >>1;
1656 if (num == 127) {
1657 test_and_clear_bit(FLG_FIXED_TEI, &chanp->d_st->l2.flag);
1658 chanp->d_st->l2.tei = -1;
1659 HiSax_putstatus(csta, "set card ", "in VAR TEI mode");
1660 printk(KERN_DEBUG "HiSax: set card in VAR TEI mode\n");
1661 } else {
1662 test_and_set_bit(FLG_FIXED_TEI, &chanp->d_st->l2.flag);
1663 chanp->d_st->l2.tei = num;
1664 HiSax_putstatus(csta, "set card ", "in FIXED TEI (%d) mode", num);
1665 printk(KERN_DEBUG "HiSax: set card in FIXED TEI (%d) mode\n",
1666 num);
1667 }
1668 chanp->d_st->lli.l4l3(chanp->d_st,
1669 DL_ESTABLISH | REQUEST, NULL);
1670 break;
1671 case (11):
1672 num = csta->debug & DEB_DLOG_HEX;
1673 csta->debug = *(unsigned int *) ic->parm.num;
1674 csta->debug |= num;
1675 HiSax_putstatus(cards[0].cs, "l1 debugging ",
1676 "flags card %d set to %x",
1677 csta->cardnr + 1, csta->debug);
1678 printk(KERN_DEBUG "HiSax: l1 debugging flags card %d set to %x\n",
1679 csta->cardnr + 1, csta->debug);
1680 break;
1681 case (13):
1682 csta->channel[0].d_st->l3.debug = *(unsigned int *) ic->parm.num;
1683 csta->channel[1].d_st->l3.debug = *(unsigned int *) ic->parm.num;
1684 HiSax_putstatus(cards[0].cs, "l3 debugging ",
1685 "flags card %d set to %x\n", csta->cardnr + 1,
1686 *(unsigned int *) ic->parm.num);
1687 printk(KERN_DEBUG "HiSax: l3 debugging flags card %d set to %x\n",
1688 csta->cardnr + 1, *(unsigned int *) ic->parm.num);
1689 break;
1690 case (10):
1691 i = *(unsigned int *) ic->parm.num;
1692 return(set_channel_limit(csta, i));
1693 default:
1694 if (csta->auxcmd)
1695 return(csta->auxcmd(csta, ic));
1696 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1697 (int) ic->arg);
1698 return (-EINVAL);
1699 }
1700 break; 1631 break;
1701 1632 case (7): /* set card in PTP mode */
1702 case (ISDN_CMD_PROCEED): 1633 num = *(unsigned int *) ic->parm.num;
1703 chanp = csta->channel + ic->arg; 1634 if (test_bit(FLG_TWO_DCHAN, &csta->HW_Flags)) {
1704 if (chanp->debug & 1) 1635 printk(KERN_ERR "HiSax PTP mode only with one TEI possible\n");
1705 link_debug(chanp, 1, "PROCEED"); 1636 } else if (num) {
1706 FsmEvent(&chanp->fi, EV_PROCEED, NULL); 1637 test_and_set_bit(FLG_PTP, &csta->channel[0].d_st->l2.flag);
1638 test_and_set_bit(FLG_FIXED_TEI, &csta->channel[0].d_st->l2.flag);
1639 csta->channel[0].d_st->l2.tei = 0;
1640 HiSax_putstatus(csta, "set card ", "in PTP mode");
1641 printk(KERN_DEBUG "HiSax: set card in PTP mode\n");
1642 printk(KERN_INFO "LAYER2 WATCHING ESTABLISH\n");
1643 csta->channel[0].d_st->lli.l4l3(csta->channel[0].d_st,
1644 DL_ESTABLISH | REQUEST, NULL);
1645 } else {
1646 test_and_clear_bit(FLG_PTP, &csta->channel[0].d_st->l2.flag);
1647 test_and_clear_bit(FLG_FIXED_TEI, &csta->channel[0].d_st->l2.flag);
1648 HiSax_putstatus(csta, "set card ", "in PTMP mode");
1649 printk(KERN_DEBUG "HiSax: set card in PTMP mode\n");
1650 }
1707 break; 1651 break;
1708 1652 case (8): /* set card in FIXED TEI mode */
1709 case (ISDN_CMD_ALERT): 1653 num = *(unsigned int *)ic->parm.num;
1710 chanp = csta->channel + ic->arg; 1654 chanp = csta->channel + (num & 1);
1711 if (chanp->debug & 1) 1655 num = num >> 1;
1712 link_debug(chanp, 1, "ALERT"); 1656 if (num == 127) {
1713 FsmEvent(&chanp->fi, EV_ALERT, NULL); 1657 test_and_clear_bit(FLG_FIXED_TEI, &chanp->d_st->l2.flag);
1658 chanp->d_st->l2.tei = -1;
1659 HiSax_putstatus(csta, "set card ", "in VAR TEI mode");
1660 printk(KERN_DEBUG "HiSax: set card in VAR TEI mode\n");
1661 } else {
1662 test_and_set_bit(FLG_FIXED_TEI, &chanp->d_st->l2.flag);
1663 chanp->d_st->l2.tei = num;
1664 HiSax_putstatus(csta, "set card ", "in FIXED TEI (%d) mode", num);
1665 printk(KERN_DEBUG "HiSax: set card in FIXED TEI (%d) mode\n",
1666 num);
1667 }
1668 chanp->d_st->lli.l4l3(chanp->d_st,
1669 DL_ESTABLISH | REQUEST, NULL);
1714 break; 1670 break;
1715 1671 case (11):
1716 case (ISDN_CMD_REDIR): 1672 num = csta->debug & DEB_DLOG_HEX;
1717 chanp = csta->channel + ic->arg; 1673 csta->debug = *(unsigned int *) ic->parm.num;
1718 if (chanp->debug & 1) 1674 csta->debug |= num;
1719 link_debug(chanp, 1, "REDIR"); 1675 HiSax_putstatus(cards[0].cs, "l1 debugging ",
1720 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm)); 1676 "flags card %d set to %x",
1721 FsmEvent(&chanp->fi, EV_REDIR, NULL); 1677 csta->cardnr + 1, csta->debug);
1678 printk(KERN_DEBUG "HiSax: l1 debugging flags card %d set to %x\n",
1679 csta->cardnr + 1, csta->debug);
1722 break; 1680 break;
1723 1681 case (13):
1724 /* protocol specific io commands */ 1682 csta->channel[0].d_st->l3.debug = *(unsigned int *) ic->parm.num;
1725 case (ISDN_CMD_PROT_IO): 1683 csta->channel[1].d_st->l3.debug = *(unsigned int *) ic->parm.num;
1726 for (st = csta->stlist; st; st = st->next) 1684 HiSax_putstatus(cards[0].cs, "l3 debugging ",
1727 if (st->protocol == (ic->arg & 0xFF)) 1685 "flags card %d set to %x\n", csta->cardnr + 1,
1728 return(st->lli.l4l3_proto(st, ic)); 1686 *(unsigned int *) ic->parm.num);
1729 return(-EINVAL); 1687 printk(KERN_DEBUG "HiSax: l3 debugging flags card %d set to %x\n",
1688 csta->cardnr + 1, *(unsigned int *) ic->parm.num);
1730 break; 1689 break;
1690 case (10):
1691 i = *(unsigned int *) ic->parm.num;
1692 return (set_channel_limit(csta, i));
1731 default: 1693 default:
1732 if (csta->auxcmd) 1694 if (csta->auxcmd)
1733 return(csta->auxcmd(csta, ic)); 1695 return (csta->auxcmd(csta, ic));
1734 return(-EINVAL); 1696 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1697 (int) ic->arg);
1698 return (-EINVAL);
1699 }
1700 break;
1701
1702 case (ISDN_CMD_PROCEED):
1703 chanp = csta->channel + ic->arg;
1704 if (chanp->debug & 1)
1705 link_debug(chanp, 1, "PROCEED");
1706 FsmEvent(&chanp->fi, EV_PROCEED, NULL);
1707 break;
1708
1709 case (ISDN_CMD_ALERT):
1710 chanp = csta->channel + ic->arg;
1711 if (chanp->debug & 1)
1712 link_debug(chanp, 1, "ALERT");
1713 FsmEvent(&chanp->fi, EV_ALERT, NULL);
1714 break;
1715
1716 case (ISDN_CMD_REDIR):
1717 chanp = csta->channel + ic->arg;
1718 if (chanp->debug & 1)
1719 link_debug(chanp, 1, "REDIR");
1720 memcpy(&chanp->setup, &ic->parm.setup, sizeof(setup_parm));
1721 FsmEvent(&chanp->fi, EV_REDIR, NULL);
1722 break;
1723
1724 /* protocol specific io commands */
1725 case (ISDN_CMD_PROT_IO):
1726 for (st = csta->stlist; st; st = st->next)
1727 if (st->protocol == (ic->arg & 0xFF))
1728 return (st->lli.l4l3_proto(st, ic));
1729 return (-EINVAL);
1730 break;
1731 default:
1732 if (csta->auxcmd)
1733 return (csta->auxcmd(csta, ic));
1734 return (-EINVAL);
1735 } 1735 }
1736 return (0); 1736 return (0);
1737} 1737}
@@ -1747,7 +1747,7 @@ HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb)
1747 1747
1748 if (!csta) { 1748 if (!csta) {
1749 printk(KERN_ERR 1749 printk(KERN_ERR
1750 "HiSax: if_sendbuf called with invalid driverId!\n"); 1750 "HiSax: if_sendbuf called with invalid driverId!\n");
1751 return -ENODEV; 1751 return -ENODEV;
1752 } 1752 }
1753 chanp = csta->channel + chan; 1753 chanp = csta->channel + chan;
@@ -1759,7 +1759,7 @@ HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb)
1759 if (len > MAX_DATA_SIZE) { 1759 if (len > MAX_DATA_SIZE) {
1760 link_debug(chanp, 1, "writebuf: packet too large (%d bytes)", len); 1760 link_debug(chanp, 1, "writebuf: packet too large (%d bytes)", len);
1761 printk(KERN_WARNING "HiSax_writebuf: packet too large (%d bytes) !\n", 1761 printk(KERN_WARNING "HiSax_writebuf: packet too large (%d bytes) !\n",
1762 len); 1762 len);
1763 return -EINVAL; 1763 return -EINVAL;
1764 } 1764 }
1765 if (len) { 1765 if (len) {
@@ -1771,7 +1771,7 @@ HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb)
1771 link_debug(chanp, 1, "writebuf: no buffers for %d bytes", len); 1771 link_debug(chanp, 1, "writebuf: no buffers for %d bytes", len);
1772 return 0; 1772 return 0;
1773 } else if (chanp->debug & 0x800) 1773 } else if (chanp->debug & 0x800)
1774 link_debug(chanp, 1, "writebuf %d/%d/%d", len, chanp->bcs->tx_cnt,MAX_DATA_MEM); 1774 link_debug(chanp, 1, "writebuf %d/%d/%d", len, chanp->bcs->tx_cnt, MAX_DATA_MEM);
1775 nskb = skb_clone(skb, GFP_ATOMIC); 1775 nskb = skb_clone(skb, GFP_ATOMIC);
1776 if (nskb) { 1776 if (nskb) {
1777 nskb->truesize = nskb->len; 1777 nskb->truesize = nskb->len;
diff --git a/drivers/isdn/hisax/config.c b/drivers/isdn/hisax/config.c
index c110f8679bab..b5edc0eeec06 100644
--- a/drivers/isdn/hisax/config.c
+++ b/drivers/isdn/hisax/config.c
@@ -3,7 +3,7 @@
3 * Author Karsten Keil 3 * Author Karsten Keil
4 * Copyright by Karsten Keil <keil@isdn4linux.de> 4 * Copyright by Karsten Keil <keil@isdn4linux.de>
5 * by Kai Germaschewski <kai.germaschewski@gmx.de> 5 * by Kai Germaschewski <kai.germaschewski@gmx.de>
6 * 6 *
7 * This software may be used and distributed according to the terms 7 * This software may be used and distributed according to the terms
8 * of the GNU General Public License, incorporated herein by reference. 8 * of the GNU General Public License, incorporated herein by reference.
9 * 9 *
@@ -61,8 +61,8 @@
61 * 24 Dr Neuhaus Niccy PnP/PCI card p0=irq p1=IO0 p2=IO1 (PnP only) 61 * 24 Dr Neuhaus Niccy PnP/PCI card p0=irq p1=IO0 p2=IO1 (PnP only)
62 * 25 Teles S0Box p0=irq p1=iobase (from isapnp setup) 62 * 25 Teles S0Box p0=irq p1=iobase (from isapnp setup)
63 * 26 AVM A1 PCMCIA (Fritz) p0=irq p1=iobase 63 * 26 AVM A1 PCMCIA (Fritz) p0=irq p1=iobase
64 * 27 AVM PnP/PCI p0=irq p1=iobase (PCI no parameter) 64 * 27 AVM PnP/PCI p0=irq p1=iobase (PCI no parameter)
65 * 28 Sedlbauer Speed Fax+ p0=irq p1=iobase (from isapnp setup) 65 * 28 Sedlbauer Speed Fax+ p0=irq p1=iobase (from isapnp setup)
66 * 29 Siemens I-Surf p0=irq p1=iobase p2=memory (from isapnp setup) 66 * 29 Siemens I-Surf p0=irq p1=iobase p2=memory (from isapnp setup)
67 * 30 ACER P10 p0=irq p1=iobase (from isapnp setup) 67 * 30 ACER P10 p0=irq p1=iobase (from isapnp setup)
68 * 31 HST Saphir p0=irq p1=iobase 68 * 31 HST Saphir p0=irq p1=iobase
@@ -88,200 +88,200 @@ const char *CardType[] = {
88 "Teles PCMCIA", "ITK ix1-micro Rev.2", "Elsa PCMCIA", 88 "Teles PCMCIA", "ITK ix1-micro Rev.2", "Elsa PCMCIA",
89 "Eicon.Diehl Diva", "ISDNLink", "TeleInt", "Teles 16.3c", 89 "Eicon.Diehl Diva", "ISDNLink", "TeleInt", "Teles 16.3c",
90 "Sedlbauer Speed Card", "USR Sportster", "ith mic Linux", 90 "Sedlbauer Speed Card", "USR Sportster", "ith mic Linux",
91 "Elsa PCI", "Compaq ISA", "NETjet-S", "Teles PCI", 91 "Elsa PCI", "Compaq ISA", "NETjet-S", "Teles PCI",
92 "Sedlbauer Speed Star (PCMCIA)", "AMD 7930", "NICCY", "S0Box", 92 "Sedlbauer Speed Star (PCMCIA)", "AMD 7930", "NICCY", "S0Box",
93 "AVM A1 (PCMCIA)", "AVM Fritz PnP/PCI", "Sedlbauer Speed Fax +", 93 "AVM A1 (PCMCIA)", "AVM Fritz PnP/PCI", "Sedlbauer Speed Fax +",
94 "Siemens I-Surf", "Acer P10", "HST Saphir", "Telekom A4T", 94 "Siemens I-Surf", "Acer P10", "HST Saphir", "Telekom A4T",
95 "Scitel Quadro", "Gazel", "HFC 2BDS0 PCI", "Winbond 6692", 95 "Scitel Quadro", "Gazel", "HFC 2BDS0 PCI", "Winbond 6692",
96 "HFC 2BDS0 SX", "NETspider-U", "HFC-2BDS0-SP PCMCIA", 96 "HFC 2BDS0 SX", "NETspider-U", "HFC-2BDS0-SP PCMCIA",
97 "Hotplug", "Formula-n enter:now PCI a/b", 97 "Hotplug", "Formula-n enter:now PCI a/b",
98}; 98};
99 99
100#ifdef CONFIG_HISAX_ELSA 100#ifdef CONFIG_HISAX_ELSA
101#define DEFAULT_CARD ISDN_CTYPE_ELSA 101#define DEFAULT_CARD ISDN_CTYPE_ELSA
102#define DEFAULT_CFG {0,0,0,0} 102#define DEFAULT_CFG {0, 0, 0, 0}
103#endif 103#endif
104 104
105#ifdef CONFIG_HISAX_AVM_A1 105#ifdef CONFIG_HISAX_AVM_A1
106#undef DEFAULT_CARD 106#undef DEFAULT_CARD
107#undef DEFAULT_CFG 107#undef DEFAULT_CFG
108#define DEFAULT_CARD ISDN_CTYPE_A1 108#define DEFAULT_CARD ISDN_CTYPE_A1
109#define DEFAULT_CFG {10,0x340,0,0} 109#define DEFAULT_CFG {10, 0x340, 0, 0}
110#endif 110#endif
111 111
112#ifdef CONFIG_HISAX_AVM_A1_PCMCIA 112#ifdef CONFIG_HISAX_AVM_A1_PCMCIA
113#undef DEFAULT_CARD 113#undef DEFAULT_CARD
114#undef DEFAULT_CFG 114#undef DEFAULT_CFG
115#define DEFAULT_CARD ISDN_CTYPE_A1_PCMCIA 115#define DEFAULT_CARD ISDN_CTYPE_A1_PCMCIA
116#define DEFAULT_CFG {11,0x170,0,0} 116#define DEFAULT_CFG {11, 0x170, 0, 0}
117#endif 117#endif
118 118
119#ifdef CONFIG_HISAX_FRITZPCI 119#ifdef CONFIG_HISAX_FRITZPCI
120#undef DEFAULT_CARD 120#undef DEFAULT_CARD
121#undef DEFAULT_CFG 121#undef DEFAULT_CFG
122#define DEFAULT_CARD ISDN_CTYPE_FRITZPCI 122#define DEFAULT_CARD ISDN_CTYPE_FRITZPCI
123#define DEFAULT_CFG {0,0,0,0} 123#define DEFAULT_CFG {0, 0, 0, 0}
124#endif 124#endif
125 125
126#ifdef CONFIG_HISAX_16_3 126#ifdef CONFIG_HISAX_16_3
127#undef DEFAULT_CARD 127#undef DEFAULT_CARD
128#undef DEFAULT_CFG 128#undef DEFAULT_CFG
129#define DEFAULT_CARD ISDN_CTYPE_16_3 129#define DEFAULT_CARD ISDN_CTYPE_16_3
130#define DEFAULT_CFG {15,0x180,0,0} 130#define DEFAULT_CFG {15, 0x180, 0, 0}
131#endif 131#endif
132 132
133#ifdef CONFIG_HISAX_S0BOX 133#ifdef CONFIG_HISAX_S0BOX
134#undef DEFAULT_CARD 134#undef DEFAULT_CARD
135#undef DEFAULT_CFG 135#undef DEFAULT_CFG
136#define DEFAULT_CARD ISDN_CTYPE_S0BOX 136#define DEFAULT_CARD ISDN_CTYPE_S0BOX
137#define DEFAULT_CFG {7,0x378,0,0} 137#define DEFAULT_CFG {7, 0x378, 0, 0}
138#endif 138#endif
139 139
140#ifdef CONFIG_HISAX_16_0 140#ifdef CONFIG_HISAX_16_0
141#undef DEFAULT_CARD 141#undef DEFAULT_CARD
142#undef DEFAULT_CFG 142#undef DEFAULT_CFG
143#define DEFAULT_CARD ISDN_CTYPE_16_0 143#define DEFAULT_CARD ISDN_CTYPE_16_0
144#define DEFAULT_CFG {15,0xd0000,0xd80,0} 144#define DEFAULT_CFG {15, 0xd0000, 0xd80, 0}
145#endif 145#endif
146 146
147#ifdef CONFIG_HISAX_TELESPCI 147#ifdef CONFIG_HISAX_TELESPCI
148#undef DEFAULT_CARD 148#undef DEFAULT_CARD
149#undef DEFAULT_CFG 149#undef DEFAULT_CFG
150#define DEFAULT_CARD ISDN_CTYPE_TELESPCI 150#define DEFAULT_CARD ISDN_CTYPE_TELESPCI
151#define DEFAULT_CFG {0,0,0,0} 151#define DEFAULT_CFG {0, 0, 0, 0}
152#endif 152#endif
153 153
154#ifdef CONFIG_HISAX_IX1MICROR2 154#ifdef CONFIG_HISAX_IX1MICROR2
155#undef DEFAULT_CARD 155#undef DEFAULT_CARD
156#undef DEFAULT_CFG 156#undef DEFAULT_CFG
157#define DEFAULT_CARD ISDN_CTYPE_IX1MICROR2 157#define DEFAULT_CARD ISDN_CTYPE_IX1MICROR2
158#define DEFAULT_CFG {5,0x390,0,0} 158#define DEFAULT_CFG {5, 0x390, 0, 0}
159#endif 159#endif
160 160
161#ifdef CONFIG_HISAX_DIEHLDIVA 161#ifdef CONFIG_HISAX_DIEHLDIVA
162#undef DEFAULT_CARD 162#undef DEFAULT_CARD
163#undef DEFAULT_CFG 163#undef DEFAULT_CFG
164#define DEFAULT_CARD ISDN_CTYPE_DIEHLDIVA 164#define DEFAULT_CARD ISDN_CTYPE_DIEHLDIVA
165#define DEFAULT_CFG {0,0x0,0,0} 165#define DEFAULT_CFG {0, 0x0, 0, 0}
166#endif 166#endif
167 167
168#ifdef CONFIG_HISAX_ASUSCOM 168#ifdef CONFIG_HISAX_ASUSCOM
169#undef DEFAULT_CARD 169#undef DEFAULT_CARD
170#undef DEFAULT_CFG 170#undef DEFAULT_CFG
171#define DEFAULT_CARD ISDN_CTYPE_ASUSCOM 171#define DEFAULT_CARD ISDN_CTYPE_ASUSCOM
172#define DEFAULT_CFG {5,0x200,0,0} 172#define DEFAULT_CFG {5, 0x200, 0, 0}
173#endif 173#endif
174 174
175#ifdef CONFIG_HISAX_TELEINT 175#ifdef CONFIG_HISAX_TELEINT
176#undef DEFAULT_CARD 176#undef DEFAULT_CARD
177#undef DEFAULT_CFG 177#undef DEFAULT_CFG
178#define DEFAULT_CARD ISDN_CTYPE_TELEINT 178#define DEFAULT_CARD ISDN_CTYPE_TELEINT
179#define DEFAULT_CFG {5,0x300,0,0} 179#define DEFAULT_CFG {5, 0x300, 0, 0}
180#endif 180#endif
181 181
182#ifdef CONFIG_HISAX_SEDLBAUER 182#ifdef CONFIG_HISAX_SEDLBAUER
183#undef DEFAULT_CARD 183#undef DEFAULT_CARD
184#undef DEFAULT_CFG 184#undef DEFAULT_CFG
185#define DEFAULT_CARD ISDN_CTYPE_SEDLBAUER 185#define DEFAULT_CARD ISDN_CTYPE_SEDLBAUER
186#define DEFAULT_CFG {11,0x270,0,0} 186#define DEFAULT_CFG {11, 0x270, 0, 0}
187#endif 187#endif
188 188
189#ifdef CONFIG_HISAX_SPORTSTER 189#ifdef CONFIG_HISAX_SPORTSTER
190#undef DEFAULT_CARD 190#undef DEFAULT_CARD
191#undef DEFAULT_CFG 191#undef DEFAULT_CFG
192#define DEFAULT_CARD ISDN_CTYPE_SPORTSTER 192#define DEFAULT_CARD ISDN_CTYPE_SPORTSTER
193#define DEFAULT_CFG {7,0x268,0,0} 193#define DEFAULT_CFG {7, 0x268, 0, 0}
194#endif 194#endif
195 195
196#ifdef CONFIG_HISAX_MIC 196#ifdef CONFIG_HISAX_MIC
197#undef DEFAULT_CARD 197#undef DEFAULT_CARD
198#undef DEFAULT_CFG 198#undef DEFAULT_CFG
199#define DEFAULT_CARD ISDN_CTYPE_MIC 199#define DEFAULT_CARD ISDN_CTYPE_MIC
200#define DEFAULT_CFG {12,0x3e0,0,0} 200#define DEFAULT_CFG {12, 0x3e0, 0, 0}
201#endif 201#endif
202 202
203#ifdef CONFIG_HISAX_NETJET 203#ifdef CONFIG_HISAX_NETJET
204#undef DEFAULT_CARD 204#undef DEFAULT_CARD
205#undef DEFAULT_CFG 205#undef DEFAULT_CFG
206#define DEFAULT_CARD ISDN_CTYPE_NETJET_S 206#define DEFAULT_CARD ISDN_CTYPE_NETJET_S
207#define DEFAULT_CFG {0,0,0,0} 207#define DEFAULT_CFG {0, 0, 0, 0}
208#endif 208#endif
209 209
210#ifdef CONFIG_HISAX_HFCS 210#ifdef CONFIG_HISAX_HFCS
211#undef DEFAULT_CARD 211#undef DEFAULT_CARD
212#undef DEFAULT_CFG 212#undef DEFAULT_CFG
213#define DEFAULT_CARD ISDN_CTYPE_TELES3C 213#define DEFAULT_CARD ISDN_CTYPE_TELES3C
214#define DEFAULT_CFG {5,0x500,0,0} 214#define DEFAULT_CFG {5, 0x500, 0, 0}
215#endif 215#endif
216 216
217#ifdef CONFIG_HISAX_HFC_PCI 217#ifdef CONFIG_HISAX_HFC_PCI
218#undef DEFAULT_CARD 218#undef DEFAULT_CARD
219#undef DEFAULT_CFG 219#undef DEFAULT_CFG
220#define DEFAULT_CARD ISDN_CTYPE_HFC_PCI 220#define DEFAULT_CARD ISDN_CTYPE_HFC_PCI
221#define DEFAULT_CFG {0,0,0,0} 221#define DEFAULT_CFG {0, 0, 0, 0}
222#endif 222#endif
223 223
224#ifdef CONFIG_HISAX_HFC_SX 224#ifdef CONFIG_HISAX_HFC_SX
225#undef DEFAULT_CARD 225#undef DEFAULT_CARD
226#undef DEFAULT_CFG 226#undef DEFAULT_CFG
227#define DEFAULT_CARD ISDN_CTYPE_HFC_SX 227#define DEFAULT_CARD ISDN_CTYPE_HFC_SX
228#define DEFAULT_CFG {5,0x2E0,0,0} 228#define DEFAULT_CFG {5, 0x2E0, 0, 0}
229#endif 229#endif
230 230
231#ifdef CONFIG_HISAX_NICCY 231#ifdef CONFIG_HISAX_NICCY
232#undef DEFAULT_CARD 232#undef DEFAULT_CARD
233#undef DEFAULT_CFG 233#undef DEFAULT_CFG
234#define DEFAULT_CARD ISDN_CTYPE_NICCY 234#define DEFAULT_CARD ISDN_CTYPE_NICCY
235#define DEFAULT_CFG {0,0x0,0,0} 235#define DEFAULT_CFG {0, 0x0, 0, 0}
236#endif 236#endif
237 237
238#ifdef CONFIG_HISAX_ISURF 238#ifdef CONFIG_HISAX_ISURF
239#undef DEFAULT_CARD 239#undef DEFAULT_CARD
240#undef DEFAULT_CFG 240#undef DEFAULT_CFG
241#define DEFAULT_CARD ISDN_CTYPE_ISURF 241#define DEFAULT_CARD ISDN_CTYPE_ISURF
242#define DEFAULT_CFG {5,0x100,0xc8000,0} 242#define DEFAULT_CFG {5, 0x100, 0xc8000, 0}
243#endif 243#endif
244 244
245#ifdef CONFIG_HISAX_HSTSAPHIR 245#ifdef CONFIG_HISAX_HSTSAPHIR
246#undef DEFAULT_CARD 246#undef DEFAULT_CARD
247#undef DEFAULT_CFG 247#undef DEFAULT_CFG
248#define DEFAULT_CARD ISDN_CTYPE_HSTSAPHIR 248#define DEFAULT_CARD ISDN_CTYPE_HSTSAPHIR
249#define DEFAULT_CFG {5,0x250,0,0} 249#define DEFAULT_CFG {5, 0x250, 0, 0}
250#endif 250#endif
251 251
252#ifdef CONFIG_HISAX_BKM_A4T 252#ifdef CONFIG_HISAX_BKM_A4T
253#undef DEFAULT_CARD 253#undef DEFAULT_CARD
254#undef DEFAULT_CFG 254#undef DEFAULT_CFG
255#define DEFAULT_CARD ISDN_CTYPE_BKM_A4T 255#define DEFAULT_CARD ISDN_CTYPE_BKM_A4T
256#define DEFAULT_CFG {0,0x0,0,0} 256#define DEFAULT_CFG {0, 0x0, 0, 0}
257#endif 257#endif
258 258
259#ifdef CONFIG_HISAX_SCT_QUADRO 259#ifdef CONFIG_HISAX_SCT_QUADRO
260#undef DEFAULT_CARD 260#undef DEFAULT_CARD
261#undef DEFAULT_CFG 261#undef DEFAULT_CFG
262#define DEFAULT_CARD ISDN_CTYPE_SCT_QUADRO 262#define DEFAULT_CARD ISDN_CTYPE_SCT_QUADRO
263#define DEFAULT_CFG {1,0x0,0,0} 263#define DEFAULT_CFG {1, 0x0, 0, 0}
264#endif 264#endif
265 265
266#ifdef CONFIG_HISAX_GAZEL 266#ifdef CONFIG_HISAX_GAZEL
267#undef DEFAULT_CARD 267#undef DEFAULT_CARD
268#undef DEFAULT_CFG 268#undef DEFAULT_CFG
269#define DEFAULT_CARD ISDN_CTYPE_GAZEL 269#define DEFAULT_CARD ISDN_CTYPE_GAZEL
270#define DEFAULT_CFG {15,0x180,0,0} 270#define DEFAULT_CFG {15, 0x180, 0, 0}
271#endif 271#endif
272 272
273#ifdef CONFIG_HISAX_W6692 273#ifdef CONFIG_HISAX_W6692
274#undef DEFAULT_CARD 274#undef DEFAULT_CARD
275#undef DEFAULT_CFG 275#undef DEFAULT_CFG
276#define DEFAULT_CARD ISDN_CTYPE_W6692 276#define DEFAULT_CARD ISDN_CTYPE_W6692
277#define DEFAULT_CFG {0,0,0,0} 277#define DEFAULT_CFG {0, 0, 0, 0}
278#endif 278#endif
279 279
280#ifdef CONFIG_HISAX_NETJET_U 280#ifdef CONFIG_HISAX_NETJET_U
281#undef DEFAULT_CARD 281#undef DEFAULT_CARD
282#undef DEFAULT_CFG 282#undef DEFAULT_CFG
283#define DEFAULT_CARD ISDN_CTYPE_NETJET_U 283#define DEFAULT_CARD ISDN_CTYPE_NETJET_U
284#define DEFAULT_CFG {0,0,0,0} 284#define DEFAULT_CFG {0, 0, 0, 0}
285#endif 285#endif
286 286
287#ifdef CONFIG_HISAX_1TR6 287#ifdef CONFIG_HISAX_1TR6
@@ -306,21 +306,21 @@ const char *CardType[] = {
306#endif 306#endif
307#ifndef DEFAULT_CARD 307#ifndef DEFAULT_CARD
308#define DEFAULT_CARD 0 308#define DEFAULT_CARD 0
309#define DEFAULT_CFG {0,0,0,0} 309#define DEFAULT_CFG {0, 0, 0, 0}
310#endif 310#endif
311 311
312#define FIRST_CARD { \ 312#define FIRST_CARD { \
313 DEFAULT_CARD, \ 313 DEFAULT_CARD, \
314 DEFAULT_PROTO, \ 314 DEFAULT_PROTO, \
315 DEFAULT_CFG, \ 315 DEFAULT_CFG, \
316 NULL, \ 316 NULL, \
317} 317 }
318 318
319struct IsdnCard cards[HISAX_MAX_CARDS] = { 319struct IsdnCard cards[HISAX_MAX_CARDS] = {
320 FIRST_CARD, 320 FIRST_CARD,
321}; 321};
322 322
323#define HISAX_IDSIZE (HISAX_MAX_CARDS*8) 323#define HISAX_IDSIZE (HISAX_MAX_CARDS * 8)
324static char HiSaxID[HISAX_IDSIZE] = { 0, }; 324static char HiSaxID[HISAX_IDSIZE] = { 0, };
325 325
326static char *HiSax_id = HiSaxID; 326static char *HiSax_id = HiSaxID;
@@ -400,7 +400,7 @@ static void __init HiSaxVersion(void)
400} 400}
401 401
402#ifndef MODULE 402#ifndef MODULE
403#define MAX_ARG (HISAX_MAX_CARDS*5) 403#define MAX_ARG (HISAX_MAX_CARDS * 5)
404static int __init HiSax_setup(char *line) 404static int __init HiSax_setup(char *line)
405{ 405{
406 int i, j, argc; 406 int i, j, argc;
@@ -441,7 +441,7 @@ static int __init HiSax_setup(char *line)
441 } 441 }
442 i++; 442 i++;
443 } 443 }
444 if (str && *str) { 444 if (str && *str) {
445 if (strlen(str) < HISAX_IDSIZE) 445 if (strlen(str) < HISAX_IDSIZE)
446 strcpy(HiSaxID, str); 446 strcpy(HiSaxID, str);
447 else 447 else
@@ -813,11 +813,11 @@ static irqreturn_t card_irq(int intno, void *dev_id)
813 813
814static int init_card(struct IsdnCardState *cs) 814static int init_card(struct IsdnCardState *cs)
815{ 815{
816 int irq_cnt, cnt = 3, ret; 816 int irq_cnt, cnt = 3, ret;
817 817
818 if (!cs->irq) { 818 if (!cs->irq) {
819 ret = cs->cardmsg(cs, CARD_INIT, NULL); 819 ret = cs->cardmsg(cs, CARD_INIT, NULL);
820 return(ret); 820 return (ret);
821 } 821 }
822 irq_cnt = cs->irq_cnt = 0; 822 irq_cnt = cs->irq_cnt = 0;
823 printk(KERN_INFO "%s: IRQ %d count %d\n", CardType[cs->typ], 823 printk(KERN_INFO "%s: IRQ %d count %d\n", CardType[cs->typ],
@@ -1142,12 +1142,12 @@ static int hisax_cs_setup(int cardnr, struct IsdnCard *card,
1142 /* init_card only handles interrupts which are not */ 1142 /* init_card only handles interrupts which are not */
1143 /* used here for the loadable driver */ 1143 /* used here for the loadable driver */
1144 switch (card->typ) { 1144 switch (card->typ) {
1145 case ISDN_CTYPE_DYNAMIC: 1145 case ISDN_CTYPE_DYNAMIC:
1146 ret = 0; 1146 ret = 0;
1147 break; 1147 break;
1148 default: 1148 default:
1149 ret = init_card(cs); 1149 ret = init_card(cs);
1150 break; 1150 break;
1151 } 1151 }
1152 if (ret) { 1152 if (ret) {
1153 closecard(cardnr); 1153 closecard(cardnr);
@@ -1203,10 +1203,10 @@ static int __ref checkcard(int cardnr, char *id, int *busy_flag,
1203 ret = hisax_cs_setup(cardnr, card, cs); 1203 ret = hisax_cs_setup(cardnr, card, cs);
1204 goto out; 1204 goto out;
1205 1205
1206 outf_cs: 1206outf_cs:
1207 kfree(cs); 1207 kfree(cs);
1208 card->cs = NULL; 1208 card->cs = NULL;
1209 out: 1209out:
1210 return ret; 1210 return ret;
1211} 1211}
1212 1212
@@ -1256,8 +1256,8 @@ static int __init HiSax_inithardware(int *busy_flag)
1256 /* make sure we don't oops the module */ 1256 /* make sure we don't oops the module */
1257 if (cards[i].typ > 0 && cards[i].typ <= ISDN_CTYPE_COUNT) { 1257 if (cards[i].typ > 0 && cards[i].typ <= ISDN_CTYPE_COUNT) {
1258 printk(KERN_WARNING 1258 printk(KERN_WARNING
1259 "HiSax: Card %s not installed !\n", 1259 "HiSax: Card %s not installed !\n",
1260 CardType[cards[i].typ]); 1260 CardType[cards[i].typ]);
1261 } 1261 }
1262 HiSax_shiftcards(i); 1262 HiSax_shiftcards(i);
1263 nrcards--; 1263 nrcards--;
@@ -1521,15 +1521,15 @@ static int __init HiSax_init(void)
1521 return -ENODEV; 1521 return -ENODEV;
1522 return 0; 1522 return 0;
1523 1523
1524 out_tei: 1524out_tei:
1525 TeiFree(); 1525 TeiFree();
1526 out_isdnl2: 1526out_isdnl2:
1527 Isdnl2Free(); 1527 Isdnl2Free();
1528 out_isdnl3: 1528out_isdnl3:
1529 Isdnl3Free(); 1529 Isdnl3Free();
1530 out_callc: 1530out_callc:
1531 CallcFree(); 1531 CallcFree();
1532 out: 1532out:
1533 return retval; 1533 return retval;
1534} 1534}
1535 1535
@@ -1614,7 +1614,7 @@ int hisax_register(struct hisax_d_if *hisax_d_if, struct hisax_b_if *b_if[],
1614 sprintf(id, "%s%d", name, i); 1614 sprintf(id, "%s%d", name, i);
1615 nrcards++; 1615 nrcards++;
1616 retval = checkcard(i, id, NULL, hisax_d_if->owner, 1616 retval = checkcard(i, id, NULL, hisax_d_if->owner,
1617 hisax_setup_card_dynamic); 1617 hisax_setup_card_dynamic);
1618 if (retval == 0) { // yuck 1618 if (retval == 0) { // yuck
1619 cards[i].typ = 0; 1619 cards[i].typ = 0;
1620 nrcards--; 1620 nrcards--;
@@ -1637,7 +1637,7 @@ int hisax_register(struct hisax_d_if *hisax_d_if, struct hisax_b_if *b_if[],
1637 hisax_d_if->ifc.l1l2 = hisax_d_l1l2; 1637 hisax_d_if->ifc.l1l2 = hisax_d_l1l2;
1638 skb_queue_head_init(&hisax_d_if->erq); 1638 skb_queue_head_init(&hisax_d_if->erq);
1639 clear_bit(0, &hisax_d_if->ph_state); 1639 clear_bit(0, &hisax_d_if->ph_state);
1640 1640
1641 return 0; 1641 return 0;
1642} 1642}
1643 1643
@@ -1674,7 +1674,7 @@ static void hisax_bh(struct work_struct *work)
1674 pr = PH_DEACTIVATE | INDICATION; 1674 pr = PH_DEACTIVATE | INDICATION;
1675 for (st = cs->stlist; st; st = st->next) 1675 for (st = cs->stlist; st; st = st->next)
1676 st->l1.l1l2(st, pr, NULL); 1676 st->l1.l1l2(st, pr, NULL);
1677 1677
1678 } 1678 }
1679} 1679}
1680 1680
@@ -1764,7 +1764,7 @@ static void hisax_b_l1l2(struct hisax_if *ifc, int pr, void *arg)
1764 break; 1764 break;
1765 case PH_DATA | CONFIRM: 1765 case PH_DATA | CONFIRM:
1766 bcs->tx_cnt -= (long)arg; 1766 bcs->tx_cnt -= (long)arg;
1767 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag)) { 1767 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag)) {
1768 u_long flags; 1768 u_long flags;
1769 spin_lock_irqsave(&bcs->aclock, flags); 1769 spin_lock_irqsave(&bcs->aclock, flags);
1770 bcs->ackcnt += (long)arg; 1770 bcs->ackcnt += (long)arg;
diff --git a/drivers/isdn/hisax/diva.c b/drivers/isdn/hisax/diva.c
index 780da9bda915..62a2945fa7f2 100644
--- a/drivers/isdn/hisax/diva.c
+++ b/drivers/isdn/hisax/diva.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -27,7 +27,7 @@
27 27
28static const char *Diva_revision = "$Revision: 1.33.2.6 $"; 28static const char *Diva_revision = "$Revision: 1.33.2.6 $";
29 29
30#define byteout(addr,val) outb(val,addr) 30#define byteout(addr, val) outb(val, addr)
31#define bytein(addr) inb(addr) 31#define bytein(addr) inb(addr)
32 32
33#define DIVA_HSCX_DATA 0 33#define DIVA_HSCX_DATA 0
@@ -89,7 +89,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
89} 89}
90 90
91static inline void 91static inline void
92readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 92readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
93{ 93{
94 byteout(ale, off); 94 byteout(ale, off);
95 insb(adr, data, size); 95 insb(adr, data, size);
@@ -113,15 +113,15 @@ writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size
113static inline u_char 113static inline u_char
114memreadreg(unsigned long adr, u_char off) 114memreadreg(unsigned long adr, u_char off)
115{ 115{
116 return(*((unsigned char *) 116 return (*((unsigned char *)
117 (((unsigned int *)adr) + off))); 117 (((unsigned int *)adr) + off)));
118} 118}
119 119
120static inline void 120static inline void
121memwritereg(unsigned long adr, u_char off, u_char data) 121memwritereg(unsigned long adr, u_char off, u_char data)
122{ 122{
123 register u_char *p; 123 register u_char *p;
124 124
125 p = (unsigned char *)(((unsigned int *)adr) + off); 125 p = (unsigned char *)(((unsigned int *)adr) + off);
126 *p = data; 126 *p = data;
127} 127}
@@ -131,7 +131,7 @@ memwritereg(unsigned long adr, u_char off, u_char data)
131static u_char 131static u_char
132ReadISAC(struct IsdnCardState *cs, u_char offset) 132ReadISAC(struct IsdnCardState *cs, u_char offset)
133{ 133{
134 return(readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset)); 134 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset));
135} 135}
136 136
137static void 137static void
@@ -155,23 +155,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
155static u_char 155static u_char
156ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) 156ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
157{ 157{
158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset+0x80)); 158 return (readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset + 0x80));
159} 159}
160 160
161static void 161static void
162WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) 162WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
163{ 163{
164 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset|0x80, value); 164 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, offset | 0x80, value);
165} 165}
166 166
167static void 167static void
168ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 168ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
169{ 169{
170 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); 170 readfifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
171} 171}
172 172
173static void 173static void
174WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 174WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
175{ 175{
176 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size); 176 writefifo(cs->hw.diva.isac_adr, cs->hw.diva.isac, 0x80, data, size);
177} 177}
@@ -179,47 +179,47 @@ WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size)
179static u_char 179static u_char
180ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) 180ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
181{ 181{
182 return(readreg(cs->hw.diva.hscx_adr, 182 return (readreg(cs->hw.diva.hscx_adr,
183 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0))); 183 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0)));
184} 184}
185 185
186static void 186static void
187WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) 187WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
188{ 188{
189 writereg(cs->hw.diva.hscx_adr, 189 writereg(cs->hw.diva.hscx_adr,
190 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value); 190 cs->hw.diva.hscx, offset + (hscx ? 0x40 : 0), value);
191} 191}
192 192
193static u_char 193static u_char
194MemReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) 194MemReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
195{ 195{
196 return (memreadreg(cs->hw.diva.cfg_reg, offset+0x80)); 196 return (memreadreg(cs->hw.diva.cfg_reg, offset + 0x80));
197} 197}
198 198
199static void 199static void
200MemWriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) 200MemWriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
201{ 201{
202 memwritereg(cs->hw.diva.cfg_reg, offset|0x80, value); 202 memwritereg(cs->hw.diva.cfg_reg, offset | 0x80, value);
203} 203}
204 204
205static void 205static void
206MemReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 206MemReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
207{ 207{
208 while(size--) 208 while (size--)
209 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80); 209 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0x80);
210} 210}
211 211
212static void 212static void
213MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 213MemWriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
214{ 214{
215 while(size--) 215 while (size--)
216 memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++); 216 memwritereg(cs->hw.diva.cfg_reg, 0x80, *data++);
217} 217}
218 218
219static u_char 219static u_char
220MemReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) 220MemReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
221{ 221{
222 return(memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0))); 222 return (memreadreg(cs->hw.diva.cfg_reg, offset + (hscx ? 0x40 : 0)));
223} 223}
224 224
225static void 225static void
@@ -242,47 +242,47 @@ MemWriteISAC_IPACX(struct IsdnCardState *cs, u_char offset, u_char value)
242} 242}
243 243
244static void 244static void
245MemReadISACfifo_IPACX(struct IsdnCardState *cs, u_char * data, int size) 245MemReadISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size)
246{ 246{
247 while(size--) 247 while (size--)
248 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0); 248 *data++ = memreadreg(cs->hw.diva.cfg_reg, 0);
249} 249}
250 250
251static void 251static void
252MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u_char * data, int size) 252MemWriteISACfifo_IPACX(struct IsdnCardState *cs, u_char *data, int size)
253{ 253{
254 while(size--) 254 while (size--)
255 memwritereg(cs->hw.diva.cfg_reg, 0, *data++); 255 memwritereg(cs->hw.diva.cfg_reg, 0, *data++);
256} 256}
257 257
258static u_char 258static u_char
259MemReadHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset) 259MemReadHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset)
260{ 260{
261 return(memreadreg(cs->hw.diva.cfg_reg, offset + 261 return (memreadreg(cs->hw.diva.cfg_reg, offset +
262 (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1))); 262 (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1)));
263} 263}
264 264
265static void 265static void
266MemWriteHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) 266MemWriteHSCX_IPACX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
267{ 267{
268 memwritereg(cs->hw.diva.cfg_reg, offset + 268 memwritereg(cs->hw.diva.cfg_reg, offset +
269 (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value); 269 (hscx ? IPACX_OFF_B2 : IPACX_OFF_B1), value);
270} 270}
271 271
272/* 272/*
273 * fast interrupt HSCX stuff goes here 273 * fast interrupt HSCX stuff goes here
274 */ 274 */
275 275
276#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \ 276#define READHSCX(cs, nr, reg) readreg(cs->hw.diva.hscx_adr, \
277 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0)) 277 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0))
278#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \ 278#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.diva.hscx_adr, \
279 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data) 279 cs->hw.diva.hscx, reg + (nr ? 0x40 : 0), data)
280 280
281#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \ 281#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.diva.hscx_adr, \
282 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt) 282 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
283 283
284#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \ 284#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.diva.hscx_adr, \
285 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt) 285 cs->hw.diva.hscx, (nr ? 0x40 : 0), ptr, cnt)
286 286
287#include "hscx_irq.c" 287#include "hscx_irq.c"
288 288
@@ -292,7 +292,7 @@ diva_interrupt(int intno, void *dev_id)
292 struct IsdnCardState *cs = dev_id; 292 struct IsdnCardState *cs = dev_id;
293 u_char val, sval; 293 u_char val, sval;
294 u_long flags; 294 u_long flags;
295 int cnt=5; 295 int cnt = 5;
296 296
297 spin_lock_irqsave(&cs->lock, flags); 297 spin_lock_irqsave(&cs->lock, flags);
298 while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) { 298 while (((sval = bytein(cs->hw.diva.ctrl)) & DIVA_IRQ_REQ) && cnt) {
@@ -320,9 +320,9 @@ static irqreturn_t
320diva_irq_ipac_isa(int intno, void *dev_id) 320diva_irq_ipac_isa(int intno, void *dev_id)
321{ 321{
322 struct IsdnCardState *cs = dev_id; 322 struct IsdnCardState *cs = dev_id;
323 u_char ista,val; 323 u_char ista, val;
324 u_long flags; 324 u_long flags;
325 int icnt=5; 325 int icnt = 5;
326 326
327 spin_lock_irqsave(&cs->lock, flags); 327 spin_lock_irqsave(&cs->lock, flags);
328 ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA); 328 ista = readreg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_ISTA);
@@ -436,8 +436,8 @@ Memhscx_fill_fifo(struct BCState *bcs)
436{ 436{
437 struct IsdnCardState *cs = bcs->cs; 437 struct IsdnCardState *cs = bcs->cs;
438 int more, count, cnt; 438 int more, count, cnt;
439 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32; 439 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
440 u_char *ptr,*p; 440 u_char *ptr, *p;
441 441
442 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 442 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
443 debugl1(cs, "hscx_fill_fifo"); 443 debugl1(cs, "hscx_fill_fifo");
@@ -459,9 +459,9 @@ Memhscx_fill_fifo(struct BCState *bcs)
459 skb_pull(bcs->tx_skb, count); 459 skb_pull(bcs->tx_skb, count);
460 bcs->tx_cnt -= count; 460 bcs->tx_cnt -= count;
461 bcs->hw.hscx.count += count; 461 bcs->hw.hscx.count += count;
462 while(cnt--) 462 while (cnt--)
463 memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0, 463 memwritereg(cs->hw.diva.cfg_reg, bcs->hw.hscx.hscx ? 0x40 : 0,
464 *p++); 464 *p++);
465 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa); 465 MemWriteHSCXCMDR(cs, bcs->hw.hscx.hscx, more ? 0x8 : 0xa);
466 if (cs->debug & L1_DEB_HSCX_FIFO) { 466 if (cs->debug & L1_DEB_HSCX_FIFO) {
467 char *t = bcs->blog; 467 char *t = bcs->blog;
@@ -479,7 +479,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
479 u_char r; 479 u_char r;
480 struct BCState *bcs = cs->bcs + hscx; 480 struct BCState *bcs = cs->bcs + hscx;
481 struct sk_buff *skb; 481 struct sk_buff *skb;
482 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32; 482 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
483 int count; 483 int count;
484 484
485 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) 485 if (!test_bit(BC_FLG_INIT, &bcs->Flag))
@@ -501,7 +501,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
501 MemWriteHSCXCMDR(cs, hscx, 0x80); 501 MemWriteHSCXCMDR(cs, hscx, 0x80);
502 } else { 502 } else {
503 count = MemReadHSCX(cs, hscx, HSCX_RBCL) & ( 503 count = MemReadHSCX(cs, hscx, HSCX_RBCL) & (
504 test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f); 504 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x3f : 0x1f);
505 if (count == 0) 505 if (count == 0)
506 count = fifo_size; 506 count = fifo_size;
507 Memhscx_empty_fifo(bcs, count); 507 Memhscx_empty_fifo(bcs, count);
@@ -539,8 +539,8 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
539 Memhscx_fill_fifo(bcs); 539 Memhscx_fill_fifo(bcs);
540 return; 540 return;
541 } else { 541 } else {
542 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 542 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
543 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 543 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
544 u_long flags; 544 u_long flags;
545 spin_lock_irqsave(&bcs->aclock, flags); 545 spin_lock_irqsave(&bcs->aclock, flags);
546 bcs->ackcnt += bcs->hw.hscx.count; 546 bcs->ackcnt += bcs->hw.hscx.count;
@@ -548,7 +548,7 @@ Memhscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
548 schedule_event(bcs, B_ACKPENDING); 548 schedule_event(bcs, B_ACKPENDING);
549 } 549 }
550 dev_kfree_skb_irq(bcs->tx_skb); 550 dev_kfree_skb_irq(bcs->tx_skb);
551 bcs->hw.hscx.count = 0; 551 bcs->hw.hscx.count = 0;
552 bcs->tx_skb = NULL; 552 bcs->tx_skb = NULL;
553 } 553 }
554 } 554 }
@@ -578,7 +578,7 @@ Memhscx_int_main(struct IsdnCardState *cs, u_char val)
578 Memhscx_fill_fifo(bcs); 578 Memhscx_fill_fifo(bcs);
579 else { 579 else {
580 /* Here we lost an TX interrupt, so 580 /* Here we lost an TX interrupt, so
581 * restart transmitting the whole frame. 581 * restart transmitting the whole frame.
582 */ 582 */
583 if (bcs->tx_skb) { 583 if (bcs->tx_skb) {
584 skb_push(bcs->tx_skb, bcs->hw.hscx.count); 584 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -605,7 +605,7 @@ Memhscx_int_main(struct IsdnCardState *cs, u_char val)
605 Memhscx_fill_fifo(bcs); 605 Memhscx_fill_fifo(bcs);
606 else { 606 else {
607 /* Here we lost an TX interrupt, so 607 /* Here we lost an TX interrupt, so
608 * restart transmitting the whole frame. 608 * restart transmitting the whole frame.
609 */ 609 */
610 if (bcs->tx_skb) { 610 if (bcs->tx_skb) {
611 skb_push(bcs->tx_skb, bcs->hw.hscx.count); 611 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -631,8 +631,8 @@ static irqreturn_t
631diva_irq_ipac_pci(int intno, void *dev_id) 631diva_irq_ipac_pci(int intno, void *dev_id)
632{ 632{
633 struct IsdnCardState *cs = dev_id; 633 struct IsdnCardState *cs = dev_id;
634 u_char ista,val; 634 u_char ista, val;
635 int icnt=5; 635 int icnt = 5;
636 u_char *cfg; 636 u_char *cfg;
637 u_long flags; 637 u_long flags;
638 638
@@ -693,11 +693,11 @@ diva_irq_ipacx_pci(int intno, void *dev_id)
693 spin_lock_irqsave(&cs->lock, flags); 693 spin_lock_irqsave(&cs->lock, flags);
694 cfg = (u_char *) cs->hw.diva.pci_cfg; 694 cfg = (u_char *) cs->hw.diva.pci_cfg;
695 val = *cfg; 695 val = *cfg;
696 if (!(val &PITA_INT0_STATUS)) { 696 if (!(val & PITA_INT0_STATUS)) {
697 spin_unlock_irqrestore(&cs->lock, flags); 697 spin_unlock_irqrestore(&cs->lock, flags);
698 return IRQ_NONE; // other shared IRQ 698 return IRQ_NONE; // other shared IRQ
699 } 699 }
700 interrupt_ipacx(cs); // handler for chip 700 interrupt_ipacx(cs); // handler for chip
701 *cfg = PITA_INT0_STATUS; // Reset PLX interrupt 701 *cfg = PITA_INT0_STATUS; // Reset PLX interrupt
702 spin_unlock_irqrestore(&cs->lock, flags); 702 spin_unlock_irqrestore(&cs->lock, flags);
703 return IRQ_HANDLED; 703 return IRQ_HANDLED;
@@ -708,11 +708,11 @@ release_io_diva(struct IsdnCardState *cs)
708{ 708{
709 int bytecnt; 709 int bytecnt;
710 710
711 if ((cs->subtyp == DIVA_IPAC_PCI) || 711 if ((cs->subtyp == DIVA_IPAC_PCI) ||
712 (cs->subtyp == DIVA_IPACX_PCI) ) { 712 (cs->subtyp == DIVA_IPACX_PCI)) {
713 u_int *cfg = (unsigned int *)cs->hw.diva.pci_cfg; 713 u_int *cfg = (unsigned int *)cs->hw.diva.pci_cfg;
714 714
715 *cfg = 0; /* disable INT0/1 */ 715 *cfg = 0; /* disable INT0/1 */
716 *cfg = 2; /* reset pending INT0 */ 716 *cfg = 2; /* reset pending INT0 */
717 if (cs->hw.diva.cfg_reg) 717 if (cs->hw.diva.cfg_reg)
718 iounmap((void *)cs->hw.diva.cfg_reg); 718 iounmap((void *)cs->hw.diva.cfg_reg);
@@ -761,7 +761,7 @@ reset_diva(struct IsdnCardState *cs)
761 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0); 761 writereg(cs->hw.diva.isac_adr, cs->hw.diva.isac, IPAC_MASK, 0xc0);
762 } else if (cs->subtyp == DIVA_IPAC_PCI) { 762 } else if (cs->subtyp == DIVA_IPAC_PCI) {
763 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg + 763 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg +
764 PITA_MISC_REG); 764 PITA_MISC_REG);
765 *ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE; 765 *ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE;
766 mdelay(10); 766 mdelay(10);
767 *ireg = PITA_PARA_MPX_MODE; 767 *ireg = PITA_PARA_MPX_MODE;
@@ -769,7 +769,7 @@ reset_diva(struct IsdnCardState *cs)
769 memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xc0); 769 memwritereg(cs->hw.diva.cfg_reg, IPAC_MASK, 0xc0);
770 } else if (cs->subtyp == DIVA_IPACX_PCI) { 770 } else if (cs->subtyp == DIVA_IPACX_PCI) {
771 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg + 771 unsigned int *ireg = (unsigned int *)(cs->hw.diva.pci_cfg +
772 PITA_MISC_REG); 772 PITA_MISC_REG);
773 *ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE; 773 *ireg = PITA_PARA_SOFTRESET | PITA_PARA_MPX_MODE;
774 mdelay(10); 774 mdelay(10);
775 *ireg = PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET; 775 *ireg = PITA_PARA_MPX_MODE | PITA_SER_SOFTRESET;
@@ -802,7 +802,7 @@ diva_led_handler(struct IsdnCardState *cs)
802 802
803 if ((cs->subtyp == DIVA_IPAC_ISA) || 803 if ((cs->subtyp == DIVA_IPAC_ISA) ||
804 (cs->subtyp == DIVA_IPAC_PCI) || 804 (cs->subtyp == DIVA_IPAC_PCI) ||
805 (cs->subtyp == DIVA_IPACX_PCI) ) 805 (cs->subtyp == DIVA_IPACX_PCI))
806 return; 806 return;
807 del_timer(&cs->hw.diva.tl); 807 del_timer(&cs->hw.diva.tl);
808 if (cs->hw.diva.status & DIVA_ASSIGN) 808 if (cs->hw.diva.status & DIVA_ASSIGN)
@@ -822,7 +822,7 @@ diva_led_handler(struct IsdnCardState *cs)
822 blink = 500; 822 blink = 500;
823 } else 823 } else
824 cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ? 824 cs->hw.diva.ctrl_reg &= ~((DIVA_ISA == cs->subtyp) ?
825 DIVA_ISA_LED_B : DIVA_PCI_LED_B); 825 DIVA_ISA_LED_B : DIVA_PCI_LED_B);
826 826
827 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg); 827 byteout(cs->hw.diva.ctrl, cs->hw.diva.ctrl_reg);
828 if (blink) { 828 if (blink) {
@@ -839,69 +839,69 @@ Diva_card_msg(struct IsdnCardState *cs, int mt, void *arg)
839 u_long flags; 839 u_long flags;
840 840
841 switch (mt) { 841 switch (mt) {
842 case CARD_RESET: 842 case CARD_RESET:
843 spin_lock_irqsave(&cs->lock, flags); 843 spin_lock_irqsave(&cs->lock, flags);
844 reset_diva(cs); 844 reset_diva(cs);
845 spin_unlock_irqrestore(&cs->lock, flags); 845 spin_unlock_irqrestore(&cs->lock, flags);
846 return(0); 846 return (0);
847 case CARD_RELEASE: 847 case CARD_RELEASE:
848 release_io_diva(cs); 848 release_io_diva(cs);
849 return(0); 849 return (0);
850 case CARD_INIT: 850 case CARD_INIT:
851 spin_lock_irqsave(&cs->lock, flags); 851 spin_lock_irqsave(&cs->lock, flags);
852 reset_diva(cs); 852 reset_diva(cs);
853 if (cs->subtyp == DIVA_IPACX_PCI) { 853 if (cs->subtyp == DIVA_IPACX_PCI) {
854 ireg = (unsigned int *)cs->hw.diva.pci_cfg; 854 ireg = (unsigned int *)cs->hw.diva.pci_cfg;
855 *ireg = PITA_INT0_ENABLE; 855 *ireg = PITA_INT0_ENABLE;
856 init_ipacx(cs, 3); // init chip and enable interrupts 856 init_ipacx(cs, 3); // init chip and enable interrupts
857 spin_unlock_irqrestore(&cs->lock, flags);
858 return (0);
859 }
860 if (cs->subtyp == DIVA_IPAC_PCI) {
861 ireg = (unsigned int *)cs->hw.diva.pci_cfg;
862 *ireg = PITA_INT0_ENABLE;
863 }
864 inithscxisac(cs, 3);
865 spin_unlock_irqrestore(&cs->lock, flags); 857 spin_unlock_irqrestore(&cs->lock, flags);
866 return(0); 858 return (0);
867 case CARD_TEST: 859 }
868 return(0); 860 if (cs->subtyp == DIVA_IPAC_PCI) {
869 case (MDL_REMOVE | REQUEST): 861 ireg = (unsigned int *)cs->hw.diva.pci_cfg;
870 cs->hw.diva.status = 0; 862 *ireg = PITA_INT0_ENABLE;
871 break; 863 }
872 case (MDL_ASSIGN | REQUEST): 864 inithscxisac(cs, 3);
873 cs->hw.diva.status |= DIVA_ASSIGN; 865 spin_unlock_irqrestore(&cs->lock, flags);
874 break; 866 return (0);
875 case MDL_INFO_SETUP: 867 case CARD_TEST:
876 if ((long)arg) 868 return (0);
877 cs->hw.diva.status |= 0x0200; 869 case (MDL_REMOVE | REQUEST):
878 else 870 cs->hw.diva.status = 0;
879 cs->hw.diva.status |= 0x0100; 871 break;
880 break; 872 case (MDL_ASSIGN | REQUEST):
881 case MDL_INFO_CONN: 873 cs->hw.diva.status |= DIVA_ASSIGN;
882 if ((long)arg) 874 break;
883 cs->hw.diva.status |= 0x2000; 875 case MDL_INFO_SETUP:
884 else 876 if ((long)arg)
885 cs->hw.diva.status |= 0x1000; 877 cs->hw.diva.status |= 0x0200;
886 break; 878 else
887 case MDL_INFO_REL: 879 cs->hw.diva.status |= 0x0100;
888 if ((long)arg) { 880 break;
889 cs->hw.diva.status &= ~0x2000; 881 case MDL_INFO_CONN:
890 cs->hw.diva.status &= ~0x0200; 882 if ((long)arg)
891 } else { 883 cs->hw.diva.status |= 0x2000;
892 cs->hw.diva.status &= ~0x1000; 884 else
893 cs->hw.diva.status &= ~0x0100; 885 cs->hw.diva.status |= 0x1000;
894 } 886 break;
895 break; 887 case MDL_INFO_REL:
888 if ((long)arg) {
889 cs->hw.diva.status &= ~0x2000;
890 cs->hw.diva.status &= ~0x0200;
891 } else {
892 cs->hw.diva.status &= ~0x1000;
893 cs->hw.diva.status &= ~0x0100;
894 }
895 break;
896 } 896 }
897 if ((cs->subtyp != DIVA_IPAC_ISA) && 897 if ((cs->subtyp != DIVA_IPAC_ISA) &&
898 (cs->subtyp != DIVA_IPAC_PCI) && 898 (cs->subtyp != DIVA_IPAC_PCI) &&
899 (cs->subtyp != DIVA_IPACX_PCI)) { 899 (cs->subtyp != DIVA_IPACX_PCI)) {
900 spin_lock_irqsave(&cs->lock, flags); 900 spin_lock_irqsave(&cs->lock, flags);
901 diva_led_handler(cs); 901 diva_led_handler(cs);
902 spin_unlock_irqrestore(&cs->lock, flags); 902 spin_unlock_irqrestore(&cs->lock, flags);
903 } 903 }
904 return(0); 904 return (0);
905} 905}
906 906
907static int __devinit setup_diva_common(struct IsdnCardState *cs) 907static int __devinit setup_diva_common(struct IsdnCardState *cs)
@@ -915,21 +915,21 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
915 bytecnt = 32; 915 bytecnt = 32;
916 916
917 printk(KERN_INFO 917 printk(KERN_INFO
918 "Diva: %s card configured at %#lx IRQ %d\n", 918 "Diva: %s card configured at %#lx IRQ %d\n",
919 (cs->subtyp == DIVA_PCI) ? "PCI" : 919 (cs->subtyp == DIVA_PCI) ? "PCI" :
920 (cs->subtyp == DIVA_ISA) ? "ISA" : 920 (cs->subtyp == DIVA_ISA) ? "ISA" :
921 (cs->subtyp == DIVA_IPAC_ISA) ? "IPAC ISA" : 921 (cs->subtyp == DIVA_IPAC_ISA) ? "IPAC ISA" :
922 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI", 922 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
923 cs->hw.diva.cfg_reg, cs->irq); 923 cs->hw.diva.cfg_reg, cs->irq);
924 if ((cs->subtyp == DIVA_IPAC_PCI) || 924 if ((cs->subtyp == DIVA_IPAC_PCI) ||
925 (cs->subtyp == DIVA_IPACX_PCI) || 925 (cs->subtyp == DIVA_IPACX_PCI) ||
926 (cs->subtyp == DIVA_PCI) ) 926 (cs->subtyp == DIVA_PCI))
927 printk(KERN_INFO "Diva: %s space at %#lx\n", 927 printk(KERN_INFO "Diva: %s space at %#lx\n",
928 (cs->subtyp == DIVA_PCI) ? "PCI" : 928 (cs->subtyp == DIVA_PCI) ? "PCI" :
929 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI", 929 (cs->subtyp == DIVA_IPAC_PCI) ? "IPAC PCI" : "IPACX PCI",
930 cs->hw.diva.pci_cfg); 930 cs->hw.diva.pci_cfg);
931 if ((cs->subtyp != DIVA_IPAC_PCI) && 931 if ((cs->subtyp != DIVA_IPAC_PCI) &&
932 (cs->subtyp != DIVA_IPACX_PCI) ) { 932 (cs->subtyp != DIVA_IPACX_PCI)) {
933 if (!request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn")) { 933 if (!request_region(cs->hw.diva.cfg_reg, bytecnt, "diva isdn")) {
934 printk(KERN_WARNING 934 printk(KERN_WARNING
935 "HiSax: %s config port %lx-%lx already in use\n", 935 "HiSax: %s config port %lx-%lx already in use\n",
@@ -973,8 +973,8 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
973 cs->BC_Write_Reg = &MemWriteHSCX_IPACX; 973 cs->BC_Write_Reg = &MemWriteHSCX_IPACX;
974 cs->BC_Send_Data = NULL; // function located in ipacx module 974 cs->BC_Send_Data = NULL; // function located in ipacx module
975 cs->irq_func = &diva_irq_ipacx_pci; 975 cs->irq_func = &diva_irq_ipacx_pci;
976 printk(KERN_INFO "Diva: IPACX Design Id: %x\n", 976 printk(KERN_INFO "Diva: IPACX Design Id: %x\n",
977 MemReadISAC_IPACX(cs, IPACX_ID) &0x3F); 977 MemReadISAC_IPACX(cs, IPACX_ID) & 0x3F);
978 } else { /* DIVA 2.0 */ 978 } else { /* DIVA 2.0 */
979 cs->hw.diva.tl.function = (void *) diva_led_handler; 979 cs->hw.diva.tl.function = (void *) diva_led_handler;
980 cs->hw.diva.tl.data = (long) cs; 980 cs->hw.diva.tl.data = (long) cs;
@@ -987,7 +987,7 @@ static int __devinit setup_diva_common(struct IsdnCardState *cs)
987 ISACVersion(cs, "Diva:"); 987 ISACVersion(cs, "Diva:");
988 if (HscxVersion(cs, "Diva:")) { 988 if (HscxVersion(cs, "Diva:")) {
989 printk(KERN_WARNING 989 printk(KERN_WARNING
990 "Diva: wrong HSCX versions check IO address\n"); 990 "Diva: wrong HSCX versions check IO address\n");
991 release_io_diva(cs); 991 release_io_diva(cs);
992 return (0); 992 return (0);
993 } 993 }
@@ -1008,9 +1008,9 @@ static int __devinit setup_diva_isa(struct IsdnCard *card)
1008 cs->hw.diva.ctrl_reg = 0; 1008 cs->hw.diva.ctrl_reg = 0;
1009 cs->hw.diva.cfg_reg = card->para[1]; 1009 cs->hw.diva.cfg_reg = card->para[1];
1010 val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR, 1010 val = readreg(cs->hw.diva.cfg_reg + DIVA_IPAC_ADR,
1011 cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID); 1011 cs->hw.diva.cfg_reg + DIVA_IPAC_DATA, IPAC_ID);
1012 printk(KERN_INFO "Diva: IPAC version %x\n", val); 1012 printk(KERN_INFO "Diva: IPAC version %x\n", val);
1013 if ((val == 1) || (val==2)) { 1013 if ((val == 1) || (val == 2)) {
1014 cs->subtyp = DIVA_IPAC_ISA; 1014 cs->subtyp = DIVA_IPAC_ISA;
1015 cs->hw.diva.ctrl = 0; 1015 cs->hw.diva.ctrl = 0;
1016 cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA; 1016 cs->hw.diva.isac = card->para[1] + DIVA_IPAC_DATA;
@@ -1043,22 +1043,22 @@ static int __devinit setup_diva_isa(struct IsdnCard *card)
1043#ifdef __ISAPNP__ 1043#ifdef __ISAPNP__
1044static struct isapnp_device_id diva_ids[] __devinitdata = { 1044static struct isapnp_device_id diva_ids[] __devinitdata = {
1045 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51), 1045 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1046 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51), 1046 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1047 (unsigned long) "Diva picola" }, 1047 (unsigned long) "Diva picola" },
1048 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51), 1048 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x51),
1049 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x51), 1049 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x51),
1050 (unsigned long) "Diva picola" }, 1050 (unsigned long) "Diva picola" },
1051 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71), 1051 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1052 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71), 1052 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1053 (unsigned long) "Diva 2.0" }, 1053 (unsigned long) "Diva 2.0" },
1054 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71), 1054 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0x71),
1055 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x71), 1055 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0x71),
1056 (unsigned long) "Diva 2.0" }, 1056 (unsigned long) "Diva 2.0" },
1057 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1), 1057 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1058 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1), 1058 ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1059 (unsigned long) "Diva 2.01" }, 1059 (unsigned long) "Diva 2.01" },
1060 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1), 1060 { ISAPNP_VENDOR('G', 'D', 'I'), ISAPNP_FUNCTION(0xA1),
1061 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0xA1), 1061 ISAPNP_VENDOR('E', 'I', 'C'), ISAPNP_FUNCTION(0xA1),
1062 (unsigned long) "Diva 2.01" }, 1062 (unsigned long) "Diva 2.01" },
1063 { 0, } 1063 { 0, }
1064}; 1064};
@@ -1074,30 +1074,30 @@ static int __devinit setup_diva_isapnp(struct IsdnCard *card)
1074 if (!isapnp_present()) 1074 if (!isapnp_present())
1075 return (-1); /* card not found; continue search */ 1075 return (-1); /* card not found; continue search */
1076 1076
1077 while(ipid->card_vendor) { 1077 while (ipid->card_vendor) {
1078 if ((pnp_c = pnp_find_card(ipid->card_vendor, 1078 if ((pnp_c = pnp_find_card(ipid->card_vendor,
1079 ipid->card_device, pnp_c))) { 1079 ipid->card_device, pnp_c))) {
1080 pnp_d = NULL; 1080 pnp_d = NULL;
1081 if ((pnp_d = pnp_find_dev(pnp_c, 1081 if ((pnp_d = pnp_find_dev(pnp_c,
1082 ipid->vendor, ipid->function, pnp_d))) { 1082 ipid->vendor, ipid->function, pnp_d))) {
1083 int err; 1083 int err;
1084 1084
1085 printk(KERN_INFO "HiSax: %s detected\n", 1085 printk(KERN_INFO "HiSax: %s detected\n",
1086 (char *)ipid->driver_data); 1086 (char *)ipid->driver_data);
1087 pnp_disable_dev(pnp_d); 1087 pnp_disable_dev(pnp_d);
1088 err = pnp_activate_dev(pnp_d); 1088 err = pnp_activate_dev(pnp_d);
1089 if (err<0) { 1089 if (err < 0) {
1090 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 1090 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
1091 __func__, err); 1091 __func__, err);
1092 return(0); 1092 return (0);
1093 } 1093 }
1094 card->para[1] = pnp_port_start(pnp_d, 0); 1094 card->para[1] = pnp_port_start(pnp_d, 0);
1095 card->para[0] = pnp_irq(pnp_d, 0); 1095 card->para[0] = pnp_irq(pnp_d, 0);
1096 if (!card->para[0] || !card->para[1]) { 1096 if (!card->para[0] || !card->para[1]) {
1097 printk(KERN_ERR "Diva PnP:some resources are missing %ld/%lx\n", 1097 printk(KERN_ERR "Diva PnP:some resources are missing %ld/%lx\n",
1098 card->para[0], card->para[1]); 1098 card->para[0], card->para[1]);
1099 pnp_disable_dev(pnp_d); 1099 pnp_disable_dev(pnp_d);
1100 return(0); 1100 return (0);
1101 } 1101 }
1102 cs->hw.diva.cfg_reg = card->para[1]; 1102 cs->hw.diva.cfg_reg = card->para[1];
1103 cs->irq = card->para[0]; 1103 cs->irq = card->para[0];
@@ -1129,12 +1129,12 @@ static int __devinit setup_diva_isapnp(struct IsdnCard *card)
1129 return (1); /* card found */ 1129 return (1); /* card found */
1130 } else { 1130 } else {
1131 printk(KERN_ERR "Diva PnP: PnP error card found, no device\n"); 1131 printk(KERN_ERR "Diva PnP: PnP error card found, no device\n");
1132 return(0); 1132 return (0);
1133 } 1133 }
1134 } 1134 }
1135 ipid++; 1135 ipid++;
1136 pnp_c=NULL; 1136 pnp_c = NULL;
1137 } 1137 }
1138 1138
1139 return (-1); /* card not found; continue search */ 1139 return (-1); /* card not found; continue search */
1140} 1140}
@@ -1160,23 +1160,23 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
1160 1160
1161 cs->subtyp = 0; 1161 cs->subtyp = 0;
1162 if ((dev_diva = hisax_find_pci_device(PCI_VENDOR_ID_EICON, 1162 if ((dev_diva = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
1163 PCI_DEVICE_ID_EICON_DIVA20, dev_diva))) { 1163 PCI_DEVICE_ID_EICON_DIVA20, dev_diva))) {
1164 if (pci_enable_device(dev_diva)) 1164 if (pci_enable_device(dev_diva))
1165 return(0); 1165 return (0);
1166 cs->subtyp = DIVA_PCI; 1166 cs->subtyp = DIVA_PCI;
1167 cs->irq = dev_diva->irq; 1167 cs->irq = dev_diva->irq;
1168 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva, 2); 1168 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva, 2);
1169 } else if ((dev_diva_u = hisax_find_pci_device(PCI_VENDOR_ID_EICON, 1169 } else if ((dev_diva_u = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
1170 PCI_DEVICE_ID_EICON_DIVA20_U, dev_diva_u))) { 1170 PCI_DEVICE_ID_EICON_DIVA20_U, dev_diva_u))) {
1171 if (pci_enable_device(dev_diva_u)) 1171 if (pci_enable_device(dev_diva_u))
1172 return(0); 1172 return (0);
1173 cs->subtyp = DIVA_PCI; 1173 cs->subtyp = DIVA_PCI;
1174 cs->irq = dev_diva_u->irq; 1174 cs->irq = dev_diva_u->irq;
1175 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva_u, 2); 1175 cs->hw.diva.cfg_reg = pci_resource_start(dev_diva_u, 2);
1176 } else if ((dev_diva201 = hisax_find_pci_device(PCI_VENDOR_ID_EICON, 1176 } else if ((dev_diva201 = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
1177 PCI_DEVICE_ID_EICON_DIVA201, dev_diva201))) { 1177 PCI_DEVICE_ID_EICON_DIVA201, dev_diva201))) {
1178 if (pci_enable_device(dev_diva201)) 1178 if (pci_enable_device(dev_diva201))
1179 return(0); 1179 return (0);
1180 cs->subtyp = DIVA_IPAC_PCI; 1180 cs->subtyp = DIVA_IPAC_PCI;
1181 cs->irq = dev_diva201->irq; 1181 cs->irq = dev_diva201->irq;
1182 cs->hw.diva.pci_cfg = 1182 cs->hw.diva.pci_cfg =
@@ -1184,9 +1184,9 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
1184 cs->hw.diva.cfg_reg = 1184 cs->hw.diva.cfg_reg =
1185 (ulong) ioremap(pci_resource_start(dev_diva201, 1), 4096); 1185 (ulong) ioremap(pci_resource_start(dev_diva201, 1), 4096);
1186 } else if ((dev_diva202 = hisax_find_pci_device(PCI_VENDOR_ID_EICON, 1186 } else if ((dev_diva202 = hisax_find_pci_device(PCI_VENDOR_ID_EICON,
1187 PCI_DEVICE_ID_EICON_DIVA202, dev_diva202))) { 1187 PCI_DEVICE_ID_EICON_DIVA202, dev_diva202))) {
1188 if (pci_enable_device(dev_diva202)) 1188 if (pci_enable_device(dev_diva202))
1189 return(0); 1189 return (0);
1190 cs->subtyp = DIVA_IPACX_PCI; 1190 cs->subtyp = DIVA_IPACX_PCI;
1191 cs->irq = dev_diva202->irq; 1191 cs->irq = dev_diva202->irq;
1192 cs->hw.diva.pci_cfg = 1192 cs->hw.diva.pci_cfg =
@@ -1200,18 +1200,18 @@ static int __devinit setup_diva_pci(struct IsdnCard *card)
1200 if (!cs->irq) { 1200 if (!cs->irq) {
1201 printk(KERN_WARNING "Diva: No IRQ for PCI card found\n"); 1201 printk(KERN_WARNING "Diva: No IRQ for PCI card found\n");
1202 iounmap_diva(cs); 1202 iounmap_diva(cs);
1203 return(0); 1203 return (0);
1204 } 1204 }
1205 1205
1206 if (!cs->hw.diva.cfg_reg) { 1206 if (!cs->hw.diva.cfg_reg) {
1207 printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n"); 1207 printk(KERN_WARNING "Diva: No IO-Adr for PCI card found\n");
1208 iounmap_diva(cs); 1208 iounmap_diva(cs);
1209 return(0); 1209 return (0);
1210 } 1210 }
1211 cs->irq_flags |= IRQF_SHARED; 1211 cs->irq_flags |= IRQF_SHARED;
1212 1212
1213 if ((cs->subtyp == DIVA_IPAC_PCI) || 1213 if ((cs->subtyp == DIVA_IPAC_PCI) ||
1214 (cs->subtyp == DIVA_IPACX_PCI) ) { 1214 (cs->subtyp == DIVA_IPACX_PCI)) {
1215 cs->hw.diva.ctrl = 0; 1215 cs->hw.diva.ctrl = 0;
1216 cs->hw.diva.isac = 0; 1216 cs->hw.diva.isac = 0;
1217 cs->hw.diva.hscx = 0; 1217 cs->hw.diva.hscx = 0;
@@ -1248,7 +1248,7 @@ setup_diva(struct IsdnCard *card)
1248 strcpy(tmp, Diva_revision); 1248 strcpy(tmp, Diva_revision);
1249 printk(KERN_INFO "HiSax: Eicon.Diehl Diva driver Rev. %s\n", HiSax_getrev(tmp)); 1249 printk(KERN_INFO "HiSax: Eicon.Diehl Diva driver Rev. %s\n", HiSax_getrev(tmp));
1250 if (cs->typ != ISDN_CTYPE_DIEHLDIVA) 1250 if (cs->typ != ISDN_CTYPE_DIEHLDIVA)
1251 return(0); 1251 return (0);
1252 cs->hw.diva.status = 0; 1252 cs->hw.diva.status = 0;
1253 1253
1254 rc = setup_diva_isa(card); 1254 rc = setup_diva_isa(card);
@@ -1276,7 +1276,7 @@ setup_diva(struct IsdnCard *card)
1276ready: 1276ready:
1277 if (!have_card) { 1277 if (!have_card) {
1278 printk(KERN_WARNING "Diva: No ISA, ISAPNP or PCI card found\n"); 1278 printk(KERN_WARNING "Diva: No ISA, ISAPNP or PCI card found\n");
1279 return(0); 1279 return (0);
1280 } 1280 }
1281 1281
1282 return setup_diva_common(card->cs); 1282 return setup_diva_common(card->cs);
diff --git a/drivers/isdn/hisax/elsa.c b/drivers/isdn/hisax/elsa.c
index 5d9d338814aa..64ba26a4afe6 100644
--- a/drivers/isdn/hisax/elsa.c
+++ b/drivers/isdn/hisax/elsa.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -34,14 +34,14 @@
34static const char *Elsa_revision = "$Revision: 2.32.2.4 $"; 34static const char *Elsa_revision = "$Revision: 2.32.2.4 $";
35static const char *Elsa_Types[] = 35static const char *Elsa_Types[] =
36{"None", "PC", "PCC-8", "PCC-16", "PCF", "PCF-Pro", 36{"None", "PC", "PCC-8", "PCC-16", "PCF", "PCF-Pro",
37 "PCMCIA", "QS 1000", "QS 3000", "Microlink PCI", "QS 3000 PCI", 37 "PCMCIA", "QS 1000", "QS 3000", "Microlink PCI", "QS 3000 PCI",
38 "PCMCIA-IPAC" }; 38 "PCMCIA-IPAC" };
39 39
40static const char *ITACVer[] = 40static const char *ITACVer[] =
41{"?0?", "?1?", "?2?", "?3?", "?4?", "V2.2", 41{"?0?", "?1?", "?2?", "?3?", "?4?", "V2.2",
42 "B1", "A1"}; 42 "B1", "A1"};
43 43
44#define byteout(addr,val) outb(val,addr) 44#define byteout(addr, val) outb(val, addr)
45#define bytein(addr) inb(addr) 45#define bytein(addr) inb(addr)
46 46
47#define ELSA_ISAC 0 47#define ELSA_ISAC 0
@@ -113,25 +113,25 @@ static const char *ITACVer[] =
113 113
114#if ARCOFI_USE 114#if ARCOFI_USE
115static struct arcofi_msg ARCOFI_XOP_F = 115static struct arcofi_msg ARCOFI_XOP_F =
116 {NULL,0,2,{0xa1,0x3f,0,0,0,0,0,0,0,0}}; /* Normal OP */ 116{NULL,0,2,{0xa1,0x3f,0,0,0,0,0,0,0,0}}; /* Normal OP */
117static struct arcofi_msg ARCOFI_XOP_1 = 117static struct arcofi_msg ARCOFI_XOP_1 =
118 {&ARCOFI_XOP_F,0,2,{0xa1,0x31,0,0,0,0,0,0,0,0}}; /* PWR UP */ 118{&ARCOFI_XOP_F,0,2,{0xa1,0x31,0,0,0,0,0,0,0,0}}; /* PWR UP */
119static struct arcofi_msg ARCOFI_SOP_F = 119static struct arcofi_msg ARCOFI_SOP_F =
120 {&ARCOFI_XOP_1,0,10,{0xa1,0x1f,0x00,0x50,0x10,0x00,0x00,0x80,0x02,0x12}}; 120{&ARCOFI_XOP_1,0,10,{0xa1,0x1f,0x00,0x50,0x10,0x00,0x00,0x80,0x02,0x12}};
121static struct arcofi_msg ARCOFI_COP_9 = 121static struct arcofi_msg ARCOFI_COP_9 =
122 {&ARCOFI_SOP_F,0,10,{0xa1,0x29,0x80,0xcb,0xe9,0x88,0x00,0xc8,0xd8,0x80}}; /* RX */ 122{&ARCOFI_SOP_F,0,10,{0xa1,0x29,0x80,0xcb,0xe9,0x88,0x00,0xc8,0xd8,0x80}}; /* RX */
123static struct arcofi_msg ARCOFI_COP_8 = 123static struct arcofi_msg ARCOFI_COP_8 =
124 {&ARCOFI_COP_9,0,10,{0xa1,0x28,0x49,0x31,0x8,0x13,0x6e,0x88,0x2a,0x61}}; /* TX */ 124{&ARCOFI_COP_9,0,10,{0xa1,0x28,0x49,0x31,0x8,0x13,0x6e,0x88,0x2a,0x61}}; /* TX */
125static struct arcofi_msg ARCOFI_COP_7 = 125static struct arcofi_msg ARCOFI_COP_7 =
126 {&ARCOFI_COP_8,0,4,{0xa1,0x27,0x80,0x80,0,0,0,0,0,0}}; /* GZ */ 126{&ARCOFI_COP_8,0,4,{0xa1,0x27,0x80,0x80,0,0,0,0,0,0}}; /* GZ */
127static struct arcofi_msg ARCOFI_COP_6 = 127static struct arcofi_msg ARCOFI_COP_6 =
128 {&ARCOFI_COP_7,0,6,{0xa1,0x26,0,0,0x82,0x7c,0,0,0,0}}; /* GRL GRH */ 128{&ARCOFI_COP_7,0,6,{0xa1,0x26,0,0,0x82,0x7c,0,0,0,0}}; /* GRL GRH */
129static struct arcofi_msg ARCOFI_COP_5 = 129static struct arcofi_msg ARCOFI_COP_5 =
130 {&ARCOFI_COP_6,0,4,{0xa1,0x25,0xbb,0x4a,0,0,0,0,0,0}}; /* GTX */ 130{&ARCOFI_COP_6,0,4,{0xa1,0x25,0xbb,0x4a,0,0,0,0,0,0}}; /* GTX */
131static struct arcofi_msg ARCOFI_VERSION = 131static struct arcofi_msg ARCOFI_VERSION =
132 {NULL,1,2,{0xa0,0,0,0,0,0,0,0,0,0}}; 132{NULL,1,2,{0xa0,0,0,0,0,0,0,0,0,0}};
133static struct arcofi_msg ARCOFI_XOP_0 = 133static struct arcofi_msg ARCOFI_XOP_0 =
134 {NULL,0,2,{0xa1,0x30,0,0,0,0,0,0,0,0}}; /* PWR Down */ 134{NULL,0,2,{0xa1,0x30,0,0,0,0,0,0,0,0}}; /* PWR Down */
135 135
136static void set_arcofi(struct IsdnCardState *cs, int bc); 136static void set_arcofi(struct IsdnCardState *cs, int bc);
137 137
@@ -149,7 +149,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
149} 149}
150 150
151static inline void 151static inline void
152readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 152readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
153{ 153{
154 byteout(ale, off); 154 byteout(ale, off);
155 insb(adr, data, size); 155 insb(adr, data, size);
@@ -164,7 +164,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
164} 164}
165 165
166static inline void 166static inline void
167writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 167writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
168{ 168{
169 byteout(ale, off); 169 byteout(ale, off);
170 outsb(adr, data, size); 170 outsb(adr, data, size);
@@ -185,13 +185,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
185} 185}
186 186
187static void 187static void
188ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 188ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
189{ 189{
190 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); 190 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size);
191} 191}
192 192
193static void 193static void
194WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 194WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
195{ 195{
196 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size); 196 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0, data, size);
197} 197}
@@ -199,23 +199,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
199static u_char 199static u_char
200ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) 200ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
201{ 201{
202 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset+0x80)); 202 return (readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset + 0x80));
203} 203}
204 204
205static void 205static void
206WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) 206WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
207{ 207{
208 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset|0x80, value); 208 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, offset | 0x80, value);
209} 209}
210 210
211static void 211static void
212ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 212ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
213{ 213{
214 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size); 214 readfifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size);
215} 215}
216 216
217static void 217static void
218WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 218WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
219{ 219{
220 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size); 220 writefifo(cs->hw.elsa.ale, cs->hw.elsa.isac, 0x80, data, size);
221} 221}
@@ -267,16 +267,16 @@ TimerRun(struct IsdnCardState *cs)
267 * fast interrupt HSCX stuff goes here 267 * fast interrupt HSCX stuff goes here
268 */ 268 */
269 269
270#define READHSCX(cs, nr, reg) readreg(cs->hw.elsa.ale, \ 270#define READHSCX(cs, nr, reg) readreg(cs->hw.elsa.ale, \
271 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0)) 271 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0))
272#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.elsa.ale, \ 272#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.elsa.ale, \
273 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0), data) 273 cs->hw.elsa.hscx, reg + (nr ? 0x40 : 0), data)
274 274
275#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.elsa.ale, \ 275#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.elsa.ale, \
276 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt) 276 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
277 277
278#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.elsa.ale, \ 278#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.elsa.ale, \
279 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt) 279 cs->hw.elsa.hscx, (nr ? 0x40 : 0), ptr, cnt)
280 280
281#include "hscx_irq.c" 281#include "hscx_irq.c"
282 282
@@ -286,11 +286,11 @@ elsa_interrupt(int intno, void *dev_id)
286 struct IsdnCardState *cs = dev_id; 286 struct IsdnCardState *cs = dev_id;
287 u_long flags; 287 u_long flags;
288 u_char val; 288 u_char val;
289 int icnt=5; 289 int icnt = 5;
290 290
291 if ((cs->typ == ISDN_CTYPE_ELSA_PCMCIA) && (*cs->busy_flag == 1)) { 291 if ((cs->typ == ISDN_CTYPE_ELSA_PCMCIA) && (*cs->busy_flag == 1)) {
292 /* The card tends to generate interrupts while being removed 292 /* The card tends to generate interrupts while being removed
293 causing us to just crash the kernel. bad. */ 293 causing us to just crash the kernel. bad. */
294 printk(KERN_WARNING "Elsa: card not available!\n"); 294 printk(KERN_WARNING "Elsa: card not available!\n");
295 return IRQ_NONE; 295 return IRQ_NONE;
296 } 296 }
@@ -299,18 +299,18 @@ elsa_interrupt(int intno, void *dev_id)
299 if (cs->hw.elsa.MFlag) { 299 if (cs->hw.elsa.MFlag) {
300 val = serial_inp(cs, UART_IIR); 300 val = serial_inp(cs, UART_IIR);
301 if (!(val & UART_IIR_NO_INT)) { 301 if (!(val & UART_IIR_NO_INT)) {
302 debugl1(cs,"IIR %02x", val); 302 debugl1(cs, "IIR %02x", val);
303 rs_interrupt_elsa(cs); 303 rs_interrupt_elsa(cs);
304 } 304 }
305 } 305 }
306#endif 306#endif
307 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40); 307 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.hscx, HSCX_ISTA + 0x40);
308 Start_HSCX: 308Start_HSCX:
309 if (val) { 309 if (val) {
310 hscx_int_main(cs, val); 310 hscx_int_main(cs, val);
311 } 311 }
312 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA); 312 val = readreg(cs->hw.elsa.ale, cs->hw.elsa.isac, ISAC_ISTA);
313 Start_ISAC: 313Start_ISAC:
314 if (val) { 314 if (val) {
315 isac_interrupt(cs, val); 315 isac_interrupt(cs, val);
316 } 316 }
@@ -364,8 +364,8 @@ elsa_interrupt_ipac(int intno, void *dev_id)
364{ 364{
365 struct IsdnCardState *cs = dev_id; 365 struct IsdnCardState *cs = dev_id;
366 u_long flags; 366 u_long flags;
367 u_char ista,val; 367 u_char ista, val;
368 int icnt=5; 368 int icnt = 5;
369 369
370 spin_lock_irqsave(&cs->lock, flags); 370 spin_lock_irqsave(&cs->lock, flags);
371 if (cs->subtyp == ELSA_QS1000PCI || cs->subtyp == ELSA_QS3000PCI) { 371 if (cs->subtyp == ELSA_QS1000PCI || cs->subtyp == ELSA_QS3000PCI) {
@@ -379,7 +379,7 @@ elsa_interrupt_ipac(int intno, void *dev_id)
379 if (cs->hw.elsa.MFlag) { 379 if (cs->hw.elsa.MFlag) {
380 val = serial_inp(cs, UART_IIR); 380 val = serial_inp(cs, UART_IIR);
381 if (!(val & UART_IIR_NO_INT)) { 381 if (!(val & UART_IIR_NO_INT)) {
382 debugl1(cs,"IIR %02x", val); 382 debugl1(cs, "IIR %02x", val);
383 rs_interrupt_elsa(cs); 383 rs_interrupt_elsa(cs);
384 } 384 }
385 } 385 }
@@ -444,13 +444,13 @@ release_io_elsa(struct IsdnCardState *cs)
444 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff); 444 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff);
445 release_region(cs->hw.elsa.cfg, 0x80); 445 release_region(cs->hw.elsa.cfg, 0x80);
446 } 446 }
447 if (cs->subtyp == ELSA_PCMCIA_IPAC) { 447 if (cs->subtyp == ELSA_PCMCIA_IPAC) {
448 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff); 448 writereg(cs->hw.elsa.ale, cs->hw.elsa.isac, IPAC_ATX, 0xff);
449 } 449 }
450 if ((cs->subtyp == ELSA_PCFPRO) || 450 if ((cs->subtyp == ELSA_PCFPRO) ||
451 (cs->subtyp == ELSA_QS3000) || 451 (cs->subtyp == ELSA_QS3000) ||
452 (cs->subtyp == ELSA_PCF) || 452 (cs->subtyp == ELSA_PCF) ||
453 (cs->subtyp == ELSA_QS3000PCI)) { 453 (cs->subtyp == ELSA_QS3000PCI)) {
454 bytecnt = 16; 454 bytecnt = 16;
455#if ARCOFI_USE 455#if ARCOFI_USE
456 release_modem(cs); 456 release_modem(cs);
@@ -521,84 +521,84 @@ check_arcofi(struct IsdnCardState *cs)
521 u_char *p; 521 u_char *p;
522 522
523 if (!cs->dc.isac.mon_tx) 523 if (!cs->dc.isac.mon_tx)
524 if (!(cs->dc.isac.mon_tx=kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) { 524 if (!(cs->dc.isac.mon_tx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
525 if (cs->debug & L1_DEB_WARN) 525 if (cs->debug & L1_DEB_WARN)
526 debugl1(cs, "ISAC MON TX out of buffers!"); 526 debugl1(cs, "ISAC MON TX out of buffers!");
527 return(0); 527 return (0);
528 } 528 }
529 cs->dc.isac.arcofi_bc = 0; 529 cs->dc.isac.arcofi_bc = 0;
530 arcofi_fsm(cs, ARCOFI_START, &ARCOFI_VERSION); 530 arcofi_fsm(cs, ARCOFI_START, &ARCOFI_VERSION);
531 interruptible_sleep_on(&cs->dc.isac.arcofi_wait); 531 interruptible_sleep_on(&cs->dc.isac.arcofi_wait);
532 if (!test_and_clear_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags)) { 532 if (!test_and_clear_bit(FLG_ARCOFI_ERROR, &cs->HW_Flags)) {
533 debugl1(cs, "Arcofi response received %d bytes", cs->dc.isac.mon_rxp); 533 debugl1(cs, "Arcofi response received %d bytes", cs->dc.isac.mon_rxp);
534 p = cs->dc.isac.mon_rx; 534 p = cs->dc.isac.mon_rx;
535 t = tmp; 535 t = tmp;
536 t += sprintf(tmp, "Arcofi data"); 536 t += sprintf(tmp, "Arcofi data");
537 QuickHex(t, p, cs->dc.isac.mon_rxp); 537 QuickHex(t, p, cs->dc.isac.mon_rxp);
538 debugl1(cs, tmp); 538 debugl1(cs, tmp);
539 if ((cs->dc.isac.mon_rxp == 2) && (cs->dc.isac.mon_rx[0] == 0xa0)) { 539 if ((cs->dc.isac.mon_rxp == 2) && (cs->dc.isac.mon_rx[0] == 0xa0)) {
540 switch(cs->dc.isac.mon_rx[1]) { 540 switch (cs->dc.isac.mon_rx[1]) {
541 case 0x80: 541 case 0x80:
542 debugl1(cs, "Arcofi 2160 detected"); 542 debugl1(cs, "Arcofi 2160 detected");
543 arcofi_present = 1; 543 arcofi_present = 1;
544 break; 544 break;
545 case 0x82: 545 case 0x82:
546 debugl1(cs, "Arcofi 2165 detected"); 546 debugl1(cs, "Arcofi 2165 detected");
547 arcofi_present = 2; 547 arcofi_present = 2;
548 break; 548 break;
549 case 0x84: 549 case 0x84:
550 debugl1(cs, "Arcofi 2163 detected"); 550 debugl1(cs, "Arcofi 2163 detected");
551 arcofi_present = 3; 551 arcofi_present = 3;
552 break; 552 break;
553 default: 553 default:
554 debugl1(cs, "unknown Arcofi response"); 554 debugl1(cs, "unknown Arcofi response");
555 break; 555 break;
556 } 556 }
557 } else 557 } else
558 debugl1(cs, "undefined Monitor response"); 558 debugl1(cs, "undefined Monitor response");
559 cs->dc.isac.mon_rxp = 0; 559 cs->dc.isac.mon_rxp = 0;
560 } else if (cs->dc.isac.mon_tx) { 560 } else if (cs->dc.isac.mon_tx) {
561 debugl1(cs, "Arcofi not detected"); 561 debugl1(cs, "Arcofi not detected");
562 } 562 }
563 if (arcofi_present) { 563 if (arcofi_present) {
564 if (cs->subtyp==ELSA_QS1000) { 564 if (cs->subtyp == ELSA_QS1000) {
565 cs->subtyp = ELSA_QS3000; 565 cs->subtyp = ELSA_QS3000;
566 printk(KERN_INFO 566 printk(KERN_INFO
567 "Elsa: %s detected modem at 0x%lx\n", 567 "Elsa: %s detected modem at 0x%lx\n",
568 Elsa_Types[cs->subtyp], 568 Elsa_Types[cs->subtyp],
569 cs->hw.elsa.base+8); 569 cs->hw.elsa.base + 8);
570 release_region(cs->hw.elsa.base, 8); 570 release_region(cs->hw.elsa.base, 8);
571 if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) { 571 if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) {
572 printk(KERN_WARNING 572 printk(KERN_WARNING
573 "HiSax: %s config port %lx-%lx already in use\n", 573 "HiSax: %s config port %lx-%lx already in use\n",
574 Elsa_Types[cs->subtyp], 574 Elsa_Types[cs->subtyp],
575 cs->hw.elsa.base + 8, 575 cs->hw.elsa.base + 8,
576 cs->hw.elsa.base + 16); 576 cs->hw.elsa.base + 16);
577 } 577 }
578 } else if (cs->subtyp==ELSA_PCC16) { 578 } else if (cs->subtyp == ELSA_PCC16) {
579 cs->subtyp = ELSA_PCF; 579 cs->subtyp = ELSA_PCF;
580 printk(KERN_INFO 580 printk(KERN_INFO
581 "Elsa: %s detected modem at 0x%lx\n", 581 "Elsa: %s detected modem at 0x%lx\n",
582 Elsa_Types[cs->subtyp], 582 Elsa_Types[cs->subtyp],
583 cs->hw.elsa.base+8); 583 cs->hw.elsa.base + 8);
584 release_region(cs->hw.elsa.base, 8); 584 release_region(cs->hw.elsa.base, 8);
585 if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) { 585 if (!request_region(cs->hw.elsa.base, 16, "elsa isdn modem")) {
586 printk(KERN_WARNING 586 printk(KERN_WARNING
587 "HiSax: %s config port %lx-%lx already in use\n", 587 "HiSax: %s config port %lx-%lx already in use\n",
588 Elsa_Types[cs->subtyp], 588 Elsa_Types[cs->subtyp],
589 cs->hw.elsa.base + 8, 589 cs->hw.elsa.base + 8,
590 cs->hw.elsa.base + 16); 590 cs->hw.elsa.base + 16);
591 } 591 }
592 } else 592 } else
593 printk(KERN_INFO 593 printk(KERN_INFO
594 "Elsa: %s detected modem at 0x%lx\n", 594 "Elsa: %s detected modem at 0x%lx\n",
595 Elsa_Types[cs->subtyp], 595 Elsa_Types[cs->subtyp],
596 cs->hw.elsa.base+8); 596 cs->hw.elsa.base + 8);
597 arcofi_fsm(cs, ARCOFI_START, &ARCOFI_XOP_0); 597 arcofi_fsm(cs, ARCOFI_START, &ARCOFI_XOP_0);
598 interruptible_sleep_on(&cs->dc.isac.arcofi_wait); 598 interruptible_sleep_on(&cs->dc.isac.arcofi_wait);
599 return(1); 599 return (1);
600 } 600 }
601 return(0); 601 return (0);
602} 602}
603#endif /* ARCOFI_USE */ 603#endif /* ARCOFI_USE */
604 604
@@ -627,7 +627,7 @@ elsa_led_handler(struct IsdnCardState *cs)
627 cs->hw.elsa.ctrl_reg &= ~ELSA_LINE_LED; 627 cs->hw.elsa.ctrl_reg &= ~ELSA_LINE_LED;
628 628
629 if ((cs->subtyp == ELSA_QS1000PCI) || 629 if ((cs->subtyp == ELSA_QS1000PCI) ||
630 (cs->subtyp == ELSA_QS3000PCI)) { 630 (cs->subtyp == ELSA_QS3000PCI)) {
631 u_char led = 0xff; 631 u_char led = 0xff;
632 if (cs->hw.elsa.ctrl_reg & ELSA_LINE_LED) 632 if (cs->hw.elsa.ctrl_reg & ELSA_LINE_LED)
633 led ^= ELSA_IPAC_LINE_LED; 633 led ^= ELSA_IPAC_LINE_LED;
@@ -650,111 +650,111 @@ Elsa_card_msg(struct IsdnCardState *cs, int mt, void *arg)
650 u_long flags; 650 u_long flags;
651 651
652 switch (mt) { 652 switch (mt) {
653 case CARD_RESET: 653 case CARD_RESET:
654 spin_lock_irqsave(&cs->lock, flags);
655 reset_elsa(cs);
656 spin_unlock_irqrestore(&cs->lock, flags);
657 return (0);
658 case CARD_RELEASE:
659 release_io_elsa(cs);
660 return (0);
661 case CARD_INIT:
662 spin_lock_irqsave(&cs->lock, flags);
663 cs->debug |= L1_DEB_IPAC;
664 reset_elsa(cs);
665 inithscxisac(cs, 1);
666 if ((cs->subtyp == ELSA_QS1000) ||
667 (cs->subtyp == ELSA_QS3000))
668 {
669 byteout(cs->hw.elsa.timer, 0);
670 }
671 if (cs->hw.elsa.trig)
672 byteout(cs->hw.elsa.trig, 0xff);
673 inithscxisac(cs, 2);
674 spin_unlock_irqrestore(&cs->lock, flags);
675 return (0);
676 case CARD_TEST:
677 if ((cs->subtyp == ELSA_PCMCIA) ||
678 (cs->subtyp == ELSA_PCMCIA_IPAC) ||
679 (cs->subtyp == ELSA_QS1000PCI)) {
680 return (0);
681 } else if (cs->subtyp == ELSA_QS3000PCI) {
682 ret = 0;
683 } else {
654 spin_lock_irqsave(&cs->lock, flags); 684 spin_lock_irqsave(&cs->lock, flags);
655 reset_elsa(cs); 685 cs->hw.elsa.counter = 0;
686 cs->hw.elsa.ctrl_reg |= ELSA_ENA_TIMER_INT;
687 cs->hw.elsa.status |= ELIRQF_TIMER_AKTIV;
688 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
689 byteout(cs->hw.elsa.timer, 0);
656 spin_unlock_irqrestore(&cs->lock, flags); 690 spin_unlock_irqrestore(&cs->lock, flags);
657 return(0); 691 msleep(110);
658 case CARD_RELEASE:
659 release_io_elsa(cs);
660 return(0);
661 case CARD_INIT:
662 spin_lock_irqsave(&cs->lock, flags); 692 spin_lock_irqsave(&cs->lock, flags);
663 cs->debug |= L1_DEB_IPAC; 693 cs->hw.elsa.ctrl_reg &= ~ELSA_ENA_TIMER_INT;
664 reset_elsa(cs); 694 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
665 inithscxisac(cs, 1); 695 cs->hw.elsa.status &= ~ELIRQF_TIMER_AKTIV;
666 if ((cs->subtyp == ELSA_QS1000) ||
667 (cs->subtyp == ELSA_QS3000))
668 {
669 byteout(cs->hw.elsa.timer, 0);
670 }
671 if (cs->hw.elsa.trig)
672 byteout(cs->hw.elsa.trig, 0xff);
673 inithscxisac(cs, 2);
674 spin_unlock_irqrestore(&cs->lock, flags); 696 spin_unlock_irqrestore(&cs->lock, flags);
675 return(0); 697 printk(KERN_INFO "Elsa: %d timer tics in 110 msek\n",
676 case CARD_TEST: 698 cs->hw.elsa.counter);
677 if ((cs->subtyp == ELSA_PCMCIA) || 699 if ((cs->hw.elsa.counter > 10) &&
678 (cs->subtyp == ELSA_PCMCIA_IPAC) || 700 (cs->hw.elsa.counter < 16)) {
679 (cs->subtyp == ELSA_QS1000PCI)) { 701 printk(KERN_INFO "Elsa: timer and irq OK\n");
680 return(0);
681 } else if (cs->subtyp == ELSA_QS3000PCI) {
682 ret = 0; 702 ret = 0;
683 } else { 703 } else {
684 spin_lock_irqsave(&cs->lock, flags); 704 printk(KERN_WARNING
685 cs->hw.elsa.counter = 0; 705 "Elsa: timer tic problem (%d/12) maybe an IRQ(%d) conflict\n",
686 cs->hw.elsa.ctrl_reg |= ELSA_ENA_TIMER_INT; 706 cs->hw.elsa.counter, cs->irq);
687 cs->hw.elsa.status |= ELIRQF_TIMER_AKTIV; 707 ret = 1;
688 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
689 byteout(cs->hw.elsa.timer, 0);
690 spin_unlock_irqrestore(&cs->lock, flags);
691 msleep(110);
692 spin_lock_irqsave(&cs->lock, flags);
693 cs->hw.elsa.ctrl_reg &= ~ELSA_ENA_TIMER_INT;
694 byteout(cs->hw.elsa.ctrl, cs->hw.elsa.ctrl_reg);
695 cs->hw.elsa.status &= ~ELIRQF_TIMER_AKTIV;
696 spin_unlock_irqrestore(&cs->lock, flags);
697 printk(KERN_INFO "Elsa: %d timer tics in 110 msek\n",
698 cs->hw.elsa.counter);
699 if ((cs->hw.elsa.counter > 10) &&
700 (cs->hw.elsa.counter < 16)) {
701 printk(KERN_INFO "Elsa: timer and irq OK\n");
702 ret = 0;
703 } else {
704 printk(KERN_WARNING
705 "Elsa: timer tic problem (%d/12) maybe an IRQ(%d) conflict\n",
706 cs->hw.elsa.counter, cs->irq);
707 ret = 1;
708 }
709 } 708 }
709 }
710#if ARCOFI_USE 710#if ARCOFI_USE
711 if (check_arcofi(cs)) { 711 if (check_arcofi(cs)) {
712 init_modem(cs); 712 init_modem(cs);
713 } 713 }
714#endif 714#endif
715 elsa_led_handler(cs); 715 elsa_led_handler(cs);
716 return(ret); 716 return (ret);
717 case (MDL_REMOVE | REQUEST): 717 case (MDL_REMOVE | REQUEST):
718 cs->hw.elsa.status &= 0; 718 cs->hw.elsa.status &= 0;
719 break; 719 break;
720 case (MDL_ASSIGN | REQUEST): 720 case (MDL_ASSIGN | REQUEST):
721 cs->hw.elsa.status |= ELSA_ASSIGN; 721 cs->hw.elsa.status |= ELSA_ASSIGN;
722 break; 722 break;
723 case MDL_INFO_SETUP: 723 case MDL_INFO_SETUP:
724 if ((long) arg) 724 if ((long) arg)
725 cs->hw.elsa.status |= 0x0200; 725 cs->hw.elsa.status |= 0x0200;
726 else 726 else
727 cs->hw.elsa.status |= 0x0100; 727 cs->hw.elsa.status |= 0x0100;
728 break; 728 break;
729 case MDL_INFO_CONN: 729 case MDL_INFO_CONN:
730 if ((long) arg) 730 if ((long) arg)
731 cs->hw.elsa.status |= 0x2000; 731 cs->hw.elsa.status |= 0x2000;
732 else 732 else
733 cs->hw.elsa.status |= 0x1000; 733 cs->hw.elsa.status |= 0x1000;
734 break; 734 break;
735 case MDL_INFO_REL: 735 case MDL_INFO_REL:
736 if ((long) arg) { 736 if ((long) arg) {
737 cs->hw.elsa.status &= ~0x2000; 737 cs->hw.elsa.status &= ~0x2000;
738 cs->hw.elsa.status &= ~0x0200; 738 cs->hw.elsa.status &= ~0x0200;
739 } else { 739 } else {
740 cs->hw.elsa.status &= ~0x1000; 740 cs->hw.elsa.status &= ~0x1000;
741 cs->hw.elsa.status &= ~0x0100; 741 cs->hw.elsa.status &= ~0x0100;
742 } 742 }
743 break; 743 break;
744#if ARCOFI_USE 744#if ARCOFI_USE
745 case CARD_AUX_IND: 745 case CARD_AUX_IND:
746 if (cs->hw.elsa.MFlag) { 746 if (cs->hw.elsa.MFlag) {
747 int len; 747 int len;
748 u_char *msg; 748 u_char *msg;
749 749
750 if (!arg) 750 if (!arg)
751 return(0); 751 return (0);
752 msg = arg; 752 msg = arg;
753 len = *msg; 753 len = *msg;
754 msg++; 754 msg++;
755 modem_write_cmd(cs, msg, len); 755 modem_write_cmd(cs, msg, len);
756 } 756 }
757 break; 757 break;
758#endif 758#endif
759 } 759 }
760 if (cs->typ == ISDN_CTYPE_ELSA) { 760 if (cs->typ == ISDN_CTYPE_ELSA) {
@@ -765,14 +765,14 @@ Elsa_card_msg(struct IsdnCardState *cs, int mt, void *arg)
765 cs->hw.elsa.status &= ~ELSA_BAD_PWR; 765 cs->hw.elsa.status &= ~ELSA_BAD_PWR;
766 } 766 }
767 elsa_led_handler(cs); 767 elsa_led_handler(cs);
768 return(ret); 768 return (ret);
769} 769}
770 770
771static unsigned char 771static unsigned char
772probe_elsa_adr(unsigned int adr, int typ) 772probe_elsa_adr(unsigned int adr, int typ)
773{ 773{
774 int i, in1, in2, p16_1 = 0, p16_2 = 0, p8_1 = 0, p8_2 = 0, pc_1 = 0, 774 int i, in1, in2, p16_1 = 0, p16_2 = 0, p8_1 = 0, p8_2 = 0, pc_1 = 0,
775 pc_2 = 0, pfp_1 = 0, pfp_2 = 0; 775 pc_2 = 0, pfp_1 = 0, pfp_2 = 0;
776 776
777 /* In case of the elsa pcmcia card, this region is in use, 777 /* In case of the elsa pcmcia card, this region is in use,
778 reserved for us by the card manager. So we do not check it 778 reserved for us by the card manager. So we do not check it
@@ -822,7 +822,7 @@ probe_elsa(struct IsdnCardState *cs)
822{ 822{
823 int i; 823 int i;
824 unsigned int CARD_portlist[] = 824 unsigned int CARD_portlist[] =
825 {0x160, 0x170, 0x260, 0x360, 0}; 825 {0x160, 0x170, 0x260, 0x360, 0};
826 826
827 for (i = 0; CARD_portlist[i]; i++) { 827 for (i = 0; CARD_portlist[i]; i++) {
828 if ((cs->subtyp = probe_elsa_adr(CARD_portlist[i], cs->typ))) 828 if ((cs->subtyp = probe_elsa_adr(CARD_portlist[i], cs->typ)))
@@ -867,15 +867,15 @@ setup_elsa_isa(struct IsdnCard *card)
867 val = bytein(cs->hw.elsa.cfg); 867 val = bytein(cs->hw.elsa.cfg);
868 if (cs->subtyp == ELSA_PC) { 868 if (cs->subtyp == ELSA_PC) {
869 const u_char CARD_IrqTab[8] = 869 const u_char CARD_IrqTab[8] =
870 {7, 3, 5, 9, 0, 0, 0, 0}; 870 {7, 3, 5, 9, 0, 0, 0, 0};
871 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PC) >> 2]; 871 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PC) >> 2];
872 } else if (cs->subtyp == ELSA_PCC8) { 872 } else if (cs->subtyp == ELSA_PCC8) {
873 const u_char CARD_IrqTab[8] = 873 const u_char CARD_IrqTab[8] =
874 {7, 3, 5, 9, 0, 0, 0, 0}; 874 {7, 3, 5, 9, 0, 0, 0, 0};
875 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PCC8) >> 4]; 875 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX_PCC8) >> 4];
876 } else { 876 } else {
877 const u_char CARD_IrqTab[8] = 877 const u_char CARD_IrqTab[8] =
878 {15, 10, 15, 3, 11, 5, 11, 9}; 878 {15, 10, 15, 3, 11, 5, 11, 9};
879 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX) >> 3]; 879 cs->irq = CARD_IrqTab[(val & ELSA_IRQ_IDX) >> 3];
880 } 880 }
881 val = bytein(cs->hw.elsa.ale) & ELSA_HW_RELEASE; 881 val = bytein(cs->hw.elsa.ale) & ELSA_HW_RELEASE;
@@ -894,7 +894,7 @@ setup_elsa_isa(struct IsdnCard *card)
894 val = bytein(cs->hw.elsa.ale) & ELSA_S0_POWER_BAD; 894 val = bytein(cs->hw.elsa.ale) & ELSA_S0_POWER_BAD;
895 if (val) { 895 if (val) {
896 printk(KERN_WARNING 896 printk(KERN_WARNING
897 "Elsa: Microlink S0 bus power bad\n"); 897 "Elsa: Microlink S0 bus power bad\n");
898 cs->hw.elsa.status |= ELSA_BAD_PWR; 898 cs->hw.elsa.status |= ELSA_BAD_PWR;
899 } 899 }
900 900
@@ -904,10 +904,10 @@ setup_elsa_isa(struct IsdnCard *card)
904#ifdef __ISAPNP__ 904#ifdef __ISAPNP__
905static struct isapnp_device_id elsa_ids[] __devinitdata = { 905static struct isapnp_device_id elsa_ids[] __devinitdata = {
906 { ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133), 906 { ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133),
907 ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133), 907 ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0133),
908 (unsigned long) "Elsa QS1000" }, 908 (unsigned long) "Elsa QS1000" },
909 { ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134), 909 { ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134),
910 ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134), 910 ISAPNP_VENDOR('E', 'L', 'S'), ISAPNP_FUNCTION(0x0134),
911 (unsigned long) "Elsa QS3000" }, 911 (unsigned long) "Elsa QS3000" },
912 { 0, } 912 { 0, }
913}; 913};
@@ -924,31 +924,31 @@ setup_elsa_isapnp(struct IsdnCard *card)
924#ifdef __ISAPNP__ 924#ifdef __ISAPNP__
925 if (!card->para[1] && isapnp_present()) { 925 if (!card->para[1] && isapnp_present()) {
926 struct pnp_dev *pnp_d; 926 struct pnp_dev *pnp_d;
927 while(ipid->card_vendor) { 927 while (ipid->card_vendor) {
928 if ((pnp_c = pnp_find_card(ipid->card_vendor, 928 if ((pnp_c = pnp_find_card(ipid->card_vendor,
929 ipid->card_device, pnp_c))) { 929 ipid->card_device, pnp_c))) {
930 pnp_d = NULL; 930 pnp_d = NULL;
931 if ((pnp_d = pnp_find_dev(pnp_c, 931 if ((pnp_d = pnp_find_dev(pnp_c,
932 ipid->vendor, ipid->function, pnp_d))) { 932 ipid->vendor, ipid->function, pnp_d))) {
933 int err; 933 int err;
934 934
935 printk(KERN_INFO "HiSax: %s detected\n", 935 printk(KERN_INFO "HiSax: %s detected\n",
936 (char *)ipid->driver_data); 936 (char *)ipid->driver_data);
937 pnp_disable_dev(pnp_d); 937 pnp_disable_dev(pnp_d);
938 err = pnp_activate_dev(pnp_d); 938 err = pnp_activate_dev(pnp_d);
939 if (err<0) { 939 if (err < 0) {
940 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 940 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
941 __func__, err); 941 __func__, err);
942 return(0); 942 return (0);
943 } 943 }
944 card->para[1] = pnp_port_start(pnp_d, 0); 944 card->para[1] = pnp_port_start(pnp_d, 0);
945 card->para[0] = pnp_irq(pnp_d, 0); 945 card->para[0] = pnp_irq(pnp_d, 0);
946 946
947 if (!card->para[0] || !card->para[1]) { 947 if (!card->para[0] || !card->para[1]) {
948 printk(KERN_ERR "Elsa PnP:some resources are missing %ld/%lx\n", 948 printk(KERN_ERR "Elsa PnP:some resources are missing %ld/%lx\n",
949 card->para[0], card->para[1]); 949 card->para[0], card->para[1]);
950 pnp_disable_dev(pnp_d); 950 pnp_disable_dev(pnp_d);
951 return(0); 951 return (0);
952 } 952 }
953 if (ipid->function == ISAPNP_FUNCTION(0x133)) 953 if (ipid->function == ISAPNP_FUNCTION(0x133))
954 cs->subtyp = ELSA_QS1000; 954 cs->subtyp = ELSA_QS1000;
@@ -957,20 +957,20 @@ setup_elsa_isapnp(struct IsdnCard *card)
957 break; 957 break;
958 } else { 958 } else {
959 printk(KERN_ERR "Elsa PnP: PnP error card found, no device\n"); 959 printk(KERN_ERR "Elsa PnP: PnP error card found, no device\n");
960 return(0); 960 return (0);
961 } 961 }
962 } 962 }
963 ipid++; 963 ipid++;
964 pnp_c=NULL; 964 pnp_c = NULL;
965 } 965 }
966 if (!ipid->card_vendor) { 966 if (!ipid->card_vendor) {
967 printk(KERN_INFO "Elsa PnP: no ISAPnP card found\n"); 967 printk(KERN_INFO "Elsa PnP: no ISAPnP card found\n");
968 return(0); 968 return (0);
969 } 969 }
970 } 970 }
971#endif /* __ISAPNP__ */ 971#endif /* __ISAPNP__ */
972 972
973 if (card->para[1] && card->para[0]) { 973 if (card->para[1] && card->para[0]) {
974 cs->hw.elsa.base = card->para[1]; 974 cs->hw.elsa.base = card->para[1];
975 cs->irq = card->para[0]; 975 cs->irq = card->para[0];
976 if (!cs->subtyp) 976 if (!cs->subtyp)
@@ -1027,8 +1027,8 @@ setup_elsa_pcmcia(struct IsdnCard *card)
1027} 1027}
1028 1028
1029#ifdef CONFIG_PCI 1029#ifdef CONFIG_PCI
1030static struct pci_dev *dev_qs1000 __devinitdata = NULL; 1030static struct pci_dev *dev_qs1000 __devinitdata = NULL;
1031static struct pci_dev *dev_qs3000 __devinitdata = NULL; 1031static struct pci_dev *dev_qs3000 __devinitdata = NULL;
1032 1032
1033static int __devinit 1033static int __devinit
1034setup_elsa_pci(struct IsdnCard *card) 1034setup_elsa_pci(struct IsdnCard *card)
@@ -1037,33 +1037,33 @@ setup_elsa_pci(struct IsdnCard *card)
1037 1037
1038 cs->subtyp = 0; 1038 cs->subtyp = 0;
1039 if ((dev_qs1000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA, 1039 if ((dev_qs1000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA,
1040 PCI_DEVICE_ID_ELSA_MICROLINK, dev_qs1000))) { 1040 PCI_DEVICE_ID_ELSA_MICROLINK, dev_qs1000))) {
1041 if (pci_enable_device(dev_qs1000)) 1041 if (pci_enable_device(dev_qs1000))
1042 return(0); 1042 return (0);
1043 cs->subtyp = ELSA_QS1000PCI; 1043 cs->subtyp = ELSA_QS1000PCI;
1044 cs->irq = dev_qs1000->irq; 1044 cs->irq = dev_qs1000->irq;
1045 cs->hw.elsa.cfg = pci_resource_start(dev_qs1000, 1); 1045 cs->hw.elsa.cfg = pci_resource_start(dev_qs1000, 1);
1046 cs->hw.elsa.base = pci_resource_start(dev_qs1000, 3); 1046 cs->hw.elsa.base = pci_resource_start(dev_qs1000, 3);
1047 } else if ((dev_qs3000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA, 1047 } else if ((dev_qs3000 = hisax_find_pci_device(PCI_VENDOR_ID_ELSA,
1048 PCI_DEVICE_ID_ELSA_QS3000, dev_qs3000))) { 1048 PCI_DEVICE_ID_ELSA_QS3000, dev_qs3000))) {
1049 if (pci_enable_device(dev_qs3000)) 1049 if (pci_enable_device(dev_qs3000))
1050 return(0); 1050 return (0);
1051 cs->subtyp = ELSA_QS3000PCI; 1051 cs->subtyp = ELSA_QS3000PCI;
1052 cs->irq = dev_qs3000->irq; 1052 cs->irq = dev_qs3000->irq;
1053 cs->hw.elsa.cfg = pci_resource_start(dev_qs3000, 1); 1053 cs->hw.elsa.cfg = pci_resource_start(dev_qs3000, 1);
1054 cs->hw.elsa.base = pci_resource_start(dev_qs3000, 3); 1054 cs->hw.elsa.base = pci_resource_start(dev_qs3000, 3);
1055 } else { 1055 } else {
1056 printk(KERN_WARNING "Elsa: No PCI card found\n"); 1056 printk(KERN_WARNING "Elsa: No PCI card found\n");
1057 return(0); 1057 return (0);
1058 } 1058 }
1059 if (!cs->irq) { 1059 if (!cs->irq) {
1060 printk(KERN_WARNING "Elsa: No IRQ for PCI card found\n"); 1060 printk(KERN_WARNING "Elsa: No IRQ for PCI card found\n");
1061 return(0); 1061 return (0);
1062 } 1062 }
1063 1063
1064 if (!(cs->hw.elsa.base && cs->hw.elsa.cfg)) { 1064 if (!(cs->hw.elsa.base && cs->hw.elsa.cfg)) {
1065 printk(KERN_WARNING "Elsa: No IO-Adr for PCI card found\n"); 1065 printk(KERN_WARNING "Elsa: No IO-Adr for PCI card found\n");
1066 return(0); 1066 return (0);
1067 } 1067 }
1068 if ((cs->hw.elsa.cfg & 0xff) || (cs->hw.elsa.base & 0xf)) { 1068 if ((cs->hw.elsa.cfg & 0xff) || (cs->hw.elsa.base & 0xf)) {
1069 printk(KERN_WARNING "Elsa: You may have a wrong PCI bios\n"); 1069 printk(KERN_WARNING "Elsa: You may have a wrong PCI bios\n");
@@ -1071,8 +1071,8 @@ setup_elsa_pci(struct IsdnCard *card)
1071 printk(KERN_WARNING "Elsa: Documentation/isdn/README.HiSax\n"); 1071 printk(KERN_WARNING "Elsa: Documentation/isdn/README.HiSax\n");
1072 } 1072 }
1073 cs->hw.elsa.ale = cs->hw.elsa.base; 1073 cs->hw.elsa.ale = cs->hw.elsa.base;
1074 cs->hw.elsa.isac = cs->hw.elsa.base +1; 1074 cs->hw.elsa.isac = cs->hw.elsa.base + 1;
1075 cs->hw.elsa.hscx = cs->hw.elsa.base +1; 1075 cs->hw.elsa.hscx = cs->hw.elsa.base + 1;
1076 test_and_set_bit(HW_IPAC, &cs->HW_Flags); 1076 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
1077 cs->hw.elsa.timer = 0; 1077 cs->hw.elsa.timer = 0;
1078 cs->hw.elsa.trig = 0; 1078 cs->hw.elsa.trig = 0;
@@ -1104,27 +1104,27 @@ setup_elsa_common(struct IsdnCard *card)
1104 int bytecnt; 1104 int bytecnt;
1105 1105
1106 switch (cs->subtyp) { 1106 switch (cs->subtyp) {
1107 case ELSA_PC: 1107 case ELSA_PC:
1108 case ELSA_PCC8: 1108 case ELSA_PCC8:
1109 case ELSA_PCC16: 1109 case ELSA_PCC16:
1110 case ELSA_QS1000: 1110 case ELSA_QS1000:
1111 case ELSA_PCMCIA: 1111 case ELSA_PCMCIA:
1112 case ELSA_PCMCIA_IPAC: 1112 case ELSA_PCMCIA_IPAC:
1113 bytecnt = 8; 1113 bytecnt = 8;
1114 break; 1114 break;
1115 case ELSA_PCFPRO: 1115 case ELSA_PCFPRO:
1116 case ELSA_PCF: 1116 case ELSA_PCF:
1117 case ELSA_QS3000: 1117 case ELSA_QS3000:
1118 case ELSA_QS3000PCI: 1118 case ELSA_QS3000PCI:
1119 bytecnt = 16; 1119 bytecnt = 16;
1120 break; 1120 break;
1121 case ELSA_QS1000PCI: 1121 case ELSA_QS1000PCI:
1122 bytecnt = 2; 1122 bytecnt = 2;
1123 break; 1123 break;
1124 default: 1124 default:
1125 printk(KERN_WARNING 1125 printk(KERN_WARNING
1126 "Unknown ELSA subtype %d\n", cs->subtyp); 1126 "Unknown ELSA subtype %d\n", cs->subtyp);
1127 return (0); 1127 return (0);
1128 } 1128 }
1129 /* In case of the elsa pcmcia card, this region is in use, 1129 /* In case of the elsa pcmcia card, this region is in use,
1130 reserved for us by the card manager. So we do not check it 1130 reserved for us by the card manager. So we do not check it
@@ -1140,8 +1140,8 @@ setup_elsa_common(struct IsdnCard *card)
1140 if (!request_region(cs->hw.elsa.cfg, 0x80, "elsa isdn pci")) { 1140 if (!request_region(cs->hw.elsa.cfg, 0x80, "elsa isdn pci")) {
1141 printk(KERN_WARNING 1141 printk(KERN_WARNING
1142 "HiSax: ELSA pci port %x-%x already in use\n", 1142 "HiSax: ELSA pci port %x-%x already in use\n",
1143 cs->hw.elsa.cfg, 1143 cs->hw.elsa.cfg,
1144 cs->hw.elsa.cfg + 0x80); 1144 cs->hw.elsa.cfg + 0x80);
1145 release_region(cs->hw.elsa.base, bytecnt); 1145 release_region(cs->hw.elsa.base, bytecnt);
1146 return (0); 1146 return (0);
1147 } 1147 }
@@ -1166,7 +1166,7 @@ setup_elsa_common(struct IsdnCard *card)
1166 return (0); 1166 return (0);
1167 } 1167 }
1168 } 1168 }
1169 HZDELAY((HZ/100) + 1); /* wait >=10 ms */ 1169 HZDELAY((HZ / 100) + 1); /* wait >=10 ms */
1170 if (TimerRun(cs)) { 1170 if (TimerRun(cs)) {
1171 printk(KERN_WARNING "Elsa: timer do not run down\n"); 1171 printk(KERN_WARNING "Elsa: timer do not run down\n");
1172 release_io_elsa(cs); 1172 release_io_elsa(cs);
@@ -1195,7 +1195,7 @@ setup_elsa_common(struct IsdnCard *card)
1195 ISACVersion(cs, "Elsa:"); 1195 ISACVersion(cs, "Elsa:");
1196 if (HscxVersion(cs, "Elsa:")) { 1196 if (HscxVersion(cs, "Elsa:")) {
1197 printk(KERN_WARNING 1197 printk(KERN_WARNING
1198 "Elsa: wrong HSCX versions check IO address\n"); 1198 "Elsa: wrong HSCX versions check IO address\n");
1199 release_io_elsa(cs); 1199 release_io_elsa(cs);
1200 return (0); 1200 return (0);
1201 } 1201 }
@@ -1244,7 +1244,7 @@ setup_elsa(struct IsdnCard *card)
1244 if (!rc) 1244 if (!rc)
1245 return (0); 1245 return (0);
1246 1246
1247 } else 1247 } else
1248 return (0); 1248 return (0);
1249 1249
1250 return setup_elsa_common(card); 1250 return setup_elsa_common(card);
diff --git a/drivers/isdn/hisax/elsa_cs.c b/drivers/isdn/hisax/elsa_cs.c
index f0b6c0ef99bb..fe254e74a850 100644
--- a/drivers/isdn/hisax/elsa_cs.c
+++ b/drivers/isdn/hisax/elsa_cs.c
@@ -1,39 +1,39 @@
1/*====================================================================== 1/*======================================================================
2 2
3 An elsa_cs PCMCIA client driver 3 An elsa_cs PCMCIA client driver
4 4
5 This driver is for the Elsa PCM ISDN Cards, i.e. the MicroLink 5 This driver is for the Elsa PCM ISDN Cards, i.e. the MicroLink
6 6
7 7
8 The contents of this file are subject to the Mozilla Public 8 The contents of this file are subject to the Mozilla Public
9 License Version 1.1 (the "License"); you may not use this file 9 License Version 1.1 (the "License"); you may not use this file
10 except in compliance with the License. You may obtain a copy of 10 except in compliance with the License. You may obtain a copy of
11 the License at http://www.mozilla.org/MPL/ 11 the License at http://www.mozilla.org/MPL/
12 12
13 Software distributed under the License is distributed on an "AS 13 Software distributed under the License is distributed on an "AS
14 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 14 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
15 implied. See the License for the specific language governing 15 implied. See the License for the specific language governing
16 rights and limitations under the License. 16 rights and limitations under the License.
17 17
18 The initial developer of the original code is David A. Hinds 18 The initial developer of the original code is David A. Hinds
19 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 19 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
20 are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 20 are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
21 21
22 Modifications from dummy_cs.c are Copyright (C) 1999-2001 Klaus 22 Modifications from dummy_cs.c are Copyright (C) 1999-2001 Klaus
23 Lichtenwalder <Lichtenwalder@ACM.org>. All Rights Reserved. 23 Lichtenwalder <Lichtenwalder@ACM.org>. All Rights Reserved.
24 24
25 Alternatively, the contents of this file may be used under the 25 Alternatively, the contents of this file may be used under the
26 terms of the GNU General Public License version 2 (the "GPL"), in 26 terms of the GNU General Public License version 2 (the "GPL"), in
27 which case the provisions of the GPL are applicable instead of the 27 which case the provisions of the GPL are applicable instead of the
28 above. If you wish to allow the use of your version of this file 28 above. If you wish to allow the use of your version of this file
29 only under the terms of the GPL and not to allow others to use 29 only under the terms of the GPL and not to allow others to use
30 your version of this file under the MPL, indicate your decision 30 your version of this file under the MPL, indicate your decision
31 by deleting the provisions above and replace them with the notice 31 by deleting the provisions above and replace them with the notice
32 and other provisions required by the GPL. If you do not delete 32 and other provisions required by the GPL. If you do not delete
33 the provisions above, a recipient may use your version of this 33 the provisions above, a recipient may use your version of this
34 file under either the MPL or the GPL. 34 file under either the MPL or the GPL.
35 35
36======================================================================*/ 36 ======================================================================*/
37 37
38#include <linux/module.h> 38#include <linux/module.h>
39#include <linux/kernel.h> 39#include <linux/kernel.h>
@@ -63,32 +63,32 @@ MODULE_LICENSE("Dual MPL/GPL");
63static int protocol = 2; /* EURO-ISDN Default */ 63static int protocol = 2; /* EURO-ISDN Default */
64module_param(protocol, int, 0); 64module_param(protocol, int, 0);
65 65
66static int elsa_cs_config(struct pcmcia_device *link) __devinit ; 66static int elsa_cs_config(struct pcmcia_device *link) __devinit;
67static void elsa_cs_release(struct pcmcia_device *link); 67static void elsa_cs_release(struct pcmcia_device *link);
68static void elsa_cs_detach(struct pcmcia_device *p_dev) __devexit; 68static void elsa_cs_detach(struct pcmcia_device *p_dev) __devexit;
69 69
70typedef struct local_info_t { 70typedef struct local_info_t {
71 struct pcmcia_device *p_dev; 71 struct pcmcia_device *p_dev;
72 int busy; 72 int busy;
73 int cardnr; 73 int cardnr;
74} local_info_t; 74} local_info_t;
75 75
76static int __devinit elsa_cs_probe(struct pcmcia_device *link) 76static int __devinit elsa_cs_probe(struct pcmcia_device *link)
77{ 77{
78 local_info_t *local; 78 local_info_t *local;
79 79
80 dev_dbg(&link->dev, "elsa_cs_attach()\n"); 80 dev_dbg(&link->dev, "elsa_cs_attach()\n");
81 81
82 /* Allocate space for private device-specific data */ 82 /* Allocate space for private device-specific data */
83 local = kzalloc(sizeof(local_info_t), GFP_KERNEL); 83 local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
84 if (!local) return -ENOMEM; 84 if (!local) return -ENOMEM;
85 85
86 local->p_dev = link; 86 local->p_dev = link;
87 link->priv = local; 87 link->priv = local;
88 88
89 local->cardnr = -1; 89 local->cardnr = -1;
90 90
91 return elsa_cs_config(link); 91 return elsa_cs_config(link);
92} /* elsa_cs_attach */ 92} /* elsa_cs_attach */
93 93
94static void __devexit elsa_cs_detach(struct pcmcia_device *link) 94static void __devexit elsa_cs_detach(struct pcmcia_device *link)
@@ -129,64 +129,64 @@ static int elsa_cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
129 129
130static int __devinit elsa_cs_config(struct pcmcia_device *link) 130static int __devinit elsa_cs_config(struct pcmcia_device *link)
131{ 131{
132 int i; 132 int i;
133 IsdnCard_t icard; 133 IsdnCard_t icard;
134 134
135 dev_dbg(&link->dev, "elsa_config(0x%p)\n", link); 135 dev_dbg(&link->dev, "elsa_config(0x%p)\n", link);
136 136
137 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; 137 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
138 138
139 i = pcmcia_loop_config(link, elsa_cs_configcheck, NULL); 139 i = pcmcia_loop_config(link, elsa_cs_configcheck, NULL);
140 if (i != 0) 140 if (i != 0)
141 goto failed; 141 goto failed;
142 142
143 if (!link->irq) 143 if (!link->irq)
144 goto failed; 144 goto failed;
145 145
146 i = pcmcia_enable_device(link); 146 i = pcmcia_enable_device(link);
147 if (i != 0) 147 if (i != 0)
148 goto failed; 148 goto failed;
149 149
150 icard.para[0] = link->irq; 150 icard.para[0] = link->irq;
151 icard.para[1] = link->resource[0]->start; 151 icard.para[1] = link->resource[0]->start;
152 icard.protocol = protocol; 152 icard.protocol = protocol;
153 icard.typ = ISDN_CTYPE_ELSA_PCMCIA; 153 icard.typ = ISDN_CTYPE_ELSA_PCMCIA;
154 154
155 i = hisax_init_pcmcia(link, &(((local_info_t*)link->priv)->busy), &icard); 155 i = hisax_init_pcmcia(link, &(((local_info_t *)link->priv)->busy), &icard);
156 if (i < 0) { 156 if (i < 0) {
157 printk(KERN_ERR "elsa_cs: failed to initialize Elsa " 157 printk(KERN_ERR "elsa_cs: failed to initialize Elsa "
158 "PCMCIA %d with %pR\n", i, link->resource[0]); 158 "PCMCIA %d with %pR\n", i, link->resource[0]);
159 elsa_cs_release(link); 159 elsa_cs_release(link);
160 } else 160 } else
161 ((local_info_t*)link->priv)->cardnr = i; 161 ((local_info_t *)link->priv)->cardnr = i;
162 162
163 return 0; 163 return 0;
164failed: 164failed:
165 elsa_cs_release(link); 165 elsa_cs_release(link);
166 return -ENODEV; 166 return -ENODEV;
167} /* elsa_cs_config */ 167} /* elsa_cs_config */
168 168
169static void elsa_cs_release(struct pcmcia_device *link) 169static void elsa_cs_release(struct pcmcia_device *link)
170{ 170{
171 local_info_t *local = link->priv; 171 local_info_t *local = link->priv;
172 172
173 dev_dbg(&link->dev, "elsa_cs_release(0x%p)\n", link); 173 dev_dbg(&link->dev, "elsa_cs_release(0x%p)\n", link);
174 174
175 if (local) { 175 if (local) {
176 if (local->cardnr >= 0) { 176 if (local->cardnr >= 0) {
177 /* no unregister function with hisax */ 177 /* no unregister function with hisax */
178 HiSax_closecard(local->cardnr); 178 HiSax_closecard(local->cardnr);
179 }
179 } 180 }
180 }
181 181
182 pcmcia_disable_device(link); 182 pcmcia_disable_device(link);
183} /* elsa_cs_release */ 183} /* elsa_cs_release */
184 184
185static int elsa_suspend(struct pcmcia_device *link) 185static int elsa_suspend(struct pcmcia_device *link)
186{ 186{
187 local_info_t *dev = link->priv; 187 local_info_t *dev = link->priv;
188 188
189 dev->busy = 1; 189 dev->busy = 1;
190 190
191 return 0; 191 return 0;
192} 192}
@@ -195,7 +195,7 @@ static int elsa_resume(struct pcmcia_device *link)
195{ 195{
196 local_info_t *dev = link->priv; 196 local_info_t *dev = link->priv;
197 197
198 dev->busy = 0; 198 dev->busy = 0;
199 199
200 return 0; 200 return 0;
201} 201}
diff --git a/drivers/isdn/hisax/elsa_ser.c b/drivers/isdn/hisax/elsa_ser.c
index 3fa9f6171095..d4c98d330bfe 100644
--- a/drivers/isdn/hisax/elsa_ser.c
+++ b/drivers/isdn/hisax/elsa_ser.c
@@ -12,9 +12,9 @@
12#include <linux/slab.h> 12#include <linux/slab.h>
13 13
14#define MAX_MODEM_BUF 256 14#define MAX_MODEM_BUF 256
15#define WAKEUP_CHARS (MAX_MODEM_BUF/2) 15#define WAKEUP_CHARS (MAX_MODEM_BUF / 2)
16#define RS_ISR_PASS_LIMIT 256 16#define RS_ISR_PASS_LIMIT 256
17#define BASE_BAUD ( 1843200 / 16 ) 17#define BASE_BAUD (1843200 / 16)
18 18
19//#define SERIAL_DEBUG_OPEN 1 19//#define SERIAL_DEBUG_OPEN 1
20//#define SERIAL_DEBUG_INTR 1 20//#define SERIAL_DEBUG_INTR 1
@@ -27,8 +27,8 @@
27 27
28#ifdef SERIAL_DEBUG_REG 28#ifdef SERIAL_DEBUG_REG
29static u_char deb[32]; 29static u_char deb[32];
30const char *ModemIn[] = {"RBR","IER","IIR","LCR","MCR","LSR","MSR","SCR"}; 30const char *ModemIn[] = {"RBR", "IER", "IIR", "LCR", "MCR", "LSR", "MSR", "SCR"};
31const char *ModemOut[] = {"THR","IER","FCR","LCR","MCR","LSR","MSR","SCR"}; 31const char *ModemOut[] = {"THR", "IER", "FCR", "LCR", "MCR", "LSR", "MSR", "SCR"};
32#endif 32#endif
33 33
34static char *MInit_1 = "AT&F&C1E0&D2\r\0"; 34static char *MInit_1 = "AT&F&C1E0&D2\r\0";
@@ -49,8 +49,8 @@ static inline unsigned int serial_in(struct IsdnCardState *cs, int offset)
49{ 49{
50#ifdef SERIAL_DEBUG_REG 50#ifdef SERIAL_DEBUG_REG
51 u_int val = inb(cs->hw.elsa.base + 8 + offset); 51 u_int val = inb(cs->hw.elsa.base + 8 + offset);
52 debugl1(cs,"in %s %02x",ModemIn[offset], val); 52 debugl1(cs, "in %s %02x", ModemIn[offset], val);
53 return(val); 53 return (val);
54#else 54#else
55 return inb(cs->hw.elsa.base + 8 + offset); 55 return inb(cs->hw.elsa.base + 8 + offset);
56#endif 56#endif
@@ -61,12 +61,12 @@ static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset)
61#ifdef SERIAL_DEBUG_REG 61#ifdef SERIAL_DEBUG_REG
62#ifdef ELSA_SERIAL_NOPAUSE_IO 62#ifdef ELSA_SERIAL_NOPAUSE_IO
63 u_int val = inb(cs->hw.elsa.base + 8 + offset); 63 u_int val = inb(cs->hw.elsa.base + 8 + offset);
64 debugl1(cs,"inp %s %02x",ModemIn[offset], val); 64 debugl1(cs, "inp %s %02x", ModemIn[offset], val);
65#else 65#else
66 u_int val = inb_p(cs->hw.elsa.base + 8 + offset); 66 u_int val = inb_p(cs->hw.elsa.base + 8 + offset);
67 debugl1(cs,"inP %s %02x",ModemIn[offset], val); 67 debugl1(cs, "inP %s %02x", ModemIn[offset], val);
68#endif 68#endif
69 return(val); 69 return (val);
70#else 70#else
71#ifdef ELSA_SERIAL_NOPAUSE_IO 71#ifdef ELSA_SERIAL_NOPAUSE_IO
72 return inb(cs->hw.elsa.base + 8 + offset); 72 return inb(cs->hw.elsa.base + 8 + offset);
@@ -79,7 +79,7 @@ static inline unsigned int serial_inp(struct IsdnCardState *cs, int offset)
79static inline void serial_out(struct IsdnCardState *cs, int offset, int value) 79static inline void serial_out(struct IsdnCardState *cs, int offset, int value)
80{ 80{
81#ifdef SERIAL_DEBUG_REG 81#ifdef SERIAL_DEBUG_REG
82 debugl1(cs,"out %s %02x",ModemOut[offset], value); 82 debugl1(cs, "out %s %02x", ModemOut[offset], value);
83#endif 83#endif
84 outb(value, cs->hw.elsa.base + 8 + offset); 84 outb(value, cs->hw.elsa.base + 8 + offset);
85} 85}
@@ -89,15 +89,15 @@ static inline void serial_outp(struct IsdnCardState *cs, int offset,
89{ 89{
90#ifdef SERIAL_DEBUG_REG 90#ifdef SERIAL_DEBUG_REG
91#ifdef ELSA_SERIAL_NOPAUSE_IO 91#ifdef ELSA_SERIAL_NOPAUSE_IO
92 debugl1(cs,"outp %s %02x",ModemOut[offset], value); 92 debugl1(cs, "outp %s %02x", ModemOut[offset], value);
93#else 93#else
94 debugl1(cs,"outP %s %02x",ModemOut[offset], value); 94 debugl1(cs, "outP %s %02x", ModemOut[offset], value);
95#endif 95#endif
96#endif 96#endif
97#ifdef ELSA_SERIAL_NOPAUSE_IO 97#ifdef ELSA_SERIAL_NOPAUSE_IO
98 outb(value, cs->hw.elsa.base + 8 + offset); 98 outb(value, cs->hw.elsa.base + 8 + offset);
99#else 99#else
100 outb_p(value, cs->hw.elsa.base + 8 + offset); 100 outb_p(value, cs->hw.elsa.base + 8 + offset);
101#endif 101#endif
102} 102}
103 103
@@ -131,7 +131,7 @@ static void change_speed(struct IsdnCardState *cs, int baud)
131 cs->hw.elsa.IER |= UART_IER_MSI; 131 cs->hw.elsa.IER |= UART_IER_MSI;
132 serial_outp(cs, UART_IER, cs->hw.elsa.IER); 132 serial_outp(cs, UART_IER, cs->hw.elsa.IER);
133 133
134 debugl1(cs,"modem quot=0x%x", quot); 134 debugl1(cs, "modem quot=0x%x", quot);
135 serial_outp(cs, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */ 135 serial_outp(cs, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
136 serial_outp(cs, UART_DLL, quot & 0xff); /* LS of divisor */ 136 serial_outp(cs, UART_DLL, quot & 0xff); /* LS of divisor */
137 serial_outp(cs, UART_DLM, quot >> 8); /* MS of divisor */ 137 serial_outp(cs, UART_DLM, quot >> 8); /* MS of divisor */
@@ -141,7 +141,7 @@ static void change_speed(struct IsdnCardState *cs, int baud)
141 141
142static int mstartup(struct IsdnCardState *cs) 142static int mstartup(struct IsdnCardState *cs)
143{ 143{
144 int retval=0; 144 int retval = 0;
145 145
146 /* 146 /*
147 * Clear the FIFO buffers and disable them 147 * Clear the FIFO buffers and disable them
@@ -158,7 +158,7 @@ static int mstartup(struct IsdnCardState *cs)
158 retval = -ENODEV; 158 retval = -ENODEV;
159 goto errout; 159 goto errout;
160 } 160 }
161 161
162 /* 162 /*
163 * Clear the interrupt registers. 163 * Clear the interrupt registers.
164 */ 164 */
@@ -167,20 +167,20 @@ static int mstartup(struct IsdnCardState *cs)
167 (void) serial_inp(cs, UART_MSR); 167 (void) serial_inp(cs, UART_MSR);
168 168
169 /* 169 /*
170 * Now, initialize the UART 170 * Now, initialize the UART
171 */ 171 */
172 serial_outp(cs, UART_LCR, UART_LCR_WLEN8); /* reset DLAB */ 172 serial_outp(cs, UART_LCR, UART_LCR_WLEN8); /* reset DLAB */
173 173
174 cs->hw.elsa.MCR = 0; 174 cs->hw.elsa.MCR = 0;
175 cs->hw.elsa.MCR = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2; 175 cs->hw.elsa.MCR = UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2;
176 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR); 176 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR);
177 177
178 /* 178 /*
179 * Finally, enable interrupts 179 * Finally, enable interrupts
180 */ 180 */
181 cs->hw.elsa.IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; 181 cs->hw.elsa.IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
182 serial_outp(cs, UART_IER, cs->hw.elsa.IER); /* enable interrupts */ 182 serial_outp(cs, UART_IER, cs->hw.elsa.IER); /* enable interrupts */
183 183
184 /* 184 /*
185 * And clear the interrupt registers again for luck. 185 * And clear the interrupt registers again for luck.
186 */ 186 */
@@ -190,7 +190,7 @@ static int mstartup(struct IsdnCardState *cs)
190 (void)serial_inp(cs, UART_MSR); 190 (void)serial_inp(cs, UART_MSR);
191 191
192 cs->hw.elsa.transcnt = cs->hw.elsa.transp = 0; 192 cs->hw.elsa.transcnt = cs->hw.elsa.transp = 0;
193 cs->hw.elsa.rcvcnt = cs->hw.elsa.rcvp =0; 193 cs->hw.elsa.rcvcnt = cs->hw.elsa.rcvp = 0;
194 194
195 /* 195 /*
196 * and set the speed of the serial port 196 * and set the speed of the serial port
@@ -211,7 +211,7 @@ static void mshutdown(struct IsdnCardState *cs)
211#ifdef SERIAL_DEBUG_OPEN 211#ifdef SERIAL_DEBUG_OPEN
212 printk(KERN_DEBUG"Shutting down serial ...."); 212 printk(KERN_DEBUG"Shutting down serial ....");
213#endif 213#endif
214 214
215 /* 215 /*
216 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq 216 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
217 * here so the queue might never be waken up 217 * here so the queue might never be waken up
@@ -220,17 +220,17 @@ static void mshutdown(struct IsdnCardState *cs)
220 cs->hw.elsa.IER = 0; 220 cs->hw.elsa.IER = 0;
221 serial_outp(cs, UART_IER, 0x00); /* disable all intrs */ 221 serial_outp(cs, UART_IER, 0x00); /* disable all intrs */
222 cs->hw.elsa.MCR &= ~UART_MCR_OUT2; 222 cs->hw.elsa.MCR &= ~UART_MCR_OUT2;
223 223
224 /* disable break condition */ 224 /* disable break condition */
225 serial_outp(cs, UART_LCR, serial_inp(cs, UART_LCR) & ~UART_LCR_SBC); 225 serial_outp(cs, UART_LCR, serial_inp(cs, UART_LCR) & ~UART_LCR_SBC);
226 226
227 cs->hw.elsa.MCR &= ~(UART_MCR_DTR|UART_MCR_RTS); 227 cs->hw.elsa.MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
228 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR); 228 serial_outp(cs, UART_MCR, cs->hw.elsa.MCR);
229 229
230 /* disable FIFO's */ 230 /* disable FIFO's */
231 serial_outp(cs, UART_FCR, (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT)); 231 serial_outp(cs, UART_FCR, (UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT));
232 serial_inp(cs, UART_RX); /* read data port to reset things */ 232 serial_inp(cs, UART_RX); /* read data port to reset things */
233 233
234#ifdef SERIAL_DEBUG_OPEN 234#ifdef SERIAL_DEBUG_OPEN
235 printk(" done\n"); 235 printk(" done\n");
236#endif 236#endif
@@ -238,10 +238,10 @@ static void mshutdown(struct IsdnCardState *cs)
238 238
239static inline int 239static inline int
240write_modem(struct BCState *bcs) { 240write_modem(struct BCState *bcs) {
241 int ret=0; 241 int ret = 0;
242 struct IsdnCardState *cs = bcs->cs; 242 struct IsdnCardState *cs = bcs->cs;
243 int count, len, fp; 243 int count, len, fp;
244 244
245 if (!bcs->tx_skb) 245 if (!bcs->tx_skb)
246 return 0; 246 return 0;
247 if (bcs->tx_skb->len <= 0) 247 if (bcs->tx_skb->len <= 0)
@@ -250,7 +250,7 @@ write_modem(struct BCState *bcs) {
250 if (len > MAX_MODEM_BUF - cs->hw.elsa.transcnt) 250 if (len > MAX_MODEM_BUF - cs->hw.elsa.transcnt)
251 len = MAX_MODEM_BUF - cs->hw.elsa.transcnt; 251 len = MAX_MODEM_BUF - cs->hw.elsa.transcnt;
252 fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp; 252 fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
253 fp &= (MAX_MODEM_BUF -1); 253 fp &= (MAX_MODEM_BUF - 1);
254 count = len; 254 count = len;
255 if (count > MAX_MODEM_BUF - fp) { 255 if (count > MAX_MODEM_BUF - fp) {
256 count = MAX_MODEM_BUF - fp; 256 count = MAX_MODEM_BUF - fp;
@@ -267,25 +267,25 @@ write_modem(struct BCState *bcs) {
267 skb_pull(bcs->tx_skb, count); 267 skb_pull(bcs->tx_skb, count);
268 cs->hw.elsa.transcnt += count; 268 cs->hw.elsa.transcnt += count;
269 ret += count; 269 ret += count;
270 270
271 if (cs->hw.elsa.transcnt && 271 if (cs->hw.elsa.transcnt &&
272 !(cs->hw.elsa.IER & UART_IER_THRI)) { 272 !(cs->hw.elsa.IER & UART_IER_THRI)) {
273 cs->hw.elsa.IER |= UART_IER_THRI; 273 cs->hw.elsa.IER |= UART_IER_THRI;
274 serial_outp(cs, UART_IER, cs->hw.elsa.IER); 274 serial_outp(cs, UART_IER, cs->hw.elsa.IER);
275 } 275 }
276 return(ret); 276 return (ret);
277} 277}
278 278
279static inline void 279static inline void
280modem_fill(struct BCState *bcs) { 280modem_fill(struct BCState *bcs) {
281 281
282 if (bcs->tx_skb) { 282 if (bcs->tx_skb) {
283 if (bcs->tx_skb->len) { 283 if (bcs->tx_skb->len) {
284 write_modem(bcs); 284 write_modem(bcs);
285 return; 285 return;
286 } else { 286 } else {
287 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 287 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
288 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 288 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
289 u_long flags; 289 u_long flags;
290 spin_lock_irqsave(&bcs->aclock, flags); 290 spin_lock_irqsave(&bcs->aclock, flags);
291 bcs->ackcnt += bcs->hw.hscx.count; 291 bcs->ackcnt += bcs->hw.hscx.count;
@@ -322,7 +322,7 @@ static inline void receive_chars(struct IsdnCardState *cs,
322#endif 322#endif
323 if (*status & (UART_LSR_BI | UART_LSR_PE | 323 if (*status & (UART_LSR_BI | UART_LSR_PE |
324 UART_LSR_FE | UART_LSR_OE)) { 324 UART_LSR_FE | UART_LSR_OE)) {
325 325
326#ifdef SERIAL_DEBUG_INTR 326#ifdef SERIAL_DEBUG_INTR
327 printk("handling exept...."); 327 printk("handling exept....");
328#endif 328#endif
@@ -333,9 +333,9 @@ static inline void receive_chars(struct IsdnCardState *cs,
333 if (!(skb = dev_alloc_skb(cs->hw.elsa.rcvcnt))) 333 if (!(skb = dev_alloc_skb(cs->hw.elsa.rcvcnt)))
334 printk(KERN_WARNING "ElsaSER: receive out of memory\n"); 334 printk(KERN_WARNING "ElsaSER: receive out of memory\n");
335 else { 335 else {
336 memcpy(skb_put(skb, cs->hw.elsa.rcvcnt), cs->hw.elsa.rcvbuf, 336 memcpy(skb_put(skb, cs->hw.elsa.rcvcnt), cs->hw.elsa.rcvbuf,
337 cs->hw.elsa.rcvcnt); 337 cs->hw.elsa.rcvcnt);
338 skb_queue_tail(& cs->hw.elsa.bcs->rqueue, skb); 338 skb_queue_tail(&cs->hw.elsa.bcs->rqueue, skb);
339 } 339 }
340 schedule_event(cs->hw.elsa.bcs, B_RCVBUFREADY); 340 schedule_event(cs->hw.elsa.bcs, B_RCVBUFREADY);
341 } else { 341 } else {
@@ -352,10 +352,10 @@ static inline void receive_chars(struct IsdnCardState *cs,
352static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done) 352static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done)
353{ 353{
354 int count; 354 int count;
355 355
356 debugl1(cs, "transmit_chars: p(%x) cnt(%x)", cs->hw.elsa.transp, 356 debugl1(cs, "transmit_chars: p(%x) cnt(%x)", cs->hw.elsa.transp,
357 cs->hw.elsa.transcnt); 357 cs->hw.elsa.transcnt);
358 358
359 if (cs->hw.elsa.transcnt <= 0) { 359 if (cs->hw.elsa.transcnt <= 0) {
360 cs->hw.elsa.IER &= ~UART_IER_THRI; 360 cs->hw.elsa.IER &= ~UART_IER_THRI;
361 serial_out(cs, UART_IER, cs->hw.elsa.IER); 361 serial_out(cs, UART_IER, cs->hw.elsa.IER);
@@ -365,11 +365,11 @@ static inline void transmit_chars(struct IsdnCardState *cs, int *intr_done)
365 do { 365 do {
366 serial_outp(cs, UART_TX, cs->hw.elsa.transbuf[cs->hw.elsa.transp++]); 366 serial_outp(cs, UART_TX, cs->hw.elsa.transbuf[cs->hw.elsa.transp++]);
367 if (cs->hw.elsa.transp >= MAX_MODEM_BUF) 367 if (cs->hw.elsa.transp >= MAX_MODEM_BUF)
368 cs->hw.elsa.transp=0; 368 cs->hw.elsa.transp = 0;
369 if (--cs->hw.elsa.transcnt <= 0) 369 if (--cs->hw.elsa.transcnt <= 0)
370 break; 370 break;
371 } while (--count > 0); 371 } while (--count > 0);
372 if ((cs->hw.elsa.transcnt < WAKEUP_CHARS) && (cs->hw.elsa.MFlag==2)) 372 if ((cs->hw.elsa.transcnt < WAKEUP_CHARS) && (cs->hw.elsa.MFlag == 2))
373 modem_fill(cs->hw.elsa.bcs); 373 modem_fill(cs->hw.elsa.bcs);
374 374
375#ifdef SERIAL_DEBUG_INTR 375#ifdef SERIAL_DEBUG_INTR
@@ -388,14 +388,14 @@ static void rs_interrupt_elsa(struct IsdnCardState *cs)
388{ 388{
389 int status, iir, msr; 389 int status, iir, msr;
390 int pass_counter = 0; 390 int pass_counter = 0;
391 391
392#ifdef SERIAL_DEBUG_INTR 392#ifdef SERIAL_DEBUG_INTR
393 printk(KERN_DEBUG "rs_interrupt_single(%d)...", cs->irq); 393 printk(KERN_DEBUG "rs_interrupt_single(%d)...", cs->irq);
394#endif 394#endif
395 395
396 do { 396 do {
397 status = serial_inp(cs, UART_LSR); 397 status = serial_inp(cs, UART_LSR);
398 debugl1(cs,"rs LSR %02x", status); 398 debugl1(cs, "rs LSR %02x", status);
399#ifdef SERIAL_DEBUG_INTR 399#ifdef SERIAL_DEBUG_INTR
400 printk("status = %x...", status); 400 printk("status = %x...", status);
401#endif 401#endif
@@ -408,10 +408,10 @@ static void rs_interrupt_elsa(struct IsdnCardState *cs)
408 break; 408 break;
409 } 409 }
410 iir = serial_inp(cs, UART_IIR); 410 iir = serial_inp(cs, UART_IIR);
411 debugl1(cs,"rs IIR %02x", iir); 411 debugl1(cs, "rs IIR %02x", iir);
412 if ((iir & 0xf) == 0) { 412 if ((iir & 0xf) == 0) {
413 msr = serial_inp(cs, UART_MSR); 413 msr = serial_inp(cs, UART_MSR);
414 debugl1(cs,"rs MSR %02x", msr); 414 debugl1(cs, "rs MSR %02x", msr);
415 } 415 }
416 } while (!(iir & UART_IIR_NO_INT)); 416 } while (!(iir & UART_IIR_NO_INT));
417#ifdef SERIAL_DEBUG_INTR 417#ifdef SERIAL_DEBUG_INTR
@@ -447,14 +447,14 @@ static void
447modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) { 447modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) {
448 int count, fp; 448 int count, fp;
449 u_char *msg = buf; 449 u_char *msg = buf;
450 450
451 if (!len) 451 if (!len)
452 return; 452 return;
453 if (len > (MAX_MODEM_BUF - cs->hw.elsa.transcnt)) { 453 if (len > (MAX_MODEM_BUF - cs->hw.elsa.transcnt)) {
454 return; 454 return;
455 } 455 }
456 fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp; 456 fp = cs->hw.elsa.transcnt + cs->hw.elsa.transp;
457 fp &= (MAX_MODEM_BUF -1); 457 fp &= (MAX_MODEM_BUF - 1);
458 count = len; 458 count = len;
459 if (count > MAX_MODEM_BUF - fp) { 459 if (count > MAX_MODEM_BUF - fp) {
460 count = MAX_MODEM_BUF - fp; 460 count = MAX_MODEM_BUF - fp;
@@ -466,7 +466,7 @@ modem_write_cmd(struct IsdnCardState *cs, u_char *buf, int len) {
466 } 466 }
467 memcpy(cs->hw.elsa.transbuf + fp, msg, count); 467 memcpy(cs->hw.elsa.transbuf + fp, msg, count);
468 cs->hw.elsa.transcnt += count; 468 cs->hw.elsa.transcnt += count;
469 if (cs->hw.elsa.transcnt && 469 if (cs->hw.elsa.transcnt &&
470 !(cs->hw.elsa.IER & UART_IER_THRI)) { 470 !(cs->hw.elsa.IER & UART_IER_THRI)) {
471 cs->hw.elsa.IER |= UART_IER_THRI; 471 cs->hw.elsa.IER |= UART_IER_THRI;
472 serial_outp(cs, UART_IER, cs->hw.elsa.IER); 472 serial_outp(cs, UART_IER, cs->hw.elsa.IER);
@@ -480,43 +480,43 @@ modem_set_init(struct IsdnCardState *cs) {
480#define RCV_DELAY 20 480#define RCV_DELAY 20
481 modem_write_cmd(cs, MInit_1, strlen(MInit_1)); 481 modem_write_cmd(cs, MInit_1, strlen(MInit_1));
482 timeout = 1000; 482 timeout = 1000;
483 while(timeout-- && cs->hw.elsa.transcnt) 483 while (timeout-- && cs->hw.elsa.transcnt)
484 udelay(1000); 484 udelay(1000);
485 debugl1(cs, "msi tout=%d", timeout); 485 debugl1(cs, "msi tout=%d", timeout);
486 mdelay(RCV_DELAY); 486 mdelay(RCV_DELAY);
487 modem_write_cmd(cs, MInit_2, strlen(MInit_2)); 487 modem_write_cmd(cs, MInit_2, strlen(MInit_2));
488 timeout = 1000; 488 timeout = 1000;
489 while(timeout-- && cs->hw.elsa.transcnt) 489 while (timeout-- && cs->hw.elsa.transcnt)
490 udelay(1000); 490 udelay(1000);
491 debugl1(cs, "msi tout=%d", timeout); 491 debugl1(cs, "msi tout=%d", timeout);
492 mdelay(RCV_DELAY); 492 mdelay(RCV_DELAY);
493 modem_write_cmd(cs, MInit_3, strlen(MInit_3)); 493 modem_write_cmd(cs, MInit_3, strlen(MInit_3));
494 timeout = 1000; 494 timeout = 1000;
495 while(timeout-- && cs->hw.elsa.transcnt) 495 while (timeout-- && cs->hw.elsa.transcnt)
496 udelay(1000); 496 udelay(1000);
497 debugl1(cs, "msi tout=%d", timeout); 497 debugl1(cs, "msi tout=%d", timeout);
498 mdelay(RCV_DELAY); 498 mdelay(RCV_DELAY);
499 modem_write_cmd(cs, MInit_4, strlen(MInit_4)); 499 modem_write_cmd(cs, MInit_4, strlen(MInit_4));
500 timeout = 1000; 500 timeout = 1000;
501 while(timeout-- && cs->hw.elsa.transcnt) 501 while (timeout-- && cs->hw.elsa.transcnt)
502 udelay(1000); 502 udelay(1000);
503 debugl1(cs, "msi tout=%d", timeout); 503 debugl1(cs, "msi tout=%d", timeout);
504 mdelay(RCV_DELAY); 504 mdelay(RCV_DELAY);
505 modem_write_cmd(cs, MInit_5, strlen(MInit_5)); 505 modem_write_cmd(cs, MInit_5, strlen(MInit_5));
506 timeout = 1000; 506 timeout = 1000;
507 while(timeout-- && cs->hw.elsa.transcnt) 507 while (timeout-- && cs->hw.elsa.transcnt)
508 udelay(1000); 508 udelay(1000);
509 debugl1(cs, "msi tout=%d", timeout); 509 debugl1(cs, "msi tout=%d", timeout);
510 mdelay(RCV_DELAY); 510 mdelay(RCV_DELAY);
511 modem_write_cmd(cs, MInit_6, strlen(MInit_6)); 511 modem_write_cmd(cs, MInit_6, strlen(MInit_6));
512 timeout = 1000; 512 timeout = 1000;
513 while(timeout-- && cs->hw.elsa.transcnt) 513 while (timeout-- && cs->hw.elsa.transcnt)
514 udelay(1000); 514 udelay(1000);
515 debugl1(cs, "msi tout=%d", timeout); 515 debugl1(cs, "msi tout=%d", timeout);
516 mdelay(RCV_DELAY); 516 mdelay(RCV_DELAY);
517 modem_write_cmd(cs, MInit_7, strlen(MInit_7)); 517 modem_write_cmd(cs, MInit_7, strlen(MInit_7));
518 timeout = 1000; 518 timeout = 1000;
519 while(timeout-- && cs->hw.elsa.transcnt) 519 while (timeout-- && cs->hw.elsa.transcnt)
520 udelay(1000); 520 udelay(1000);
521 debugl1(cs, "msi tout=%d", timeout); 521 debugl1(cs, "msi tout=%d", timeout);
522 mdelay(RCV_DELAY); 522 mdelay(RCV_DELAY);
@@ -529,7 +529,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
529 529
530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800)); 530 modem_write_cmd(cs, MInit_speed28800, strlen(MInit_speed28800));
531 timeout = 1000; 531 timeout = 1000;
532 while(timeout-- && cs->hw.elsa.transcnt) 532 while (timeout-- && cs->hw.elsa.transcnt)
533 udelay(1000); 533 udelay(1000);
534 debugl1(cs, "msi tout=%d", timeout); 534 debugl1(cs, "msi tout=%d", timeout);
535 mdelay(RCV_DELAY); 535 mdelay(RCV_DELAY);
@@ -538,7 +538,7 @@ modem_set_dial(struct IsdnCardState *cs, int outgoing) {
538 else 538 else
539 modem_write_cmd(cs, MInit_dialin, strlen(MInit_dialin)); 539 modem_write_cmd(cs, MInit_dialin, strlen(MInit_dialin));
540 timeout = 1000; 540 timeout = 1000;
541 while(timeout-- && cs->hw.elsa.transcnt) 541 while (timeout-- && cs->hw.elsa.transcnt)
542 udelay(1000); 542 udelay(1000);
543 debugl1(cs, "msi tout=%d", timeout); 543 debugl1(cs, "msi tout=%d", timeout);
544 mdelay(RCV_DELAY); 544 mdelay(RCV_DELAY);
@@ -568,15 +568,15 @@ modem_l2l1(struct PStack *st, int pr, void *arg)
568 set_arcofi(bcs->cs, st->l1.bc); 568 set_arcofi(bcs->cs, st->l1.bc);
569 mstartup(bcs->cs); 569 mstartup(bcs->cs);
570 modem_set_dial(bcs->cs, test_bit(FLG_ORIG, &st->l2.flag)); 570 modem_set_dial(bcs->cs, test_bit(FLG_ORIG, &st->l2.flag));
571 bcs->cs->hw.elsa.MFlag=2; 571 bcs->cs->hw.elsa.MFlag = 2;
572 } else if (pr == (PH_DEACTIVATE | REQUEST)) { 572 } else if (pr == (PH_DEACTIVATE | REQUEST)) {
573 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 573 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
574 bcs->cs->dc.isac.arcofi_bc = st->l1.bc; 574 bcs->cs->dc.isac.arcofi_bc = st->l1.bc;
575 arcofi_fsm(bcs->cs, ARCOFI_START, &ARCOFI_XOP_0); 575 arcofi_fsm(bcs->cs, ARCOFI_START, &ARCOFI_XOP_0);
576 interruptible_sleep_on(&bcs->cs->dc.isac.arcofi_wait); 576 interruptible_sleep_on(&bcs->cs->dc.isac.arcofi_wait);
577 bcs->cs->hw.elsa.MFlag=1; 577 bcs->cs->hw.elsa.MFlag = 1;
578 } else { 578 } else {
579 printk(KERN_WARNING"ElsaSer: unknown pr %x\n", pr); 579 printk(KERN_WARNING "ElsaSer: unknown pr %x\n", pr);
580 } 580 }
581} 581}
582 582
@@ -586,27 +586,27 @@ setstack_elsa(struct PStack *st, struct BCState *bcs)
586 586
587 bcs->channel = st->l1.bc; 587 bcs->channel = st->l1.bc;
588 switch (st->l1.mode) { 588 switch (st->l1.mode) {
589 case L1_MODE_HDLC: 589 case L1_MODE_HDLC:
590 case L1_MODE_TRANS: 590 case L1_MODE_TRANS:
591 if (open_hscxstate(st->l1.hardware, bcs)) 591 if (open_hscxstate(st->l1.hardware, bcs))
592 return (-1); 592 return (-1);
593 st->l2.l2l1 = hscx_l2l1; 593 st->l2.l2l1 = hscx_l2l1;
594 break; 594 break;
595 case L1_MODE_MODEM: 595 case L1_MODE_MODEM:
596 bcs->mode = L1_MODE_MODEM; 596 bcs->mode = L1_MODE_MODEM;
597 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { 597 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
598 bcs->hw.hscx.rcvbuf = bcs->cs->hw.elsa.rcvbuf; 598 bcs->hw.hscx.rcvbuf = bcs->cs->hw.elsa.rcvbuf;
599 skb_queue_head_init(&bcs->rqueue); 599 skb_queue_head_init(&bcs->rqueue);
600 skb_queue_head_init(&bcs->squeue); 600 skb_queue_head_init(&bcs->squeue);
601 } 601 }
602 bcs->tx_skb = NULL; 602 bcs->tx_skb = NULL;
603 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 603 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
604 bcs->event = 0; 604 bcs->event = 0;
605 bcs->hw.hscx.rcvidx = 0; 605 bcs->hw.hscx.rcvidx = 0;
606 bcs->tx_cnt = 0; 606 bcs->tx_cnt = 0;
607 bcs->cs->hw.elsa.bcs = bcs; 607 bcs->cs->hw.elsa.bcs = bcs;
608 st->l2.l2l1 = modem_l2l1; 608 st->l2.l2l1 = modem_l2l1;
609 break; 609 break;
610 } 610 }
611 st->l1.bcs = bcs; 611 st->l1.bcs = bcs;
612 setstack_manager(st); 612 setstack_manager(st);
@@ -623,15 +623,15 @@ init_modem(struct IsdnCardState *cs) {
623 cs->bcs[0].BC_Close = close_elsastate; 623 cs->bcs[0].BC_Close = close_elsastate;
624 cs->bcs[1].BC_Close = close_elsastate; 624 cs->bcs[1].BC_Close = close_elsastate;
625 if (!(cs->hw.elsa.rcvbuf = kmalloc(MAX_MODEM_BUF, 625 if (!(cs->hw.elsa.rcvbuf = kmalloc(MAX_MODEM_BUF,
626 GFP_ATOMIC))) { 626 GFP_ATOMIC))) {
627 printk(KERN_WARNING 627 printk(KERN_WARNING
628 "Elsa: No modem mem hw.elsa.rcvbuf\n"); 628 "Elsa: No modem mem hw.elsa.rcvbuf\n");
629 return; 629 return;
630 } 630 }
631 if (!(cs->hw.elsa.transbuf = kmalloc(MAX_MODEM_BUF, 631 if (!(cs->hw.elsa.transbuf = kmalloc(MAX_MODEM_BUF,
632 GFP_ATOMIC))) { 632 GFP_ATOMIC))) {
633 printk(KERN_WARNING 633 printk(KERN_WARNING
634 "Elsa: No modem mem hw.elsa.transbuf\n"); 634 "Elsa: No modem mem hw.elsa.transbuf\n");
635 kfree(cs->hw.elsa.rcvbuf); 635 kfree(cs->hw.elsa.rcvbuf);
636 cs->hw.elsa.rcvbuf = NULL; 636 cs->hw.elsa.rcvbuf = NULL;
637 return; 637 return;
diff --git a/drivers/isdn/hisax/enternow_pci.c b/drivers/isdn/hisax/enternow_pci.c
index f55d29d60826..b1e38b54ebac 100644
--- a/drivers/isdn/hisax/enternow_pci.c
+++ b/drivers/isdn/hisax/enternow_pci.c
@@ -97,13 +97,13 @@ static unsigned char
97ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset) 97ReadByteAmd7930(struct IsdnCardState *cs, unsigned char offset)
98{ 98{
99 /* direct register */ 99 /* direct register */
100 if(offset < 8) 100 if (offset < 8)
101 return (inb(cs->hw.njet.isac + 4*offset)); 101 return (inb(cs->hw.njet.isac + 4 * offset));
102 102
103 /* indirect register */ 103 /* indirect register */
104 else { 104 else {
105 outb(offset, cs->hw.njet.isac + 4*AMD_CR); 105 outb(offset, cs->hw.njet.isac + 4 * AMD_CR);
106 return(inb(cs->hw.njet.isac + 4*AMD_DR)); 106 return (inb(cs->hw.njet.isac + 4 * AMD_DR));
107 } 107 }
108} 108}
109 109
@@ -112,29 +112,29 @@ static void
112WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value) 112WriteByteAmd7930(struct IsdnCardState *cs, unsigned char offset, unsigned char value)
113{ 113{
114 /* direct register */ 114 /* direct register */
115 if(offset < 8) 115 if (offset < 8)
116 outb(value, cs->hw.njet.isac + 4*offset); 116 outb(value, cs->hw.njet.isac + 4 * offset);
117 117
118 /* indirect register */ 118 /* indirect register */
119 else { 119 else {
120 outb(offset, cs->hw.njet.isac + 4*AMD_CR); 120 outb(offset, cs->hw.njet.isac + 4 * AMD_CR);
121 outb(value, cs->hw.njet.isac + 4*AMD_DR); 121 outb(value, cs->hw.njet.isac + 4 * AMD_DR);
122 } 122 }
123} 123}
124 124
125 125
126static void 126static void
127enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) { 127enpci_setIrqMask(struct IsdnCardState *cs, unsigned char val) {
128 if (!val) 128 if (!val)
129 outb(0x00, cs->hw.njet.base+NETJET_IRQMASK1); 129 outb(0x00, cs->hw.njet.base + NETJET_IRQMASK1);
130 else 130 else
131 outb(TJ_AMD_IRQ, cs->hw.njet.base+NETJET_IRQMASK1); 131 outb(TJ_AMD_IRQ, cs->hw.njet.base + NETJET_IRQMASK1);
132} 132}
133 133
134 134
135static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off) 135static unsigned char dummyrr(struct IsdnCardState *cs, int chan, unsigned char off)
136{ 136{
137 return(5); 137 return (5);
138} 138}
139 139
140static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value) 140static void dummywr(struct IsdnCardState *cs, int chan, unsigned char off, unsigned char value)
@@ -173,70 +173,70 @@ static int
173enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg) 173enpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
174{ 174{
175 u_long flags; 175 u_long flags;
176 unsigned char *chan; 176 unsigned char *chan;
177 177
178 if (cs->debug & L1_DEB_ISAC) 178 if (cs->debug & L1_DEB_ISAC)
179 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt); 179 debugl1(cs, "enter:now PCI: card_msg: 0x%04X", mt);
180 180
181 switch (mt) { 181 switch (mt) {
182 case CARD_RESET: 182 case CARD_RESET:
183 spin_lock_irqsave(&cs->lock, flags); 183 spin_lock_irqsave(&cs->lock, flags);
184 reset_enpci(cs); 184 reset_enpci(cs);
185 Amd7930_init(cs); 185 Amd7930_init(cs);
186 spin_unlock_irqrestore(&cs->lock, flags); 186 spin_unlock_irqrestore(&cs->lock, flags);
187 break; 187 break;
188 case CARD_RELEASE: 188 case CARD_RELEASE:
189 release_io_netjet(cs); 189 release_io_netjet(cs);
190 break; 190 break;
191 case CARD_INIT: 191 case CARD_INIT:
192 reset_enpci(cs); 192 reset_enpci(cs);
193 inittiger(cs); 193 inittiger(cs);
194 /* irq must be on here */ 194 /* irq must be on here */
195 Amd7930_init(cs); 195 Amd7930_init(cs);
196 break; 196 break;
197 case CARD_TEST: 197 case CARD_TEST:
198 break; 198 break;
199 case MDL_ASSIGN: 199 case MDL_ASSIGN:
200 /* TEI assigned, LED1 on */ 200 /* TEI assigned, LED1 on */
201 cs->hw.njet.auxd = TJ_AMD_IRQ << 1; 201 cs->hw.njet.auxd = TJ_AMD_IRQ << 1;
202 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA); 202 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
203 break; 203 break;
204 case MDL_REMOVE: 204 case MDL_REMOVE:
205 /* TEI removed, LEDs off */ 205 /* TEI removed, LEDs off */
206 cs->hw.njet.auxd = 0; 206 cs->hw.njet.auxd = 0;
207 outb(0x00, cs->hw.njet.base + NETJET_AUXDATA); 207 outb(0x00, cs->hw.njet.base + NETJET_AUXDATA);
208 break; 208 break;
209 case MDL_BC_ASSIGN: 209 case MDL_BC_ASSIGN:
210 /* activate B-channel */ 210 /* activate B-channel */
211 chan = (unsigned char *)arg; 211 chan = (unsigned char *)arg;
212 212
213 if (cs->debug & L1_DEB_ISAC) 213 if (cs->debug & L1_DEB_ISAC)
214 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan); 214 debugl1(cs, "enter:now PCI: assign phys. BC %d in AMD LMR1", *chan);
215 215
216 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN"); 216 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 | (*chan + 1)), "MDL_BC_ASSIGN");
217 /* at least one b-channel in use, LED 2 on */ 217 /* at least one b-channel in use, LED 2 on */
218 cs->hw.njet.auxd |= TJ_AMD_IRQ << 2; 218 cs->hw.njet.auxd |= TJ_AMD_IRQ << 2;
219 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA); 219 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
220 break; 220 break;
221 case MDL_BC_RELEASE: 221 case MDL_BC_RELEASE:
222 /* deactivate B-channel */ 222 /* deactivate B-channel */
223 chan = (unsigned char *)arg; 223 chan = (unsigned char *)arg;
224 224
225 if (cs->debug & L1_DEB_ISAC) 225 if (cs->debug & L1_DEB_ISAC)
226 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan); 226 debugl1(cs, "enter:now PCI: release phys. BC %d in Amd LMR1", *chan);
227 227
228 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE"); 228 cs->dc.amd7930.ph_command(cs, (cs->dc.amd7930.lmr1 & ~(*chan + 1)), "MDL_BC_RELEASE");
229 /* no b-channel active -> LED2 off */ 229 /* no b-channel active -> LED2 off */
230 if (!(cs->dc.amd7930.lmr1 & 3)) { 230 if (!(cs->dc.amd7930.lmr1 & 3)) {
231 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2); 231 cs->hw.njet.auxd &= ~(TJ_AMD_IRQ << 2);
232 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA); 232 outb(cs->hw.njet.auxd, cs->hw.njet.base + NETJET_AUXDATA);
233 } 233 }
234 break; 234 break;
235 default: 235 default:
236 break; 236 break;
237 237
238 } 238 }
239 return(0); 239 return (0);
240} 240}
241 241
242static irqreturn_t 242static irqreturn_t
@@ -249,32 +249,32 @@ enpci_interrupt(int intno, void *dev_id)
249 spin_lock_irqsave(&cs->lock, flags); 249 spin_lock_irqsave(&cs->lock, flags);
250 s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1); 250 s1val = inb(cs->hw.njet.base + NETJET_IRQSTAT1);
251 251
252 /* AMD threw an interrupt */ 252 /* AMD threw an interrupt */
253 if (!(s1val & TJ_AMD_IRQ)) { 253 if (!(s1val & TJ_AMD_IRQ)) {
254 /* read and clear interrupt-register */ 254 /* read and clear interrupt-register */
255 ir = ReadByteAmd7930(cs, 0x00); 255 ir = ReadByteAmd7930(cs, 0x00);
256 Amd7930_interrupt(cs, ir); 256 Amd7930_interrupt(cs, ir);
257 s1val = 1; 257 s1val = 1;
258 } else 258 } else
259 s1val = 0; 259 s1val = 0;
260 s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0); 260 s0val = inb(cs->hw.njet.base + NETJET_IRQSTAT0);
261 if ((s0val | s1val)==0) { // shared IRQ 261 if ((s0val | s1val) == 0) { // shared IRQ
262 spin_unlock_irqrestore(&cs->lock, flags); 262 spin_unlock_irqrestore(&cs->lock, flags);
263 return IRQ_NONE; 263 return IRQ_NONE;
264 } 264 }
265 if (s0val) 265 if (s0val)
266 outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0); 266 outb(s0val, cs->hw.njet.base + NETJET_IRQSTAT0);
267 267
268 /* DMA-Interrupt: B-channel-stuff */ 268 /* DMA-Interrupt: B-channel-stuff */
269 /* set bits in sval to indicate which page is free */ 269 /* set bits in sval to indicate which page is free */
270 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) < 270 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
271 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ)) 271 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
272 /* the 2nd write page is free */ 272 /* the 2nd write page is free */
273 s0val = 0x08; 273 s0val = 0x08;
274 else /* the 1st write page is free */ 274 else /* the 1st write page is free */
275 s0val = 0x04; 275 s0val = 0x04;
276 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) < 276 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
277 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ)) 277 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
278 /* the 2nd read page is free */ 278 /* the 2nd read page is free */
279 s0val = s0val | 0x02; 279 s0val = s0val | 0x02;
280 else /* the 1st read page is free */ 280 else /* the 1st read page is free */
@@ -287,11 +287,11 @@ enpci_interrupt(int intno, void *dev_id)
287 } 287 }
288 cs->hw.njet.irqstat0 = s0val; 288 cs->hw.njet.irqstat0 = s0val;
289 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) != 289 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
290 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ)) 290 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
291 /* we have a read dma int */ 291 /* we have a read dma int */
292 read_tiger(cs); 292 read_tiger(cs);
293 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) != 293 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
294 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE)) 294 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
295 /* we have a write dma int */ 295 /* we have a write dma int */
296 write_tiger(cs); 296 write_tiger(cs);
297 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 297 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
@@ -304,26 +304,26 @@ static int __devinit en_pci_probe(struct pci_dev *dev_netjet,
304 struct IsdnCardState *cs) 304 struct IsdnCardState *cs)
305{ 305{
306 if (pci_enable_device(dev_netjet)) 306 if (pci_enable_device(dev_netjet))
307 return(0); 307 return (0);
308 cs->irq = dev_netjet->irq; 308 cs->irq = dev_netjet->irq;
309 if (!cs->irq) { 309 if (!cs->irq) {
310 printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n"); 310 printk(KERN_WARNING "enter:now PCI: No IRQ for PCI card found\n");
311 return(0); 311 return (0);
312 } 312 }
313 cs->hw.njet.base = pci_resource_start(dev_netjet, 0); 313 cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
314 if (!cs->hw.njet.base) { 314 if (!cs->hw.njet.base) {
315 printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n"); 315 printk(KERN_WARNING "enter:now PCI: No IO-Adr for PCI card found\n");
316 return(0); 316 return (0);
317 } 317 }
318 /* checks Sub-Vendor ID because system crashes with Traverse-Card */ 318 /* checks Sub-Vendor ID because system crashes with Traverse-Card */
319 if ((dev_netjet->subsystem_vendor != 0x55) || 319 if ((dev_netjet->subsystem_vendor != 0x55) ||
320 (dev_netjet->subsystem_device != 0x02)) { 320 (dev_netjet->subsystem_device != 0x02)) {
321 printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n"); 321 printk(KERN_WARNING "enter:now: You tried to load this driver with an incompatible TigerJet-card\n");
322 printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n"); 322 printk(KERN_WARNING "Use type=20 for Traverse NetJet PCI Card.\n");
323 return(0); 323 return (0);
324 } 324 }
325 325
326 return(1); 326 return (1);
327} 327}
328 328
329static void __devinit en_cs_init(struct IsdnCard *card, 329static void __devinit en_cs_init(struct IsdnCard *card,
@@ -356,8 +356,8 @@ static int __devinit en_cs_init_rest(struct IsdnCard *card,
356 const int bytecnt = 256; 356 const int bytecnt = 256;
357 357
358 printk(KERN_INFO 358 printk(KERN_INFO
359 "enter:now PCI: PCI card configured at 0x%lx IRQ %d\n", 359 "enter:now PCI: PCI card configured at 0x%lx IRQ %d\n",
360 cs->hw.njet.base, cs->irq); 360 cs->hw.njet.base, cs->irq);
361 if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) { 361 if (!request_region(cs->hw.njet.base, bytecnt, "Fn_ISDN")) {
362 printk(KERN_WARNING 362 printk(KERN_WARNING
363 "HiSax: enter:now config port %lx-%lx already in use\n", 363 "HiSax: enter:now config port %lx-%lx already in use\n",
@@ -368,13 +368,13 @@ static int __devinit en_cs_init_rest(struct IsdnCard *card,
368 368
369 setup_Amd7930(cs); 369 setup_Amd7930(cs);
370 cs->hw.njet.last_is0 = 0; 370 cs->hw.njet.last_is0 = 0;
371 /* macro rByteAMD */ 371 /* macro rByteAMD */
372 cs->readisac = &ReadByteAmd7930; 372 cs->readisac = &ReadByteAmd7930;
373 /* macro wByteAMD */ 373 /* macro wByteAMD */
374 cs->writeisac = &WriteByteAmd7930; 374 cs->writeisac = &WriteByteAmd7930;
375 cs->dc.amd7930.setIrqMask = &enpci_setIrqMask; 375 cs->dc.amd7930.setIrqMask = &enpci_setIrqMask;
376 376
377 cs->BC_Read_Reg = &dummyrr; 377 cs->BC_Read_Reg = &dummyrr;
378 cs->BC_Write_Reg = &dummywr; 378 cs->BC_Write_Reg = &dummywr;
379 cs->BC_Send_Data = &netjet_fill_dma; 379 cs->BC_Send_Data = &netjet_fill_dma;
380 cs->cardmsg = &enpci_card_msg; 380 cs->cardmsg = &enpci_card_msg;
@@ -398,27 +398,27 @@ setup_enternow_pci(struct IsdnCard *card)
398#error "not running on big endian machines now" 398#error "not running on big endian machines now"
399#endif 399#endif
400 400
401 strcpy(tmp, enternow_pci_rev); 401 strcpy(tmp, enternow_pci_rev);
402 printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp)); 402 printk(KERN_INFO "HiSax: Formula-n Europe AG enter:now ISDN PCI driver Rev. %s\n", HiSax_getrev(tmp));
403 if (cs->typ != ISDN_CTYPE_ENTERNOW) 403 if (cs->typ != ISDN_CTYPE_ENTERNOW)
404 return(0); 404 return (0);
405 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 405 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
406 406
407 for ( ;; ) 407 for (;;)
408 { 408 {
409 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET, 409 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
410 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) { 410 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
411 ret = en_pci_probe(dev_netjet, cs); 411 ret = en_pci_probe(dev_netjet, cs);
412 if (!ret) 412 if (!ret)
413 return(0); 413 return (0);
414 } else { 414 } else {
415 printk(KERN_WARNING "enter:now PCI: No PCI card found\n"); 415 printk(KERN_WARNING "enter:now PCI: No PCI card found\n");
416 return(0); 416 return (0);
417 } 417 }
418 418
419 en_cs_init(card, cs); 419 en_cs_init(card, cs);
420 break; 420 break;
421 } 421 }
422 422
423 return en_cs_init_rest(card, cs); 423 return en_cs_init_rest(card, cs);
424} 424}
diff --git a/drivers/isdn/hisax/fsm.c b/drivers/isdn/hisax/fsm.c
index 732ea633758c..1bb291021fdb 100644
--- a/drivers/isdn/hisax/fsm.c
+++ b/drivers/isdn/hisax/fsm.c
@@ -5,7 +5,7 @@
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * by Kai Germaschewski <kai.germaschewski@gmx.de> 7 * by Kai Germaschewski <kai.germaschewski@gmx.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -27,18 +27,18 @@ FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount)
27 int i; 27 int i;
28 28
29 fsm->jumpmatrix = (FSMFNPTR *) 29 fsm->jumpmatrix = (FSMFNPTR *)
30 kzalloc(sizeof (FSMFNPTR) * fsm->state_count * fsm->event_count, GFP_KERNEL); 30 kzalloc(sizeof(FSMFNPTR) * fsm->state_count * fsm->event_count, GFP_KERNEL);
31 if (!fsm->jumpmatrix) 31 if (!fsm->jumpmatrix)
32 return -ENOMEM; 32 return -ENOMEM;
33 33
34 for (i = 0; i < fncount; i++) 34 for (i = 0; i < fncount; i++)
35 if ((fnlist[i].state>=fsm->state_count) || (fnlist[i].event>=fsm->event_count)) { 35 if ((fnlist[i].state >= fsm->state_count) || (fnlist[i].event >= fsm->event_count)) {
36 printk(KERN_ERR "FsmNew Error line %d st(%ld/%ld) ev(%ld/%ld)\n", 36 printk(KERN_ERR "FsmNew Error line %d st(%ld/%ld) ev(%ld/%ld)\n",
37 i,(long)fnlist[i].state,(long)fsm->state_count, 37 i, (long)fnlist[i].state, (long)fsm->state_count,
38 (long)fnlist[i].event,(long)fsm->event_count); 38 (long)fnlist[i].event, (long)fsm->event_count);
39 } else 39 } else
40 fsm->jumpmatrix[fsm->state_count * fnlist[i].event + 40 fsm->jumpmatrix[fsm->state_count * fnlist[i].event +
41 fnlist[i].state] = (FSMFNPTR) fnlist[i].routine; 41 fnlist[i].state] = (FSMFNPTR)fnlist[i].routine;
42 return 0; 42 return 0;
43} 43}
44 44
@@ -53,24 +53,24 @@ FsmEvent(struct FsmInst *fi, int event, void *arg)
53{ 53{
54 FSMFNPTR r; 54 FSMFNPTR r;
55 55
56 if ((fi->state>=fi->fsm->state_count) || (event >= fi->fsm->event_count)) { 56 if ((fi->state >= fi->fsm->state_count) || (event >= fi->fsm->event_count)) {
57 printk(KERN_ERR "FsmEvent Error st(%ld/%ld) ev(%d/%ld)\n", 57 printk(KERN_ERR "FsmEvent Error st(%ld/%ld) ev(%d/%ld)\n",
58 (long)fi->state,(long)fi->fsm->state_count,event,(long)fi->fsm->event_count); 58 (long)fi->state, (long)fi->fsm->state_count, event, (long)fi->fsm->event_count);
59 return(1); 59 return (1);
60 } 60 }
61 r = fi->fsm->jumpmatrix[fi->fsm->state_count * event + fi->state]; 61 r = fi->fsm->jumpmatrix[fi->fsm->state_count * event + fi->state];
62 if (r) { 62 if (r) {
63 if (fi->debug) 63 if (fi->debug)
64 fi->printdebug(fi, "State %s Event %s", 64 fi->printdebug(fi, "State %s Event %s",
65 fi->fsm->strState[fi->state], 65 fi->fsm->strState[fi->state],
66 fi->fsm->strEvent[event]); 66 fi->fsm->strEvent[event]);
67 r(fi, event, arg); 67 r(fi, event, arg);
68 return (0); 68 return (0);
69 } else { 69 } else {
70 if (fi->debug) 70 if (fi->debug)
71 fi->printdebug(fi, "State %s Event %s no routine", 71 fi->printdebug(fi, "State %s Event %s no routine",
72 fi->fsm->strState[fi->state], 72 fi->fsm->strState[fi->state],
73 fi->fsm->strEvent[event]); 73 fi->fsm->strEvent[event]);
74 return (!0); 74 return (!0);
75 } 75 }
76} 76}
@@ -81,7 +81,7 @@ FsmChangeState(struct FsmInst *fi, int newstate)
81 fi->state = newstate; 81 fi->state = newstate;
82 if (fi->debug) 82 if (fi->debug)
83 fi->printdebug(fi, "ChangeState %s", 83 fi->printdebug(fi, "ChangeState %s",
84 fi->fsm->strState[newstate]); 84 fi->fsm->strState[newstate]);
85} 85}
86 86
87static void 87static void
@@ -125,7 +125,7 @@ FsmAddTimer(struct FsmTimer *ft,
125#if FSM_TIMER_DEBUG 125#if FSM_TIMER_DEBUG
126 if (ft->fi->debug) 126 if (ft->fi->debug)
127 ft->fi->printdebug(ft->fi, "FsmAddTimer %lx %d %d", 127 ft->fi->printdebug(ft->fi, "FsmAddTimer %lx %d %d",
128 (long) ft, millisec, where); 128 (long) ft, millisec, where);
129#endif 129#endif
130 130
131 if (timer_pending(&ft->tl)) { 131 if (timer_pending(&ft->tl)) {
@@ -143,13 +143,13 @@ FsmAddTimer(struct FsmTimer *ft,
143 143
144void 144void
145FsmRestartTimer(struct FsmTimer *ft, 145FsmRestartTimer(struct FsmTimer *ft,
146 int millisec, int event, void *arg, int where) 146 int millisec, int event, void *arg, int where)
147{ 147{
148 148
149#if FSM_TIMER_DEBUG 149#if FSM_TIMER_DEBUG
150 if (ft->fi->debug) 150 if (ft->fi->debug)
151 ft->fi->printdebug(ft->fi, "FsmRestartTimer %lx %d %d", 151 ft->fi->printdebug(ft->fi, "FsmRestartTimer %lx %d %d",
152 (long) ft, millisec, where); 152 (long) ft, millisec, where);
153#endif 153#endif
154 154
155 if (timer_pending(&ft->tl)) 155 if (timer_pending(&ft->tl))
diff --git a/drivers/isdn/hisax/fsm.h b/drivers/isdn/hisax/fsm.h
index f02f7da1688d..8c7385619a46 100644
--- a/drivers/isdn/hisax/fsm.h
+++ b/drivers/isdn/hisax/fsm.h
@@ -5,7 +5,7 @@
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * by Kai Germaschewski <kai.germaschewski@gmx.de> 7 * by Kai Germaschewski <kai.germaschewski@gmx.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -18,7 +18,7 @@
18 18
19struct FsmInst; 19struct FsmInst;
20 20
21typedef void (* FSMFNPTR)(struct FsmInst *, int, void *); 21typedef void (*FSMFNPTR)(struct FsmInst *, int, void *);
22 22
23struct Fsm { 23struct Fsm {
24 FSMFNPTR *jumpmatrix; 24 FSMFNPTR *jumpmatrix;
diff --git a/drivers/isdn/hisax/gazel.c b/drivers/isdn/hisax/gazel.c
index 353982fc1436..4fef77562554 100644
--- a/drivers/isdn/hisax/gazel.c
+++ b/drivers/isdn/hisax/gazel.c
@@ -5,7 +5,7 @@
5 * Author BeWan Systems 5 * Author BeWan Systems
6 * based on source code from Karsten Keil 6 * based on source code from Karsten Keil
7 * Copyright by BeWan Systems 7 * Copyright by BeWan Systems
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -38,7 +38,7 @@ static const char *gazel_revision = "$Revision: 2.19.2.4 $";
38#define INT_IPAC_EN 0x3 /* enable IT ipac */ 38#define INT_IPAC_EN 0x3 /* enable IT ipac */
39 39
40 40
41#define byteout(addr,val) outb(val,addr) 41#define byteout(addr, val) outb(val, addr)
42#define bytein(addr) inb(addr) 42#define bytein(addr) inb(addr)
43 43
44static inline u_char 44static inline u_char
@@ -55,13 +55,13 @@ writereg(unsigned int adr, u_short off, u_char data)
55 55
56 56
57static inline void 57static inline void
58read_fifo(unsigned int adr, u_char * data, int size) 58read_fifo(unsigned int adr, u_char *data, int size)
59{ 59{
60 insb(adr, data, size); 60 insb(adr, data, size);
61} 61}
62 62
63static void 63static void
64write_fifo(unsigned int adr, u_char * data, int size) 64write_fifo(unsigned int adr, u_char *data, int size)
65{ 65{
66 outsb(adr, data, size); 66 outsb(adr, data, size);
67} 67}
@@ -85,14 +85,14 @@ writereg_ipac(unsigned int adr, u_short off, u_char data)
85 85
86 86
87static inline void 87static inline void
88read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) 88read_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
89{ 89{
90 byteout(adr, off); 90 byteout(adr, off);
91 insb(adr + 4, data, size); 91 insb(adr + 4, data, size);
92} 92}
93 93
94static void 94static void
95write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size) 95write_fifo_ipac(unsigned int adr, u_short off, u_char *data, int size)
96{ 96{
97 byteout(adr, off); 97 byteout(adr, off);
98 outsb(adr + 4, data, size); 98 outsb(adr + 4, data, size);
@@ -106,13 +106,13 @@ ReadISAC(struct IsdnCardState *cs, u_char offset)
106 u_short off2 = offset; 106 u_short off2 = offset;
107 107
108 switch (cs->subtyp) { 108 switch (cs->subtyp) {
109 case R647: 109 case R647:
110 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); 110 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
111 case R685: 111 case R685:
112 return (readreg(cs->hw.gazel.isac, off2)); 112 return (readreg(cs->hw.gazel.isac, off2));
113 case R753: 113 case R753:
114 case R742: 114 case R742:
115 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2)); 115 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
116 } 116 }
117 return 0; 117 return 0;
118} 118}
@@ -123,75 +123,75 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
123 u_short off2 = offset; 123 u_short off2 = offset;
124 124
125 switch (cs->subtyp) { 125 switch (cs->subtyp) {
126 case R647: 126 case R647:
127 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); 127 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
128 case R685: 128 case R685:
129 writereg(cs->hw.gazel.isac, off2, value); 129 writereg(cs->hw.gazel.isac, off2, value);
130 break; 130 break;
131 case R753: 131 case R753:
132 case R742: 132 case R742:
133 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value); 133 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
134 break; 134 break;
135 } 135 }
136} 136}
137 137
138static void 138static void
139ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 139ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
140{ 140{
141 switch (cs->subtyp) { 141 switch (cs->subtyp) {
142 case R647: 142 case R647:
143 case R685: 143 case R685:
144 read_fifo(cs->hw.gazel.isacfifo, data, size); 144 read_fifo(cs->hw.gazel.isacfifo, data, size);
145 break; 145 break;
146 case R753: 146 case R753:
147 case R742: 147 case R742:
148 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); 148 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
149 break; 149 break;
150 } 150 }
151} 151}
152 152
153static void 153static void
154WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 154WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
155{ 155{
156 switch (cs->subtyp) { 156 switch (cs->subtyp) {
157 case R647: 157 case R647:
158 case R685: 158 case R685:
159 write_fifo(cs->hw.gazel.isacfifo, data, size); 159 write_fifo(cs->hw.gazel.isacfifo, data, size);
160 break; 160 break;
161 case R753: 161 case R753:
162 case R742: 162 case R742:
163 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size); 163 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
164 break; 164 break;
165 } 165 }
166} 166}
167 167
168static void 168static void
169ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) 169ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
170{ 170{
171 switch (cs->subtyp) { 171 switch (cs->subtyp) {
172 case R647: 172 case R647:
173 case R685: 173 case R685:
174 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); 174 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
175 break; 175 break;
176 case R753: 176 case R753:
177 case R742: 177 case R742:
178 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); 178 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
179 break; 179 break;
180 } 180 }
181} 181}
182 182
183static void 183static void
184WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size) 184WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char *data, int size)
185{ 185{
186 switch (cs->subtyp) { 186 switch (cs->subtyp) {
187 case R647: 187 case R647:
188 case R685: 188 case R685:
189 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size); 189 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
190 break; 190 break;
191 case R753: 191 case R753:
192 case R742: 192 case R742:
193 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size); 193 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
194 break; 194 break;
195 } 195 }
196} 196}
197 197
@@ -201,13 +201,13 @@ ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
201 u_short off2 = offset; 201 u_short off2 = offset;
202 202
203 switch (cs->subtyp) { 203 switch (cs->subtyp) {
204 case R647: 204 case R647:
205 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); 205 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
206 case R685: 206 case R685:
207 return (readreg(cs->hw.gazel.hscx[hscx], off2)); 207 return (readreg(cs->hw.gazel.hscx[hscx], off2));
208 case R753: 208 case R753:
209 case R742: 209 case R742:
210 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2)); 210 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
211 } 211 }
212 return 0; 212 return 0;
213} 213}
@@ -218,15 +218,15 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
218 u_short off2 = offset; 218 u_short off2 = offset;
219 219
220 switch (cs->subtyp) { 220 switch (cs->subtyp) {
221 case R647: 221 case R647:
222 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf)); 222 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
223 case R685: 223 case R685:
224 writereg(cs->hw.gazel.hscx[hscx], off2, value); 224 writereg(cs->hw.gazel.hscx[hscx], off2, value);
225 break; 225 break;
226 case R753: 226 case R753:
227 case R742: 227 case R742:
228 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value); 228 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
229 break; 229 break;
230 } 230 }
231} 231}
232 232
@@ -279,7 +279,7 @@ gazel_interrupt_ipac(int intno, void *dev_id)
279 u_char ista, val; 279 u_char ista, val;
280 int count = 0; 280 int count = 0;
281 u_long flags; 281 u_long flags;
282 282
283 spin_lock_irqsave(&cs->lock, flags); 283 spin_lock_irqsave(&cs->lock, flags);
284 ista = ReadISAC(cs, IPAC_ISTA - 0x80); 284 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
285 do { 285 do {
@@ -322,25 +322,25 @@ release_io_gazel(struct IsdnCardState *cs)
322 unsigned int i; 322 unsigned int i;
323 323
324 switch (cs->subtyp) { 324 switch (cs->subtyp) {
325 case R647: 325 case R647:
326 for (i = 0x0000; i < 0xC000; i += 0x1000) 326 for (i = 0x0000; i < 0xC000; i += 0x1000)
327 release_region(i + cs->hw.gazel.hscx[0], 16); 327 release_region(i + cs->hw.gazel.hscx[0], 16);
328 release_region(0xC000 + cs->hw.gazel.hscx[0], 1); 328 release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
329 break; 329 break;
330 330
331 case R685: 331 case R685:
332 release_region(cs->hw.gazel.hscx[0], 0x100); 332 release_region(cs->hw.gazel.hscx[0], 0x100);
333 release_region(cs->hw.gazel.cfg_reg, 0x80); 333 release_region(cs->hw.gazel.cfg_reg, 0x80);
334 break; 334 break;
335 335
336 case R753: 336 case R753:
337 release_region(cs->hw.gazel.ipac, 0x8); 337 release_region(cs->hw.gazel.ipac, 0x8);
338 release_region(cs->hw.gazel.cfg_reg, 0x80); 338 release_region(cs->hw.gazel.cfg_reg, 0x80);
339 break; 339 break;
340 340
341 case R742: 341 case R742:
342 release_region(cs->hw.gazel.ipac, 8); 342 release_region(cs->hw.gazel.ipac, 8);
343 break; 343 break;
344 } 344 }
345} 345}
346 346
@@ -350,49 +350,49 @@ reset_gazel(struct IsdnCardState *cs)
350 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg; 350 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
351 351
352 switch (cs->subtyp) { 352 switch (cs->subtyp) {
353 case R647: 353 case R647:
354 writereg(addr, 0, 0); 354 writereg(addr, 0, 0);
355 HZDELAY(10); 355 HZDELAY(10);
356 writereg(addr, 0, 1); 356 writereg(addr, 0, 1);
357 HZDELAY(2); 357 HZDELAY(2);
358 break; 358 break;
359 case R685: 359 case R685:
360 plxcntrl = inl(addr + PLX_CNTRL); 360 plxcntrl = inl(addr + PLX_CNTRL);
361 plxcntrl |= (RESET_9050 + RESET_GAZEL); 361 plxcntrl |= (RESET_9050 + RESET_GAZEL);
362 outl(plxcntrl, addr + PLX_CNTRL); 362 outl(plxcntrl, addr + PLX_CNTRL);
363 plxcntrl &= ~(RESET_9050 + RESET_GAZEL); 363 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
364 HZDELAY(4); 364 HZDELAY(4);
365 outl(plxcntrl, addr + PLX_CNTRL); 365 outl(plxcntrl, addr + PLX_CNTRL);
366 HZDELAY(10); 366 HZDELAY(10);
367 outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR); 367 outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
368 break; 368 break;
369 case R753: 369 case R753:
370 plxcntrl = inl(addr + PLX_CNTRL); 370 plxcntrl = inl(addr + PLX_CNTRL);
371 plxcntrl |= (RESET_9050 + RESET_GAZEL); 371 plxcntrl |= (RESET_9050 + RESET_GAZEL);
372 outl(plxcntrl, addr + PLX_CNTRL); 372 outl(plxcntrl, addr + PLX_CNTRL);
373 plxcntrl &= ~(RESET_9050 + RESET_GAZEL); 373 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
374 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); 374 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
375 HZDELAY(4); 375 HZDELAY(4);
376 outl(plxcntrl, addr + PLX_CNTRL); 376 outl(plxcntrl, addr + PLX_CNTRL);
377 HZDELAY(10); 377 HZDELAY(10);
378 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); 378 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
379 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); 379 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
380 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); 380 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
381 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); 381 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
382 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); 382 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
383 outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR); 383 outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
384 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); 384 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
385 break; 385 break;
386 case R742: 386 case R742:
387 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20); 387 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
388 HZDELAY(4); 388 HZDELAY(4);
389 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00); 389 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
390 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff); 390 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
391 WriteISAC(cs, IPAC_AOE - 0x80, 0x0); 391 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
392 WriteISAC(cs, IPAC_MASK - 0x80, 0xff); 392 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
393 WriteISAC(cs, IPAC_CONF - 0x80, 0x1); 393 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
394 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0); 394 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
395 break; 395 break;
396 } 396 }
397 return (0); 397 return (0);
398} 398}
@@ -403,28 +403,28 @@ Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
403 u_long flags; 403 u_long flags;
404 404
405 switch (mt) { 405 switch (mt) {
406 case CARD_RESET: 406 case CARD_RESET:
407 spin_lock_irqsave(&cs->lock, flags); 407 spin_lock_irqsave(&cs->lock, flags);
408 reset_gazel(cs); 408 reset_gazel(cs);
409 spin_unlock_irqrestore(&cs->lock, flags); 409 spin_unlock_irqrestore(&cs->lock, flags);
410 return (0); 410 return (0);
411 case CARD_RELEASE: 411 case CARD_RELEASE:
412 release_io_gazel(cs); 412 release_io_gazel(cs);
413 return (0); 413 return (0);
414 case CARD_INIT: 414 case CARD_INIT:
415 spin_lock_irqsave(&cs->lock, flags); 415 spin_lock_irqsave(&cs->lock, flags);
416 inithscxisac(cs, 1); 416 inithscxisac(cs, 1);
417 if ((cs->subtyp==R647)||(cs->subtyp==R685)) { 417 if ((cs->subtyp == R647) || (cs->subtyp == R685)) {
418 int i; 418 int i;
419 for (i=0;i<(2+MAX_WAITING_CALLS);i++) { 419 for (i = 0; i < (2 + MAX_WAITING_CALLS); i++) {
420 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f; 420 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
421 cs->bcs[i].hw.hscx.tsaxr1 = 0x23; 421 cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
422 }
423 } 422 }
424 spin_unlock_irqrestore(&cs->lock, flags); 423 }
425 return (0); 424 spin_unlock_irqrestore(&cs->lock, flags);
426 case CARD_TEST: 425 return (0);
427 return (0); 426 case CARD_TEST:
427 return (0);
428 } 428 }
429 return (0); 429 return (0);
430} 430}
@@ -435,49 +435,49 @@ reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
435 unsigned int i, j, base = 0, adr = 0, len = 0; 435 unsigned int i, j, base = 0, adr = 0, len = 0;
436 436
437 switch (cs->subtyp) { 437 switch (cs->subtyp) {
438 case R647: 438 case R647:
439 base = cs->hw.gazel.hscx[0]; 439 base = cs->hw.gazel.hscx[0];
440 if (!request_region(adr = (0xC000 + base), len = 1, "gazel")) 440 if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
441 goto error; 441 goto error;
442 for (i = 0x0000; i < 0xC000; i += 0x1000) { 442 for (i = 0x0000; i < 0xC000; i += 0x1000) {
443 if (!request_region(adr = (i + base), len = 16, "gazel")) 443 if (!request_region(adr = (i + base), len = 16, "gazel"))
444 goto error;
445 }
446 if (i != 0xC000) {
447 for (j = 0; j < i; j+= 0x1000)
448 release_region(j + base, 16);
449 release_region(0xC000 + base, 1);
450 goto error; 444 goto error;
451 } 445 }
452 break; 446 if (i != 0xC000) {
447 for (j = 0; j < i; j += 0x1000)
448 release_region(j + base, 16);
449 release_region(0xC000 + base, 1);
450 goto error;
451 }
452 break;
453 453
454 case R685: 454 case R685:
455 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel")) 455 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
456 goto error; 456 goto error;
457 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { 457 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
458 release_region(cs->hw.gazel.hscx[0],0x100); 458 release_region(cs->hw.gazel.hscx[0], 0x100);
459 goto error; 459 goto error;
460 } 460 }
461 break; 461 break;
462 462
463 case R753: 463 case R753:
464 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) 464 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
465 goto error; 465 goto error;
466 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) { 466 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
467 release_region(cs->hw.gazel.ipac, 8); 467 release_region(cs->hw.gazel.ipac, 8);
468 goto error; 468 goto error;
469 } 469 }
470 break; 470 break;
471 471
472 case R742: 472 case R742:
473 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel")) 473 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
474 goto error; 474 goto error;
475 break; 475 break;
476 } 476 }
477 477
478 return 0; 478 return 0;
479 479
480 error: 480error:
481 printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n", 481 printk(KERN_WARNING "Gazel: io ports 0x%x-0x%x already in use\n",
482 adr, adr + len); 482 adr, adr + len);
483 return 1; 483 return 1;
@@ -508,24 +508,24 @@ setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
508 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1]; 508 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
509 509
510 switch (cs->subtyp) { 510 switch (cs->subtyp) {
511 case R647: 511 case R647:
512 printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n"); 512 printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
513 cs->dc.isac.adf2 = 0x87; 513 cs->dc.isac.adf2 = 0x87;
514 printk(KERN_INFO 514 printk(KERN_INFO
515 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", 515 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
516 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); 516 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
517 printk(KERN_INFO 517 printk(KERN_INFO
518 "Gazel: hscx A:0x%X hscx B:0x%X\n", 518 "Gazel: hscx A:0x%X hscx B:0x%X\n",
519 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); 519 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
520 520
521 break; 521 break;
522 case R742: 522 case R742:
523 printk(KERN_INFO "Gazel: Card ISA R742 found\n"); 523 printk(KERN_INFO "Gazel: Card ISA R742 found\n");
524 test_and_set_bit(HW_IPAC, &cs->HW_Flags); 524 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
525 printk(KERN_INFO 525 printk(KERN_INFO
526 "Gazel: config irq:%d ipac:0x%X\n", 526 "Gazel: config irq:%d ipac:0x%X\n",
527 cs->irq, cs->hw.gazel.ipac); 527 cs->irq, cs->hw.gazel.ipac);
528 break; 528 break;
529 } 529 }
530 530
531 return (0); 531 return (0);
@@ -547,7 +547,7 @@ setup_gazelpci(struct IsdnCardState *cs)
547 seekcard = PCI_DEVICE_ID_PLX_R685; 547 seekcard = PCI_DEVICE_ID_PLX_R685;
548 for (nbseek = 0; nbseek < 4; nbseek++) { 548 for (nbseek = 0; nbseek < 4; nbseek++) {
549 if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX, 549 if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_PLX,
550 seekcard, dev_tel))) { 550 seekcard, dev_tel))) {
551 if (pci_enable_device(dev_tel)) 551 if (pci_enable_device(dev_tel))
552 return 1; 552 return 1;
553 pci_irq = dev_tel->irq; 553 pci_irq = dev_tel->irq;
@@ -559,15 +559,15 @@ setup_gazelpci(struct IsdnCardState *cs)
559 break; 559 break;
560 else { 560 else {
561 switch (seekcard) { 561 switch (seekcard) {
562 case PCI_DEVICE_ID_PLX_R685: 562 case PCI_DEVICE_ID_PLX_R685:
563 seekcard = PCI_DEVICE_ID_PLX_R753; 563 seekcard = PCI_DEVICE_ID_PLX_R753;
564 break; 564 break;
565 case PCI_DEVICE_ID_PLX_R753: 565 case PCI_DEVICE_ID_PLX_R753:
566 seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO; 566 seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
567 break; 567 break;
568 case PCI_DEVICE_ID_PLX_DJINN_ITOO: 568 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
569 seekcard = PCI_DEVICE_ID_PLX_OLITEC; 569 seekcard = PCI_DEVICE_ID_PLX_OLITEC;
570 break; 570 break;
571 } 571 }
572 } 572 }
573 } 573 }
@@ -595,27 +595,27 @@ setup_gazelpci(struct IsdnCardState *cs)
595 cs->irq_flags |= IRQF_SHARED; 595 cs->irq_flags |= IRQF_SHARED;
596 596
597 switch (seekcard) { 597 switch (seekcard) {
598 case PCI_DEVICE_ID_PLX_R685: 598 case PCI_DEVICE_ID_PLX_R685:
599 printk(KERN_INFO "Gazel: Card PCI R685 found\n"); 599 printk(KERN_INFO "Gazel: Card PCI R685 found\n");
600 cs->subtyp = R685; 600 cs->subtyp = R685;
601 cs->dc.isac.adf2 = 0x87; 601 cs->dc.isac.adf2 = 0x87;
602 printk(KERN_INFO 602 printk(KERN_INFO
603 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n", 603 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
604 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg); 604 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
605 printk(KERN_INFO 605 printk(KERN_INFO
606 "Gazel: hscx A:0x%X hscx B:0x%X\n", 606 "Gazel: hscx A:0x%X hscx B:0x%X\n",
607 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]); 607 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
608 break; 608 break;
609 case PCI_DEVICE_ID_PLX_R753: 609 case PCI_DEVICE_ID_PLX_R753:
610 case PCI_DEVICE_ID_PLX_DJINN_ITOO: 610 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
611 case PCI_DEVICE_ID_PLX_OLITEC: 611 case PCI_DEVICE_ID_PLX_OLITEC:
612 printk(KERN_INFO "Gazel: Card PCI R753 found\n"); 612 printk(KERN_INFO "Gazel: Card PCI R753 found\n");
613 cs->subtyp = R753; 613 cs->subtyp = R753;
614 test_and_set_bit(HW_IPAC, &cs->HW_Flags); 614 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
615 printk(KERN_INFO 615 printk(KERN_INFO
616 "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n", 616 "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
617 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg); 617 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
618 break; 618 break;
619 } 619 }
620 620
621 return (0); 621 return (0);
@@ -667,23 +667,23 @@ setup_gazel(struct IsdnCard *card)
667 cs->cardmsg = &Gazel_card_msg; 667 cs->cardmsg = &Gazel_card_msg;
668 668
669 switch (cs->subtyp) { 669 switch (cs->subtyp) {
670 case R647: 670 case R647:
671 case R685: 671 case R685:
672 cs->irq_func = &gazel_interrupt; 672 cs->irq_func = &gazel_interrupt;
673 ISACVersion(cs, "Gazel:"); 673 ISACVersion(cs, "Gazel:");
674 if (HscxVersion(cs, "Gazel:")) { 674 if (HscxVersion(cs, "Gazel:")) {
675 printk(KERN_WARNING 675 printk(KERN_WARNING
676 "Gazel: wrong HSCX versions check IO address\n"); 676 "Gazel: wrong HSCX versions check IO address\n");
677 release_io_gazel(cs); 677 release_io_gazel(cs);
678 return (0); 678 return (0);
679 } 679 }
680 break; 680 break;
681 case R742: 681 case R742:
682 case R753: 682 case R753:
683 cs->irq_func = &gazel_interrupt_ipac; 683 cs->irq_func = &gazel_interrupt_ipac;
684 val = ReadISAC(cs, IPAC_ID - 0x80); 684 val = ReadISAC(cs, IPAC_ID - 0x80);
685 printk(KERN_INFO "Gazel: IPAC version %x\n", val); 685 printk(KERN_INFO "Gazel: IPAC version %x\n", val);
686 break; 686 break;
687 } 687 }
688 688
689 return (1); 689 return (1);
diff --git a/drivers/isdn/hisax/hfc4s8s_l1.c b/drivers/isdn/hisax/hfc4s8s_l1.c
index 384d5118e325..dea04de8e7ca 100644
--- a/drivers/isdn/hisax/hfc4s8s_l1.c
+++ b/drivers/isdn/hisax/hfc4s8s_l1.c
@@ -93,32 +93,32 @@ static struct pci_device_id hfc4s8s_ids[] = {
93 .subdevice = 0x08b4, 93 .subdevice = 0x08b4,
94 .driver_data = 94 .driver_data =
95 (unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_0, 4, 95 (unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_0, 4,
96 "HFC-4S Evaluation Board"}), 96 "HFC-4S Evaluation Board"}),
97 }, 97 },
98 {.vendor = PCI_VENDOR_ID_CCD, 98 {.vendor = PCI_VENDOR_ID_CCD,
99 .device = PCI_DEVICE_ID_8S, 99 .device = PCI_DEVICE_ID_8S,
100 .subvendor = 0x1397, 100 .subvendor = 0x1397,
101 .subdevice = 0x16b8, 101 .subdevice = 0x16b8,
102 .driver_data = 102 .driver_data =
103 (unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_0, 8, 103 (unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_0, 8,
104 "HFC-8S Evaluation Board"}), 104 "HFC-8S Evaluation Board"}),
105 }, 105 },
106 {.vendor = PCI_VENDOR_ID_CCD, 106 {.vendor = PCI_VENDOR_ID_CCD,
107 .device = PCI_DEVICE_ID_4S, 107 .device = PCI_DEVICE_ID_4S,
108 .subvendor = 0x1397, 108 .subvendor = 0x1397,
109 .subdevice = 0xb520, 109 .subdevice = 0xb520,
110 .driver_data = 110 .driver_data =
111 (unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_1, 4, 111 (unsigned long) &((hfc4s8s_param) {CHIP_ID_4S, CLOCKMODE_1, 4,
112 "IOB4ST"}), 112 "IOB4ST"}),
113 }, 113 },
114 {.vendor = PCI_VENDOR_ID_CCD, 114 {.vendor = PCI_VENDOR_ID_CCD,
115 .device = PCI_DEVICE_ID_8S, 115 .device = PCI_DEVICE_ID_8S,
116 .subvendor = 0x1397, 116 .subvendor = 0x1397,
117 .subdevice = 0xb522, 117 .subdevice = 0xb522,
118 .driver_data = 118 .driver_data =
119 (unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_1, 8, 119 (unsigned long) &((hfc4s8s_param) {CHIP_ID_8S, CLOCKMODE_1, 8,
120 "IOB8ST"}), 120 "IOB8ST"}),
121 }, 121 },
122 {} 122 {}
123}; 123};
124 124
@@ -203,14 +203,14 @@ typedef struct _hfc4s8s_hw {
203#ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */ 203#ifdef HISAX_HFC4S8S_PCIMEM /* inline functions memory mapped */
204 204
205/* memory write and dummy IO read to avoid PCI byte merge problems */ 205/* memory write and dummy IO read to avoid PCI byte merge problems */
206#define Write_hfc8(a,b,c) {(*((volatile u_char *)(a->membase+b)) = c); inb(a->iobase+4);} 206#define Write_hfc8(a, b, c) {(*((volatile u_char *)(a->membase + b)) = c); inb(a->iobase + 4);}
207/* memory write without dummy IO access for fifo data access */ 207/* memory write without dummy IO access for fifo data access */
208#define fWrite_hfc8(a,b,c) (*((volatile u_char *)(a->membase+b)) = c) 208#define fWrite_hfc8(a, b, c) (*((volatile u_char *)(a->membase + b)) = c)
209#define Read_hfc8(a,b) (*((volatile u_char *)(a->membase+b))) 209#define Read_hfc8(a, b) (*((volatile u_char *)(a->membase + b)))
210#define Write_hfc16(a,b,c) (*((volatile unsigned short *)(a->membase+b)) = c) 210#define Write_hfc16(a, b, c) (*((volatile unsigned short *)(a->membase + b)) = c)
211#define Read_hfc16(a,b) (*((volatile unsigned short *)(a->membase+b))) 211#define Read_hfc16(a, b) (*((volatile unsigned short *)(a->membase + b)))
212#define Write_hfc32(a,b,c) (*((volatile unsigned long *)(a->membase+b)) = c) 212#define Write_hfc32(a, b, c) (*((volatile unsigned long *)(a->membase + b)) = c)
213#define Read_hfc32(a,b) (*((volatile unsigned long *)(a->membase+b))) 213#define Read_hfc32(a, b) (*((volatile unsigned long *)(a->membase + b)))
214#define wait_busy(a) {while ((Read_hfc8(a, R_STATUS) & M_BUSY));} 214#define wait_busy(a) {while ((Read_hfc8(a, R_STATUS) & M_BUSY));}
215#define PCI_ENA_MEMIO 0x03 215#define PCI_ENA_MEMIO 0x03
216 216
@@ -218,87 +218,87 @@ typedef struct _hfc4s8s_hw {
218 218
219/* inline functions io mapped */ 219/* inline functions io mapped */
220static inline void 220static inline void
221SetRegAddr(hfc4s8s_hw * a, u_char b) 221SetRegAddr(hfc4s8s_hw *a, u_char b)
222{ 222{
223 outb(b, (a->iobase) + 4); 223 outb(b, (a->iobase) + 4);
224} 224}
225 225
226static inline u_char 226static inline u_char
227GetRegAddr(hfc4s8s_hw * a) 227GetRegAddr(hfc4s8s_hw *a)
228{ 228{
229 return (inb((volatile u_int) (a->iobase + 4))); 229 return (inb((volatile u_int) (a->iobase + 4)));
230} 230}
231 231
232 232
233static inline void 233static inline void
234Write_hfc8(hfc4s8s_hw * a, u_char b, u_char c) 234Write_hfc8(hfc4s8s_hw *a, u_char b, u_char c)
235{ 235{
236 SetRegAddr(a, b); 236 SetRegAddr(a, b);
237 outb(c, a->iobase); 237 outb(c, a->iobase);
238} 238}
239 239
240static inline void 240static inline void
241fWrite_hfc8(hfc4s8s_hw * a, u_char c) 241fWrite_hfc8(hfc4s8s_hw *a, u_char c)
242{ 242{
243 outb(c, a->iobase); 243 outb(c, a->iobase);
244} 244}
245 245
246static inline void 246static inline void
247Write_hfc16(hfc4s8s_hw * a, u_char b, u_short c) 247Write_hfc16(hfc4s8s_hw *a, u_char b, u_short c)
248{ 248{
249 SetRegAddr(a, b); 249 SetRegAddr(a, b);
250 outw(c, a->iobase); 250 outw(c, a->iobase);
251} 251}
252 252
253static inline void 253static inline void
254Write_hfc32(hfc4s8s_hw * a, u_char b, u_long c) 254Write_hfc32(hfc4s8s_hw *a, u_char b, u_long c)
255{ 255{
256 SetRegAddr(a, b); 256 SetRegAddr(a, b);
257 outl(c, a->iobase); 257 outl(c, a->iobase);
258} 258}
259 259
260static inline void 260static inline void
261fWrite_hfc32(hfc4s8s_hw * a, u_long c) 261fWrite_hfc32(hfc4s8s_hw *a, u_long c)
262{ 262{
263 outl(c, a->iobase); 263 outl(c, a->iobase);
264} 264}
265 265
266static inline u_char 266static inline u_char
267Read_hfc8(hfc4s8s_hw * a, u_char b) 267Read_hfc8(hfc4s8s_hw *a, u_char b)
268{ 268{
269 SetRegAddr(a, b); 269 SetRegAddr(a, b);
270 return (inb((volatile u_int) a->iobase)); 270 return (inb((volatile u_int) a->iobase));
271} 271}
272 272
273static inline u_char 273static inline u_char
274fRead_hfc8(hfc4s8s_hw * a) 274fRead_hfc8(hfc4s8s_hw *a)
275{ 275{
276 return (inb((volatile u_int) a->iobase)); 276 return (inb((volatile u_int) a->iobase));
277} 277}
278 278
279 279
280static inline u_short 280static inline u_short
281Read_hfc16(hfc4s8s_hw * a, u_char b) 281Read_hfc16(hfc4s8s_hw *a, u_char b)
282{ 282{
283 SetRegAddr(a, b); 283 SetRegAddr(a, b);
284 return (inw((volatile u_int) a->iobase)); 284 return (inw((volatile u_int) a->iobase));
285} 285}
286 286
287static inline u_long 287static inline u_long
288Read_hfc32(hfc4s8s_hw * a, u_char b) 288Read_hfc32(hfc4s8s_hw *a, u_char b)
289{ 289{
290 SetRegAddr(a, b); 290 SetRegAddr(a, b);
291 return (inl((volatile u_int) a->iobase)); 291 return (inl((volatile u_int) a->iobase));
292} 292}
293 293
294static inline u_long 294static inline u_long
295fRead_hfc32(hfc4s8s_hw * a) 295fRead_hfc32(hfc4s8s_hw *a)
296{ 296{
297 return (inl((volatile u_int) a->iobase)); 297 return (inl((volatile u_int) a->iobase));
298} 298}
299 299
300static inline void 300static inline void
301wait_busy(hfc4s8s_hw * a) 301wait_busy(hfc4s8s_hw *a)
302{ 302{
303 SetRegAddr(a, R_STATUS); 303 SetRegAddr(a, R_STATUS);
304 while (inb((volatile u_int) a->iobase) & M_BUSY); 304 while (inb((volatile u_int) a->iobase) & M_BUSY);
@@ -313,7 +313,7 @@ wait_busy(hfc4s8s_hw * a)
313/* may be updated by the chip during read */ 313/* may be updated by the chip during read */
314/******************************************************/ 314/******************************************************/
315static u_char 315static u_char
316Read_hfc8_stable(hfc4s8s_hw * hw, int reg) 316Read_hfc8_stable(hfc4s8s_hw *hw, int reg)
317{ 317{
318 u_char ref8; 318 u_char ref8;
319 u_char in8; 319 u_char in8;
@@ -325,7 +325,7 @@ Read_hfc8_stable(hfc4s8s_hw * hw, int reg)
325} 325}
326 326
327static int 327static int
328Read_hfc16_stable(hfc4s8s_hw * hw, int reg) 328Read_hfc16_stable(hfc4s8s_hw *hw, int reg)
329{ 329{
330 int ref16; 330 int ref16;
331 int in16; 331 int in16;
@@ -349,67 +349,67 @@ dch_l2l1(struct hisax_d_if *iface, int pr, void *arg)
349 349
350 switch (pr) { 350 switch (pr) {
351 351
352 case (PH_DATA | REQUEST): 352 case (PH_DATA | REQUEST):
353 if (!l1->enabled) { 353 if (!l1->enabled) {
354 dev_kfree_skb(skb); 354 dev_kfree_skb(skb);
355 break;
356 }
357 spin_lock_irqsave(&l1->lock, flags);
358 skb_queue_tail(&l1->d_tx_queue, skb);
359 if ((skb_queue_len(&l1->d_tx_queue) == 1) &&
360 (l1->tx_cnt <= 0)) {
361 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
362 0x10;
363 spin_unlock_irqrestore(&l1->lock, flags);
364 schedule_work(&l1->hw->tqueue);
365 } else
366 spin_unlock_irqrestore(&l1->lock, flags);
367 break; 355 break;
356 }
357 spin_lock_irqsave(&l1->lock, flags);
358 skb_queue_tail(&l1->d_tx_queue, skb);
359 if ((skb_queue_len(&l1->d_tx_queue) == 1) &&
360 (l1->tx_cnt <= 0)) {
361 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
362 0x10;
363 spin_unlock_irqrestore(&l1->lock, flags);
364 schedule_work(&l1->hw->tqueue);
365 } else
366 spin_unlock_irqrestore(&l1->lock, flags);
367 break;
368 368
369 case (PH_ACTIVATE | REQUEST): 369 case (PH_ACTIVATE | REQUEST):
370 if (!l1->enabled) 370 if (!l1->enabled)
371 break;
372 if (!l1->nt_mode) {
373 if (l1->l1_state < 6) {
374 spin_lock_irqsave(&l1->lock,
375 flags);
376
377 Write_hfc8(l1->hw, R_ST_SEL,
378 l1->st_num);
379 Write_hfc8(l1->hw, A_ST_WR_STA,
380 0x60);
381 mod_timer(&l1->l1_timer,
382 jiffies + L1_TIMER_T3);
383 spin_unlock_irqrestore(&l1->lock,
384 flags);
385 } else if (l1->l1_state == 7)
386 l1->d_if.ifc.l1l2(&l1->d_if.ifc,
387 PH_ACTIVATE |
388 INDICATION,
389 NULL);
390 } else {
391 if (l1->l1_state != 3) {
392 spin_lock_irqsave(&l1->lock,
393 flags);
394 Write_hfc8(l1->hw, R_ST_SEL,
395 l1->st_num);
396 Write_hfc8(l1->hw, A_ST_WR_STA,
397 0x60);
398 spin_unlock_irqrestore(&l1->lock,
399 flags);
400 } else if (l1->l1_state == 3)
401 l1->d_if.ifc.l1l2(&l1->d_if.ifc,
402 PH_ACTIVATE |
403 INDICATION,
404 NULL);
405 }
406 break; 371 break;
372 if (!l1->nt_mode) {
373 if (l1->l1_state < 6) {
374 spin_lock_irqsave(&l1->lock,
375 flags);
376
377 Write_hfc8(l1->hw, R_ST_SEL,
378 l1->st_num);
379 Write_hfc8(l1->hw, A_ST_WR_STA,
380 0x60);
381 mod_timer(&l1->l1_timer,
382 jiffies + L1_TIMER_T3);
383 spin_unlock_irqrestore(&l1->lock,
384 flags);
385 } else if (l1->l1_state == 7)
386 l1->d_if.ifc.l1l2(&l1->d_if.ifc,
387 PH_ACTIVATE |
388 INDICATION,
389 NULL);
390 } else {
391 if (l1->l1_state != 3) {
392 spin_lock_irqsave(&l1->lock,
393 flags);
394 Write_hfc8(l1->hw, R_ST_SEL,
395 l1->st_num);
396 Write_hfc8(l1->hw, A_ST_WR_STA,
397 0x60);
398 spin_unlock_irqrestore(&l1->lock,
399 flags);
400 } else if (l1->l1_state == 3)
401 l1->d_if.ifc.l1l2(&l1->d_if.ifc,
402 PH_ACTIVATE |
403 INDICATION,
404 NULL);
405 }
406 break;
407 407
408 default: 408 default:
409 printk(KERN_INFO 409 printk(KERN_INFO
410 "HFC-4S/8S: Unknown D-chan cmd 0x%x received, ignored\n", 410 "HFC-4S/8S: Unknown D-chan cmd 0x%x received, ignored\n",
411 pr); 411 pr);
412 break; 412 break;
413 } 413 }
414 if (!l1->enabled) 414 if (!l1->enabled)
415 l1->d_if.ifc.l1l2(&l1->d_if.ifc, 415 l1->d_if.ifc.l1l2(&l1->d_if.ifc,
@@ -430,199 +430,199 @@ bch_l2l1(struct hisax_if *ifc, int pr, void *arg)
430 430
431 switch (pr) { 431 switch (pr) {
432 432
433 case (PH_DATA | REQUEST): 433 case (PH_DATA | REQUEST):
434 if (!l1->enabled || (bch->mode == L1_MODE_NULL)) { 434 if (!l1->enabled || (bch->mode == L1_MODE_NULL)) {
435 dev_kfree_skb(skb); 435 dev_kfree_skb(skb);
436 break;
437 }
438 spin_lock_irqsave(&l1->lock, flags);
439 skb_queue_tail(&bch->tx_queue, skb);
440 if (!bch->tx_skb && (bch->tx_cnt <= 0)) {
441 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
442 ((bch->bchan == 1) ? 1 : 4);
443 spin_unlock_irqrestore(&l1->lock, flags);
444 schedule_work(&l1->hw->tqueue);
445 } else
446 spin_unlock_irqrestore(&l1->lock, flags);
447 break; 436 break;
437 }
438 spin_lock_irqsave(&l1->lock, flags);
439 skb_queue_tail(&bch->tx_queue, skb);
440 if (!bch->tx_skb && (bch->tx_cnt <= 0)) {
441 l1->hw->mr.r_irq_fifo_blx[l1->st_num] |=
442 ((bch->bchan == 1) ? 1 : 4);
443 spin_unlock_irqrestore(&l1->lock, flags);
444 schedule_work(&l1->hw->tqueue);
445 } else
446 spin_unlock_irqrestore(&l1->lock, flags);
447 break;
448 448
449 case (PH_ACTIVATE | REQUEST): 449 case (PH_ACTIVATE | REQUEST):
450 case (PH_DEACTIVATE | REQUEST): 450 case (PH_DEACTIVATE | REQUEST):
451 if (!l1->enabled) 451 if (!l1->enabled)
452 break; 452 break;
453 if (pr == (PH_DEACTIVATE | REQUEST)) 453 if (pr == (PH_DEACTIVATE | REQUEST))
454 mode = L1_MODE_NULL; 454 mode = L1_MODE_NULL;
455 455
456 switch (mode) { 456 switch (mode) {
457 case L1_MODE_HDLC: 457 case L1_MODE_HDLC:
458 spin_lock_irqsave(&l1->lock, 458 spin_lock_irqsave(&l1->lock,
459 flags); 459 flags);
460 l1->hw->mr.timer_usg_cnt++; 460 l1->hw->mr.timer_usg_cnt++;
461 l1->hw->mr. 461 l1->hw->mr.
462 fifo_slow_timer_service[l1-> 462 fifo_slow_timer_service[l1->
463 st_num] 463 st_num]
464 |= 464 |=
465 ((bch->bchan == 465 ((bch->bchan ==
466 1) ? 0x2 : 0x8); 466 1) ? 0x2 : 0x8);
467 Write_hfc8(l1->hw, R_FIFO, 467 Write_hfc8(l1->hw, R_FIFO,
468 (l1->st_num * 8 + 468 (l1->st_num * 8 +
469 ((bch->bchan == 469 ((bch->bchan ==
470 1) ? 0 : 2))); 470 1) ? 0 : 2)));
471 wait_busy(l1->hw); 471 wait_busy(l1->hw);
472 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */ 472 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
473 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */ 473 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
474 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable TX interrupts for hdlc */ 474 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable TX interrupts for hdlc */
475 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */ 475 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
476 wait_busy(l1->hw); 476 wait_busy(l1->hw);
477
478 Write_hfc8(l1->hw, R_FIFO,
479 (l1->st_num * 8 +
480 ((bch->bchan ==
481 1) ? 1 : 3)));
482 wait_busy(l1->hw);
483 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
484 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
485 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable RX interrupts for hdlc */
486 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
487
488 Write_hfc8(l1->hw, R_ST_SEL,
489 l1->st_num);
490 l1->hw->mr.r_ctrl0 |=
491 (bch->bchan & 3);
492 Write_hfc8(l1->hw, A_ST_CTRL0,
493 l1->hw->mr.r_ctrl0);
494 bch->mode = L1_MODE_HDLC;
495 spin_unlock_irqrestore(&l1->lock,
496 flags);
497
498 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
499 PH_ACTIVATE |
500 INDICATION,
501 NULL);
502 break;
503
504 case L1_MODE_TRANS:
505 spin_lock_irqsave(&l1->lock,
506 flags);
507 l1->hw->mr.
508 fifo_rx_trans_enables[l1->
509 st_num]
510 |=
511 ((bch->bchan ==
512 1) ? 0x2 : 0x8);
513 l1->hw->mr.timer_usg_cnt++;
514 Write_hfc8(l1->hw, R_FIFO,
515 (l1->st_num * 8 +
516 ((bch->bchan ==
517 1) ? 0 : 2)));
518 wait_busy(l1->hw);
519 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
520 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
521 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
522 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
523 wait_busy(l1->hw);
524
525 Write_hfc8(l1->hw, R_FIFO,
526 (l1->st_num * 8 +
527 ((bch->bchan ==
528 1) ? 1 : 3)));
529 wait_busy(l1->hw);
530 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
531 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
532 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
533 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
534
535 Write_hfc8(l1->hw, R_ST_SEL,
536 l1->st_num);
537 l1->hw->mr.r_ctrl0 |=
538 (bch->bchan & 3);
539 Write_hfc8(l1->hw, A_ST_CTRL0,
540 l1->hw->mr.r_ctrl0);
541 bch->mode = L1_MODE_TRANS;
542 spin_unlock_irqrestore(&l1->lock,
543 flags);
544
545 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
546 PH_ACTIVATE |
547 INDICATION,
548 NULL);
549 break;
550
551 default:
552 if (bch->mode == L1_MODE_NULL)
553 break;
554 spin_lock_irqsave(&l1->lock,
555 flags);
556 l1->hw->mr.
557 fifo_slow_timer_service[l1->
558 st_num]
559 &=
560 ~((bch->bchan ==
561 1) ? 0x3 : 0xc);
562 l1->hw->mr.
563 fifo_rx_trans_enables[l1->
564 st_num]
565 &=
566 ~((bch->bchan ==
567 1) ? 0x3 : 0xc);
568 l1->hw->mr.timer_usg_cnt--;
569 Write_hfc8(l1->hw, R_FIFO,
570 (l1->st_num * 8 +
571 ((bch->bchan ==
572 1) ? 0 : 2)));
573 wait_busy(l1->hw);
574 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
575 wait_busy(l1->hw);
576 Write_hfc8(l1->hw, R_FIFO,
577 (l1->st_num * 8 +
578 ((bch->bchan ==
579 1) ? 1 : 3)));
580 wait_busy(l1->hw);
581 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
582 Write_hfc8(l1->hw, R_ST_SEL,
583 l1->st_num);
584 l1->hw->mr.r_ctrl0 &=
585 ~(bch->bchan & 3);
586 Write_hfc8(l1->hw, A_ST_CTRL0,
587 l1->hw->mr.r_ctrl0);
588 spin_unlock_irqrestore(&l1->lock,
589 flags);
590
591 bch->mode = L1_MODE_NULL;
592 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
593 PH_DEACTIVATE |
594 INDICATION,
595 NULL);
596 if (bch->tx_skb) {
597 dev_kfree_skb(bch->tx_skb);
598 bch->tx_skb = NULL;
599 }
600 if (bch->rx_skb) {
601 dev_kfree_skb(bch->rx_skb);
602 bch->rx_skb = NULL;
603 }
604 skb_queue_purge(&bch->tx_queue);
605 bch->tx_cnt = 0;
606 bch->rx_ptr = NULL;
607 break;
608 }
609 477
610 /* timer is only used when at least one b channel */ 478 Write_hfc8(l1->hw, R_FIFO,
611 /* is set up to transparent mode */ 479 (l1->st_num * 8 +
612 if (l1->hw->mr.timer_usg_cnt) { 480 ((bch->bchan ==
613 Write_hfc8(l1->hw, R_IRQMSK_MISC, 481 1) ? 1 : 3)));
614 M_TI_IRQMSK); 482 wait_busy(l1->hw);
615 } else { 483 Write_hfc8(l1->hw, A_CON_HDLC, 0xc); /* HDLC mode, flag fill, connect ST */
616 Write_hfc8(l1->hw, R_IRQMSK_MISC, 0); 484 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
617 } 485 Write_hfc8(l1->hw, A_IRQ_MSK, 1); /* enable RX interrupts for hdlc */
486 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
487
488 Write_hfc8(l1->hw, R_ST_SEL,
489 l1->st_num);
490 l1->hw->mr.r_ctrl0 |=
491 (bch->bchan & 3);
492 Write_hfc8(l1->hw, A_ST_CTRL0,
493 l1->hw->mr.r_ctrl0);
494 bch->mode = L1_MODE_HDLC;
495 spin_unlock_irqrestore(&l1->lock,
496 flags);
497
498 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
499 PH_ACTIVATE |
500 INDICATION,
501 NULL);
502 break;
618 503
504 case L1_MODE_TRANS:
505 spin_lock_irqsave(&l1->lock,
506 flags);
507 l1->hw->mr.
508 fifo_rx_trans_enables[l1->
509 st_num]
510 |=
511 ((bch->bchan ==
512 1) ? 0x2 : 0x8);
513 l1->hw->mr.timer_usg_cnt++;
514 Write_hfc8(l1->hw, R_FIFO,
515 (l1->st_num * 8 +
516 ((bch->bchan ==
517 1) ? 0 : 2)));
518 wait_busy(l1->hw);
519 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
520 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
521 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
522 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
523 wait_busy(l1->hw);
524
525 Write_hfc8(l1->hw, R_FIFO,
526 (l1->st_num * 8 +
527 ((bch->bchan ==
528 1) ? 1 : 3)));
529 wait_busy(l1->hw);
530 Write_hfc8(l1->hw, A_CON_HDLC, 0xf); /* Transparent mode, 1 fill, connect ST */
531 Write_hfc8(l1->hw, A_SUBCH_CFG, 0); /* 8 bits */
532 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
533 Write_hfc8(l1->hw, A_INC_RES_FIFO, 2); /* reset fifo */
534
535 Write_hfc8(l1->hw, R_ST_SEL,
536 l1->st_num);
537 l1->hw->mr.r_ctrl0 |=
538 (bch->bchan & 3);
539 Write_hfc8(l1->hw, A_ST_CTRL0,
540 l1->hw->mr.r_ctrl0);
541 bch->mode = L1_MODE_TRANS;
542 spin_unlock_irqrestore(&l1->lock,
543 flags);
544
545 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
546 PH_ACTIVATE |
547 INDICATION,
548 NULL);
619 break; 549 break;
620 550
621 default: 551 default:
622 printk(KERN_INFO 552 if (bch->mode == L1_MODE_NULL)
623 "HFC-4S/8S: Unknown B-chan cmd 0x%x received, ignored\n", 553 break;
624 pr); 554 spin_lock_irqsave(&l1->lock,
555 flags);
556 l1->hw->mr.
557 fifo_slow_timer_service[l1->
558 st_num]
559 &=
560 ~((bch->bchan ==
561 1) ? 0x3 : 0xc);
562 l1->hw->mr.
563 fifo_rx_trans_enables[l1->
564 st_num]
565 &=
566 ~((bch->bchan ==
567 1) ? 0x3 : 0xc);
568 l1->hw->mr.timer_usg_cnt--;
569 Write_hfc8(l1->hw, R_FIFO,
570 (l1->st_num * 8 +
571 ((bch->bchan ==
572 1) ? 0 : 2)));
573 wait_busy(l1->hw);
574 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable TX interrupts */
575 wait_busy(l1->hw);
576 Write_hfc8(l1->hw, R_FIFO,
577 (l1->st_num * 8 +
578 ((bch->bchan ==
579 1) ? 1 : 3)));
580 wait_busy(l1->hw);
581 Write_hfc8(l1->hw, A_IRQ_MSK, 0); /* disable RX interrupts */
582 Write_hfc8(l1->hw, R_ST_SEL,
583 l1->st_num);
584 l1->hw->mr.r_ctrl0 &=
585 ~(bch->bchan & 3);
586 Write_hfc8(l1->hw, A_ST_CTRL0,
587 l1->hw->mr.r_ctrl0);
588 spin_unlock_irqrestore(&l1->lock,
589 flags);
590
591 bch->mode = L1_MODE_NULL;
592 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
593 PH_DEACTIVATE |
594 INDICATION,
595 NULL);
596 if (bch->tx_skb) {
597 dev_kfree_skb(bch->tx_skb);
598 bch->tx_skb = NULL;
599 }
600 if (bch->rx_skb) {
601 dev_kfree_skb(bch->rx_skb);
602 bch->rx_skb = NULL;
603 }
604 skb_queue_purge(&bch->tx_queue);
605 bch->tx_cnt = 0;
606 bch->rx_ptr = NULL;
625 break; 607 break;
608 }
609
610 /* timer is only used when at least one b channel */
611 /* is set up to transparent mode */
612 if (l1->hw->mr.timer_usg_cnt) {
613 Write_hfc8(l1->hw, R_IRQMSK_MISC,
614 M_TI_IRQMSK);
615 } else {
616 Write_hfc8(l1->hw, R_IRQMSK_MISC, 0);
617 }
618
619 break;
620
621 default:
622 printk(KERN_INFO
623 "HFC-4S/8S: Unknown B-chan cmd 0x%x received, ignored\n",
624 pr);
625 break;
626 } 626 }
627 if (!l1->enabled) 627 if (!l1->enabled)
628 bch->b_if.ifc.l1l2(&bch->b_if.ifc, 628 bch->b_if.ifc.l1l2(&bch->b_if.ifc,
@@ -742,7 +742,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
742#ifdef HISAX_HFC4S8S_PCIMEM 742#ifdef HISAX_HFC4S8S_PCIMEM
743 Read_hfc8(l1p->hw, A_FIFO_DATA0); 743 Read_hfc8(l1p->hw, A_FIFO_DATA0);
744#else 744#else
745 fRead_hfc8(l1p->hw); 745 fRead_hfc8(l1p->hw);
746#endif 746#endif
747 747
748 Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); 748 Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1);
@@ -760,7 +760,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
760 while (z1 >= 4) { 760 while (z1 >= 4) {
761#ifdef HISAX_HFC4S8S_PCIMEM 761#ifdef HISAX_HFC4S8S_PCIMEM
762 *((unsigned long *) cp) = 762 *((unsigned long *) cp) =
763 Read_hfc32(l1p->hw, A_FIFO_DATA0); 763 Read_hfc32(l1p->hw, A_FIFO_DATA0);
764#else 764#else
765 *((unsigned long *) cp) = fRead_hfc32(l1p->hw); 765 *((unsigned long *) cp) = fRead_hfc32(l1p->hw);
766#endif 766#endif
@@ -772,7 +772,7 @@ rx_d_frame(struct hfc4s8s_l1 *l1p, int ech)
772#ifdef HISAX_HFC4S8S_PCIMEM 772#ifdef HISAX_HFC4S8S_PCIMEM
773 *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0); 773 *cp++ = Read_hfc8(l1p->hw, A_FIFO_DATA0);
774#else 774#else
775 *cp++ = fRead_hfc8(l1p->hw); 775 *cp++ = fRead_hfc8(l1p->hw);
776#endif 776#endif
777 777
778 Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); /* increment f counter */ 778 Write_hfc8(l1p->hw, A_INC_RES_FIFO, 1); /* increment f counter */
@@ -866,10 +866,10 @@ rx_b_frame(struct hfc4s8s_btype *bch)
866 while (z1 >= 4) { 866 while (z1 >= 4) {
867#ifdef HISAX_HFC4S8S_PCIMEM 867#ifdef HISAX_HFC4S8S_PCIMEM
868 *((unsigned long *) bch->rx_ptr) = 868 *((unsigned long *) bch->rx_ptr) =
869 Read_hfc32(l1->hw, A_FIFO_DATA0); 869 Read_hfc32(l1->hw, A_FIFO_DATA0);
870#else 870#else
871 *((unsigned long *) bch->rx_ptr) = 871 *((unsigned long *) bch->rx_ptr) =
872 fRead_hfc32(l1->hw); 872 fRead_hfc32(l1->hw);
873#endif 873#endif
874 bch->rx_ptr += 4; 874 bch->rx_ptr += 4;
875 z1 -= 4; 875 z1 -= 4;
@@ -879,7 +879,7 @@ rx_b_frame(struct hfc4s8s_btype *bch)
879#ifdef HISAX_HFC4S8S_PCIMEM 879#ifdef HISAX_HFC4S8S_PCIMEM
880 *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0); 880 *(bch->rx_ptr++) = Read_hfc8(l1->hw, A_FIFO_DATA0);
881#else 881#else
882 *(bch->rx_ptr++) = fRead_hfc8(l1->hw); 882 *(bch->rx_ptr++) = fRead_hfc8(l1->hw);
883#endif 883#endif
884 884
885 if (hdlc_complete) { 885 if (hdlc_complete) {
@@ -996,7 +996,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
996 if (bch->mode == L1_MODE_HDLC) { 996 if (bch->mode == L1_MODE_HDLC) {
997 hdlc_num = Read_hfc8(l1->hw, A_F1) & MAX_F_CNT; 997 hdlc_num = Read_hfc8(l1->hw, A_F1) & MAX_F_CNT;
998 hdlc_num -= 998 hdlc_num -=
999 (Read_hfc8_stable(l1->hw, A_F2) & MAX_F_CNT); 999 (Read_hfc8_stable(l1->hw, A_F2) & MAX_F_CNT);
1000 if (hdlc_num < 0) 1000 if (hdlc_num < 0)
1001 hdlc_num += 16; 1001 hdlc_num += 16;
1002 if (hdlc_num >= 15) 1002 if (hdlc_num >= 15)
@@ -1008,7 +1008,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
1008 if (!(skb = skb_dequeue(&bch->tx_queue))) { 1008 if (!(skb = skb_dequeue(&bch->tx_queue))) {
1009 l1->hw->mr.fifo_slow_timer_service[l1-> 1009 l1->hw->mr.fifo_slow_timer_service[l1->
1010 st_num] 1010 st_num]
1011 &= ~((bch->bchan == 1) ? 1 : 4); 1011 &= ~((bch->bchan == 1) ? 1 : 4);
1012 break; /* list empty */ 1012 break; /* list empty */
1013 } 1013 }
1014 bch->tx_skb = skb; 1014 bch->tx_skb = skb;
@@ -1017,10 +1017,10 @@ tx_b_frame(struct hfc4s8s_btype *bch)
1017 1017
1018 if (!hdlc_num) 1018 if (!hdlc_num)
1019 l1->hw->mr.fifo_slow_timer_service[l1->st_num] |= 1019 l1->hw->mr.fifo_slow_timer_service[l1->st_num] |=
1020 ((bch->bchan == 1) ? 1 : 4); 1020 ((bch->bchan == 1) ? 1 : 4);
1021 else 1021 else
1022 l1->hw->mr.fifo_slow_timer_service[l1->st_num] &= 1022 l1->hw->mr.fifo_slow_timer_service[l1->st_num] &=
1023 ~((bch->bchan == 1) ? 1 : 4); 1023 ~((bch->bchan == 1) ? 1 : 4);
1024 1024
1025 max = Read_hfc16_stable(l1->hw, A_Z2); 1025 max = Read_hfc16_stable(l1->hw, A_Z2);
1026 max -= Read_hfc16(l1->hw, A_Z1); 1026 max -= Read_hfc16(l1->hw, A_Z1);
@@ -1055,7 +1055,7 @@ tx_b_frame(struct hfc4s8s_btype *bch)
1055#ifdef HISAX_HFC4S8S_PCIMEM 1055#ifdef HISAX_HFC4S8S_PCIMEM
1056 fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++); 1056 fWrite_hfc8(l1->hw, A_FIFO_DATA0, *cp++);
1057#else 1057#else
1058 fWrite_hfc8(l1->hw, *cp++); 1058 fWrite_hfc8(l1->hw, *cp++);
1059#endif 1059#endif
1060 1060
1061 if (bch->tx_cnt >= skb->len) { 1061 if (bch->tx_cnt >= skb->len) {
@@ -1106,8 +1106,8 @@ hfc4s8s_bh(struct work_struct *work)
1106 Write_hfc8(l1p->hw, R_ST_SEL, 1106 Write_hfc8(l1p->hw, R_ST_SEL,
1107 l1p->st_num); 1107 l1p->st_num);
1108 l1p->l1_state = 1108 l1p->l1_state =
1109 Read_hfc8(l1p->hw, 1109 Read_hfc8(l1p->hw,
1110 A_ST_RD_STA) & 0xf; 1110 A_ST_RD_STA) & 0xf;
1111 1111
1112 if ((oldstate == 3) 1112 if ((oldstate == 3)
1113 && (l1p->l1_state != 3)) 1113 && (l1p->l1_state != 3))
@@ -1123,12 +1123,12 @@ hfc4s8s_bh(struct work_struct *work)
1123 del_timer(&l1p->l1_timer); 1123 del_timer(&l1p->l1_timer);
1124 if (l1p->l1_state == 3) { 1124 if (l1p->l1_state == 3) {
1125 l1p->d_if.ifc. 1125 l1p->d_if.ifc.
1126 l1l2(&l1p-> 1126 l1l2(&l1p->
1127 d_if.ifc, 1127 d_if.ifc,
1128 PH_ACTIVATE 1128 PH_ACTIVATE
1129 | 1129 |
1130 INDICATION, 1130 INDICATION,
1131 NULL); 1131 NULL);
1132 } 1132 }
1133 } else { 1133 } else {
1134 /* allow transition */ 1134 /* allow transition */
@@ -1148,8 +1148,8 @@ hfc4s8s_bh(struct work_struct *work)
1148 Write_hfc8(l1p->hw, R_ST_SEL, 1148 Write_hfc8(l1p->hw, R_ST_SEL,
1149 l1p->st_num); 1149 l1p->st_num);
1150 l1p->l1_state = 1150 l1p->l1_state =
1151 Read_hfc8(l1p->hw, 1151 Read_hfc8(l1p->hw,
1152 A_ST_RD_STA) & 0xf; 1152 A_ST_RD_STA) & 0xf;
1153 1153
1154 if (((l1p->l1_state == 3) && 1154 if (((l1p->l1_state == 3) &&
1155 ((oldstate == 7) || 1155 ((oldstate == 7) ||
@@ -1165,26 +1165,26 @@ hfc4s8s_bh(struct work_struct *work)
1165 del_timer(&l1p-> 1165 del_timer(&l1p->
1166 l1_timer); 1166 l1_timer);
1167 l1p->d_if.ifc. 1167 l1p->d_if.ifc.
1168 l1l2(&l1p-> 1168 l1l2(&l1p->
1169 d_if.ifc, 1169 d_if.ifc,
1170 PH_ACTIVATE 1170 PH_ACTIVATE
1171 | 1171 |
1172 INDICATION, 1172 INDICATION,
1173 NULL); 1173 NULL);
1174 tx_d_frame(l1p); 1174 tx_d_frame(l1p);
1175 } 1175 }
1176 if (l1p->l1_state == 3) { 1176 if (l1p->l1_state == 3) {
1177 if (oldstate != 3) 1177 if (oldstate != 3)
1178 l1p->d_if. 1178 l1p->d_if.
1179 ifc. 1179 ifc.
1180 l1l2 1180 l1l2
1181 (&l1p-> 1181 (&l1p->
1182 d_if. 1182 d_if.
1183 ifc, 1183 ifc,
1184 PH_DEACTIVATE 1184 PH_DEACTIVATE
1185 | 1185 |
1186 INDICATION, 1186 INDICATION,
1187 NULL); 1187 NULL);
1188 } 1188 }
1189 } 1189 }
1190 printk(KERN_INFO 1190 printk(KERN_INFO
@@ -1209,8 +1209,8 @@ hfc4s8s_bh(struct work_struct *work)
1209 *fifo_stat |= hw->mr.fifo_rx_trans_enables[idx]; 1209 *fifo_stat |= hw->mr.fifo_rx_trans_enables[idx];
1210 if (hw->fifo_sched_cnt <= 0) { 1210 if (hw->fifo_sched_cnt <= 0) {
1211 *fifo_stat |= 1211 *fifo_stat |=
1212 hw->mr.fifo_slow_timer_service[l1p-> 1212 hw->mr.fifo_slow_timer_service[l1p->
1213 st_num]; 1213 st_num];
1214 } 1214 }
1215 } 1215 }
1216 /* ignore fifo 6 (TX E fifo) */ 1216 /* ignore fifo 6 (TX E fifo) */
@@ -1288,10 +1288,10 @@ hfc4s8s_interrupt(int intno, void *dev_id)
1288 1288
1289 /* Layer 1 State change */ 1289 /* Layer 1 State change */
1290 hw->mr.r_irq_statech |= 1290 hw->mr.r_irq_statech |=
1291 (Read_hfc8(hw, R_SCI) & hw->mr.r_irqmsk_statchg); 1291 (Read_hfc8(hw, R_SCI) & hw->mr.r_irqmsk_statchg);
1292 if (! 1292 if (!
1293 (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA))) 1293 (b = (Read_hfc8(hw, R_STATUS) & (M_MISC_IRQSTA | M_FR_IRQSTA)))
1294&& !hw->mr.r_irq_statech) { 1294 && !hw->mr.r_irq_statech) {
1295#ifndef HISAX_HFC4S8S_PCIMEM 1295#ifndef HISAX_HFC4S8S_PCIMEM
1296 SetRegAddr(hw, old_ioreg); 1296 SetRegAddr(hw, old_ioreg);
1297#endif 1297#endif
@@ -1332,7 +1332,7 @@ hfc4s8s_interrupt(int intno, void *dev_id)
1332/* reset the complete chip, don't release the chips irq but disable it */ 1332/* reset the complete chip, don't release the chips irq but disable it */
1333/***********************************************************************/ 1333/***********************************************************************/
1334static void 1334static void
1335chipreset(hfc4s8s_hw * hw) 1335chipreset(hfc4s8s_hw *hw)
1336{ 1336{
1337 u_long flags; 1337 u_long flags;
1338 1338
@@ -1361,7 +1361,7 @@ chipreset(hfc4s8s_hw * hw)
1361/* disable/enable hardware in nt or te mode */ 1361/* disable/enable hardware in nt or te mode */
1362/********************************************/ 1362/********************************************/
1363static void 1363static void
1364hfc_hardware_enable(hfc4s8s_hw * hw, int enable, int nt_mode) 1364hfc_hardware_enable(hfc4s8s_hw *hw, int enable, int nt_mode)
1365{ 1365{
1366 u_long flags; 1366 u_long flags;
1367 char if_name[40]; 1367 char if_name[40];
@@ -1468,7 +1468,7 @@ hfc_hardware_enable(hfc4s8s_hw * hw, int enable, int nt_mode)
1468/* disable memory mapped ports / io ports */ 1468/* disable memory mapped ports / io ports */
1469/******************************************/ 1469/******************************************/
1470static void 1470static void
1471release_pci_ports(hfc4s8s_hw * hw) 1471release_pci_ports(hfc4s8s_hw *hw)
1472{ 1472{
1473 pci_write_config_word(hw->pdev, PCI_COMMAND, 0); 1473 pci_write_config_word(hw->pdev, PCI_COMMAND, 0);
1474#ifdef HISAX_HFC4S8S_PCIMEM 1474#ifdef HISAX_HFC4S8S_PCIMEM
@@ -1484,7 +1484,7 @@ release_pci_ports(hfc4s8s_hw * hw)
1484/* enable memory mapped ports / io ports */ 1484/* enable memory mapped ports / io ports */
1485/*****************************************/ 1485/*****************************************/
1486static void 1486static void
1487enable_pci_ports(hfc4s8s_hw * hw) 1487enable_pci_ports(hfc4s8s_hw *hw)
1488{ 1488{
1489#ifdef HISAX_HFC4S8S_PCIMEM 1489#ifdef HISAX_HFC4S8S_PCIMEM
1490 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO); 1490 pci_write_config_word(hw->pdev, PCI_COMMAND, PCI_ENA_MEMIO);
@@ -1498,7 +1498,7 @@ enable_pci_ports(hfc4s8s_hw * hw)
1498/* return 0 on success. */ 1498/* return 0 on success. */
1499/*************************************/ 1499/*************************************/
1500static int __devinit 1500static int __devinit
1501setup_instance(hfc4s8s_hw * hw) 1501setup_instance(hfc4s8s_hw *hw)
1502{ 1502{
1503 int err = -EIO; 1503 int err = -EIO;
1504 int i; 1504 int i;
@@ -1575,7 +1575,7 @@ setup_instance(hfc4s8s_hw * hw)
1575 1575
1576 return (0); 1576 return (0);
1577 1577
1578 out: 1578out:
1579 hw->irq = 0; 1579 hw->irq = 0;
1580 release_pci_ports(hw); 1580 release_pci_ports(hw);
1581 kfree(hw); 1581 kfree(hw);
@@ -1632,7 +1632,7 @@ hfc4s8s_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1632 card_cnt++; 1632 card_cnt++;
1633 return (err); 1633 return (err);
1634 1634
1635 out: 1635out:
1636 kfree(hw); 1636 kfree(hw);
1637 return (err); 1637 return (err);
1638} 1638}
@@ -1660,10 +1660,10 @@ hfc4s8s_remove(struct pci_dev *pdev)
1660} 1660}
1661 1661
1662static struct pci_driver hfc4s8s_driver = { 1662static struct pci_driver hfc4s8s_driver = {
1663 .name = "hfc4s8s_l1", 1663 .name = "hfc4s8s_l1",
1664 .probe = hfc4s8s_probe, 1664 .probe = hfc4s8s_probe,
1665 .remove = __devexit_p(hfc4s8s_remove), 1665 .remove = __devexit_p(hfc4s8s_remove),
1666 .id_table = hfc4s8s_ids, 1666 .id_table = hfc4s8s_ids,
1667}; 1667};
1668 1668
1669/**********************/ 1669/**********************/
@@ -1697,7 +1697,7 @@ hfc4s8s_module_init(void)
1697#endif 1697#endif
1698 1698
1699 return 0; 1699 return 0;
1700 out: 1700out:
1701 return (err); 1701 return (err);
1702} /* hfc4s8s_init_hw */ 1702} /* hfc4s8s_init_hw */
1703 1703
diff --git a/drivers/isdn/hisax/hfc4s8s_l1.h b/drivers/isdn/hisax/hfc4s8s_l1.h
index 9d5d2a56b4e9..6a8f89113d2f 100644
--- a/drivers/isdn/hisax/hfc4s8s_l1.h
+++ b/drivers/isdn/hisax/hfc4s8s_l1.h
@@ -15,10 +15,10 @@
15 15
16 16
17/* 17/*
18* include Genero generated HFC-4S/8S header file hfc48scu.h 18 * include Genero generated HFC-4S/8S header file hfc48scu.h
19* for complete register description. This will define _HFC48SCU_H_ 19 * for complete register description. This will define _HFC48SCU_H_
20* to prevent redefinitions 20 * to prevent redefinitions
21*/ 21 */
22 22
23// #include "hfc48scu.h" 23// #include "hfc48scu.h"
24 24
diff --git a/drivers/isdn/hisax/hfc_2bds0.c b/drivers/isdn/hisax/hfc_2bds0.c
index a16459a1332c..a756e5cb6871 100644
--- a/drivers/isdn/hisax/hfc_2bds0.c
+++ b/drivers/isdn/hisax/hfc_2bds0.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -18,15 +18,15 @@
18#include "isdnl1.h" 18#include "isdnl1.h"
19#include <linux/interrupt.h> 19#include <linux/interrupt.h>
20/* 20/*
21#define KDEBUG_DEF 21 #define KDEBUG_DEF
22#include "kdebug.h" 22 #include "kdebug.h"
23*/ 23*/
24 24
25#define byteout(addr,val) outb(val,addr) 25#define byteout(addr, val) outb(val, addr)
26#define bytein(addr) inb(addr) 26#define bytein(addr) inb(addr)
27 27
28static void 28static void
29dummyf(struct IsdnCardState *cs, u_char * data, int size) 29dummyf(struct IsdnCardState *cs, u_char *data, int size)
30{ 30{
31 printk(KERN_WARNING "HiSax: hfcd dummy fifo called\n"); 31 printk(KERN_WARNING "HiSax: hfcd dummy fifo called\n");
32} 32}
@@ -37,7 +37,7 @@ ReadReg(struct IsdnCardState *cs, int data, u_char reg)
37 register u_char ret; 37 register u_char ret;
38 38
39 if (data) { 39 if (data) {
40 if (cs->hw.hfcD.cip != reg) { 40 if (cs->hw.hfcD.cip != reg) {
41 cs->hw.hfcD.cip = reg; 41 cs->hw.hfcD.cip = reg;
42 byteout(cs->hw.hfcD.addr | 1, reg); 42 byteout(cs->hw.hfcD.addr | 1, reg);
43 } 43 }
@@ -54,7 +54,7 @@ ReadReg(struct IsdnCardState *cs, int data, u_char reg)
54static inline void 54static inline void
55WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value) 55WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
56{ 56{
57 if (cs->hw.hfcD.cip != reg) { 57 if (cs->hw.hfcD.cip != reg) {
58 cs->hw.hfcD.cip = reg; 58 cs->hw.hfcD.cip = reg;
59 byteout(cs->hw.hfcD.addr | 1, reg); 59 byteout(cs->hw.hfcD.addr | 1, reg);
60 } 60 }
@@ -71,7 +71,7 @@ WriteReg(struct IsdnCardState *cs, int data, u_char reg, u_char value)
71static u_char 71static u_char
72readreghfcd(struct IsdnCardState *cs, u_char offset) 72readreghfcd(struct IsdnCardState *cs, u_char offset)
73{ 73{
74 return(ReadReg(cs, HFCD_DATA, offset)); 74 return (ReadReg(cs, HFCD_DATA, offset));
75} 75}
76 76
77static void 77static void
@@ -103,7 +103,7 @@ WaitNoBusy(struct IsdnCardState *cs)
103 udelay(1); 103 udelay(1);
104 to--; 104 to--;
105 } 105 }
106 if (!to) 106 if (!to)
107 printk(KERN_WARNING "HiSax: WaitNoBusy timeout\n"); 107 printk(KERN_WARNING "HiSax: WaitNoBusy timeout\n");
108 return (to); 108 return (to);
109} 109}
@@ -114,29 +114,29 @@ SelFiFo(struct IsdnCardState *cs, u_char FiFo)
114 u_char cip; 114 u_char cip;
115 115
116 if (cs->hw.hfcD.fifo == FiFo) 116 if (cs->hw.hfcD.fifo == FiFo)
117 return(1); 117 return (1);
118 switch(FiFo) { 118 switch (FiFo) {
119 case 0: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B1; 119 case 0: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B1;
120 break; 120 break;
121 case 1: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B1; 121 case 1: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B1;
122 break; 122 break;
123 case 2: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B2; 123 case 2: cip = HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_B2;
124 break; 124 break;
125 case 3: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B2; 125 case 3: cip = HFCB_FIFO | HFCB_Z1 | HFCB_REC | HFCB_B2;
126 break; 126 break;
127 case 4: cip = HFCD_FIFO | HFCD_Z1 | HFCD_SEND; 127 case 4: cip = HFCD_FIFO | HFCD_Z1 | HFCD_SEND;
128 break; 128 break;
129 case 5: cip = HFCD_FIFO | HFCD_Z1 | HFCD_REC; 129 case 5: cip = HFCD_FIFO | HFCD_Z1 | HFCD_REC;
130 break; 130 break;
131 default: 131 default:
132 debugl1(cs, "SelFiFo Error"); 132 debugl1(cs, "SelFiFo Error");
133 return(0); 133 return (0);
134 } 134 }
135 cs->hw.hfcD.fifo = FiFo; 135 cs->hw.hfcD.fifo = FiFo;
136 WaitNoBusy(cs); 136 WaitNoBusy(cs);
137 cs->BC_Write_Reg(cs, HFCD_DATA, cip, 0); 137 cs->BC_Write_Reg(cs, HFCD_DATA, cip, 0);
138 WaitForBusy(cs); 138 WaitForBusy(cs);
139 return(2); 139 return (2);
140} 140}
141 141
142static int 142static int
@@ -188,7 +188,7 @@ static struct sk_buff
188 int idx; 188 int idx;
189 int chksum; 189 int chksum;
190 u_char stat, cip; 190 u_char stat, cip;
191 191
192 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 192 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
193 debugl1(cs, "hfc_empty_fifo"); 193 debugl1(cs, "hfc_empty_fifo");
194 idx = 0; 194 idx = 0;
@@ -252,7 +252,7 @@ static struct sk_buff
252 WaitForBusy(cs); 252 WaitForBusy(cs);
253 WaitNoBusy(cs); 253 WaitNoBusy(cs);
254 stat = ReadReg(cs, HFCD_DATA, HFCB_FIFO | HFCB_F2_INC | 254 stat = ReadReg(cs, HFCD_DATA, HFCB_FIFO | HFCB_F2_INC |
255 HFCB_REC | HFCB_CHANNEL(bcs->channel)); 255 HFCB_REC | HFCB_CHANNEL(bcs->channel));
256 WaitForBusy(cs); 256 WaitForBusy(cs);
257 return (skb); 257 return (skb);
258} 258}
@@ -269,7 +269,7 @@ hfc_fill_fifo(struct BCState *bcs)
269 return; 269 return;
270 if (bcs->tx_skb->len <= 0) 270 if (bcs->tx_skb->len <= 0)
271 return; 271 return;
272 SelFiFo(cs, HFCB_SEND | HFCB_CHANNEL(bcs->channel)); 272 SelFiFo(cs, HFCB_SEND | HFCB_CHANNEL(bcs->channel));
273 cip = HFCB_FIFO | HFCB_F1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel); 273 cip = HFCB_FIFO | HFCB_F1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel);
274 WaitNoBusy(cs); 274 WaitNoBusy(cs);
275 bcs->hw.hfc.f1 = ReadReg(cs, HFCD_DATA, cip); 275 bcs->hw.hfc.f1 = ReadReg(cs, HFCD_DATA, cip);
@@ -278,7 +278,7 @@ hfc_fill_fifo(struct BCState *bcs)
278 WaitNoBusy(cs); 278 WaitNoBusy(cs);
279 bcs->hw.hfc.f2 = ReadReg(cs, HFCD_DATA, cip); 279 bcs->hw.hfc.f2 = ReadReg(cs, HFCD_DATA, cip);
280 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(cs, HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel)); 280 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(cs, HFCB_FIFO | HFCB_Z1 | HFCB_SEND | HFCB_CHANNEL(bcs->channel));
281 if (cs->debug & L1_DEB_HSCX) 281 if (cs->debug & L1_DEB_HSCX)
282 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)", 282 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
283 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2, 283 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
284 bcs->hw.hfc.send[bcs->hw.hfc.f1]); 284 bcs->hw.hfc.send[bcs->hw.hfc.f1]);
@@ -316,8 +316,8 @@ hfc_fill_fifo(struct BCState *bcs)
316 printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel); 316 printk(KERN_WARNING "HFC S FIFO channel %d BUSY Error\n", bcs->channel);
317 } else { 317 } else {
318 bcs->tx_cnt -= bcs->tx_skb->len; 318 bcs->tx_cnt -= bcs->tx_skb->len;
319 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 319 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
320 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 320 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
321 u_long flags; 321 u_long flags;
322 spin_lock_irqsave(&bcs->aclock, flags); 322 spin_lock_irqsave(&bcs->aclock, flags);
323 bcs->ackcnt += bcs->tx_skb->len; 323 bcs->ackcnt += bcs->tx_skb->len;
@@ -339,12 +339,12 @@ static void
339hfc_send_data(struct BCState *bcs) 339hfc_send_data(struct BCState *bcs)
340{ 340{
341 struct IsdnCardState *cs = bcs->cs; 341 struct IsdnCardState *cs = bcs->cs;
342 342
343 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 343 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
344 hfc_fill_fifo(bcs); 344 hfc_fill_fifo(bcs);
345 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 345 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
346 } else 346 } else
347 debugl1(cs,"send_data %d blocked", bcs->channel); 347 debugl1(cs, "send_data %d blocked", bcs->channel);
348} 348}
349 349
350static void 350static void
@@ -356,10 +356,10 @@ main_rec_2bds0(struct BCState *bcs)
356 int receive, count = 5; 356 int receive, count = 5;
357 struct sk_buff *skb; 357 struct sk_buff *skb;
358 358
359 Begin: 359Begin:
360 count--; 360 count--;
361 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 361 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
362 debugl1(cs,"rec_data %d blocked", bcs->channel); 362 debugl1(cs, "rec_data %d blocked", bcs->channel);
363 return; 363 return;
364 } 364 }
365 SelFiFo(cs, HFCB_REC | HFCB_CHANNEL(bcs->channel)); 365 SelFiFo(cs, HFCB_REC | HFCB_CHANNEL(bcs->channel));
@@ -386,10 +386,10 @@ main_rec_2bds0(struct BCState *bcs)
386 skb_queue_tail(&bcs->rqueue, skb); 386 skb_queue_tail(&bcs->rqueue, skb);
387 schedule_event(bcs, B_RCVBUFREADY); 387 schedule_event(bcs, B_RCVBUFREADY);
388 } 388 }
389 rcnt = f1 -f2; 389 rcnt = f1 - f2;
390 if (rcnt<0) 390 if (rcnt < 0)
391 rcnt += 32; 391 rcnt += 32;
392 if (rcnt>1) 392 if (rcnt > 1)
393 receive = 1; 393 receive = 1;
394 else 394 else
395 receive = 0; 395 receive = 0;
@@ -397,7 +397,7 @@ main_rec_2bds0(struct BCState *bcs)
397 receive = 0; 397 receive = 0;
398 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 398 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
399 if (count && receive) 399 if (count && receive)
400 goto Begin; 400 goto Begin;
401 return; 401 return;
402} 402}
403 403
@@ -412,37 +412,37 @@ mode_2bs0(struct BCState *bcs, int mode, int bc)
412 bcs->mode = mode; 412 bcs->mode = mode;
413 bcs->channel = bc; 413 bcs->channel = bc;
414 switch (mode) { 414 switch (mode) {
415 case (L1_MODE_NULL): 415 case (L1_MODE_NULL):
416 if (bc) { 416 if (bc) {
417 cs->hw.hfcD.conn |= 0x18; 417 cs->hw.hfcD.conn |= 0x18;
418 cs->hw.hfcD.sctrl &= ~SCTRL_B2_ENA; 418 cs->hw.hfcD.sctrl &= ~SCTRL_B2_ENA;
419 } else { 419 } else {
420 cs->hw.hfcD.conn |= 0x3; 420 cs->hw.hfcD.conn |= 0x3;
421 cs->hw.hfcD.sctrl &= ~SCTRL_B1_ENA; 421 cs->hw.hfcD.sctrl &= ~SCTRL_B1_ENA;
422 } 422 }
423 break; 423 break;
424 case (L1_MODE_TRANS): 424 case (L1_MODE_TRANS):
425 if (bc) { 425 if (bc) {
426 cs->hw.hfcD.ctmt |= 2; 426 cs->hw.hfcD.ctmt |= 2;
427 cs->hw.hfcD.conn &= ~0x18; 427 cs->hw.hfcD.conn &= ~0x18;
428 cs->hw.hfcD.sctrl |= SCTRL_B2_ENA; 428 cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
429 } else { 429 } else {
430 cs->hw.hfcD.ctmt |= 1; 430 cs->hw.hfcD.ctmt |= 1;
431 cs->hw.hfcD.conn &= ~0x3; 431 cs->hw.hfcD.conn &= ~0x3;
432 cs->hw.hfcD.sctrl |= SCTRL_B1_ENA; 432 cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
433 } 433 }
434 break; 434 break;
435 case (L1_MODE_HDLC): 435 case (L1_MODE_HDLC):
436 if (bc) { 436 if (bc) {
437 cs->hw.hfcD.ctmt &= ~2; 437 cs->hw.hfcD.ctmt &= ~2;
438 cs->hw.hfcD.conn &= ~0x18; 438 cs->hw.hfcD.conn &= ~0x18;
439 cs->hw.hfcD.sctrl |= SCTRL_B2_ENA; 439 cs->hw.hfcD.sctrl |= SCTRL_B2_ENA;
440 } else { 440 } else {
441 cs->hw.hfcD.ctmt &= ~1; 441 cs->hw.hfcD.ctmt &= ~1;
442 cs->hw.hfcD.conn &= ~0x3; 442 cs->hw.hfcD.conn &= ~0x3;
443 cs->hw.hfcD.sctrl |= SCTRL_B1_ENA; 443 cs->hw.hfcD.sctrl |= SCTRL_B1_ENA;
444 } 444 }
445 break; 445 break;
446 } 446 }
447 WriteReg(cs, HFCD_DATA, HFCD_SCTRL, cs->hw.hfcD.sctrl); 447 WriteReg(cs, HFCD_DATA, HFCD_SCTRL, cs->hw.hfcD.sctrl);
448 WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt); 448 WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
@@ -457,53 +457,53 @@ hfc_l2l1(struct PStack *st, int pr, void *arg)
457 u_long flags; 457 u_long flags;
458 458
459 switch (pr) { 459 switch (pr) {
460 case (PH_DATA | REQUEST): 460 case (PH_DATA | REQUEST):
461 spin_lock_irqsave(&bcs->cs->lock, flags); 461 spin_lock_irqsave(&bcs->cs->lock, flags);
462 if (bcs->tx_skb) { 462 if (bcs->tx_skb) {
463 skb_queue_tail(&bcs->squeue, skb); 463 skb_queue_tail(&bcs->squeue, skb);
464 } else { 464 } else {
465 bcs->tx_skb = skb; 465 bcs->tx_skb = skb;
466// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 466// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
467 bcs->cs->BC_Send_Data(bcs); 467 bcs->cs->BC_Send_Data(bcs);
468 } 468 }
469 spin_unlock_irqrestore(&bcs->cs->lock, flags); 469 spin_unlock_irqrestore(&bcs->cs->lock, flags);
470 break; 470 break;
471 case (PH_PULL | INDICATION): 471 case (PH_PULL | INDICATION):
472 spin_lock_irqsave(&bcs->cs->lock, flags); 472 spin_lock_irqsave(&bcs->cs->lock, flags);
473 if (bcs->tx_skb) { 473 if (bcs->tx_skb) {
474 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n"); 474 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
475 } else { 475 } else {
476// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 476// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
477 bcs->tx_skb = skb; 477 bcs->tx_skb = skb;
478 bcs->cs->BC_Send_Data(bcs); 478 bcs->cs->BC_Send_Data(bcs);
479 } 479 }
480 spin_unlock_irqrestore(&bcs->cs->lock, flags); 480 spin_unlock_irqrestore(&bcs->cs->lock, flags);
481 break; 481 break;
482 case (PH_PULL | REQUEST): 482 case (PH_PULL | REQUEST):
483 if (!bcs->tx_skb) { 483 if (!bcs->tx_skb) {
484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
486 } else 486 } else
487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
488 break; 488 break;
489 case (PH_ACTIVATE | REQUEST): 489 case (PH_ACTIVATE | REQUEST):
490 spin_lock_irqsave(&bcs->cs->lock, flags); 490 spin_lock_irqsave(&bcs->cs->lock, flags);
491 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 491 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
492 mode_2bs0(bcs, st->l1.mode, st->l1.bc); 492 mode_2bs0(bcs, st->l1.mode, st->l1.bc);
493 spin_unlock_irqrestore(&bcs->cs->lock, flags); 493 spin_unlock_irqrestore(&bcs->cs->lock, flags);
494 l1_msg_b(st, pr, arg); 494 l1_msg_b(st, pr, arg);
495 break; 495 break;
496 case (PH_DEACTIVATE | REQUEST): 496 case (PH_DEACTIVATE | REQUEST):
497 l1_msg_b(st, pr, arg); 497 l1_msg_b(st, pr, arg);
498 break; 498 break;
499 case (PH_DEACTIVATE | CONFIRM): 499 case (PH_DEACTIVATE | CONFIRM):
500 spin_lock_irqsave(&bcs->cs->lock, flags); 500 spin_lock_irqsave(&bcs->cs->lock, flags);
501 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 501 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
502 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 502 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
503 mode_2bs0(bcs, 0, st->l1.bc); 503 mode_2bs0(bcs, 0, st->l1.bc);
504 spin_unlock_irqrestore(&bcs->cs->lock, flags); 504 spin_unlock_irqrestore(&bcs->cs->lock, flags);
505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
506 break; 506 break;
507 } 507 }
508} 508}
509 509
@@ -558,23 +558,23 @@ hfcd_bh(struct work_struct *work)
558 558
559 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) { 559 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
560 switch (cs->dc.hfcd.ph_state) { 560 switch (cs->dc.hfcd.ph_state) {
561 case (0): 561 case (0):
562 l1_msg(cs, HW_RESET | INDICATION, NULL); 562 l1_msg(cs, HW_RESET | INDICATION, NULL);
563 break; 563 break;
564 case (3): 564 case (3):
565 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 565 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
566 break; 566 break;
567 case (8): 567 case (8):
568 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 568 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
569 break; 569 break;
570 case (6): 570 case (6):
571 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 571 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
572 break; 572 break;
573 case (7): 573 case (7):
574 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 574 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
575 break; 575 break;
576 default: 576 default:
577 break; 577 break;
578 } 578 }
579 } 579 }
580 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) 580 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
@@ -591,12 +591,12 @@ int receive_dmsg(struct IsdnCardState *cs)
591 int rcnt, z1, z2; 591 int rcnt, z1, z2;
592 u_char stat, cip, f1, f2; 592 u_char stat, cip, f1, f2;
593 int chksum; 593 int chksum;
594 int count=5; 594 int count = 5;
595 u_char *ptr; 595 u_char *ptr;
596 596
597 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 597 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
598 debugl1(cs, "rec_dmsg blocked"); 598 debugl1(cs, "rec_dmsg blocked");
599 return(1); 599 return (1);
600 } 600 }
601 SelFiFo(cs, 4 | HFCD_REC); 601 SelFiFo(cs, 4 | HFCD_REC);
602 cip = HFCD_FIFO | HFCD_F1 | HFCD_REC; 602 cip = HFCD_FIFO | HFCD_F1 | HFCD_REC;
@@ -682,8 +682,8 @@ int receive_dmsg(struct IsdnCardState *cs)
682 f2 = cs->readisac(cs, cip) & 0xf; 682 f2 = cs->readisac(cs, cip) & 0xf;
683 } 683 }
684 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 684 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
685 return(1); 685 return (1);
686} 686}
687 687
688static void 688static void
689hfc_fill_dfifo(struct IsdnCardState *cs) 689hfc_fill_dfifo(struct IsdnCardState *cs)
@@ -750,23 +750,23 @@ hfc_fill_dfifo(struct IsdnCardState *cs)
750 return; 750 return;
751} 751}
752 752
753static 753static
754struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel) 754struct BCState *Sel_BCS(struct IsdnCardState *cs, int channel)
755{ 755{
756 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel)) 756 if (cs->bcs[0].mode && (cs->bcs[0].channel == channel))
757 return(&cs->bcs[0]); 757 return (&cs->bcs[0]);
758 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel)) 758 else if (cs->bcs[1].mode && (cs->bcs[1].channel == channel))
759 return(&cs->bcs[1]); 759 return (&cs->bcs[1]);
760 else 760 else
761 return(NULL); 761 return (NULL);
762} 762}
763 763
764void 764void
765hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val) 765hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
766{ 766{
767 u_char exval; 767 u_char exval;
768 struct BCState *bcs; 768 struct BCState *bcs;
769 int count=15; 769 int count = 15;
770 770
771 if (cs->debug & L1_DEB_ISAC) 771 if (cs->debug & L1_DEB_ISAC)
772 debugl1(cs, "HFCD irq %x %s", val, 772 debugl1(cs, "HFCD irq %x %s", val,
@@ -789,25 +789,25 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
789 } 789 }
790 if (cs->hw.hfcD.int_s1 & 0x18) { 790 if (cs->hw.hfcD.int_s1 & 0x18) {
791 exval = val; 791 exval = val;
792 val = cs->hw.hfcD.int_s1; 792 val = cs->hw.hfcD.int_s1;
793 cs->hw.hfcD.int_s1 = exval; 793 cs->hw.hfcD.int_s1 = exval;
794 } 794 }
795 if (val & 0x08) { 795 if (val & 0x08) {
796 if (!(bcs=Sel_BCS(cs, 0))) { 796 if (!(bcs = Sel_BCS(cs, 0))) {
797 if (cs->debug) 797 if (cs->debug)
798 debugl1(cs, "hfcd spurious 0x08 IRQ"); 798 debugl1(cs, "hfcd spurious 0x08 IRQ");
799 } else 799 } else
800 main_rec_2bds0(bcs); 800 main_rec_2bds0(bcs);
801 } 801 }
802 if (val & 0x10) { 802 if (val & 0x10) {
803 if (!(bcs=Sel_BCS(cs, 1))) { 803 if (!(bcs = Sel_BCS(cs, 1))) {
804 if (cs->debug) 804 if (cs->debug)
805 debugl1(cs, "hfcd spurious 0x10 IRQ"); 805 debugl1(cs, "hfcd spurious 0x10 IRQ");
806 } else 806 } else
807 main_rec_2bds0(bcs); 807 main_rec_2bds0(bcs);
808 } 808 }
809 if (val & 0x01) { 809 if (val & 0x01) {
810 if (!(bcs=Sel_BCS(cs, 0))) { 810 if (!(bcs = Sel_BCS(cs, 0))) {
811 if (cs->debug) 811 if (cs->debug)
812 debugl1(cs, "hfcd spurious 0x01 IRQ"); 812 debugl1(cs, "hfcd spurious 0x01 IRQ");
813 } else { 813 } else {
@@ -816,14 +816,14 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
816 hfc_fill_fifo(bcs); 816 hfc_fill_fifo(bcs);
817 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 817 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
818 } else 818 } else
819 debugl1(cs,"fill_data %d blocked", bcs->channel); 819 debugl1(cs, "fill_data %d blocked", bcs->channel);
820 } else { 820 } else {
821 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { 821 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
822 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 822 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
823 hfc_fill_fifo(bcs); 823 hfc_fill_fifo(bcs);
824 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 824 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
825 } else 825 } else
826 debugl1(cs,"fill_data %d blocked", bcs->channel); 826 debugl1(cs, "fill_data %d blocked", bcs->channel);
827 } else { 827 } else {
828 schedule_event(bcs, B_XMTBUFREADY); 828 schedule_event(bcs, B_XMTBUFREADY);
829 } 829 }
@@ -831,7 +831,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
831 } 831 }
832 } 832 }
833 if (val & 0x02) { 833 if (val & 0x02) {
834 if (!(bcs=Sel_BCS(cs, 1))) { 834 if (!(bcs = Sel_BCS(cs, 1))) {
835 if (cs->debug) 835 if (cs->debug)
836 debugl1(cs, "hfcd spurious 0x02 IRQ"); 836 debugl1(cs, "hfcd spurious 0x02 IRQ");
837 } else { 837 } else {
@@ -840,14 +840,14 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
840 hfc_fill_fifo(bcs); 840 hfc_fill_fifo(bcs);
841 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 841 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
842 } else 842 } else
843 debugl1(cs,"fill_data %d blocked", bcs->channel); 843 debugl1(cs, "fill_data %d blocked", bcs->channel);
844 } else { 844 } else {
845 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { 845 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
846 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 846 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
847 hfc_fill_fifo(bcs); 847 hfc_fill_fifo(bcs);
848 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 848 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
849 } else 849 } else
850 debugl1(cs,"fill_data %d blocked", bcs->channel); 850 debugl1(cs, "fill_data %d blocked", bcs->channel);
851 } else { 851 } else {
852 schedule_event(bcs, B_XMTBUFREADY); 852 schedule_event(bcs, B_XMTBUFREADY);
853 } 853 }
@@ -888,7 +888,7 @@ hfc2bds0_interrupt(struct IsdnCardState *cs, u_char val)
888 } else 888 } else
889 schedule_event(cs, D_XMTBUFREADY); 889 schedule_event(cs, D_XMTBUFREADY);
890 } 890 }
891 afterXPR: 891 afterXPR:
892 if (cs->hw.hfcD.int_s1 && count--) { 892 if (cs->hw.hfcD.int_s1 && count--) {
893 val = cs->hw.hfcD.int_s1; 893 val = cs->hw.hfcD.int_s1;
894 cs->hw.hfcD.int_s1 = 0; 894 cs->hw.hfcD.int_s1 = 0;
@@ -905,105 +905,105 @@ HFCD_l1hw(struct PStack *st, int pr, void *arg)
905 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; 905 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
906 struct sk_buff *skb = arg; 906 struct sk_buff *skb = arg;
907 u_long flags; 907 u_long flags;
908 908
909 switch (pr) { 909 switch (pr) {
910 case (PH_DATA | REQUEST): 910 case (PH_DATA | REQUEST):
911 if (cs->debug & DEB_DLOG_HEX) 911 if (cs->debug & DEB_DLOG_HEX)
912 LogFrame(cs, skb->data, skb->len); 912 LogFrame(cs, skb->data, skb->len);
913 if (cs->debug & DEB_DLOG_VERBOSE) 913 if (cs->debug & DEB_DLOG_VERBOSE)
914 dlogframe(cs, skb, 0); 914 dlogframe(cs, skb, 0);
915 spin_lock_irqsave(&cs->lock, flags); 915 spin_lock_irqsave(&cs->lock, flags);
916 if (cs->tx_skb) { 916 if (cs->tx_skb) {
917 skb_queue_tail(&cs->sq, skb); 917 skb_queue_tail(&cs->sq, skb);
918#ifdef L2FRAME_DEBUG /* psa */ 918#ifdef L2FRAME_DEBUG /* psa */
919 if (cs->debug & L1_DEB_LAPD) 919 if (cs->debug & L1_DEB_LAPD)
920 Logl2Frame(cs, skb, "PH_DATA Queued", 0); 920 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
921#endif
922 } else {
923 cs->tx_skb = skb;
924 cs->tx_cnt = 0;
925#ifdef L2FRAME_DEBUG /* psa */
926 if (cs->debug & L1_DEB_LAPD)
927 Logl2Frame(cs, skb, "PH_DATA", 0);
928#endif 921#endif
929 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 922 } else {
930 hfc_fill_dfifo(cs);
931 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
932 } else
933 debugl1(cs, "hfc_fill_dfifo blocked");
934
935 }
936 spin_unlock_irqrestore(&cs->lock, flags);
937 break;
938 case (PH_PULL | INDICATION):
939 spin_lock_irqsave(&cs->lock, flags);
940 if (cs->tx_skb) {
941 if (cs->debug & L1_DEB_WARN)
942 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
943 skb_queue_tail(&cs->sq, skb);
944 spin_unlock_irqrestore(&cs->lock, flags);
945 break;
946 }
947 if (cs->debug & DEB_DLOG_HEX)
948 LogFrame(cs, skb->data, skb->len);
949 if (cs->debug & DEB_DLOG_VERBOSE)
950 dlogframe(cs, skb, 0);
951 cs->tx_skb = skb; 923 cs->tx_skb = skb;
952 cs->tx_cnt = 0; 924 cs->tx_cnt = 0;
953#ifdef L2FRAME_DEBUG /* psa */ 925#ifdef L2FRAME_DEBUG /* psa */
954 if (cs->debug & L1_DEB_LAPD) 926 if (cs->debug & L1_DEB_LAPD)
955 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 927 Logl2Frame(cs, skb, "PH_DATA", 0);
956#endif 928#endif
957 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 929 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
958 hfc_fill_dfifo(cs); 930 hfc_fill_dfifo(cs);
959 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 931 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
960 } else 932 } else
961 debugl1(cs, "hfc_fill_dfifo blocked"); 933 debugl1(cs, "hfc_fill_dfifo blocked");
934
935 }
936 spin_unlock_irqrestore(&cs->lock, flags);
937 break;
938 case (PH_PULL | INDICATION):
939 spin_lock_irqsave(&cs->lock, flags);
940 if (cs->tx_skb) {
941 if (cs->debug & L1_DEB_WARN)
942 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
943 skb_queue_tail(&cs->sq, skb);
962 spin_unlock_irqrestore(&cs->lock, flags); 944 spin_unlock_irqrestore(&cs->lock, flags);
963 break; 945 break;
964 case (PH_PULL | REQUEST): 946 }
947 if (cs->debug & DEB_DLOG_HEX)
948 LogFrame(cs, skb->data, skb->len);
949 if (cs->debug & DEB_DLOG_VERBOSE)
950 dlogframe(cs, skb, 0);
951 cs->tx_skb = skb;
952 cs->tx_cnt = 0;
965#ifdef L2FRAME_DEBUG /* psa */ 953#ifdef L2FRAME_DEBUG /* psa */
966 if (cs->debug & L1_DEB_LAPD) 954 if (cs->debug & L1_DEB_LAPD)
967 debugl1(cs, "-> PH_REQUEST_PULL"); 955 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
968#endif 956#endif
969 if (!cs->tx_skb) { 957 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
970 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 958 hfc_fill_dfifo(cs);
971 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 959 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
972 } else 960 } else
973 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 961 debugl1(cs, "hfc_fill_dfifo blocked");
974 break; 962 spin_unlock_irqrestore(&cs->lock, flags);
975 case (HW_RESET | REQUEST): 963 break;
976 spin_lock_irqsave(&cs->lock, flags); 964 case (PH_PULL | REQUEST):
977 cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */ 965#ifdef L2FRAME_DEBUG /* psa */
978 udelay(6); 966 if (cs->debug & L1_DEB_LAPD)
979 cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */ 967 debugl1(cs, "-> PH_REQUEST_PULL");
980 cs->hw.hfcD.mst_m |= HFCD_MASTER; 968#endif
981 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m); 969 if (!cs->tx_skb) {
982 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION); 970 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
983 spin_unlock_irqrestore(&cs->lock, flags); 971 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
984 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 972 } else
985 break; 973 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
986 case (HW_ENABLE | REQUEST): 974 break;
987 spin_lock_irqsave(&cs->lock, flags); 975 case (HW_RESET | REQUEST):
988 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION); 976 spin_lock_irqsave(&cs->lock, flags);
989 spin_unlock_irqrestore(&cs->lock, flags); 977 cs->writeisac(cs, HFCD_STATES, HFCD_LOAD_STATE | 3); /* HFC ST 3 */
990 break; 978 udelay(6);
991 case (HW_DEACTIVATE | REQUEST): 979 cs->writeisac(cs, HFCD_STATES, 3); /* HFC ST 2 */
992 spin_lock_irqsave(&cs->lock, flags); 980 cs->hw.hfcD.mst_m |= HFCD_MASTER;
993 cs->hw.hfcD.mst_m &= ~HFCD_MASTER; 981 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
994 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m); 982 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
995 spin_unlock_irqrestore(&cs->lock, flags); 983 spin_unlock_irqrestore(&cs->lock, flags);
996 break; 984 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
997 case (HW_INFO3 | REQUEST): 985 break;
998 spin_lock_irqsave(&cs->lock, flags); 986 case (HW_ENABLE | REQUEST):
999 cs->hw.hfcD.mst_m |= HFCD_MASTER; 987 spin_lock_irqsave(&cs->lock, flags);
1000 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m); 988 cs->writeisac(cs, HFCD_STATES, HFCD_ACTIVATE | HFCD_DO_ACTION);
1001 spin_unlock_irqrestore(&cs->lock, flags); 989 spin_unlock_irqrestore(&cs->lock, flags);
1002 break; 990 break;
1003 default: 991 case (HW_DEACTIVATE | REQUEST):
1004 if (cs->debug & L1_DEB_WARN) 992 spin_lock_irqsave(&cs->lock, flags);
1005 debugl1(cs, "hfcd_l1hw unknown pr %4x", pr); 993 cs->hw.hfcD.mst_m &= ~HFCD_MASTER;
1006 break; 994 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
995 spin_unlock_irqrestore(&cs->lock, flags);
996 break;
997 case (HW_INFO3 | REQUEST):
998 spin_lock_irqsave(&cs->lock, flags);
999 cs->hw.hfcD.mst_m |= HFCD_MASTER;
1000 cs->writeisac(cs, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
1001 spin_unlock_irqrestore(&cs->lock, flags);
1002 break;
1003 default:
1004 if (cs->debug & L1_DEB_WARN)
1005 debugl1(cs, "hfcd_l1hw unknown pr %4x", pr);
1006 break;
1007 } 1007 }
1008} 1008}
1009 1009
@@ -1027,11 +1027,11 @@ static unsigned int
1027 if (!(send = kmalloc(cnt * sizeof(unsigned int), GFP_ATOMIC))) { 1027 if (!(send = kmalloc(cnt * sizeof(unsigned int), GFP_ATOMIC))) {
1028 printk(KERN_WARNING 1028 printk(KERN_WARNING
1029 "HiSax: No memory for hfcd.send\n"); 1029 "HiSax: No memory for hfcd.send\n");
1030 return(NULL); 1030 return (NULL);
1031 } 1031 }
1032 for (i = 0; i < cnt; i++) 1032 for (i = 0; i < cnt; i++)
1033 send[i] = 0x1fff; 1033 send[i] = 0x1fff;
1034 return(send); 1034 return (send);
1035} 1035}
1036 1036
1037void 1037void
diff --git a/drivers/isdn/hisax/hfc_2bds0.h b/drivers/isdn/hisax/hfc_2bds0.h
index 30f1924db91c..8c7582a3c51e 100644
--- a/drivers/isdn/hisax/hfc_2bds0.h
+++ b/drivers/isdn/hisax/hfc_2bds0.h
@@ -4,26 +4,26 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13#define HFCD_CIRM 0x18 13#define HFCD_CIRM 0x18
14#define HFCD_CTMT 0x19 14#define HFCD_CTMT 0x19
15#define HFCD_INT_M1 0x1A 15#define HFCD_INT_M1 0x1A
16#define HFCD_INT_M2 0x1B 16#define HFCD_INT_M2 0x1B
17#define HFCD_INT_S1 0x1E 17#define HFCD_INT_S1 0x1E
18#define HFCD_STAT 0x1C 18#define HFCD_STAT 0x1C
19#define HFCD_STAT_DISB 0x1D 19#define HFCD_STAT_DISB 0x1D
20#define HFCD_STATES 0x30 20#define HFCD_STATES 0x30
21#define HFCD_SCTRL 0x31 21#define HFCD_SCTRL 0x31
22#define HFCD_TEST 0x32 22#define HFCD_TEST 0x32
23#define HFCD_SQ 0x34 23#define HFCD_SQ 0x34
24#define HFCD_CLKDEL 0x37 24#define HFCD_CLKDEL 0x37
25#define HFCD_MST_MODE 0x2E 25#define HFCD_MST_MODE 0x2E
26#define HFCD_CONN 0x2F 26#define HFCD_CONN 0x2F
27 27
28#define HFCD_FIFO 0x80 28#define HFCD_FIFO 0x80
29#define HFCD_Z1 0x10 29#define HFCD_Z1 0x10
@@ -79,7 +79,7 @@
79#define HFCD_TRANSB1 0x01 79#define HFCD_TRANSB1 0x01
80 80
81/* CIRM (Write) */ 81/* CIRM (Write) */
82#define HFCD_RESET 0x08 82#define HFCD_RESET 0x08
83#define HFCD_MEM8K 0x10 83#define HFCD_MEM8K 0x10
84#define HFCD_INTA 0x01 84#define HFCD_INTA 0x01
85#define HFCD_INTB 0x02 85#define HFCD_INTB 0x02
diff --git a/drivers/isdn/hisax/hfc_2bs0.c b/drivers/isdn/hisax/hfc_2bs0.c
index 626f85df302b..838531b6a60e 100644
--- a/drivers/isdn/hisax/hfc_2bs0.c
+++ b/drivers/isdn/hisax/hfc_2bs0.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -181,9 +181,9 @@ hfc_empty_fifo(struct BCState *bcs, int count)
181 return (NULL); 181 return (NULL);
182 } 182 }
183 if (bcs->mode == L1_MODE_TRANS) 183 if (bcs->mode == L1_MODE_TRANS)
184 count -= 1; 184 count -= 1;
185 else 185 else
186 count -= 3; 186 count -= 3;
187 if (!(skb = dev_alloc_skb(count))) 187 if (!(skb = dev_alloc_skb(count)))
188 printk(KERN_WARNING "HFC: receive out of memory\n"); 188 printk(KERN_WARNING "HFC: receive out of memory\n");
189 else { 189 else {
@@ -199,35 +199,35 @@ hfc_empty_fifo(struct BCState *bcs, int count)
199 printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel); 199 printk(KERN_WARNING "HFC FIFO channel %d BUSY Error\n", bcs->channel);
200 dev_kfree_skb_any(skb); 200 dev_kfree_skb_any(skb);
201 if (bcs->mode != L1_MODE_TRANS) { 201 if (bcs->mode != L1_MODE_TRANS) {
202 WaitNoBusy(cs); 202 WaitNoBusy(cs);
203 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC | 203 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
204 HFC_CHANNEL(bcs->channel)); 204 HFC_CHANNEL(bcs->channel));
205 WaitForBusy(cs); 205 WaitForBusy(cs);
206 } 206 }
207 return (NULL); 207 return (NULL);
208 } 208 }
209 if (bcs->mode != L1_MODE_TRANS) { 209 if (bcs->mode != L1_MODE_TRANS) {
210 WaitNoBusy(cs); 210 WaitNoBusy(cs);
211 chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8); 211 chksum = (cs->BC_Read_Reg(cs, HFC_DATA, cip) << 8);
212 WaitNoBusy(cs); 212 WaitNoBusy(cs);
213 chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip); 213 chksum += cs->BC_Read_Reg(cs, HFC_DATA, cip);
214 WaitNoBusy(cs); 214 WaitNoBusy(cs);
215 stat = cs->BC_Read_Reg(cs, HFC_DATA, cip); 215 stat = cs->BC_Read_Reg(cs, HFC_DATA, cip);
216 if (cs->debug & L1_DEB_HSCX) 216 if (cs->debug & L1_DEB_HSCX)
217 debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x", 217 debugl1(cs, "hfc_empty_fifo %d chksum %x stat %x",
218 bcs->channel, chksum, stat); 218 bcs->channel, chksum, stat);
219 if (stat) { 219 if (stat) {
220 debugl1(cs, "FIFO CRC error"); 220 debugl1(cs, "FIFO CRC error");
221 dev_kfree_skb_any(skb); 221 dev_kfree_skb_any(skb);
222 skb = NULL; 222 skb = NULL;
223#ifdef ERROR_STATISTIC 223#ifdef ERROR_STATISTIC
224 bcs->err_crc++; 224 bcs->err_crc++;
225#endif 225#endif
226 } 226 }
227 WaitNoBusy(cs); 227 WaitNoBusy(cs);
228 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC | 228 stat = cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F2_INC | HFC_REC |
229 HFC_CHANNEL(bcs->channel)); 229 HFC_CHANNEL(bcs->channel));
230 WaitForBusy(cs); 230 WaitForBusy(cs);
231 } 231 }
232 } 232 }
233 return (skb); 233 return (skb);
@@ -249,37 +249,37 @@ hfc_fill_fifo(struct BCState *bcs)
249 249
250 cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel); 250 cip = HFC_CIP | HFC_F1 | HFC_SEND | HFC_CHANNEL(bcs->channel);
251 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) { 251 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
252 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip); 252 cs->BC_Write_Reg(cs, HFC_STATUS, cip, cip);
253 WaitForBusy(cs); 253 WaitForBusy(cs);
254 } 254 }
255 WaitNoBusy(cs); 255 WaitNoBusy(cs);
256 if (bcs->mode != L1_MODE_TRANS) { 256 if (bcs->mode != L1_MODE_TRANS) {
257 bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip); 257 bcs->hw.hfc.f1 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
258 cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel); 258 cip = HFC_CIP | HFC_F2 | HFC_SEND | HFC_CHANNEL(bcs->channel);
259 WaitNoBusy(cs); 259 WaitNoBusy(cs);
260 bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip); 260 bcs->hw.hfc.f2 = cs->BC_Read_Reg(cs, HFC_DATA, cip);
261 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel)); 261 bcs->hw.hfc.send[bcs->hw.hfc.f1] = ReadZReg(bcs, HFC_Z1 | HFC_SEND | HFC_CHANNEL(bcs->channel));
262 if (cs->debug & L1_DEB_HSCX) 262 if (cs->debug & L1_DEB_HSCX)
263 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)", 263 debugl1(cs, "hfc_fill_fifo %d f1(%d) f2(%d) z1(%x)",
264 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2, 264 bcs->channel, bcs->hw.hfc.f1, bcs->hw.hfc.f2,
265 bcs->hw.hfc.send[bcs->hw.hfc.f1]); 265 bcs->hw.hfc.send[bcs->hw.hfc.f1]);
266 fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2; 266 fcnt = bcs->hw.hfc.f1 - bcs->hw.hfc.f2;
267 if (fcnt < 0) 267 if (fcnt < 0)
268 fcnt += 32; 268 fcnt += 32;
269 if (fcnt > 30) { 269 if (fcnt > 30) {
270 if (cs->debug & L1_DEB_HSCX) 270 if (cs->debug & L1_DEB_HSCX)
271 debugl1(cs, "hfc_fill_fifo more as 30 frames"); 271 debugl1(cs, "hfc_fill_fifo more as 30 frames");
272 return; 272 return;
273 } 273 }
274 count = GetFreeFifoBytes(bcs); 274 count = GetFreeFifoBytes(bcs);
275 } 275 }
276 else { 276 else {
277 WaitForBusy(cs); 277 WaitForBusy(cs);
278 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel)); 278 z1 = ReadZReg(bcs, HFC_Z1 | HFC_REC | HFC_CHANNEL(bcs->channel));
279 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel)); 279 z2 = ReadZReg(bcs, HFC_Z2 | HFC_REC | HFC_CHANNEL(bcs->channel));
280 count = z1 - z2; 280 count = z1 - z2;
281 if (count < 0) 281 if (count < 0)
282 count += cs->hw.hfc.fifosize; 282 count += cs->hw.hfc.fifosize;
283 } /* L1_MODE_TRANS */ 283 } /* L1_MODE_TRANS */
284 if (cs->debug & L1_DEB_HSCX) 284 if (cs->debug & L1_DEB_HSCX)
285 debugl1(cs, "hfc_fill_fifo %d count(%u/%d)", 285 debugl1(cs, "hfc_fill_fifo %d count(%u/%d)",
@@ -305,12 +305,12 @@ hfc_fill_fifo(struct BCState *bcs)
305 dev_kfree_skb_any(bcs->tx_skb); 305 dev_kfree_skb_any(bcs->tx_skb);
306 bcs->tx_skb = NULL; 306 bcs->tx_skb = NULL;
307 if (bcs->mode != L1_MODE_TRANS) { 307 if (bcs->mode != L1_MODE_TRANS) {
308 WaitForBusy(cs); 308 WaitForBusy(cs);
309 WaitNoBusy(cs); 309 WaitNoBusy(cs);
310 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel)); 310 cs->BC_Read_Reg(cs, HFC_DATA, HFC_CIP | HFC_F1_INC | HFC_SEND | HFC_CHANNEL(bcs->channel));
311 } 311 }
312 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 312 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
313 (count >= 0)) { 313 (count >= 0)) {
314 u_long flags; 314 u_long flags;
315 spin_lock_irqsave(&bcs->aclock, flags); 315 spin_lock_irqsave(&bcs->aclock, flags);
316 bcs->ackcnt += count; 316 bcs->ackcnt += count;
@@ -331,7 +331,7 @@ main_irq_hfc(struct BCState *bcs)
331 int receive, transmit, count = 5; 331 int receive, transmit, count = 5;
332 struct sk_buff *skb; 332 struct sk_buff *skb;
333 333
334 Begin: 334Begin:
335 count--; 335 count--;
336 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel); 336 cip = HFC_CIP | HFC_F1 | HFC_REC | HFC_CHANNEL(bcs->channel);
337 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) { 337 if ((cip & 0xc3) != (cs->hw.hfc.cip & 0xc3)) {
@@ -349,7 +349,7 @@ main_irq_hfc(struct BCState *bcs)
349 if (cs->debug & L1_DEB_HSCX) 349 if (cs->debug & L1_DEB_HSCX)
350 debugl1(cs, "hfc rec %d f1(%d) f2(%d)", 350 debugl1(cs, "hfc rec %d f1(%d) f2(%d)",
351 bcs->channel, f1, f2); 351 bcs->channel, f1, f2);
352 receive = 1; 352 receive = 1;
353 } 353 }
354 } 354 }
355 if (receive || (bcs->mode == L1_MODE_TRANS)) { 355 if (receive || (bcs->mode == L1_MODE_TRANS)) {
@@ -407,41 +407,41 @@ mode_hfc(struct BCState *bcs, int mode, int bc)
407 bcs->channel = bc; 407 bcs->channel = bc;
408 408
409 switch (mode) { 409 switch (mode) {
410 case (L1_MODE_NULL): 410 case (L1_MODE_NULL):
411 if (bc) { 411 if (bc) {
412 cs->hw.hfc.ctmt &= ~1; 412 cs->hw.hfc.ctmt &= ~1;
413 cs->hw.hfc.isac_spcr &= ~0x03; 413 cs->hw.hfc.isac_spcr &= ~0x03;
414 } 414 }
415 else { 415 else {
416 cs->hw.hfc.ctmt &= ~2; 416 cs->hw.hfc.ctmt &= ~2;
417 cs->hw.hfc.isac_spcr &= ~0x0c; 417 cs->hw.hfc.isac_spcr &= ~0x0c;
418 } 418 }
419 break; 419 break;
420 case (L1_MODE_TRANS): 420 case (L1_MODE_TRANS):
421 cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */ 421 cs->hw.hfc.ctmt &= ~(1 << bc); /* set HDLC mode */
422 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt); 422 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
423 hfc_clear_fifo(bcs); /* complete fifo clear */ 423 hfc_clear_fifo(bcs); /* complete fifo clear */
424 if (bc) { 424 if (bc) {
425 cs->hw.hfc.ctmt |= 1; 425 cs->hw.hfc.ctmt |= 1;
426 cs->hw.hfc.isac_spcr &= ~0x03; 426 cs->hw.hfc.isac_spcr &= ~0x03;
427 cs->hw.hfc.isac_spcr |= 0x02; 427 cs->hw.hfc.isac_spcr |= 0x02;
428 } else { 428 } else {
429 cs->hw.hfc.ctmt |= 2; 429 cs->hw.hfc.ctmt |= 2;
430 cs->hw.hfc.isac_spcr &= ~0x0c; 430 cs->hw.hfc.isac_spcr &= ~0x0c;
431 cs->hw.hfc.isac_spcr |= 0x08; 431 cs->hw.hfc.isac_spcr |= 0x08;
432 } 432 }
433 break; 433 break;
434 case (L1_MODE_HDLC): 434 case (L1_MODE_HDLC):
435 if (bc) { 435 if (bc) {
436 cs->hw.hfc.ctmt &= ~1; 436 cs->hw.hfc.ctmt &= ~1;
437 cs->hw.hfc.isac_spcr &= ~0x03; 437 cs->hw.hfc.isac_spcr &= ~0x03;
438 cs->hw.hfc.isac_spcr |= 0x02; 438 cs->hw.hfc.isac_spcr |= 0x02;
439 } else { 439 } else {
440 cs->hw.hfc.ctmt &= ~2; 440 cs->hw.hfc.ctmt &= ~2;
441 cs->hw.hfc.isac_spcr &= ~0x0c; 441 cs->hw.hfc.isac_spcr &= ~0x0c;
442 cs->hw.hfc.isac_spcr |= 0x08; 442 cs->hw.hfc.isac_spcr |= 0x08;
443 } 443 }
444 break; 444 break;
445 } 445 }
446 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt); 446 cs->BC_Write_Reg(cs, HFC_STATUS, cs->hw.hfc.ctmt, cs->hw.hfc.ctmt);
447 cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr); 447 cs->writeisac(cs, ISAC_SPCR, cs->hw.hfc.isac_spcr);
@@ -457,53 +457,53 @@ hfc_l2l1(struct PStack *st, int pr, void *arg)
457 u_long flags; 457 u_long flags;
458 458
459 switch (pr) { 459 switch (pr) {
460 case (PH_DATA | REQUEST): 460 case (PH_DATA | REQUEST):
461 spin_lock_irqsave(&bcs->cs->lock, flags); 461 spin_lock_irqsave(&bcs->cs->lock, flags);
462 if (bcs->tx_skb) { 462 if (bcs->tx_skb) {
463 skb_queue_tail(&bcs->squeue, skb); 463 skb_queue_tail(&bcs->squeue, skb);
464 } else { 464 } else {
465 bcs->tx_skb = skb; 465 bcs->tx_skb = skb;
466 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 466 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
467 bcs->cs->BC_Send_Data(bcs); 467 bcs->cs->BC_Send_Data(bcs);
468 } 468 }
469 spin_unlock_irqrestore(&bcs->cs->lock, flags); 469 spin_unlock_irqrestore(&bcs->cs->lock, flags);
470 break; 470 break;
471 case (PH_PULL | INDICATION): 471 case (PH_PULL | INDICATION):
472 spin_lock_irqsave(&bcs->cs->lock, flags); 472 spin_lock_irqsave(&bcs->cs->lock, flags);
473 if (bcs->tx_skb) { 473 if (bcs->tx_skb) {
474 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n"); 474 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
475 } else { 475 } else {
476 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 476 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
477 bcs->tx_skb = skb; 477 bcs->tx_skb = skb;
478 bcs->cs->BC_Send_Data(bcs); 478 bcs->cs->BC_Send_Data(bcs);
479 } 479 }
480 spin_unlock_irqrestore(&bcs->cs->lock, flags); 480 spin_unlock_irqrestore(&bcs->cs->lock, flags);
481 break; 481 break;
482 case (PH_PULL | REQUEST): 482 case (PH_PULL | REQUEST):
483 if (!bcs->tx_skb) { 483 if (!bcs->tx_skb) {
484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 484 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 485 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
486 } else 486 } else
487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 487 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
488 break; 488 break;
489 case (PH_ACTIVATE | REQUEST): 489 case (PH_ACTIVATE | REQUEST):
490 spin_lock_irqsave(&bcs->cs->lock, flags); 490 spin_lock_irqsave(&bcs->cs->lock, flags);
491 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 491 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
492 mode_hfc(bcs, st->l1.mode, st->l1.bc); 492 mode_hfc(bcs, st->l1.mode, st->l1.bc);
493 spin_unlock_irqrestore(&bcs->cs->lock, flags); 493 spin_unlock_irqrestore(&bcs->cs->lock, flags);
494 l1_msg_b(st, pr, arg); 494 l1_msg_b(st, pr, arg);
495 break; 495 break;
496 case (PH_DEACTIVATE | REQUEST): 496 case (PH_DEACTIVATE | REQUEST):
497 l1_msg_b(st, pr, arg); 497 l1_msg_b(st, pr, arg);
498 break; 498 break;
499 case (PH_DEACTIVATE | CONFIRM): 499 case (PH_DEACTIVATE | CONFIRM):
500 spin_lock_irqsave(&bcs->cs->lock, flags); 500 spin_lock_irqsave(&bcs->cs->lock, flags);
501 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 501 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
502 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 502 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
503 mode_hfc(bcs, 0, st->l1.bc); 503 mode_hfc(bcs, 0, st->l1.bc);
504 spin_unlock_irqrestore(&bcs->cs->lock, flags); 504 spin_unlock_irqrestore(&bcs->cs->lock, flags);
505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 505 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
506 break; 506 break;
507 } 507 }
508} 508}
509 509
diff --git a/drivers/isdn/hisax/hfc_2bs0.h b/drivers/isdn/hisax/hfc_2bs0.h
index 1a50d4a5c968..1510096363dc 100644
--- a/drivers/isdn/hisax/hfc_2bs0.h
+++ b/drivers/isdn/hisax/hfc_2bs0.h
@@ -4,14 +4,14 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13#define HFC_CTMT 0xe0 13#define HFC_CTMT 0xe0
14#define HFC_CIRM 0xc0 14#define HFC_CIRM 0xc0
15#define HFC_CIP 0x80 15#define HFC_CIP 0x80
16#define HFC_Z1 0x00 16#define HFC_Z1 0x00
17#define HFC_Z2 0x08 17#define HFC_Z2 0x08
@@ -46,7 +46,7 @@
46#define HFC_TRANSB1 0x01 46#define HFC_TRANSB1 0x01
47 47
48/* CIRM (Write) */ 48/* CIRM (Write) */
49#define HFC_RESET 0x08 49#define HFC_RESET 0x08
50#define HFC_MEM8K 0x10 50#define HFC_MEM8K 0x10
51#define HFC_INTA 0x01 51#define HFC_INTA 0x01
52#define HFC_INTB 0x02 52#define HFC_INTB 0x02
diff --git a/drivers/isdn/hisax/hfc_pci.c b/drivers/isdn/hisax/hfc_pci.c
index 0cb0546ead88..334fa90bed8e 100644
--- a/drivers/isdn/hisax/hfc_pci.c
+++ b/drivers/isdn/hisax/hfc_pci.c
@@ -57,10 +57,10 @@ static const PCI_ENTRY id_list[] =
57 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T, "German telekom", "A1T"}, 57 {PCI_VENDOR_ID_BERKOM, PCI_DEVICE_ID_BERKOM_A1T, "German telekom", "A1T"},
58 {PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575, "Motorola MC145575", "MC145575"}, 58 {PCI_VENDOR_ID_ANIGMA, PCI_DEVICE_ID_ANIGMA_MC145575, "Motorola MC145575", "MC145575"},
59 {PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0, "Zoltrix", "2BD0"}, 59 {PCI_VENDOR_ID_ZOLTRIX, PCI_DEVICE_ID_ZOLTRIX_2BD0, "Zoltrix", "2BD0"},
60 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E,"Digi International", "Digi DataFire Micro V IOM2 (Europe)"}, 60 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_E, "Digi International", "Digi DataFire Micro V IOM2 (Europe)"},
61 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E,"Digi International", "Digi DataFire Micro V (Europe)"}, 61 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_E, "Digi International", "Digi DataFire Micro V (Europe)"},
62 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A,"Digi International", "Digi DataFire Micro V IOM2 (North America)"}, 62 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_IOM2_A, "Digi International", "Digi DataFire Micro V IOM2 (North America)"},
63 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A,"Digi International", "Digi DataFire Micro V (North America)"}, 63 {PCI_VENDOR_ID_DIGI, PCI_DEVICE_ID_DIGI_DF_M_A, "Digi International", "Digi DataFire Micro V (North America)"},
64 {PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, "Sitecom Europe", "DC-105 ISDN PCI"}, 64 {PCI_VENDOR_ID_SITECOM, PCI_DEVICE_ID_SITECOM_DC105V2, "Sitecom Europe", "DC-105 ISDN PCI"},
65 {0, 0, NULL, NULL}, 65 {0, 0, NULL, NULL},
66}; 66};
@@ -73,7 +73,7 @@ static void
73release_io_hfcpci(struct IsdnCardState *cs) 73release_io_hfcpci(struct IsdnCardState *cs)
74{ 74{
75 printk(KERN_INFO "HiSax: release hfcpci at %p\n", 75 printk(KERN_INFO "HiSax: release hfcpci at %p\n",
76 cs->hw.hfcpci.pci_io); 76 cs->hw.hfcpci.pci_io);
77 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */ 77 cs->hw.hfcpci.int_m2 = 0; /* interrupt output off ! */
78 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2); 78 Write_hfc(cs, HFCPCI_INT_M2, cs->hw.hfcpci.int_m2);
79 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */ 79 Write_hfc(cs, HFCPCI_CIRM, HFCPCI_RESET); /* Reset On */
@@ -84,7 +84,7 @@ release_io_hfcpci(struct IsdnCardState *cs)
84 pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, 0); /* disable memory mapped ports + busmaster */ 84 pci_write_config_word(cs->hw.hfcpci.dev, PCI_COMMAND, 0); /* disable memory mapped ports + busmaster */
85 del_timer(&cs->hw.hfcpci.timer); 85 del_timer(&cs->hw.hfcpci.timer);
86 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000, 86 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000,
87 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma); 87 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
88 cs->hw.hfcpci.fifos = NULL; 88 cs->hw.hfcpci.fifos = NULL;
89 iounmap((void *)cs->hw.hfcpci.pci_io); 89 iounmap((void *)cs->hw.hfcpci.pci_io);
90} 90}
@@ -124,7 +124,7 @@ reset_hfcpci(struct IsdnCardState *cs)
124 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt); 124 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt);
125 125
126 cs->hw.hfcpci.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC | 126 cs->hw.hfcpci.int_m1 = HFCPCI_INTS_DTRANS | HFCPCI_INTS_DREC |
127 HFCPCI_INTS_L1STATE | HFCPCI_INTS_TIMER; 127 HFCPCI_INTS_L1STATE | HFCPCI_INTS_TIMER;
128 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); 128 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
129 129
130 /* Clear already pending ints */ 130 /* Clear already pending ints */
@@ -170,8 +170,8 @@ hfcpci_Timer(struct IsdnCardState *cs)
170 cs->hw.hfcpci.timer.expires = jiffies + 75; 170 cs->hw.hfcpci.timer.expires = jiffies + 75;
171 /* WD RESET */ 171 /* WD RESET */
172/* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcpci.ctmt | 0x80); 172/* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcpci.ctmt | 0x80);
173 add_timer(&cs->hw.hfcpci.timer); 173 add_timer(&cs->hw.hfcpci.timer);
174 */ 174*/
175} 175}
176 176
177 177
@@ -215,17 +215,17 @@ Sel_BCS(struct IsdnCardState *cs, int channel)
215/***************************************/ 215/***************************************/
216static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo) 216static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
217{ u_char fifo_state; 217{ u_char fifo_state;
218 bzfifo_type *bzr; 218 bzfifo_type *bzr;
219 219
220 if (fifo) { 220 if (fifo) {
221 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; 221 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
222 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX; 222 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2RX;
223 } else { 223 } else {
224 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1; 224 bzr = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b1;
225 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX; 225 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1RX;
226 } 226 }
227 if (fifo_state) 227 if (fifo_state)
228 cs->hw.hfcpci.fifo_en ^= fifo_state; 228 cs->hw.hfcpci.fifo_en ^= fifo_state;
229 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); 229 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
230 cs->hw.hfcpci.last_bfifo_cnt[fifo] = 0; 230 cs->hw.hfcpci.last_bfifo_cnt[fifo] = 0;
231 bzr->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1; 231 bzr->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1;
@@ -233,7 +233,7 @@ static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
233 bzr->f1 = MAX_B_FRAMES; 233 bzr->f1 = MAX_B_FRAMES;
234 bzr->f2 = bzr->f1; /* init F pointers to remain constant */ 234 bzr->f2 = bzr->f1; /* init F pointers to remain constant */
235 if (fifo_state) 235 if (fifo_state)
236 cs->hw.hfcpci.fifo_en |= fifo_state; 236 cs->hw.hfcpci.fifo_en |= fifo_state;
237 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); 237 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
238} 238}
239 239
@@ -242,24 +242,24 @@ static void hfcpci_clear_fifo_rx(struct IsdnCardState *cs, int fifo)
242/***************************************/ 242/***************************************/
243static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo) 243static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
244{ u_char fifo_state; 244{ u_char fifo_state;
245 bzfifo_type *bzt; 245 bzfifo_type *bzt;
246 246
247 if (fifo) { 247 if (fifo) {
248 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2; 248 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b2;
249 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX; 249 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B2TX;
250 } else { 250 } else {
251 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1; 251 bzt = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.txbz_b1;
252 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX; 252 fifo_state = cs->hw.hfcpci.fifo_en & HFCPCI_FIFOEN_B1TX;
253 } 253 }
254 if (fifo_state) 254 if (fifo_state)
255 cs->hw.hfcpci.fifo_en ^= fifo_state; 255 cs->hw.hfcpci.fifo_en ^= fifo_state;
256 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); 256 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
257 bzt->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1; 257 bzt->za[MAX_B_FRAMES].z1 = B_FIFO_SIZE + B_SUB_VAL - 1;
258 bzt->za[MAX_B_FRAMES].z2 = bzt->za[MAX_B_FRAMES].z1; 258 bzt->za[MAX_B_FRAMES].z2 = bzt->za[MAX_B_FRAMES].z1;
259 bzt->f1 = MAX_B_FRAMES; 259 bzt->f1 = MAX_B_FRAMES;
260 bzt->f2 = bzt->f1; /* init F pointers to remain constant */ 260 bzt->f2 = bzt->f1; /* init F pointers to remain constant */
261 if (fifo_state) 261 if (fifo_state)
262 cs->hw.hfcpci.fifo_en |= fifo_state; 262 cs->hw.hfcpci.fifo_en |= fifo_state;
263 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en); 263 Write_hfc(cs, HFCPCI_FIFO_EN, cs->hw.hfcpci.fifo_en);
264} 264}
265 265
@@ -268,7 +268,7 @@ static void hfcpci_clear_fifo_tx(struct IsdnCardState *cs, int fifo)
268/*********************************************/ 268/*********************************************/
269static struct sk_buff 269static struct sk_buff
270* 270*
271hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type * bz, u_char * bdata, int count) 271hfcpci_empty_fifo(struct BCState *bcs, bzfifo_type *bz, u_char *bdata, int count)
272{ 272{
273 u_char *ptr, *ptr1, new_f2; 273 u_char *ptr, *ptr1, new_f2;
274 struct sk_buff *skb; 274 struct sk_buff *skb;
@@ -395,7 +395,7 @@ receive_dmsg(struct IsdnCardState *cs)
395/* check for transparent receive data and read max one threshold size if avail */ 395/* check for transparent receive data and read max one threshold size if avail */
396/*******************************************************************************/ 396/*******************************************************************************/
397static int 397static int
398hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type * bz, u_char * bdata) 398hfcpci_empty_fifo_trans(struct BCState *bcs, bzfifo_type *bz, u_char *bdata)
399{ 399{
400 unsigned short *z1r, *z2r; 400 unsigned short *z1r, *z2r;
401 int new_z2, fcnt, maxlen; 401 int new_z2, fcnt, maxlen;
@@ -467,7 +467,7 @@ main_rec_hfcpci(struct BCState *bcs)
467 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b1; 467 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b1;
468 real_fifo = 0; 468 real_fifo = 0;
469 } 469 }
470 Begin: 470Begin:
471 count--; 471 count--;
472 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 472 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
473 debugl1(cs, "rec_data %d blocked", bcs->channel); 473 debugl1(cs, "rec_data %d blocked", bcs->channel);
@@ -494,7 +494,7 @@ main_rec_hfcpci(struct BCState *bcs)
494 if (rcnt < 0) 494 if (rcnt < 0)
495 rcnt += MAX_B_FRAMES + 1; 495 rcnt += MAX_B_FRAMES + 1;
496 if (cs->hw.hfcpci.last_bfifo_cnt[real_fifo] > rcnt + 1) { 496 if (cs->hw.hfcpci.last_bfifo_cnt[real_fifo] > rcnt + 1) {
497 rcnt = 0; 497 rcnt = 0;
498 hfcpci_clear_fifo_rx(cs, real_fifo); 498 hfcpci_clear_fifo_rx(cs, real_fifo);
499 } 499 }
500 cs->hw.hfcpci.last_bfifo_cnt[real_fifo] = rcnt; 500 cs->hw.hfcpci.last_bfifo_cnt[real_fifo] = rcnt;
@@ -647,8 +647,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
647 debugl1(cs, "hfcpci_fill_fifo_trans %d frame length %d discarded", 647 debugl1(cs, "hfcpci_fill_fifo_trans %d frame length %d discarded",
648 bcs->channel, bcs->tx_skb->len); 648 bcs->channel, bcs->tx_skb->len);
649 649
650 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 650 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
651 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 651 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
652 u_long flags; 652 u_long flags;
653 spin_lock_irqsave(&bcs->aclock, flags); 653 spin_lock_irqsave(&bcs->aclock, flags);
654 bcs->ackcnt += bcs->tx_skb->len; 654 bcs->ackcnt += bcs->tx_skb->len;
@@ -710,8 +710,8 @@ hfcpci_fill_fifo(struct BCState *bcs)
710 memcpy(dst, src, count); 710 memcpy(dst, src, count);
711 } 711 }
712 bcs->tx_cnt -= bcs->tx_skb->len; 712 bcs->tx_cnt -= bcs->tx_skb->len;
713 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 713 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
714 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 714 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
715 u_long flags; 715 u_long flags;
716 spin_lock_irqsave(&bcs->aclock, flags); 716 spin_lock_irqsave(&bcs->aclock, flags);
717 bcs->ackcnt += bcs->tx_skb->len; 717 bcs->ackcnt += bcs->tx_skb->len;
@@ -736,27 +736,27 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
736 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; 736 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
737 737
738 switch (pr) { 738 switch (pr) {
739 case (PH_DATA | REQUEST): 739 case (PH_DATA | REQUEST):
740 case (PH_PULL | REQUEST): 740 case (PH_PULL | REQUEST):
741 case (PH_PULL | INDICATION): 741 case (PH_PULL | INDICATION):
742 st->l1.l1hw(st, pr, arg); 742 st->l1.l1hw(st, pr, arg);
743 break; 743 break;
744 case (PH_ACTIVATE | REQUEST): 744 case (PH_ACTIVATE | REQUEST):
745 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); 745 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
746 break; 746 break;
747 case (PH_TESTLOOP | REQUEST): 747 case (PH_TESTLOOP | REQUEST):
748 if (1 & (long) arg) 748 if (1 & (long) arg)
749 debugl1(cs, "PH_TEST_LOOP B1"); 749 debugl1(cs, "PH_TEST_LOOP B1");
750 if (2 & (long) arg) 750 if (2 & (long) arg)
751 debugl1(cs, "PH_TEST_LOOP B2"); 751 debugl1(cs, "PH_TEST_LOOP B2");
752 if (!(3 & (long) arg)) 752 if (!(3 & (long) arg))
753 debugl1(cs, "PH_TEST_LOOP DISABLED"); 753 debugl1(cs, "PH_TEST_LOOP DISABLED");
754 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); 754 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
755 break; 755 break;
756 default: 756 default:
757 if (cs->debug) 757 if (cs->debug)
758 debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr); 758 debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr);
759 break; 759 break;
760 } 760 }
761} 761}
762 762
@@ -766,14 +766,14 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
766/* set/reset echo mode */ 766/* set/reset echo mode */
767/***********************/ 767/***********************/
768static int 768static int
769hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic) 769hfcpci_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic)
770{ 770{
771 u_long flags; 771 u_long flags;
772 int i = *(unsigned int *) ic->parm.num; 772 int i = *(unsigned int *) ic->parm.num;
773 773
774 if ((ic->arg == 98) && 774 if ((ic->arg == 98) &&
775 (!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC)))) { 775 (!(cs->hw.hfcpci.int_m1 & (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC + HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC)))) {
776 spin_lock_irqsave(&cs->lock, flags); 776 spin_lock_irqsave(&cs->lock, flags);
777 Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_NT); /* ST-Bit delay for NT-Mode */ 777 Write_hfc(cs, HFCPCI_CLKDEL, CLKDEL_NT); /* ST-Bit delay for NT-Mode */
778 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 0); /* HFC ST G0 */ 778 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 0); /* HFC ST G0 */
779 udelay(10); 779 udelay(10);
@@ -839,7 +839,7 @@ receive_emsg(struct IsdnCardState *cs)
839 839
840 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2; 840 bz = &((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxbz_b2;
841 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2; 841 bdata = ((fifo_area *) (cs->hw.hfcpci.fifos))->b_chans.rxdat_b2;
842 Begin: 842Begin:
843 count--; 843 count--;
844 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 844 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
845 debugl1(cs, "echo_rec_data blocked"); 845 debugl1(cs, "echo_rec_data blocked");
@@ -1078,7 +1078,7 @@ hfcpci_interrupt(int intno, void *dev_id)
1078 } else 1078 } else
1079 sched_event_D_pci(cs, D_XMTBUFREADY); 1079 sched_event_D_pci(cs, D_XMTBUFREADY);
1080 } 1080 }
1081 afterXPR: 1081 afterXPR:
1082 if (cs->hw.hfcpci.int_s1 && count--) { 1082 if (cs->hw.hfcpci.int_s1 && count--) {
1083 val = cs->hw.hfcpci.int_s1; 1083 val = cs->hw.hfcpci.int_s1;
1084 cs->hw.hfcpci.int_s1 = 0; 1084 cs->hw.hfcpci.int_s1 = 0;
@@ -1110,130 +1110,130 @@ HFCPCI_l1hw(struct PStack *st, int pr, void *arg)
1110 struct sk_buff *skb = arg; 1110 struct sk_buff *skb = arg;
1111 1111
1112 switch (pr) { 1112 switch (pr) {
1113 case (PH_DATA | REQUEST): 1113 case (PH_DATA | REQUEST):
1114 if (cs->debug & DEB_DLOG_HEX) 1114 if (cs->debug & DEB_DLOG_HEX)
1115 LogFrame(cs, skb->data, skb->len); 1115 LogFrame(cs, skb->data, skb->len);
1116 if (cs->debug & DEB_DLOG_VERBOSE) 1116 if (cs->debug & DEB_DLOG_VERBOSE)
1117 dlogframe(cs, skb, 0); 1117 dlogframe(cs, skb, 0);
1118 spin_lock_irqsave(&cs->lock, flags); 1118 spin_lock_irqsave(&cs->lock, flags);
1119 if (cs->tx_skb) { 1119 if (cs->tx_skb) {
1120 skb_queue_tail(&cs->sq, skb); 1120 skb_queue_tail(&cs->sq, skb);
1121#ifdef L2FRAME_DEBUG /* psa */
1122 if (cs->debug & L1_DEB_LAPD)
1123 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
1124#endif
1125 } else {
1126 cs->tx_skb = skb;
1127 cs->tx_cnt = 0;
1128#ifdef L2FRAME_DEBUG /* psa */ 1121#ifdef L2FRAME_DEBUG /* psa */
1129 if (cs->debug & L1_DEB_LAPD) 1122 if (cs->debug & L1_DEB_LAPD)
1130 Logl2Frame(cs, skb, "PH_DATA", 0); 1123 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
1131#endif 1124#endif
1132 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 1125 } else {
1133 hfcpci_fill_dfifo(cs);
1134 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
1135 } else
1136 debugl1(cs, "hfcpci_fill_dfifo blocked");
1137
1138 }
1139 spin_unlock_irqrestore(&cs->lock, flags);
1140 break;
1141 case (PH_PULL | INDICATION):
1142 spin_lock_irqsave(&cs->lock, flags);
1143 if (cs->tx_skb) {
1144 if (cs->debug & L1_DEB_WARN)
1145 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
1146 skb_queue_tail(&cs->sq, skb);
1147 spin_unlock_irqrestore(&cs->lock, flags);
1148 break;
1149 }
1150 if (cs->debug & DEB_DLOG_HEX)
1151 LogFrame(cs, skb->data, skb->len);
1152 if (cs->debug & DEB_DLOG_VERBOSE)
1153 dlogframe(cs, skb, 0);
1154 cs->tx_skb = skb; 1126 cs->tx_skb = skb;
1155 cs->tx_cnt = 0; 1127 cs->tx_cnt = 0;
1156#ifdef L2FRAME_DEBUG /* psa */ 1128#ifdef L2FRAME_DEBUG /* psa */
1157 if (cs->debug & L1_DEB_LAPD) 1129 if (cs->debug & L1_DEB_LAPD)
1158 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 1130 Logl2Frame(cs, skb, "PH_DATA", 0);
1159#endif 1131#endif
1160 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 1132 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
1161 hfcpci_fill_dfifo(cs); 1133 hfcpci_fill_dfifo(cs);
1162 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 1134 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
1163 } else 1135 } else
1164 debugl1(cs, "hfcpci_fill_dfifo blocked"); 1136 debugl1(cs, "hfcpci_fill_dfifo blocked");
1137
1138 }
1139 spin_unlock_irqrestore(&cs->lock, flags);
1140 break;
1141 case (PH_PULL | INDICATION):
1142 spin_lock_irqsave(&cs->lock, flags);
1143 if (cs->tx_skb) {
1144 if (cs->debug & L1_DEB_WARN)
1145 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
1146 skb_queue_tail(&cs->sq, skb);
1165 spin_unlock_irqrestore(&cs->lock, flags); 1147 spin_unlock_irqrestore(&cs->lock, flags);
1166 break; 1148 break;
1167 case (PH_PULL | REQUEST): 1149 }
1150 if (cs->debug & DEB_DLOG_HEX)
1151 LogFrame(cs, skb->data, skb->len);
1152 if (cs->debug & DEB_DLOG_VERBOSE)
1153 dlogframe(cs, skb, 0);
1154 cs->tx_skb = skb;
1155 cs->tx_cnt = 0;
1168#ifdef L2FRAME_DEBUG /* psa */ 1156#ifdef L2FRAME_DEBUG /* psa */
1169 if (cs->debug & L1_DEB_LAPD) 1157 if (cs->debug & L1_DEB_LAPD)
1170 debugl1(cs, "-> PH_REQUEST_PULL"); 1158 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
1171#endif 1159#endif
1172 if (!cs->tx_skb) { 1160 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
1173 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1161 hfcpci_fill_dfifo(cs);
1174 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 1162 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
1175 } else 1163 } else
1176 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1164 debugl1(cs, "hfcpci_fill_dfifo blocked");
1177 break; 1165 spin_unlock_irqrestore(&cs->lock, flags);
1178 case (HW_RESET | REQUEST): 1166 break;
1179 spin_lock_irqsave(&cs->lock, flags); 1167 case (PH_PULL | REQUEST):
1180 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */ 1168#ifdef L2FRAME_DEBUG /* psa */
1181 udelay(6); 1169 if (cs->debug & L1_DEB_LAPD)
1182 Write_hfc(cs, HFCPCI_STATES, 3); /* HFC ST 2 */ 1170 debugl1(cs, "-> PH_REQUEST_PULL");
1183 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; 1171#endif
1184 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); 1172 if (!cs->tx_skb) {
1185 Write_hfc(cs, HFCPCI_STATES, HFCPCI_ACTIVATE | HFCPCI_DO_ACTION); 1173 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1186 spin_unlock_irqrestore(&cs->lock, flags); 1174 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1187 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 1175 } else
1188 break; 1176 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1189 case (HW_ENABLE | REQUEST): 1177 break;
1190 spin_lock_irqsave(&cs->lock, flags); 1178 case (HW_RESET | REQUEST):
1191 Write_hfc(cs, HFCPCI_STATES, HFCPCI_DO_ACTION); 1179 spin_lock_irqsave(&cs->lock, flags);
1192 spin_unlock_irqrestore(&cs->lock, flags); 1180 Write_hfc(cs, HFCPCI_STATES, HFCPCI_LOAD_STATE | 3); /* HFC ST 3 */
1193 break; 1181 udelay(6);
1194 case (HW_DEACTIVATE | REQUEST): 1182 Write_hfc(cs, HFCPCI_STATES, 3); /* HFC ST 2 */
1195 spin_lock_irqsave(&cs->lock, flags); 1183 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
1196 cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER; 1184 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
1197 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); 1185 Write_hfc(cs, HFCPCI_STATES, HFCPCI_ACTIVATE | HFCPCI_DO_ACTION);
1198 spin_unlock_irqrestore(&cs->lock, flags); 1186 spin_unlock_irqrestore(&cs->lock, flags);
1199 break; 1187 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
1200 case (HW_INFO3 | REQUEST): 1188 break;
1201 spin_lock_irqsave(&cs->lock, flags); 1189 case (HW_ENABLE | REQUEST):
1202 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER; 1190 spin_lock_irqsave(&cs->lock, flags);
1203 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); 1191 Write_hfc(cs, HFCPCI_STATES, HFCPCI_DO_ACTION);
1204 spin_unlock_irqrestore(&cs->lock, flags); 1192 spin_unlock_irqrestore(&cs->lock, flags);
1193 break;
1194 case (HW_DEACTIVATE | REQUEST):
1195 spin_lock_irqsave(&cs->lock, flags);
1196 cs->hw.hfcpci.mst_m &= ~HFCPCI_MASTER;
1197 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
1198 spin_unlock_irqrestore(&cs->lock, flags);
1199 break;
1200 case (HW_INFO3 | REQUEST):
1201 spin_lock_irqsave(&cs->lock, flags);
1202 cs->hw.hfcpci.mst_m |= HFCPCI_MASTER;
1203 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
1204 spin_unlock_irqrestore(&cs->lock, flags);
1205 break;
1206 case (HW_TESTLOOP | REQUEST):
1207 spin_lock_irqsave(&cs->lock, flags);
1208 switch ((long) arg) {
1209 case (1):
1210 Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */
1211 Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */
1212 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1;
1213 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
1205 break; 1214 break;
1206 case (HW_TESTLOOP | REQUEST): 1215
1207 spin_lock_irqsave(&cs->lock, flags); 1216 case (2):
1208 switch ((long) arg) { 1217 Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */
1209 case (1): 1218 Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */
1210 Write_hfc(cs, HFCPCI_B1_SSL, 0x80); /* tx slot */ 1219 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08;
1211 Write_hfc(cs, HFCPCI_B1_RSL, 0x80); /* rx slot */ 1220 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
1212 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~7) | 1;
1213 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
1214 break;
1215
1216 case (2):
1217 Write_hfc(cs, HFCPCI_B2_SSL, 0x81); /* tx slot */
1218 Write_hfc(cs, HFCPCI_B2_RSL, 0x81); /* rx slot */
1219 cs->hw.hfcpci.conn = (cs->hw.hfcpci.conn & ~0x38) | 0x08;
1220 Write_hfc(cs, HFCPCI_CONNECT, cs->hw.hfcpci.conn);
1221 break;
1222
1223 default:
1224 spin_unlock_irqrestore(&cs->lock, flags);
1225 if (cs->debug & L1_DEB_WARN)
1226 debugl1(cs, "hfcpci_l1hw loop invalid %4lx", (long) arg);
1227 return;
1228 }
1229 cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */
1230 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
1231 spin_unlock_irqrestore(&cs->lock, flags);
1232 break; 1221 break;
1222
1233 default: 1223 default:
1224 spin_unlock_irqrestore(&cs->lock, flags);
1234 if (cs->debug & L1_DEB_WARN) 1225 if (cs->debug & L1_DEB_WARN)
1235 debugl1(cs, "hfcpci_l1hw unknown pr %4x", pr); 1226 debugl1(cs, "hfcpci_l1hw loop invalid %4lx", (long) arg);
1236 break; 1227 return;
1228 }
1229 cs->hw.hfcpci.trm |= 0x80; /* enable IOM-loop */
1230 Write_hfc(cs, HFCPCI_TRM, cs->hw.hfcpci.trm);
1231 spin_unlock_irqrestore(&cs->lock, flags);
1232 break;
1233 default:
1234 if (cs->debug & L1_DEB_WARN)
1235 debugl1(cs, "hfcpci_l1hw unknown pr %4x", pr);
1236 break;
1237 } 1237 }
1238} 1238}
1239 1239
@@ -1295,83 +1295,83 @@ mode_hfcpci(struct BCState *bcs, int mode, int bc)
1295 } 1295 }
1296 } 1296 }
1297 switch (mode) { 1297 switch (mode) {
1298 case (L1_MODE_NULL): 1298 case (L1_MODE_NULL):
1299 if (bc) { 1299 if (bc) {
1300 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA; 1300 cs->hw.hfcpci.sctrl &= ~SCTRL_B2_ENA;
1301 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA; 1301 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B2_ENA;
1302 } else { 1302 } else {
1303 cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA; 1303 cs->hw.hfcpci.sctrl &= ~SCTRL_B1_ENA;
1304 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA; 1304 cs->hw.hfcpci.sctrl_r &= ~SCTRL_B1_ENA;
1305 } 1305 }
1306 if (fifo2) { 1306 if (fifo2) {
1307 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; 1307 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
1308 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); 1308 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
1309 } else { 1309 } else {
1310 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; 1310 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
1311 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); 1311 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
1312 } 1312 }
1313 break; 1313 break;
1314 case (L1_MODE_TRANS): 1314 case (L1_MODE_TRANS):
1315 hfcpci_clear_fifo_rx(cs, fifo2); 1315 hfcpci_clear_fifo_rx(cs, fifo2);
1316 hfcpci_clear_fifo_tx(cs, fifo2); 1316 hfcpci_clear_fifo_tx(cs, fifo2);
1317 if (bc) { 1317 if (bc) {
1318 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; 1318 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
1319 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; 1319 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
1320 } else { 1320 } else {
1321 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; 1321 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
1322 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; 1322 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
1323 } 1323 }
1324 if (fifo2) { 1324 if (fifo2) {
1325 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; 1325 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
1326 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); 1326 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
1327 cs->hw.hfcpci.ctmt |= 2; 1327 cs->hw.hfcpci.ctmt |= 2;
1328 cs->hw.hfcpci.conn &= ~0x18; 1328 cs->hw.hfcpci.conn &= ~0x18;
1329 } else { 1329 } else {
1330 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; 1330 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
1331 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); 1331 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
1332 cs->hw.hfcpci.ctmt |= 1; 1332 cs->hw.hfcpci.ctmt |= 1;
1333 cs->hw.hfcpci.conn &= ~0x03; 1333 cs->hw.hfcpci.conn &= ~0x03;
1334 } 1334 }
1335 break; 1335 break;
1336 case (L1_MODE_HDLC): 1336 case (L1_MODE_HDLC):
1337 hfcpci_clear_fifo_rx(cs, fifo2); 1337 hfcpci_clear_fifo_rx(cs, fifo2);
1338 hfcpci_clear_fifo_tx(cs, fifo2); 1338 hfcpci_clear_fifo_tx(cs, fifo2);
1339 if (bc) { 1339 if (bc) {
1340 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; 1340 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
1341 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; 1341 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
1342 } else { 1342 } else {
1343 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; 1343 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
1344 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; 1344 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
1345 } 1345 }
1346 if (fifo2) { 1346 if (fifo2) {
1347 cs->hw.hfcpci.last_bfifo_cnt[1] = 0; 1347 cs->hw.hfcpci.last_bfifo_cnt[1] = 0;
1348 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2; 1348 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B2;
1349 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); 1349 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
1350 cs->hw.hfcpci.ctmt &= ~2; 1350 cs->hw.hfcpci.ctmt &= ~2;
1351 cs->hw.hfcpci.conn &= ~0x18; 1351 cs->hw.hfcpci.conn &= ~0x18;
1352 } else { 1352 } else {
1353 cs->hw.hfcpci.last_bfifo_cnt[0] = 0; 1353 cs->hw.hfcpci.last_bfifo_cnt[0] = 0;
1354 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1; 1354 cs->hw.hfcpci.fifo_en |= HFCPCI_FIFOEN_B1;
1355 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); 1355 cs->hw.hfcpci.int_m1 |= (HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
1356 cs->hw.hfcpci.ctmt &= ~1; 1356 cs->hw.hfcpci.ctmt &= ~1;
1357 cs->hw.hfcpci.conn &= ~0x03; 1357 cs->hw.hfcpci.conn &= ~0x03;
1358 } 1358 }
1359 break; 1359 break;
1360 case (L1_MODE_EXTRN): 1360 case (L1_MODE_EXTRN):
1361 if (bc) { 1361 if (bc) {
1362 cs->hw.hfcpci.conn |= 0x10; 1362 cs->hw.hfcpci.conn |= 0x10;
1363 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA; 1363 cs->hw.hfcpci.sctrl |= SCTRL_B2_ENA;
1364 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA; 1364 cs->hw.hfcpci.sctrl_r |= SCTRL_B2_ENA;
1365 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2; 1365 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B2;
1366 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC); 1366 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B2TRANS + HFCPCI_INTS_B2REC);
1367 } else { 1367 } else {
1368 cs->hw.hfcpci.conn |= 0x02; 1368 cs->hw.hfcpci.conn |= 0x02;
1369 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA; 1369 cs->hw.hfcpci.sctrl |= SCTRL_B1_ENA;
1370 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA; 1370 cs->hw.hfcpci.sctrl_r |= SCTRL_B1_ENA;
1371 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1; 1371 cs->hw.hfcpci.fifo_en &= ~HFCPCI_FIFOEN_B1;
1372 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC); 1372 cs->hw.hfcpci.int_m1 &= ~(HFCPCI_INTS_B1TRANS + HFCPCI_INTS_B1REC);
1373 } 1373 }
1374 break; 1374 break;
1375 } 1375 }
1376 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e); 1376 Write_hfc(cs, HFCPCI_SCTRL_E, cs->hw.hfcpci.sctrl_e);
1377 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); 1377 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
@@ -1393,54 +1393,54 @@ hfcpci_l2l1(struct PStack *st, int pr, void *arg)
1393 struct sk_buff *skb = arg; 1393 struct sk_buff *skb = arg;
1394 1394
1395 switch (pr) { 1395 switch (pr) {
1396 case (PH_DATA | REQUEST): 1396 case (PH_DATA | REQUEST):
1397 spin_lock_irqsave(&bcs->cs->lock, flags); 1397 spin_lock_irqsave(&bcs->cs->lock, flags);
1398 if (bcs->tx_skb) { 1398 if (bcs->tx_skb) {
1399 skb_queue_tail(&bcs->squeue, skb); 1399 skb_queue_tail(&bcs->squeue, skb);
1400 } else { 1400 } else {
1401 bcs->tx_skb = skb;
1402// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1403 bcs->cs->BC_Send_Data(bcs);
1404 }
1405 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1406 break;
1407 case (PH_PULL | INDICATION):
1408 spin_lock_irqsave(&bcs->cs->lock, flags);
1409 if (bcs->tx_skb) {
1410 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1411 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
1412 break;
1413 }
1414// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1415 bcs->tx_skb = skb; 1401 bcs->tx_skb = skb;
1402// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1416 bcs->cs->BC_Send_Data(bcs); 1403 bcs->cs->BC_Send_Data(bcs);
1404 }
1405 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1406 break;
1407 case (PH_PULL | INDICATION):
1408 spin_lock_irqsave(&bcs->cs->lock, flags);
1409 if (bcs->tx_skb) {
1417 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1410 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1411 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
1418 break; 1412 break;
1419 case (PH_PULL | REQUEST): 1413 }
1420 if (!bcs->tx_skb) { 1414// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1421 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1415 bcs->tx_skb = skb;
1422 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 1416 bcs->cs->BC_Send_Data(bcs);
1423 } else 1417 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1424 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1418 break;
1425 break; 1419 case (PH_PULL | REQUEST):
1426 case (PH_ACTIVATE | REQUEST): 1420 if (!bcs->tx_skb) {
1427 spin_lock_irqsave(&bcs->cs->lock, flags); 1421 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1428 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 1422 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1429 mode_hfcpci(bcs, st->l1.mode, st->l1.bc); 1423 } else
1430 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1424 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1431 l1_msg_b(st, pr, arg); 1425 break;
1432 break; 1426 case (PH_ACTIVATE | REQUEST):
1433 case (PH_DEACTIVATE | REQUEST): 1427 spin_lock_irqsave(&bcs->cs->lock, flags);
1434 l1_msg_b(st, pr, arg); 1428 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
1435 break; 1429 mode_hfcpci(bcs, st->l1.mode, st->l1.bc);
1436 case (PH_DEACTIVATE | CONFIRM): 1430 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1437 spin_lock_irqsave(&bcs->cs->lock, flags); 1431 l1_msg_b(st, pr, arg);
1438 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 1432 break;
1439 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 1433 case (PH_DEACTIVATE | REQUEST):
1440 mode_hfcpci(bcs, 0, st->l1.bc); 1434 l1_msg_b(st, pr, arg);
1441 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1435 break;
1442 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 1436 case (PH_DEACTIVATE | CONFIRM):
1443 break; 1437 spin_lock_irqsave(&bcs->cs->lock, flags);
1438 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
1439 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1440 mode_hfcpci(bcs, 0, st->l1.bc);
1441 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1442 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1443 break;
1444 } 1444 }
1445} 1445}
1446 1446
@@ -1510,57 +1510,57 @@ hfcpci_bh(struct work_struct *work)
1510 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) { 1510 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
1511 if (!cs->hw.hfcpci.nt_mode) 1511 if (!cs->hw.hfcpci.nt_mode)
1512 switch (cs->dc.hfcpci.ph_state) { 1512 switch (cs->dc.hfcpci.ph_state) {
1513 case (0): 1513 case (0):
1514 l1_msg(cs, HW_RESET | INDICATION, NULL); 1514 l1_msg(cs, HW_RESET | INDICATION, NULL);
1515 break; 1515 break;
1516 case (3): 1516 case (3):
1517 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 1517 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
1518 break; 1518 break;
1519 case (8): 1519 case (8):
1520 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 1520 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
1521 break; 1521 break;
1522 case (6): 1522 case (6):
1523 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 1523 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
1524 break; 1524 break;
1525 case (7): 1525 case (7):
1526 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 1526 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
1527 break; 1527 break;
1528 default: 1528 default:
1529 break; 1529 break;
1530 } else { 1530 } else {
1531 spin_lock_irqsave(&cs->lock, flags); 1531 spin_lock_irqsave(&cs->lock, flags);
1532 switch (cs->dc.hfcpci.ph_state) { 1532 switch (cs->dc.hfcpci.ph_state) {
1533 case (2): 1533 case (2):
1534 if (cs->hw.hfcpci.nt_timer < 0) { 1534 if (cs->hw.hfcpci.nt_timer < 0) {
1535 cs->hw.hfcpci.nt_timer = 0;
1536 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
1537 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1538 /* Clear already pending ints */
1539 if (Read_hfc(cs, HFCPCI_INT_S1));
1540 Write_hfc(cs, HFCPCI_STATES, 4 | HFCPCI_LOAD_STATE);
1541 udelay(10);
1542 Write_hfc(cs, HFCPCI_STATES, 4);
1543 cs->dc.hfcpci.ph_state = 4;
1544 } else {
1545 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER;
1546 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1547 cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER;
1548 cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125;
1549 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
1550 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
1551 cs->hw.hfcpci.nt_timer = NT_T1_COUNT;
1552 Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */
1553 }
1554 break;
1555 case (1):
1556 case (3):
1557 case (4):
1558 cs->hw.hfcpci.nt_timer = 0; 1535 cs->hw.hfcpci.nt_timer = 0;
1559 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; 1536 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
1560 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); 1537 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1561 break; 1538 /* Clear already pending ints */
1562 default: 1539 if (Read_hfc(cs, HFCPCI_INT_S1));
1563 break; 1540 Write_hfc(cs, HFCPCI_STATES, 4 | HFCPCI_LOAD_STATE);
1541 udelay(10);
1542 Write_hfc(cs, HFCPCI_STATES, 4);
1543 cs->dc.hfcpci.ph_state = 4;
1544 } else {
1545 cs->hw.hfcpci.int_m1 |= HFCPCI_INTS_TIMER;
1546 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1547 cs->hw.hfcpci.ctmt &= ~HFCPCI_AUTO_TIMER;
1548 cs->hw.hfcpci.ctmt |= HFCPCI_TIM3_125;
1549 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
1550 Write_hfc(cs, HFCPCI_CTMT, cs->hw.hfcpci.ctmt | HFCPCI_CLTIMER);
1551 cs->hw.hfcpci.nt_timer = NT_T1_COUNT;
1552 Write_hfc(cs, HFCPCI_STATES, 2 | HFCPCI_NT_G2_G3); /* allow G2 -> G3 transition */
1553 }
1554 break;
1555 case (1):
1556 case (3):
1557 case (4):
1558 cs->hw.hfcpci.nt_timer = 0;
1559 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
1560 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1561 break;
1562 default:
1563 break;
1564 } 1564 }
1565 spin_unlock_irqrestore(&cs->lock, flags); 1565 spin_unlock_irqrestore(&cs->lock, flags);
1566 } 1566 }
@@ -1602,30 +1602,30 @@ hfcpci_card_msg(struct IsdnCardState *cs, int mt, void *arg)
1602 if (cs->debug & L1_DEB_ISAC) 1602 if (cs->debug & L1_DEB_ISAC)
1603 debugl1(cs, "HFCPCI: card_msg %x", mt); 1603 debugl1(cs, "HFCPCI: card_msg %x", mt);
1604 switch (mt) { 1604 switch (mt) {
1605 case CARD_RESET: 1605 case CARD_RESET:
1606 spin_lock_irqsave(&cs->lock, flags); 1606 spin_lock_irqsave(&cs->lock, flags);
1607 reset_hfcpci(cs); 1607 reset_hfcpci(cs);
1608 spin_unlock_irqrestore(&cs->lock, flags); 1608 spin_unlock_irqrestore(&cs->lock, flags);
1609 return (0); 1609 return (0);
1610 case CARD_RELEASE: 1610 case CARD_RELEASE:
1611 release_io_hfcpci(cs); 1611 release_io_hfcpci(cs);
1612 return (0); 1612 return (0);
1613 case CARD_INIT: 1613 case CARD_INIT:
1614 spin_lock_irqsave(&cs->lock, flags); 1614 spin_lock_irqsave(&cs->lock, flags);
1615 inithfcpci(cs); 1615 inithfcpci(cs);
1616 reset_hfcpci(cs); 1616 reset_hfcpci(cs);
1617 spin_unlock_irqrestore(&cs->lock, flags); 1617 spin_unlock_irqrestore(&cs->lock, flags);
1618 msleep(80); /* Timeout 80ms */ 1618 msleep(80); /* Timeout 80ms */
1619 /* now switch timer interrupt off */ 1619 /* now switch timer interrupt off */
1620 spin_lock_irqsave(&cs->lock, flags); 1620 spin_lock_irqsave(&cs->lock, flags);
1621 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER; 1621 cs->hw.hfcpci.int_m1 &= ~HFCPCI_INTS_TIMER;
1622 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1); 1622 Write_hfc(cs, HFCPCI_INT_M1, cs->hw.hfcpci.int_m1);
1623 /* reinit mode reg */ 1623 /* reinit mode reg */
1624 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m); 1624 Write_hfc(cs, HFCPCI_MST_MODE, cs->hw.hfcpci.mst_m);
1625 spin_unlock_irqrestore(&cs->lock, flags); 1625 spin_unlock_irqrestore(&cs->lock, flags);
1626 return (0); 1626 return (0);
1627 case CARD_TEST: 1627 case CARD_TEST:
1628 return (0); 1628 return (0);
1629 } 1629 }
1630 return (0); 1630 return (0);
1631} 1631}
@@ -1654,13 +1654,13 @@ setup_hfcpci(struct IsdnCard *card)
1654 cs->dc.hfcpci.ph_state = 0; 1654 cs->dc.hfcpci.ph_state = 0;
1655 cs->hw.hfcpci.fifo = 255; 1655 cs->hw.hfcpci.fifo = 255;
1656 if (cs->typ != ISDN_CTYPE_HFC_PCI) 1656 if (cs->typ != ISDN_CTYPE_HFC_PCI)
1657 return(0); 1657 return (0);
1658 1658
1659 i = 0; 1659 i = 0;
1660 while (id_list[i].vendor_id) { 1660 while (id_list[i].vendor_id) {
1661 tmp_hfcpci = hisax_find_pci_device(id_list[i].vendor_id, 1661 tmp_hfcpci = hisax_find_pci_device(id_list[i].vendor_id,
1662 id_list[i].device_id, 1662 id_list[i].device_id,
1663 dev_hfcpci); 1663 dev_hfcpci);
1664 i++; 1664 i++;
1665 if (tmp_hfcpci) { 1665 if (tmp_hfcpci) {
1666 dma_addr_t dma_mask = DMA_BIT_MASK(32) & ~0x7fffUL; 1666 dma_addr_t dma_mask = DMA_BIT_MASK(32) & ~0x7fffUL;
@@ -1668,16 +1668,16 @@ setup_hfcpci(struct IsdnCard *card)
1668 continue; 1668 continue;
1669 if (pci_set_dma_mask(tmp_hfcpci, dma_mask)) { 1669 if (pci_set_dma_mask(tmp_hfcpci, dma_mask)) {
1670 printk(KERN_WARNING 1670 printk(KERN_WARNING
1671 "HiSax hfc_pci: No suitable DMA available.\n"); 1671 "HiSax hfc_pci: No suitable DMA available.\n");
1672 continue; 1672 continue;
1673 } 1673 }
1674 if (pci_set_consistent_dma_mask(tmp_hfcpci, dma_mask)) { 1674 if (pci_set_consistent_dma_mask(tmp_hfcpci, dma_mask)) {
1675 printk(KERN_WARNING 1675 printk(KERN_WARNING
1676 "HiSax hfc_pci: No suitable consistent DMA available.\n"); 1676 "HiSax hfc_pci: No suitable consistent DMA available.\n");
1677 continue; 1677 continue;
1678 } 1678 }
1679 pci_set_master(tmp_hfcpci); 1679 pci_set_master(tmp_hfcpci);
1680 if ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[ 0].start & PCI_BASE_ADDRESS_IO_MASK))) 1680 if ((card->para[0]) && (card->para[0] != (tmp_hfcpci->resource[0].start & PCI_BASE_ADDRESS_IO_MASK)))
1681 continue; 1681 continue;
1682 else 1682 else
1683 break; 1683 break;
@@ -1707,17 +1707,17 @@ setup_hfcpci(struct IsdnCard *card)
1707 1707
1708 /* Allocate memory for FIFOS */ 1708 /* Allocate memory for FIFOS */
1709 cs->hw.hfcpci.fifos = pci_alloc_consistent(cs->hw.hfcpci.dev, 1709 cs->hw.hfcpci.fifos = pci_alloc_consistent(cs->hw.hfcpci.dev,
1710 0x8000, &cs->hw.hfcpci.dma); 1710 0x8000, &cs->hw.hfcpci.dma);
1711 if (!cs->hw.hfcpci.fifos) { 1711 if (!cs->hw.hfcpci.fifos) {
1712 printk(KERN_WARNING "HFC-PCI: Error allocating FIFO memory!\n"); 1712 printk(KERN_WARNING "HFC-PCI: Error allocating FIFO memory!\n");
1713 return 0; 1713 return 0;
1714 } 1714 }
1715 if (cs->hw.hfcpci.dma & 0x7fff) { 1715 if (cs->hw.hfcpci.dma & 0x7fff) {
1716 printk(KERN_WARNING 1716 printk(KERN_WARNING
1717 "HFC-PCI: Error DMA memory not on 32K boundary (%lx)\n", 1717 "HFC-PCI: Error DMA memory not on 32K boundary (%lx)\n",
1718 (u_long)cs->hw.hfcpci.dma); 1718 (u_long)cs->hw.hfcpci.dma);
1719 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000, 1719 pci_free_consistent(cs->hw.hfcpci.dev, 0x8000,
1720 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma); 1720 cs->hw.hfcpci.fifos, cs->hw.hfcpci.dma);
1721 return 0; 1721 return 0;
1722 } 1722 }
1723 pci_write_config_dword(cs->hw.hfcpci.dev, 0x80, (u32)cs->hw.hfcpci.dma); 1723 pci_write_config_dword(cs->hw.hfcpci.dev, 0x80, (u32)cs->hw.hfcpci.dma);
diff --git a/drivers/isdn/hisax/hfc_pci.h b/drivers/isdn/hisax/hfc_pci.h
index 9ef2981e404e..4e58700a3e61 100644
--- a/drivers/isdn/hisax/hfc_pci.h
+++ b/drivers/isdn/hisax/hfc_pci.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Werner Cornelius 5 * Author Werner Cornelius
6 * Copyright by Werner Cornelius <werner@isdn4linux.de> 6 * Copyright by Werner Cornelius <werner@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -55,7 +55,7 @@
55 55
56#define HFCPCI_MST_EMOD 0xB4 56#define HFCPCI_MST_EMOD 0xB4
57#define HFCPCI_MST_MODE 0xB8 57#define HFCPCI_MST_MODE 0xB8
58#define HFCPCI_CONNECT 0xBC 58#define HFCPCI_CONNECT 0xBC
59 59
60 60
61/* Interrupt and status registers */ 61/* Interrupt and status registers */
@@ -64,22 +64,22 @@
64#define HFCPCI_TRM 0x48 64#define HFCPCI_TRM 0x48
65#define HFCPCI_B_MODE 0x4C 65#define HFCPCI_B_MODE 0x4C
66#define HFCPCI_CHIP_ID 0x58 66#define HFCPCI_CHIP_ID 0x58
67#define HFCPCI_CIRM 0x60 67#define HFCPCI_CIRM 0x60
68#define HFCPCI_CTMT 0x64 68#define HFCPCI_CTMT 0x64
69#define HFCPCI_INT_M1 0x68 69#define HFCPCI_INT_M1 0x68
70#define HFCPCI_INT_M2 0x6C 70#define HFCPCI_INT_M2 0x6C
71#define HFCPCI_INT_S1 0x78 71#define HFCPCI_INT_S1 0x78
72#define HFCPCI_INT_S2 0x7C 72#define HFCPCI_INT_S2 0x7C
73#define HFCPCI_STATUS 0x70 73#define HFCPCI_STATUS 0x70
74 74
75/* S/T section registers */ 75/* S/T section registers */
76 76
77#define HFCPCI_STATES 0xC0 77#define HFCPCI_STATES 0xC0
78#define HFCPCI_SCTRL 0xC4 78#define HFCPCI_SCTRL 0xC4
79#define HFCPCI_SCTRL_E 0xC8 79#define HFCPCI_SCTRL_E 0xC8
80#define HFCPCI_SCTRL_R 0xCC 80#define HFCPCI_SCTRL_R 0xCC
81#define HFCPCI_SQ 0xD0 81#define HFCPCI_SQ 0xD0
82#define HFCPCI_CLKDEL 0xDC 82#define HFCPCI_CLKDEL 0xDC
83#define HFCPCI_B1_REC 0xF0 83#define HFCPCI_B1_REC 0xF0
84#define HFCPCI_B1_SEND 0xF0 84#define HFCPCI_B1_SEND 0xF0
85#define HFCPCI_B2_REC 0xF4 85#define HFCPCI_B2_REC 0xF4
@@ -91,7 +91,7 @@
91 91
92/* bits in status register (READ) */ 92/* bits in status register (READ) */
93#define HFCPCI_PCI_PROC 0x02 93#define HFCPCI_PCI_PROC 0x02
94#define HFCPCI_NBUSY 0x04 94#define HFCPCI_NBUSY 0x04
95#define HFCPCI_TIMER_ELAP 0x10 95#define HFCPCI_TIMER_ELAP 0x10
96#define HFCPCI_STATINT 0x20 96#define HFCPCI_STATINT 0x20
97#define HFCPCI_FRAMEINT 0x40 97#define HFCPCI_FRAMEINT 0x40
@@ -110,7 +110,7 @@
110 110
111/* bits in CIRM (Write) */ 111/* bits in CIRM (Write) */
112#define HFCPCI_AUX_MSK 0x07 112#define HFCPCI_AUX_MSK 0x07
113#define HFCPCI_RESET 0x08 113#define HFCPCI_RESET 0x08
114#define HFCPCI_B1_REV 0x40 114#define HFCPCI_B1_REV 0x40
115#define HFCPCI_B2_REV 0x80 115#define HFCPCI_B2_REV 0x80
116 116
@@ -183,53 +183,53 @@
183#define D_FREG_MASK 0xF 183#define D_FREG_MASK 0xF
184 184
185typedef struct { 185typedef struct {
186 unsigned short z1; /* Z1 pointer 16 Bit */ 186 unsigned short z1; /* Z1 pointer 16 Bit */
187 unsigned short z2; /* Z2 pointer 16 Bit */ 187 unsigned short z2; /* Z2 pointer 16 Bit */
188 } z_type; 188} z_type;
189 189
190typedef struct { 190typedef struct {
191 u_char data[D_FIFO_SIZE]; /* FIFO data space */ 191 u_char data[D_FIFO_SIZE]; /* FIFO data space */
192 u_char fill1[0x20A0-D_FIFO_SIZE]; /* reserved, do not use */ 192 u_char fill1[0x20A0 - D_FIFO_SIZE]; /* reserved, do not use */
193 u_char f1,f2; /* f pointers */ 193 u_char f1, f2; /* f pointers */
194 u_char fill2[0x20C0-0x20A2]; /* reserved, do not use */ 194 u_char fill2[0x20C0 - 0x20A2]; /* reserved, do not use */
195 z_type za[MAX_D_FRAMES+1]; /* mask index with D_FREG_MASK for access */ 195 z_type za[MAX_D_FRAMES + 1]; /* mask index with D_FREG_MASK for access */
196 u_char fill3[0x4000-0x2100]; /* align 16K */ 196 u_char fill3[0x4000 - 0x2100]; /* align 16K */
197 } dfifo_type; 197} dfifo_type;
198 198
199typedef struct { 199typedef struct {
200 z_type za[MAX_B_FRAMES+1]; /* only range 0x0..0x1F allowed */ 200 z_type za[MAX_B_FRAMES + 1]; /* only range 0x0..0x1F allowed */
201 u_char f1,f2; /* f pointers */ 201 u_char f1, f2; /* f pointers */
202 u_char fill[0x2100-0x2082]; /* alignment */ 202 u_char fill[0x2100 - 0x2082]; /* alignment */
203 } bzfifo_type; 203} bzfifo_type;
204 204
205 205
206typedef union { 206typedef union {
207 struct { 207 struct {
208 dfifo_type d_tx; /* D-send channel */ 208 dfifo_type d_tx; /* D-send channel */
209 dfifo_type d_rx; /* D-receive channel */ 209 dfifo_type d_rx; /* D-receive channel */
210 } d_chan; 210 } d_chan;
211 struct { 211 struct {
212 u_char fill1[0x200]; 212 u_char fill1[0x200];
213 u_char txdat_b1[B_FIFO_SIZE]; 213 u_char txdat_b1[B_FIFO_SIZE];
214 bzfifo_type txbz_b1; 214 bzfifo_type txbz_b1;
215 215
216 bzfifo_type txbz_b2; 216 bzfifo_type txbz_b2;
217 u_char txdat_b2[B_FIFO_SIZE]; 217 u_char txdat_b2[B_FIFO_SIZE];
218 218
219 u_char fill2[D_FIFO_SIZE]; 219 u_char fill2[D_FIFO_SIZE];
220 220
221 u_char rxdat_b1[B_FIFO_SIZE]; 221 u_char rxdat_b1[B_FIFO_SIZE];
222 bzfifo_type rxbz_b1; 222 bzfifo_type rxbz_b1;
223 223
224 bzfifo_type rxbz_b2; 224 bzfifo_type rxbz_b2;
225 u_char rxdat_b2[B_FIFO_SIZE]; 225 u_char rxdat_b2[B_FIFO_SIZE];
226 } b_chans; 226 } b_chans;
227 u_char fill[32768]; 227 u_char fill[32768];
228 } fifo_area; 228} fifo_area;
229 229
230 230
231#define Write_hfc(a,b,c) (*(((u_char *)a->hw.hfcpci.pci_io)+b) = c) 231#define Write_hfc(a, b, c) (*(((u_char *)a->hw.hfcpci.pci_io) + b) = c)
232#define Read_hfc(a,b) (*(((u_char *)a->hw.hfcpci.pci_io)+b)) 232#define Read_hfc(a, b) (*(((u_char *)a->hw.hfcpci.pci_io) + b))
233 233
234extern void main_irq_hcpci(struct BCState *bcs); 234extern void main_irq_hcpci(struct BCState *bcs);
235extern void releasehfcpci(struct IsdnCardState *cs); 235extern void releasehfcpci(struct IsdnCardState *cs);
diff --git a/drivers/isdn/hisax/hfc_sx.c b/drivers/isdn/hisax/hfc_sx.c
index 156d7c63d944..4db846be4369 100644
--- a/drivers/isdn/hisax/hfc_sx.c
+++ b/drivers/isdn/hisax/hfc_sx.c
@@ -5,7 +5,7 @@
5 * Author Werner Cornelius 5 * Author Werner Cornelius
6 * based on existing driver for CCD HFC PCI cards 6 * based on existing driver for CCD HFC PCI cards
7 * Copyright by Werner Cornelius <werner@isdn4linux.de> 7 * Copyright by Werner Cornelius <werner@isdn4linux.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -43,16 +43,16 @@ static const char *hfcsx_revision = "$Revision: 1.12.2.5 $";
43#undef CCD_DEMO_BOARD 43#undef CCD_DEMO_BOARD
44#ifdef CCD_DEMO_BOARD 44#ifdef CCD_DEMO_BOARD
45static u_char ccd_sp_irqtab[16] = { 45static u_char ccd_sp_irqtab[16] = {
46 0,0,0,0,0,2,1,0,0,0,3,4,5,0,0,6 46 0, 0, 0, 0, 0, 2, 1, 0, 0, 0, 3, 4, 5, 0, 0, 6
47}; 47};
48#else /* Teles 16.3c */ 48#else /* Teles 16.3c */
49static u_char ccd_sp_irqtab[16] = { 49static u_char ccd_sp_irqtab[16] = {
50 0,0,0,7,0,1,0,0,0,2,3,4,5,0,0,6 50 0, 0, 0, 7, 0, 1, 0, 0, 0, 2, 3, 4, 5, 0, 0, 6
51}; 51};
52#endif 52#endif
53#define NT_T1_COUNT 20 /* number of 3.125ms interrupts for G2 timeout */ 53#define NT_T1_COUNT 20 /* number of 3.125ms interrupts for G2 timeout */
54 54
55#define byteout(addr,val) outb(val,addr) 55#define byteout(addr, val) outb(val, addr)
56#define bytein(addr) inb(addr) 56#define bytein(addr) inb(addr)
57 57
58/******************************/ 58/******************************/
@@ -61,19 +61,19 @@ static u_char ccd_sp_irqtab[16] = {
61static inline void 61static inline void
62Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val) 62Write_hfc(struct IsdnCardState *cs, u_char regnum, u_char val)
63{ 63{
64 byteout(cs->hw.hfcsx.base+1, regnum); 64 byteout(cs->hw.hfcsx.base + 1, regnum);
65 byteout(cs->hw.hfcsx.base, val); 65 byteout(cs->hw.hfcsx.base, val);
66} 66}
67 67
68static inline u_char 68static inline u_char
69Read_hfc(struct IsdnCardState *cs, u_char regnum) 69Read_hfc(struct IsdnCardState *cs, u_char regnum)
70{ 70{
71 u_char ret; 71 u_char ret;
72 72
73 byteout(cs->hw.hfcsx.base+1, regnum); 73 byteout(cs->hw.hfcsx.base + 1, regnum);
74 ret = bytein(cs->hw.hfcsx.base); 74 ret = bytein(cs->hw.hfcsx.base);
75 return(ret); 75 return (ret);
76} 76}
77 77
78 78
79/**************************************************/ 79/**************************************************/
@@ -82,15 +82,15 @@ Read_hfc(struct IsdnCardState *cs, u_char regnum)
82static void 82static void
83fifo_select(struct IsdnCardState *cs, u_char fifo) 83fifo_select(struct IsdnCardState *cs, u_char fifo)
84{ 84{
85 if (fifo == cs->hw.hfcsx.last_fifo) 85 if (fifo == cs->hw.hfcsx.last_fifo)
86 return; /* still valid */ 86 return; /* still valid */
87 87
88 byteout(cs->hw.hfcsx.base+1, HFCSX_FIF_SEL); 88 byteout(cs->hw.hfcsx.base + 1, HFCSX_FIF_SEL);
89 byteout(cs->hw.hfcsx.base, fifo); 89 byteout(cs->hw.hfcsx.base, fifo);
90 while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */ 90 while (bytein(cs->hw.hfcsx.base + 1) & 1); /* wait for busy */
91 udelay(4); 91 udelay(4);
92 byteout(cs->hw.hfcsx.base, fifo); 92 byteout(cs->hw.hfcsx.base, fifo);
93 while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */ 93 while (bytein(cs->hw.hfcsx.base + 1) & 1); /* wait for busy */
94} 94}
95 95
96/******************************************/ 96/******************************************/
@@ -101,11 +101,11 @@ static void
101reset_fifo(struct IsdnCardState *cs, u_char fifo) 101reset_fifo(struct IsdnCardState *cs, u_char fifo)
102{ 102{
103 fifo_select(cs, fifo); /* first select the fifo */ 103 fifo_select(cs, fifo); /* first select the fifo */
104 byteout(cs->hw.hfcsx.base+1, HFCSX_CIRM); 104 byteout(cs->hw.hfcsx.base + 1, HFCSX_CIRM);
105 byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.cirm | 0x80); /* reset cmd */ 105 byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.cirm | 0x80); /* reset cmd */
106 udelay(1); 106 udelay(1);
107 while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */ 107 while (bytein(cs->hw.hfcsx.base + 1) & 1); /* wait for busy */
108} 108}
109 109
110 110
111/*************************************************************/ 111/*************************************************************/
@@ -116,56 +116,56 @@ reset_fifo(struct IsdnCardState *cs, u_char fifo)
116static int 116static int
117write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u_char fifo, int trans_max) 117write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u_char fifo, int trans_max)
118{ 118{
119 unsigned short *msp; 119 unsigned short *msp;
120 int fifo_size, count, z1, z2; 120 int fifo_size, count, z1, z2;
121 u_char f_msk, f1, f2, *src; 121 u_char f_msk, f1, f2, *src;
122 122
123 if (skb->len <= 0) return(0); 123 if (skb->len <= 0) return (0);
124 if (fifo & 1) return(0); /* no write fifo */ 124 if (fifo & 1) return (0); /* no write fifo */
125 125
126 fifo_select(cs, fifo); 126 fifo_select(cs, fifo);
127 if (fifo & 4) { 127 if (fifo & 4) {
128 fifo_size = D_FIFO_SIZE; /* D-channel */ 128 fifo_size = D_FIFO_SIZE; /* D-channel */
129 f_msk = MAX_D_FRAMES; 129 f_msk = MAX_D_FRAMES;
130 if (trans_max) return(0); /* only HDLC */ 130 if (trans_max) return (0); /* only HDLC */
131 } 131 }
132 else { 132 else {
133 fifo_size = cs->hw.hfcsx.b_fifo_size; /* B-channel */ 133 fifo_size = cs->hw.hfcsx.b_fifo_size; /* B-channel */
134 f_msk = MAX_B_FRAMES; 134 f_msk = MAX_B_FRAMES;
135 } 135 }
136 136
137 z1 = Read_hfc(cs, HFCSX_FIF_Z1H); 137 z1 = Read_hfc(cs, HFCSX_FIF_Z1H);
138 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L)); 138 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L));
139 139
140 /* Check for transparent mode */ 140 /* Check for transparent mode */
141 if (trans_max) { 141 if (trans_max) {
142 z2 = Read_hfc(cs, HFCSX_FIF_Z2H); 142 z2 = Read_hfc(cs, HFCSX_FIF_Z2H);
143 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L)); 143 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L));
144 count = z2 - z1; 144 count = z2 - z1;
145 if (count <= 0) 145 if (count <= 0)
146 count += fifo_size; /* free bytes */ 146 count += fifo_size; /* free bytes */
147 if (count < skb->len+1) return(0); /* no room */ 147 if (count < skb->len + 1) return (0); /* no room */
148 count = fifo_size - count; /* bytes still not send */ 148 count = fifo_size - count; /* bytes still not send */
149 if (count > 2 * trans_max) return(0); /* delay to long */ 149 if (count > 2 * trans_max) return (0); /* delay to long */
150 count = skb->len; 150 count = skb->len;
151 src = skb->data; 151 src = skb->data;
152 while (count--) 152 while (count--)
153 Write_hfc(cs, HFCSX_FIF_DWR, *src++); 153 Write_hfc(cs, HFCSX_FIF_DWR, *src++);
154 return(1); /* success */ 154 return (1); /* success */
155 } 155 }
156 156
157 msp = ((struct hfcsx_extra *)(cs->hw.hfcsx.extra))->marker; 157 msp = ((struct hfcsx_extra *)(cs->hw.hfcsx.extra))->marker;
158 msp += (((fifo >> 1) & 3) * (MAX_B_FRAMES+1)); 158 msp += (((fifo >> 1) & 3) * (MAX_B_FRAMES + 1));
159 f1 = Read_hfc(cs, HFCSX_FIF_F1) & f_msk; 159 f1 = Read_hfc(cs, HFCSX_FIF_F1) & f_msk;
160 f2 = Read_hfc(cs, HFCSX_FIF_F2) & f_msk; 160 f2 = Read_hfc(cs, HFCSX_FIF_F2) & f_msk;
161 161
162 count = f1 - f2; /* frame count actually buffered */ 162 count = f1 - f2; /* frame count actually buffered */
163 if (count < 0) 163 if (count < 0)
164 count += (f_msk + 1); /* if wrap around */ 164 count += (f_msk + 1); /* if wrap around */
165 if (count > f_msk-1) { 165 if (count > f_msk - 1) {
166 if (cs->debug & L1_DEB_ISAC_FIFO) 166 if (cs->debug & L1_DEB_ISAC_FIFO)
167 debugl1(cs, "hfcsx_write_fifo %d more as %d frames",fifo,f_msk-1); 167 debugl1(cs, "hfcsx_write_fifo %d more as %d frames", fifo, f_msk - 1);
168 return(0); 168 return (0);
169 } 169 }
170 170
171 *(msp + f1) = z1; /* remember marker */ 171 *(msp + f1) = z1; /* remember marker */
@@ -176,134 +176,134 @@ write_fifo(struct IsdnCardState *cs, struct sk_buff *skb, u_char fifo, int trans
176 /* now determine free bytes in FIFO buffer */ 176 /* now determine free bytes in FIFO buffer */
177 count = *(msp + f2) - z1; 177 count = *(msp + f2) - z1;
178 if (count <= 0) 178 if (count <= 0)
179 count += fifo_size; /* count now contains available bytes */ 179 count += fifo_size; /* count now contains available bytes */
180 180
181 if (cs->debug & L1_DEB_ISAC_FIFO) 181 if (cs->debug & L1_DEB_ISAC_FIFO)
182 debugl1(cs, "hfcsx_write_fifo %d count(%u/%d)", 182 debugl1(cs, "hfcsx_write_fifo %d count(%u/%d)",
183 fifo, skb->len, count); 183 fifo, skb->len, count);
184 if (count < skb->len) { 184 if (count < skb->len) {
185 if (cs->debug & L1_DEB_ISAC_FIFO) 185 if (cs->debug & L1_DEB_ISAC_FIFO)
186 debugl1(cs, "hfcsx_write_fifo %d no fifo mem", fifo); 186 debugl1(cs, "hfcsx_write_fifo %d no fifo mem", fifo);
187 return(0); 187 return (0);
188 } 188 }
189 189
190 count = skb->len; /* get frame len */ 190 count = skb->len; /* get frame len */
191 src = skb->data; /* source pointer */ 191 src = skb->data; /* source pointer */
192 while (count--) 192 while (count--)
193 Write_hfc(cs, HFCSX_FIF_DWR, *src++); 193 Write_hfc(cs, HFCSX_FIF_DWR, *src++);
194 194
195 Read_hfc(cs, HFCSX_FIF_INCF1); /* increment F1 */ 195 Read_hfc(cs, HFCSX_FIF_INCF1); /* increment F1 */
196 udelay(1); 196 udelay(1);
197 while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */ 197 while (bytein(cs->hw.hfcsx.base + 1) & 1); /* wait for busy */
198 return(1); 198 return (1);
199} 199}
200 200
201/***************************************************************/ 201/***************************************************************/
202/* read_fifo reads data to an skb from the desired fifo */ 202/* read_fifo reads data to an skb from the desired fifo */
203/* if no data is available or an error occurs NULL is returned */ 203/* if no data is available or an error occurs NULL is returned */
204/* the skb is not released in any way. */ 204/* the skb is not released in any way. */
205/***************************************************************/ 205/***************************************************************/
206static struct sk_buff * 206static struct sk_buff *
207read_fifo(struct IsdnCardState *cs, u_char fifo, int trans_max) 207read_fifo(struct IsdnCardState *cs, u_char fifo, int trans_max)
208{ int fifo_size, count, z1, z2; 208{ int fifo_size, count, z1, z2;
209 u_char f_msk, f1, f2, *dst; 209 u_char f_msk, f1, f2, *dst;
210 struct sk_buff *skb; 210 struct sk_buff *skb;
211 211
212 if (!(fifo & 1)) return(NULL); /* no read fifo */ 212 if (!(fifo & 1)) return (NULL); /* no read fifo */
213 fifo_select(cs, fifo); 213 fifo_select(cs, fifo);
214 if (fifo & 4) { 214 if (fifo & 4) {
215 fifo_size = D_FIFO_SIZE; /* D-channel */ 215 fifo_size = D_FIFO_SIZE; /* D-channel */
216 f_msk = MAX_D_FRAMES; 216 f_msk = MAX_D_FRAMES;
217 if (trans_max) return(NULL); /* only hdlc */ 217 if (trans_max) return (NULL); /* only hdlc */
218 } 218 }
219 else { 219 else {
220 fifo_size = cs->hw.hfcsx.b_fifo_size; /* B-channel */ 220 fifo_size = cs->hw.hfcsx.b_fifo_size; /* B-channel */
221 f_msk = MAX_B_FRAMES; 221 f_msk = MAX_B_FRAMES;
222 } 222 }
223 223
224 /* transparent mode */ 224 /* transparent mode */
225 if (trans_max) { 225 if (trans_max) {
226 z1 = Read_hfc(cs, HFCSX_FIF_Z1H); 226 z1 = Read_hfc(cs, HFCSX_FIF_Z1H);
227 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L)); 227 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L));
228 z2 = Read_hfc(cs, HFCSX_FIF_Z2H); 228 z2 = Read_hfc(cs, HFCSX_FIF_Z2H);
229 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L)); 229 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L));
230 /* now determine bytes in actual FIFO buffer */ 230 /* now determine bytes in actual FIFO buffer */
231 count = z1 - z2; 231 count = z1 - z2;
232 if (count <= 0) 232 if (count <= 0)
233 count += fifo_size; /* count now contains buffered bytes */ 233 count += fifo_size; /* count now contains buffered bytes */
234 count++; 234 count++;
235 if (count > trans_max) 235 if (count > trans_max)
236 count = trans_max; /* limit length */ 236 count = trans_max; /* limit length */
237 skb = dev_alloc_skb(count); 237 skb = dev_alloc_skb(count);
238 if (skb) { 238 if (skb) {
239 dst = skb_put(skb, count); 239 dst = skb_put(skb, count);
240 while (count--) 240 while (count--)
241 *dst++ = Read_hfc(cs, HFCSX_FIF_DRD); 241 *dst++ = Read_hfc(cs, HFCSX_FIF_DRD);
242 return skb; 242 return skb;
243 } else 243 } else
244 return NULL; /* no memory */ 244 return NULL; /* no memory */
245 } 245 }
246 246
247 do { 247 do {
248 f1 = Read_hfc(cs, HFCSX_FIF_F1) & f_msk; 248 f1 = Read_hfc(cs, HFCSX_FIF_F1) & f_msk;
249 f2 = Read_hfc(cs, HFCSX_FIF_F2) & f_msk; 249 f2 = Read_hfc(cs, HFCSX_FIF_F2) & f_msk;
250 250
251 if (f1 == f2) return(NULL); /* no frame available */ 251 if (f1 == f2) return (NULL); /* no frame available */
252 252
253 z1 = Read_hfc(cs, HFCSX_FIF_Z1H); 253 z1 = Read_hfc(cs, HFCSX_FIF_Z1H);
254 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L)); 254 z1 = ((z1 << 8) | Read_hfc(cs, HFCSX_FIF_Z1L));
255 z2 = Read_hfc(cs, HFCSX_FIF_Z2H); 255 z2 = Read_hfc(cs, HFCSX_FIF_Z2H);
256 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L)); 256 z2 = ((z2 << 8) | Read_hfc(cs, HFCSX_FIF_Z2L));
257 257
258 if (cs->debug & L1_DEB_ISAC_FIFO)
259 debugl1(cs, "hfcsx_read_fifo %d f1(%x) f2(%x) z1(f2)(%x) z2(f2)(%x)",
260 fifo, f1, f2, z1, z2);
261 /* now determine bytes in actual FIFO buffer */
262 count = z1 - z2;
263 if (count <= 0)
264 count += fifo_size; /* count now contains buffered bytes */
265 count++;
266
267 if (cs->debug & L1_DEB_ISAC_FIFO)
268 debugl1(cs, "hfcsx_read_fifo %d count %u)",
269 fifo, count);
270
271 if ((count > fifo_size) || (count < 4)) {
272 if (cs->debug & L1_DEB_WARN)
273 debugl1(cs, "hfcsx_read_fifo %d paket inv. len %d ", fifo , count);
274 while (count) {
275 count--; /* empty fifo */
276 Read_hfc(cs, HFCSX_FIF_DRD);
277 }
278 skb = NULL;
279 } else
280 if ((skb = dev_alloc_skb(count - 3))) {
281 count -= 3;
282 dst = skb_put(skb, count);
283
284 while (count--)
285 *dst++ = Read_hfc(cs, HFCSX_FIF_DRD);
286
287 Read_hfc(cs, HFCSX_FIF_DRD); /* CRC 1 */
288 Read_hfc(cs, HFCSX_FIF_DRD); /* CRC 2 */
289 if (Read_hfc(cs, HFCSX_FIF_DRD)) {
290 dev_kfree_skb_irq(skb);
291 if (cs->debug & L1_DEB_ISAC_FIFO) 258 if (cs->debug & L1_DEB_ISAC_FIFO)
292 debugl1(cs, "hfcsx_read_fifo %d crc error", fifo); 259 debugl1(cs, "hfcsx_read_fifo %d f1(%x) f2(%x) z1(f2)(%x) z2(f2)(%x)",
293 skb = NULL; 260 fifo, f1, f2, z1, z2);
294 } 261 /* now determine bytes in actual FIFO buffer */
295 } else { 262 count = z1 - z2;
296 printk(KERN_WARNING "HFC-SX: receive out of memory\n"); 263 if (count <= 0)
297 return(NULL); 264 count += fifo_size; /* count now contains buffered bytes */
298 } 265 count++;
299 266
300 Read_hfc(cs, HFCSX_FIF_INCF2); /* increment F2 */ 267 if (cs->debug & L1_DEB_ISAC_FIFO)
301 udelay(1); 268 debugl1(cs, "hfcsx_read_fifo %d count %u)",
302 while (bytein(cs->hw.hfcsx.base+1) & 1); /* wait for busy */ 269 fifo, count);
303 udelay(1); 270
271 if ((count > fifo_size) || (count < 4)) {
272 if (cs->debug & L1_DEB_WARN)
273 debugl1(cs, "hfcsx_read_fifo %d paket inv. len %d ", fifo , count);
274 while (count) {
275 count--; /* empty fifo */
276 Read_hfc(cs, HFCSX_FIF_DRD);
277 }
278 skb = NULL;
279 } else
280 if ((skb = dev_alloc_skb(count - 3))) {
281 count -= 3;
282 dst = skb_put(skb, count);
283
284 while (count--)
285 *dst++ = Read_hfc(cs, HFCSX_FIF_DRD);
286
287 Read_hfc(cs, HFCSX_FIF_DRD); /* CRC 1 */
288 Read_hfc(cs, HFCSX_FIF_DRD); /* CRC 2 */
289 if (Read_hfc(cs, HFCSX_FIF_DRD)) {
290 dev_kfree_skb_irq(skb);
291 if (cs->debug & L1_DEB_ISAC_FIFO)
292 debugl1(cs, "hfcsx_read_fifo %d crc error", fifo);
293 skb = NULL;
294 }
295 } else {
296 printk(KERN_WARNING "HFC-SX: receive out of memory\n");
297 return (NULL);
298 }
299
300 Read_hfc(cs, HFCSX_FIF_INCF2); /* increment F2 */
301 udelay(1);
302 while (bytein(cs->hw.hfcsx.base + 1) & 1); /* wait for busy */
303 udelay(1);
304 } while (!skb); /* retry in case of crc error */ 304 } while (!skb); /* retry in case of crc error */
305 return(skb); 305 return (skb);
306} 306}
307 307
308/******************************************/ 308/******************************************/
309/* free hardware resources used by driver */ 309/* free hardware resources used by driver */
@@ -328,17 +328,17 @@ release_io_hfcsx(struct IsdnCardState *cs)
328/**********************************************************/ 328/**********************************************************/
329static int set_fifo_size(struct IsdnCardState *cs) 329static int set_fifo_size(struct IsdnCardState *cs)
330{ 330{
331 331
332 if (cs->hw.hfcsx.b_fifo_size) return(1); /* already determined */ 332 if (cs->hw.hfcsx.b_fifo_size) return (1); /* already determined */
333 333
334 if ((cs->hw.hfcsx.chip >> 4) == 9) { 334 if ((cs->hw.hfcsx.chip >> 4) == 9) {
335 cs->hw.hfcsx.b_fifo_size = B_FIFO_SIZE_32K; 335 cs->hw.hfcsx.b_fifo_size = B_FIFO_SIZE_32K;
336 return(1); 336 return (1);
337 } 337 }
338 338
339 cs->hw.hfcsx.b_fifo_size = B_FIFO_SIZE_8K; 339 cs->hw.hfcsx.b_fifo_size = B_FIFO_SIZE_8K;
340 cs->hw.hfcsx.cirm |= 0x10; /* only 8K of ram */ 340 cs->hw.hfcsx.cirm |= 0x10; /* only 8K of ram */
341 return(0); 341 return (0);
342 342
343} 343}
344 344
@@ -354,15 +354,15 @@ reset_hfcsx(struct IsdnCardState *cs)
354 354
355 printk(KERN_INFO "HFC_SX: resetting card\n"); 355 printk(KERN_INFO "HFC_SX: resetting card\n");
356 while (1) { 356 while (1) {
357 Write_hfc(cs, HFCSX_CIRM, HFCSX_RESET | cs->hw.hfcsx.cirm ); /* Reset */ 357 Write_hfc(cs, HFCSX_CIRM, HFCSX_RESET | cs->hw.hfcsx.cirm); /* Reset */
358 mdelay(30); 358 mdelay(30);
359 Write_hfc(cs, HFCSX_CIRM, cs->hw.hfcsx.cirm); /* Reset Off */ 359 Write_hfc(cs, HFCSX_CIRM, cs->hw.hfcsx.cirm); /* Reset Off */
360 mdelay(20); 360 mdelay(20);
361 if (Read_hfc(cs, HFCSX_STATUS) & 2) 361 if (Read_hfc(cs, HFCSX_STATUS) & 2)
362 printk(KERN_WARNING "HFC-SX init bit busy\n"); 362 printk(KERN_WARNING "HFC-SX init bit busy\n");
363 cs->hw.hfcsx.last_fifo = 0xff; /* invalidate */ 363 cs->hw.hfcsx.last_fifo = 0xff; /* invalidate */
364 if (!set_fifo_size(cs)) continue; 364 if (!set_fifo_size(cs)) continue;
365 break; 365 break;
366 } 366 }
367 367
368 cs->hw.hfcsx.trm = 0 + HFCSX_BTRANS_THRESMASK; /* no echo connect , threshold */ 368 cs->hw.hfcsx.trm = 0 + HFCSX_BTRANS_THRESMASK; /* no echo connect , threshold */
@@ -376,8 +376,8 @@ reset_hfcsx(struct IsdnCardState *cs)
376 cs->hw.hfcsx.ctmt = HFCSX_TIM3_125 | HFCSX_AUTO_TIMER; 376 cs->hw.hfcsx.ctmt = HFCSX_TIM3_125 | HFCSX_AUTO_TIMER;
377 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt); 377 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt);
378 378
379 cs->hw.hfcsx.int_m1 = HFCSX_INTS_DTRANS | HFCSX_INTS_DREC | 379 cs->hw.hfcsx.int_m1 = HFCSX_INTS_DTRANS | HFCSX_INTS_DREC |
380 HFCSX_INTS_L1STATE | HFCSX_INTS_TIMER; 380 HFCSX_INTS_L1STATE | HFCSX_INTS_TIMER;
381 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1); 381 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
382 382
383 /* Clear already pending ints */ 383 /* Clear already pending ints */
@@ -423,8 +423,8 @@ hfcsx_Timer(struct IsdnCardState *cs)
423 cs->hw.hfcsx.timer.expires = jiffies + 75; 423 cs->hw.hfcsx.timer.expires = jiffies + 75;
424 /* WD RESET */ 424 /* WD RESET */
425/* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcsx.ctmt | 0x80); 425/* WriteReg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcsx.ctmt | 0x80);
426 add_timer(&cs->hw.hfcsx.timer); 426 add_timer(&cs->hw.hfcsx.timer);
427 */ 427*/
428} 428}
429 429
430/************************************************/ 430/************************************************/
@@ -458,11 +458,11 @@ receive_dmsg(struct IsdnCardState *cs)
458 } 458 }
459 459
460 do { 460 do {
461 skb = read_fifo(cs, HFCSX_SEL_D_RX, 0); 461 skb = read_fifo(cs, HFCSX_SEL_D_RX, 0);
462 if (skb) { 462 if (skb) {
463 skb_queue_tail(&cs->rq, skb); 463 skb_queue_tail(&cs->rq, skb);
464 schedule_event(cs, D_RCVBUFREADY); 464 schedule_event(cs, D_RCVBUFREADY);
465 } 465 }
466 } while (--count && skb); 466 } while (--count && skb);
467 467
468 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 468 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
@@ -479,20 +479,20 @@ main_rec_hfcsx(struct BCState *bcs)
479 int count = 5; 479 int count = 5;
480 struct sk_buff *skb; 480 struct sk_buff *skb;
481 481
482 Begin: 482Begin:
483 count--; 483 count--;
484 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 484 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
485 debugl1(cs, "rec_data %d blocked", bcs->channel); 485 debugl1(cs, "rec_data %d blocked", bcs->channel);
486 return; 486 return;
487 } 487 }
488 skb = read_fifo(cs, ((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ? 488 skb = read_fifo(cs, ((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ?
489 HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX, 489 HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX,
490 (bcs->mode == L1_MODE_TRANS) ? 490 (bcs->mode == L1_MODE_TRANS) ?
491 HFCSX_BTRANS_THRESHOLD : 0); 491 HFCSX_BTRANS_THRESHOLD : 0);
492 492
493 if (skb) { 493 if (skb) {
494 skb_queue_tail(&bcs->rqueue, skb); 494 skb_queue_tail(&bcs->rqueue, skb);
495 schedule_event(bcs, B_RCVBUFREADY); 495 schedule_event(bcs, B_RCVBUFREADY);
496 } 496 }
497 497
498 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 498 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
@@ -513,8 +513,8 @@ hfcsx_fill_dfifo(struct IsdnCardState *cs)
513 return; 513 return;
514 514
515 if (write_fifo(cs, cs->tx_skb, HFCSX_SEL_D_TX, 0)) { 515 if (write_fifo(cs, cs->tx_skb, HFCSX_SEL_D_TX, 0)) {
516 dev_kfree_skb_any(cs->tx_skb); 516 dev_kfree_skb_any(cs->tx_skb);
517 cs->tx_skb = NULL; 517 cs->tx_skb = NULL;
518 } 518 }
519 return; 519 return;
520} 520}
@@ -532,24 +532,24 @@ hfcsx_fill_fifo(struct BCState *bcs)
532 if (bcs->tx_skb->len <= 0) 532 if (bcs->tx_skb->len <= 0)
533 return; 533 return;
534 534
535 if (write_fifo(cs, bcs->tx_skb, 535 if (write_fifo(cs, bcs->tx_skb,
536 ((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ? 536 ((bcs->channel) && (!cs->hw.hfcsx.bswapped)) ?
537 HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX, 537 HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX,
538 (bcs->mode == L1_MODE_TRANS) ? 538 (bcs->mode == L1_MODE_TRANS) ?
539 HFCSX_BTRANS_THRESHOLD : 0)) { 539 HFCSX_BTRANS_THRESHOLD : 0)) {
540 540
541 bcs->tx_cnt -= bcs->tx_skb->len; 541 bcs->tx_cnt -= bcs->tx_skb->len;
542 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 542 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
543 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 543 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
544 u_long flags; 544 u_long flags;
545 spin_lock_irqsave(&bcs->aclock, flags); 545 spin_lock_irqsave(&bcs->aclock, flags);
546 bcs->ackcnt += bcs->tx_skb->len; 546 bcs->ackcnt += bcs->tx_skb->len;
547 spin_unlock_irqrestore(&bcs->aclock, flags); 547 spin_unlock_irqrestore(&bcs->aclock, flags);
548 schedule_event(bcs, B_ACKPENDING); 548 schedule_event(bcs, B_ACKPENDING);
549 } 549 }
550 dev_kfree_skb_any(bcs->tx_skb); 550 dev_kfree_skb_any(bcs->tx_skb);
551 bcs->tx_skb = NULL; 551 bcs->tx_skb = NULL;
552 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 552 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
553 } 553 }
554} 554}
555 555
@@ -562,27 +562,27 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
562 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; 562 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
563 563
564 switch (pr) { 564 switch (pr) {
565 case (PH_DATA | REQUEST): 565 case (PH_DATA | REQUEST):
566 case (PH_PULL | REQUEST): 566 case (PH_PULL | REQUEST):
567 case (PH_PULL | INDICATION): 567 case (PH_PULL | INDICATION):
568 st->l1.l1hw(st, pr, arg); 568 st->l1.l1hw(st, pr, arg);
569 break; 569 break;
570 case (PH_ACTIVATE | REQUEST): 570 case (PH_ACTIVATE | REQUEST):
571 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); 571 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
572 break; 572 break;
573 case (PH_TESTLOOP | REQUEST): 573 case (PH_TESTLOOP | REQUEST):
574 if (1 & (long) arg) 574 if (1 & (long) arg)
575 debugl1(cs, "PH_TEST_LOOP B1"); 575 debugl1(cs, "PH_TEST_LOOP B1");
576 if (2 & (long) arg) 576 if (2 & (long) arg)
577 debugl1(cs, "PH_TEST_LOOP B2"); 577 debugl1(cs, "PH_TEST_LOOP B2");
578 if (!(3 & (long) arg)) 578 if (!(3 & (long) arg))
579 debugl1(cs, "PH_TEST_LOOP DISABLED"); 579 debugl1(cs, "PH_TEST_LOOP DISABLED");
580 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); 580 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
581 break; 581 break;
582 default: 582 default:
583 if (cs->debug) 583 if (cs->debug)
584 debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr); 584 debugl1(cs, "dch_nt_l2l1 msg %04X unhandled", pr);
585 break; 585 break;
586 } 586 }
587} 587}
588 588
@@ -592,14 +592,14 @@ dch_nt_l2l1(struct PStack *st, int pr, void *arg)
592/* set/reset echo mode */ 592/* set/reset echo mode */
593/***********************/ 593/***********************/
594static int 594static int
595hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl * ic) 595hfcsx_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic)
596{ 596{
597 unsigned long flags; 597 unsigned long flags;
598 int i = *(unsigned int *) ic->parm.num; 598 int i = *(unsigned int *) ic->parm.num;
599 599
600 if ((ic->arg == 98) && 600 if ((ic->arg == 98) &&
601 (!(cs->hw.hfcsx.int_m1 & (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC + HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC)))) { 601 (!(cs->hw.hfcsx.int_m1 & (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC + HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC)))) {
602 spin_lock_irqsave(&cs->lock, flags); 602 spin_lock_irqsave(&cs->lock, flags);
603 Write_hfc(cs, HFCSX_STATES, HFCSX_LOAD_STATE | 0); /* HFC ST G0 */ 603 Write_hfc(cs, HFCSX_STATES, HFCSX_LOAD_STATE | 0); /* HFC ST G0 */
604 udelay(10); 604 udelay(10);
605 cs->hw.hfcsx.sctrl |= SCTRL_MODE_NT; 605 cs->hw.hfcsx.sctrl |= SCTRL_MODE_NT;
@@ -660,26 +660,26 @@ receive_emsg(struct IsdnCardState *cs)
660 return; 660 return;
661 } 661 }
662 do { 662 do {
663 skb = read_fifo(cs, HFCSX_SEL_B2_RX, 0); 663 skb = read_fifo(cs, HFCSX_SEL_B2_RX, 0);
664 if (skb) { 664 if (skb) {
665 if (cs->debug & DEB_DLOG_HEX) { 665 if (cs->debug & DEB_DLOG_HEX) {
666 ptr = cs->dlog; 666 ptr = cs->dlog;
667 if ((skb->len) < MAX_DLOG_SPACE / 3 - 10) { 667 if ((skb->len) < MAX_DLOG_SPACE / 3 - 10) {
668 *ptr++ = 'E'; 668 *ptr++ = 'E';
669 *ptr++ = 'C'; 669 *ptr++ = 'C';
670 *ptr++ = 'H'; 670 *ptr++ = 'H';
671 *ptr++ = 'O'; 671 *ptr++ = 'O';
672 *ptr++ = ':'; 672 *ptr++ = ':';
673 ptr += QuickHex(ptr, skb->data, skb->len); 673 ptr += QuickHex(ptr, skb->data, skb->len);
674 ptr--; 674 ptr--;
675 *ptr++ = '\n'; 675 *ptr++ = '\n';
676 *ptr = 0; 676 *ptr = 0;
677 HiSax_putstatus(cs, NULL, cs->dlog); 677 HiSax_putstatus(cs, NULL, cs->dlog);
678 } else 678 } else
679 HiSax_putstatus(cs, "LogEcho: ", "warning Frame too big (%d)", skb->len); 679 HiSax_putstatus(cs, "LogEcho: ", "warning Frame too big (%d)", skb->len);
680 } 680 }
681 dev_kfree_skb_any(skb); 681 dev_kfree_skb_any(skb);
682 } 682 }
683 } while (--count && skb); 683 } while (--count && skb);
684 684
685 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 685 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
@@ -843,7 +843,7 @@ hfcsx_interrupt(int intno, void *dev_id)
843 } else 843 } else
844 schedule_event(cs, D_XMTBUFREADY); 844 schedule_event(cs, D_XMTBUFREADY);
845 } 845 }
846 afterXPR: 846 afterXPR:
847 if (cs->hw.hfcsx.int_s1 && count--) { 847 if (cs->hw.hfcsx.int_s1 && count--) {
848 val = cs->hw.hfcsx.int_s1; 848 val = cs->hw.hfcsx.int_s1;
849 cs->hw.hfcsx.int_s1 = 0; 849 cs->hw.hfcsx.int_s1 = 0;
@@ -875,128 +875,128 @@ HFCSX_l1hw(struct PStack *st, int pr, void *arg)
875 u_long flags; 875 u_long flags;
876 876
877 switch (pr) { 877 switch (pr) {
878 case (PH_DATA | REQUEST): 878 case (PH_DATA | REQUEST):
879 if (cs->debug & DEB_DLOG_HEX) 879 if (cs->debug & DEB_DLOG_HEX)
880 LogFrame(cs, skb->data, skb->len); 880 LogFrame(cs, skb->data, skb->len);
881 if (cs->debug & DEB_DLOG_VERBOSE) 881 if (cs->debug & DEB_DLOG_VERBOSE)
882 dlogframe(cs, skb, 0); 882 dlogframe(cs, skb, 0);
883 spin_lock_irqsave(&cs->lock, flags); 883 spin_lock_irqsave(&cs->lock, flags);
884 if (cs->tx_skb) { 884 if (cs->tx_skb) {
885 skb_queue_tail(&cs->sq, skb); 885 skb_queue_tail(&cs->sq, skb);
886#ifdef L2FRAME_DEBUG /* psa */
887 if (cs->debug & L1_DEB_LAPD)
888 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
889#endif
890 } else {
891 cs->tx_skb = skb;
892 cs->tx_cnt = 0;
893#ifdef L2FRAME_DEBUG /* psa */ 886#ifdef L2FRAME_DEBUG /* psa */
894 if (cs->debug & L1_DEB_LAPD) 887 if (cs->debug & L1_DEB_LAPD)
895 Logl2Frame(cs, skb, "PH_DATA", 0); 888 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
896#endif 889#endif
897 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 890 } else {
898 hfcsx_fill_dfifo(cs);
899 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
900 } else
901 debugl1(cs, "hfcsx_fill_dfifo blocked");
902
903 }
904 spin_unlock_irqrestore(&cs->lock, flags);
905 break;
906 case (PH_PULL | INDICATION):
907 spin_lock_irqsave(&cs->lock, flags);
908 if (cs->tx_skb) {
909 if (cs->debug & L1_DEB_WARN)
910 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
911 skb_queue_tail(&cs->sq, skb);
912 spin_unlock_irqrestore(&cs->lock, flags);
913 break;
914 }
915 if (cs->debug & DEB_DLOG_HEX)
916 LogFrame(cs, skb->data, skb->len);
917 if (cs->debug & DEB_DLOG_VERBOSE)
918 dlogframe(cs, skb, 0);
919 cs->tx_skb = skb; 891 cs->tx_skb = skb;
920 cs->tx_cnt = 0; 892 cs->tx_cnt = 0;
921#ifdef L2FRAME_DEBUG /* psa */ 893#ifdef L2FRAME_DEBUG /* psa */
922 if (cs->debug & L1_DEB_LAPD) 894 if (cs->debug & L1_DEB_LAPD)
923 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 895 Logl2Frame(cs, skb, "PH_DATA", 0);
924#endif 896#endif
925 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 897 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
926 hfcsx_fill_dfifo(cs); 898 hfcsx_fill_dfifo(cs);
927 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 899 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
928 } else 900 } else
929 debugl1(cs, "hfcsx_fill_dfifo blocked"); 901 debugl1(cs, "hfcsx_fill_dfifo blocked");
902
903 }
904 spin_unlock_irqrestore(&cs->lock, flags);
905 break;
906 case (PH_PULL | INDICATION):
907 spin_lock_irqsave(&cs->lock, flags);
908 if (cs->tx_skb) {
909 if (cs->debug & L1_DEB_WARN)
910 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
911 skb_queue_tail(&cs->sq, skb);
930 spin_unlock_irqrestore(&cs->lock, flags); 912 spin_unlock_irqrestore(&cs->lock, flags);
931 break; 913 break;
932 case (PH_PULL | REQUEST): 914 }
915 if (cs->debug & DEB_DLOG_HEX)
916 LogFrame(cs, skb->data, skb->len);
917 if (cs->debug & DEB_DLOG_VERBOSE)
918 dlogframe(cs, skb, 0);
919 cs->tx_skb = skb;
920 cs->tx_cnt = 0;
933#ifdef L2FRAME_DEBUG /* psa */ 921#ifdef L2FRAME_DEBUG /* psa */
934 if (cs->debug & L1_DEB_LAPD) 922 if (cs->debug & L1_DEB_LAPD)
935 debugl1(cs, "-> PH_REQUEST_PULL"); 923 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
936#endif 924#endif
937 if (!cs->tx_skb) { 925 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
938 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 926 hfcsx_fill_dfifo(cs);
939 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 927 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
940 } else 928 } else
941 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 929 debugl1(cs, "hfcsx_fill_dfifo blocked");
942 break; 930 spin_unlock_irqrestore(&cs->lock, flags);
943 case (HW_RESET | REQUEST): 931 break;
944 spin_lock_irqsave(&cs->lock, flags); 932 case (PH_PULL | REQUEST):
945 Write_hfc(cs, HFCSX_STATES, HFCSX_LOAD_STATE | 3); /* HFC ST 3 */ 933#ifdef L2FRAME_DEBUG /* psa */
946 udelay(6); 934 if (cs->debug & L1_DEB_LAPD)
947 Write_hfc(cs, HFCSX_STATES, 3); /* HFC ST 2 */ 935 debugl1(cs, "-> PH_REQUEST_PULL");
948 cs->hw.hfcsx.mst_m |= HFCSX_MASTER; 936#endif
949 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m); 937 if (!cs->tx_skb) {
950 Write_hfc(cs, HFCSX_STATES, HFCSX_ACTIVATE | HFCSX_DO_ACTION); 938 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
951 spin_unlock_irqrestore(&cs->lock, flags); 939 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
952 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 940 } else
953 break; 941 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
954 case (HW_ENABLE | REQUEST): 942 break;
955 spin_lock_irqsave(&cs->lock, flags); 943 case (HW_RESET | REQUEST):
956 Write_hfc(cs, HFCSX_STATES, HFCSX_ACTIVATE | HFCSX_DO_ACTION); 944 spin_lock_irqsave(&cs->lock, flags);
957 spin_unlock_irqrestore(&cs->lock, flags); 945 Write_hfc(cs, HFCSX_STATES, HFCSX_LOAD_STATE | 3); /* HFC ST 3 */
958 break; 946 udelay(6);
959 case (HW_DEACTIVATE | REQUEST): 947 Write_hfc(cs, HFCSX_STATES, 3); /* HFC ST 2 */
960 spin_lock_irqsave(&cs->lock, flags); 948 cs->hw.hfcsx.mst_m |= HFCSX_MASTER;
961 cs->hw.hfcsx.mst_m &= ~HFCSX_MASTER; 949 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m);
962 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m); 950 Write_hfc(cs, HFCSX_STATES, HFCSX_ACTIVATE | HFCSX_DO_ACTION);
963 spin_unlock_irqrestore(&cs->lock, flags); 951 spin_unlock_irqrestore(&cs->lock, flags);
964 break; 952 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
965 case (HW_INFO3 | REQUEST): 953 break;
966 spin_lock_irqsave(&cs->lock, flags); 954 case (HW_ENABLE | REQUEST):
967 cs->hw.hfcsx.mst_m |= HFCSX_MASTER; 955 spin_lock_irqsave(&cs->lock, flags);
968 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m); 956 Write_hfc(cs, HFCSX_STATES, HFCSX_ACTIVATE | HFCSX_DO_ACTION);
969 spin_unlock_irqrestore(&cs->lock, flags); 957 spin_unlock_irqrestore(&cs->lock, flags);
958 break;
959 case (HW_DEACTIVATE | REQUEST):
960 spin_lock_irqsave(&cs->lock, flags);
961 cs->hw.hfcsx.mst_m &= ~HFCSX_MASTER;
962 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m);
963 spin_unlock_irqrestore(&cs->lock, flags);
964 break;
965 case (HW_INFO3 | REQUEST):
966 spin_lock_irqsave(&cs->lock, flags);
967 cs->hw.hfcsx.mst_m |= HFCSX_MASTER;
968 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m);
969 spin_unlock_irqrestore(&cs->lock, flags);
970 break;
971 case (HW_TESTLOOP | REQUEST):
972 spin_lock_irqsave(&cs->lock, flags);
973 switch ((long) arg) {
974 case (1):
975 Write_hfc(cs, HFCSX_B1_SSL, 0x80); /* tx slot */
976 Write_hfc(cs, HFCSX_B1_RSL, 0x80); /* rx slot */
977 cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~7) | 1;
978 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
970 break; 979 break;
971 case (HW_TESTLOOP | REQUEST): 980 case (2):
972 spin_lock_irqsave(&cs->lock, flags); 981 Write_hfc(cs, HFCSX_B2_SSL, 0x81); /* tx slot */
973 switch ((long) arg) { 982 Write_hfc(cs, HFCSX_B2_RSL, 0x81); /* rx slot */
974 case (1): 983 cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~0x38) | 0x08;
975 Write_hfc(cs, HFCSX_B1_SSL, 0x80); /* tx slot */ 984 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
976 Write_hfc(cs, HFCSX_B1_RSL, 0x80); /* rx slot */
977 cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~7) | 1;
978 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
979 break;
980 case (2):
981 Write_hfc(cs, HFCSX_B2_SSL, 0x81); /* tx slot */
982 Write_hfc(cs, HFCSX_B2_RSL, 0x81); /* rx slot */
983 cs->hw.hfcsx.conn = (cs->hw.hfcsx.conn & ~0x38) | 0x08;
984 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
985 break;
986 default:
987 spin_unlock_irqrestore(&cs->lock, flags);
988 if (cs->debug & L1_DEB_WARN)
989 debugl1(cs, "hfcsx_l1hw loop invalid %4lx", (unsigned long)arg);
990 return;
991 }
992 cs->hw.hfcsx.trm |= 0x80; /* enable IOM-loop */
993 Write_hfc(cs, HFCSX_TRM, cs->hw.hfcsx.trm);
994 spin_unlock_irqrestore(&cs->lock, flags);
995 break; 985 break;
996 default: 986 default:
987 spin_unlock_irqrestore(&cs->lock, flags);
997 if (cs->debug & L1_DEB_WARN) 988 if (cs->debug & L1_DEB_WARN)
998 debugl1(cs, "hfcsx_l1hw unknown pr %4x", pr); 989 debugl1(cs, "hfcsx_l1hw loop invalid %4lx", (unsigned long)arg);
999 break; 990 return;
991 }
992 cs->hw.hfcsx.trm |= 0x80; /* enable IOM-loop */
993 Write_hfc(cs, HFCSX_TRM, cs->hw.hfcsx.trm);
994 spin_unlock_irqrestore(&cs->lock, flags);
995 break;
996 default:
997 if (cs->debug & L1_DEB_WARN)
998 debugl1(cs, "hfcsx_l1hw unknown pr %4x", pr);
999 break;
1000 } 1000 }
1001} 1001}
1002 1002
@@ -1018,7 +1018,7 @@ hfcsx_send_data(struct BCState *bcs)
1018 struct IsdnCardState *cs = bcs->cs; 1018 struct IsdnCardState *cs = bcs->cs;
1019 1019
1020 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 1020 if (!test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
1021 hfcsx_fill_fifo(bcs); 1021 hfcsx_fill_fifo(bcs);
1022 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 1022 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
1023 } else 1023 } else
1024 debugl1(cs, "send_data %d blocked", bcs->channel); 1024 debugl1(cs, "send_data %d blocked", bcs->channel);
@@ -1058,69 +1058,69 @@ mode_hfcsx(struct BCState *bcs, int mode, int bc)
1058 } 1058 }
1059 } 1059 }
1060 switch (mode) { 1060 switch (mode) {
1061 case (L1_MODE_NULL): 1061 case (L1_MODE_NULL):
1062 if (bc) { 1062 if (bc) {
1063 cs->hw.hfcsx.sctrl &= ~SCTRL_B2_ENA; 1063 cs->hw.hfcsx.sctrl &= ~SCTRL_B2_ENA;
1064 cs->hw.hfcsx.sctrl_r &= ~SCTRL_B2_ENA; 1064 cs->hw.hfcsx.sctrl_r &= ~SCTRL_B2_ENA;
1065 } else { 1065 } else {
1066 cs->hw.hfcsx.sctrl &= ~SCTRL_B1_ENA; 1066 cs->hw.hfcsx.sctrl &= ~SCTRL_B1_ENA;
1067 cs->hw.hfcsx.sctrl_r &= ~SCTRL_B1_ENA; 1067 cs->hw.hfcsx.sctrl_r &= ~SCTRL_B1_ENA;
1068 } 1068 }
1069 if (fifo2) { 1069 if (fifo2) {
1070 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC); 1070 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC);
1071 } else { 1071 } else {
1072 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC); 1072 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC);
1073 } 1073 }
1074 break; 1074 break;
1075 case (L1_MODE_TRANS): 1075 case (L1_MODE_TRANS):
1076 if (bc) { 1076 if (bc) {
1077 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA; 1077 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA;
1078 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA; 1078 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA;
1079 } else { 1079 } else {
1080 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA; 1080 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA;
1081 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA; 1081 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA;
1082 } 1082 }
1083 if (fifo2) { 1083 if (fifo2) {
1084 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC); 1084 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC);
1085 cs->hw.hfcsx.ctmt |= 2; 1085 cs->hw.hfcsx.ctmt |= 2;
1086 cs->hw.hfcsx.conn &= ~0x18; 1086 cs->hw.hfcsx.conn &= ~0x18;
1087 } else { 1087 } else {
1088 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC); 1088 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC);
1089 cs->hw.hfcsx.ctmt |= 1; 1089 cs->hw.hfcsx.ctmt |= 1;
1090 cs->hw.hfcsx.conn &= ~0x03; 1090 cs->hw.hfcsx.conn &= ~0x03;
1091 } 1091 }
1092 break; 1092 break;
1093 case (L1_MODE_HDLC): 1093 case (L1_MODE_HDLC):
1094 if (bc) { 1094 if (bc) {
1095 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA; 1095 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA;
1096 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA; 1096 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA;
1097 } else { 1097 } else {
1098 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA; 1098 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA;
1099 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA; 1099 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA;
1100 } 1100 }
1101 if (fifo2) { 1101 if (fifo2) {
1102 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC); 1102 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC);
1103 cs->hw.hfcsx.ctmt &= ~2; 1103 cs->hw.hfcsx.ctmt &= ~2;
1104 cs->hw.hfcsx.conn &= ~0x18; 1104 cs->hw.hfcsx.conn &= ~0x18;
1105 } else { 1105 } else {
1106 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC); 1106 cs->hw.hfcsx.int_m1 |= (HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC);
1107 cs->hw.hfcsx.ctmt &= ~1; 1107 cs->hw.hfcsx.ctmt &= ~1;
1108 cs->hw.hfcsx.conn &= ~0x03; 1108 cs->hw.hfcsx.conn &= ~0x03;
1109 } 1109 }
1110 break; 1110 break;
1111 case (L1_MODE_EXTRN): 1111 case (L1_MODE_EXTRN):
1112 if (bc) { 1112 if (bc) {
1113 cs->hw.hfcsx.conn |= 0x10; 1113 cs->hw.hfcsx.conn |= 0x10;
1114 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA; 1114 cs->hw.hfcsx.sctrl |= SCTRL_B2_ENA;
1115 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA; 1115 cs->hw.hfcsx.sctrl_r |= SCTRL_B2_ENA;
1116 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC); 1116 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B2TRANS + HFCSX_INTS_B2REC);
1117 } else { 1117 } else {
1118 cs->hw.hfcsx.conn |= 0x02; 1118 cs->hw.hfcsx.conn |= 0x02;
1119 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA; 1119 cs->hw.hfcsx.sctrl |= SCTRL_B1_ENA;
1120 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA; 1120 cs->hw.hfcsx.sctrl_r |= SCTRL_B1_ENA;
1121 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC); 1121 cs->hw.hfcsx.int_m1 &= ~(HFCSX_INTS_B1TRANS + HFCSX_INTS_B1REC);
1122 } 1122 }
1123 break; 1123 break;
1124 } 1124 }
1125 Write_hfc(cs, HFCSX_SCTRL_E, cs->hw.hfcsx.sctrl_e); 1125 Write_hfc(cs, HFCSX_SCTRL_E, cs->hw.hfcsx.sctrl_e);
1126 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1); 1126 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
@@ -1129,8 +1129,8 @@ mode_hfcsx(struct BCState *bcs, int mode, int bc)
1129 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt); 1129 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt);
1130 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn); 1130 Write_hfc(cs, HFCSX_CONNECT, cs->hw.hfcsx.conn);
1131 if (mode != L1_MODE_EXTRN) { 1131 if (mode != L1_MODE_EXTRN) {
1132 reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX); 1132 reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_RX : HFCSX_SEL_B1_RX);
1133 reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX); 1133 reset_fifo(cs, fifo2 ? HFCSX_SEL_B2_TX : HFCSX_SEL_B1_TX);
1134 } 1134 }
1135} 1135}
1136 1136
@@ -1145,53 +1145,53 @@ hfcsx_l2l1(struct PStack *st, int pr, void *arg)
1145 u_long flags; 1145 u_long flags;
1146 1146
1147 switch (pr) { 1147 switch (pr) {
1148 case (PH_DATA | REQUEST): 1148 case (PH_DATA | REQUEST):
1149 spin_lock_irqsave(&bcs->cs->lock, flags); 1149 spin_lock_irqsave(&bcs->cs->lock, flags);
1150 if (bcs->tx_skb) { 1150 if (bcs->tx_skb) {
1151 skb_queue_tail(&bcs->squeue, skb); 1151 skb_queue_tail(&bcs->squeue, skb);
1152 } else { 1152 } else {
1153 bcs->tx_skb = skb; 1153 bcs->tx_skb = skb;
1154// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 1154// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1155 bcs->cs->BC_Send_Data(bcs); 1155 bcs->cs->BC_Send_Data(bcs);
1156 } 1156 }
1157 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1157 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1158 break; 1158 break;
1159 case (PH_PULL | INDICATION): 1159 case (PH_PULL | INDICATION):
1160 spin_lock_irqsave(&bcs->cs->lock, flags); 1160 spin_lock_irqsave(&bcs->cs->lock, flags);
1161 if (bcs->tx_skb) { 1161 if (bcs->tx_skb) {
1162 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n"); 1162 printk(KERN_WARNING "hfc_l2l1: this shouldn't happen\n");
1163 } else { 1163 } else {
1164// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 1164// test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1165 bcs->tx_skb = skb; 1165 bcs->tx_skb = skb;
1166 bcs->cs->BC_Send_Data(bcs); 1166 bcs->cs->BC_Send_Data(bcs);
1167 } 1167 }
1168 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1168 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1169 break; 1169 break;
1170 case (PH_PULL | REQUEST): 1170 case (PH_PULL | REQUEST):
1171 if (!bcs->tx_skb) { 1171 if (!bcs->tx_skb) {
1172 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1172 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1173 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 1173 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1174 } else 1174 } else
1175 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 1175 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1176 break; 1176 break;
1177 case (PH_ACTIVATE | REQUEST): 1177 case (PH_ACTIVATE | REQUEST):
1178 spin_lock_irqsave(&bcs->cs->lock, flags); 1178 spin_lock_irqsave(&bcs->cs->lock, flags);
1179 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 1179 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
1180 mode_hfcsx(bcs, st->l1.mode, st->l1.bc); 1180 mode_hfcsx(bcs, st->l1.mode, st->l1.bc);
1181 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1181 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1182 l1_msg_b(st, pr, arg); 1182 l1_msg_b(st, pr, arg);
1183 break; 1183 break;
1184 case (PH_DEACTIVATE | REQUEST): 1184 case (PH_DEACTIVATE | REQUEST):
1185 l1_msg_b(st, pr, arg); 1185 l1_msg_b(st, pr, arg);
1186 break; 1186 break;
1187 case (PH_DEACTIVATE | CONFIRM): 1187 case (PH_DEACTIVATE | CONFIRM):
1188 spin_lock_irqsave(&bcs->cs->lock, flags); 1188 spin_lock_irqsave(&bcs->cs->lock, flags);
1189 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 1189 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
1190 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 1190 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1191 mode_hfcsx(bcs, 0, st->l1.bc); 1191 mode_hfcsx(bcs, 0, st->l1.bc);
1192 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1192 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1193 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 1193 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1194 break; 1194 break;
1195 } 1195 }
1196} 1196}
1197 1197
@@ -1260,61 +1260,61 @@ hfcsx_bh(struct work_struct *work)
1260 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) { 1260 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) {
1261 if (!cs->hw.hfcsx.nt_mode) 1261 if (!cs->hw.hfcsx.nt_mode)
1262 switch (cs->dc.hfcsx.ph_state) { 1262 switch (cs->dc.hfcsx.ph_state) {
1263 case (0): 1263 case (0):
1264 l1_msg(cs, HW_RESET | INDICATION, NULL); 1264 l1_msg(cs, HW_RESET | INDICATION, NULL);
1265 break; 1265 break;
1266 case (3): 1266 case (3):
1267 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 1267 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
1268 break; 1268 break;
1269 case (8): 1269 case (8):
1270 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 1270 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
1271 break; 1271 break;
1272 case (6): 1272 case (6):
1273 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 1273 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
1274 break; 1274 break;
1275 case (7): 1275 case (7):
1276 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 1276 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
1277 break; 1277 break;
1278 default: 1278 default:
1279 break; 1279 break;
1280 } else { 1280 } else {
1281 switch (cs->dc.hfcsx.ph_state) { 1281 switch (cs->dc.hfcsx.ph_state) {
1282 case (2): 1282 case (2):
1283 spin_lock_irqsave(&cs->lock, flags); 1283 spin_lock_irqsave(&cs->lock, flags);
1284 if (cs->hw.hfcsx.nt_timer < 0) { 1284 if (cs->hw.hfcsx.nt_timer < 0) {
1285 cs->hw.hfcsx.nt_timer = 0;
1286 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
1287 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1288 /* Clear already pending ints */
1289 if (Read_hfc(cs, HFCSX_INT_S1));
1290
1291 Write_hfc(cs, HFCSX_STATES, 4 | HFCSX_LOAD_STATE);
1292 udelay(10);
1293 Write_hfc(cs, HFCSX_STATES, 4);
1294 cs->dc.hfcsx.ph_state = 4;
1295 } else {
1296 cs->hw.hfcsx.int_m1 |= HFCSX_INTS_TIMER;
1297 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1298 cs->hw.hfcsx.ctmt &= ~HFCSX_AUTO_TIMER;
1299 cs->hw.hfcsx.ctmt |= HFCSX_TIM3_125;
1300 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
1301 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
1302 cs->hw.hfcsx.nt_timer = NT_T1_COUNT;
1303 Write_hfc(cs, HFCSX_STATES, 2 | HFCSX_NT_G2_G3); /* allow G2 -> G3 transition */
1304 }
1305 spin_unlock_irqrestore(&cs->lock, flags);
1306 break;
1307 case (1):
1308 case (3):
1309 case (4):
1310 spin_lock_irqsave(&cs->lock, flags);
1311 cs->hw.hfcsx.nt_timer = 0; 1285 cs->hw.hfcsx.nt_timer = 0;
1312 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER; 1286 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
1313 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1); 1287 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1314 spin_unlock_irqrestore(&cs->lock, flags); 1288 /* Clear already pending ints */
1315 break; 1289 if (Read_hfc(cs, HFCSX_INT_S1));
1316 default: 1290
1317 break; 1291 Write_hfc(cs, HFCSX_STATES, 4 | HFCSX_LOAD_STATE);
1292 udelay(10);
1293 Write_hfc(cs, HFCSX_STATES, 4);
1294 cs->dc.hfcsx.ph_state = 4;
1295 } else {
1296 cs->hw.hfcsx.int_m1 |= HFCSX_INTS_TIMER;
1297 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1298 cs->hw.hfcsx.ctmt &= ~HFCSX_AUTO_TIMER;
1299 cs->hw.hfcsx.ctmt |= HFCSX_TIM3_125;
1300 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
1301 Write_hfc(cs, HFCSX_CTMT, cs->hw.hfcsx.ctmt | HFCSX_CLTIMER);
1302 cs->hw.hfcsx.nt_timer = NT_T1_COUNT;
1303 Write_hfc(cs, HFCSX_STATES, 2 | HFCSX_NT_G2_G3); /* allow G2 -> G3 transition */
1304 }
1305 spin_unlock_irqrestore(&cs->lock, flags);
1306 break;
1307 case (1):
1308 case (3):
1309 case (4):
1310 spin_lock_irqsave(&cs->lock, flags);
1311 cs->hw.hfcsx.nt_timer = 0;
1312 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
1313 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1314 spin_unlock_irqrestore(&cs->lock, flags);
1315 break;
1316 default:
1317 break;
1318 } 1318 }
1319 } 1319 }
1320 } 1320 }
@@ -1353,29 +1353,29 @@ hfcsx_card_msg(struct IsdnCardState *cs, int mt, void *arg)
1353 if (cs->debug & L1_DEB_ISAC) 1353 if (cs->debug & L1_DEB_ISAC)
1354 debugl1(cs, "HFCSX: card_msg %x", mt); 1354 debugl1(cs, "HFCSX: card_msg %x", mt);
1355 switch (mt) { 1355 switch (mt) {
1356 case CARD_RESET: 1356 case CARD_RESET:
1357 spin_lock_irqsave(&cs->lock, flags); 1357 spin_lock_irqsave(&cs->lock, flags);
1358 reset_hfcsx(cs); 1358 reset_hfcsx(cs);
1359 spin_unlock_irqrestore(&cs->lock, flags); 1359 spin_unlock_irqrestore(&cs->lock, flags);
1360 return (0); 1360 return (0);
1361 case CARD_RELEASE: 1361 case CARD_RELEASE:
1362 release_io_hfcsx(cs); 1362 release_io_hfcsx(cs);
1363 return (0); 1363 return (0);
1364 case CARD_INIT: 1364 case CARD_INIT:
1365 spin_lock_irqsave(&cs->lock, flags); 1365 spin_lock_irqsave(&cs->lock, flags);
1366 inithfcsx(cs); 1366 inithfcsx(cs);
1367 spin_unlock_irqrestore(&cs->lock, flags); 1367 spin_unlock_irqrestore(&cs->lock, flags);
1368 msleep(80); /* Timeout 80ms */ 1368 msleep(80); /* Timeout 80ms */
1369 /* now switch timer interrupt off */ 1369 /* now switch timer interrupt off */
1370 spin_lock_irqsave(&cs->lock, flags); 1370 spin_lock_irqsave(&cs->lock, flags);
1371 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER; 1371 cs->hw.hfcsx.int_m1 &= ~HFCSX_INTS_TIMER;
1372 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1); 1372 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
1373 /* reinit mode reg */ 1373 /* reinit mode reg */
1374 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m); 1374 Write_hfc(cs, HFCSX_MST_MODE, cs->hw.hfcsx.mst_m);
1375 spin_unlock_irqrestore(&cs->lock, flags); 1375 spin_unlock_irqrestore(&cs->lock, flags);
1376 return (0); 1376 return (0);
1377 case CARD_TEST: 1377 case CARD_TEST:
1378 return (0); 1378 return (0);
1379 } 1379 }
1380 return (0); 1380 return (0);
1381} 1381}
@@ -1383,7 +1383,7 @@ hfcsx_card_msg(struct IsdnCardState *cs, int mt, void *arg)
1383#ifdef __ISAPNP__ 1383#ifdef __ISAPNP__
1384static struct isapnp_device_id hfc_ids[] __devinitdata = { 1384static struct isapnp_device_id hfc_ids[] __devinitdata = {
1385 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2620), 1385 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2620),
1386 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2620), 1386 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2620),
1387 (unsigned long) "Teles 16.3c2" }, 1387 (unsigned long) "Teles 16.3c2" },
1388 { 0, } 1388 { 0, }
1389}; 1389};
@@ -1403,30 +1403,30 @@ setup_hfcsx(struct IsdnCard *card)
1403#ifdef __ISAPNP__ 1403#ifdef __ISAPNP__
1404 if (!card->para[1] && isapnp_present()) { 1404 if (!card->para[1] && isapnp_present()) {
1405 struct pnp_dev *pnp_d; 1405 struct pnp_dev *pnp_d;
1406 while(ipid->card_vendor) { 1406 while (ipid->card_vendor) {
1407 if ((pnp_c = pnp_find_card(ipid->card_vendor, 1407 if ((pnp_c = pnp_find_card(ipid->card_vendor,
1408 ipid->card_device, pnp_c))) { 1408 ipid->card_device, pnp_c))) {
1409 pnp_d = NULL; 1409 pnp_d = NULL;
1410 if ((pnp_d = pnp_find_dev(pnp_c, 1410 if ((pnp_d = pnp_find_dev(pnp_c,
1411 ipid->vendor, ipid->function, pnp_d))) { 1411 ipid->vendor, ipid->function, pnp_d))) {
1412 int err; 1412 int err;
1413 1413
1414 printk(KERN_INFO "HiSax: %s detected\n", 1414 printk(KERN_INFO "HiSax: %s detected\n",
1415 (char *)ipid->driver_data); 1415 (char *)ipid->driver_data);
1416 pnp_disable_dev(pnp_d); 1416 pnp_disable_dev(pnp_d);
1417 err = pnp_activate_dev(pnp_d); 1417 err = pnp_activate_dev(pnp_d);
1418 if (err<0) { 1418 if (err < 0) {
1419 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 1419 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
1420 __func__, err); 1420 __func__, err);
1421 return(0); 1421 return (0);
1422 } 1422 }
1423 card->para[1] = pnp_port_start(pnp_d, 0); 1423 card->para[1] = pnp_port_start(pnp_d, 0);
1424 card->para[0] = pnp_irq(pnp_d, 0); 1424 card->para[0] = pnp_irq(pnp_d, 0);
1425 if (!card->para[0] || !card->para[1]) { 1425 if (!card->para[0] || !card->para[1]) {
1426 printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n", 1426 printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n",
1427 card->para[0], card->para[1]); 1427 card->para[0], card->para[1]);
1428 pnp_disable_dev(pnp_d); 1428 pnp_disable_dev(pnp_d);
1429 return(0); 1429 return (0);
1430 } 1430 }
1431 break; 1431 break;
1432 } else { 1432 } else {
@@ -1435,10 +1435,10 @@ setup_hfcsx(struct IsdnCard *card)
1435 } 1435 }
1436 ipid++; 1436 ipid++;
1437 pnp_c = NULL; 1437 pnp_c = NULL;
1438 } 1438 }
1439 if (!ipid->card_vendor) { 1439 if (!ipid->card_vendor) {
1440 printk(KERN_INFO "HFC PnP: no ISAPnP card found\n"); 1440 printk(KERN_INFO "HFC PnP: no ISAPnP card found\n");
1441 return(0); 1441 return (0);
1442 } 1442 }
1443 } 1443 }
1444#endif 1444#endif
@@ -1447,47 +1447,47 @@ setup_hfcsx(struct IsdnCard *card)
1447 cs->hw.hfcsx.int_s1 = 0; 1447 cs->hw.hfcsx.int_s1 = 0;
1448 cs->dc.hfcsx.ph_state = 0; 1448 cs->dc.hfcsx.ph_state = 0;
1449 cs->hw.hfcsx.fifo = 255; 1449 cs->hw.hfcsx.fifo = 255;
1450 if ((cs->typ == ISDN_CTYPE_HFC_SX) || 1450 if ((cs->typ == ISDN_CTYPE_HFC_SX) ||
1451 (cs->typ == ISDN_CTYPE_HFC_SP_PCMCIA)) { 1451 (cs->typ == ISDN_CTYPE_HFC_SP_PCMCIA)) {
1452 if ((!cs->hw.hfcsx.base) || !request_region(cs->hw.hfcsx.base, 2, "HFCSX isdn")) { 1452 if ((!cs->hw.hfcsx.base) || !request_region(cs->hw.hfcsx.base, 2, "HFCSX isdn")) {
1453 printk(KERN_WARNING 1453 printk(KERN_WARNING
1454 "HiSax: HFC-SX io-base %#lx already in use\n", 1454 "HiSax: HFC-SX io-base %#lx already in use\n",
1455 cs->hw.hfcsx.base); 1455 cs->hw.hfcsx.base);
1456 return(0); 1456 return (0);
1457 } 1457 }
1458 byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.base & 0xFF); 1458 byteout(cs->hw.hfcsx.base, cs->hw.hfcsx.base & 0xFF);
1459 byteout(cs->hw.hfcsx.base + 1, 1459 byteout(cs->hw.hfcsx.base + 1,
1460 ((cs->hw.hfcsx.base >> 8) & 3) | 0x54); 1460 ((cs->hw.hfcsx.base >> 8) & 3) | 0x54);
1461 udelay(10); 1461 udelay(10);
1462 cs->hw.hfcsx.chip = Read_hfc(cs,HFCSX_CHIP_ID); 1462 cs->hw.hfcsx.chip = Read_hfc(cs, HFCSX_CHIP_ID);
1463 switch (cs->hw.hfcsx.chip >> 4) { 1463 switch (cs->hw.hfcsx.chip >> 4) {
1464 case 1: 1464 case 1:
1465 tmp[0] ='+'; 1465 tmp[0] = '+';
1466 break; 1466 break;
1467 case 9: 1467 case 9:
1468 tmp[0] ='P'; 1468 tmp[0] = 'P';
1469 break; 1469 break;
1470 default: 1470 default:
1471 printk(KERN_WARNING 1471 printk(KERN_WARNING
1472 "HFC-SX: invalid chip id 0x%x\n", 1472 "HFC-SX: invalid chip id 0x%x\n",
1473 cs->hw.hfcsx.chip >> 4); 1473 cs->hw.hfcsx.chip >> 4);
1474 release_region(cs->hw.hfcsx.base, 2); 1474 release_region(cs->hw.hfcsx.base, 2);
1475 return(0); 1475 return (0);
1476 } 1476 }
1477 if (!ccd_sp_irqtab[cs->irq & 0xF]) { 1477 if (!ccd_sp_irqtab[cs->irq & 0xF]) {
1478 printk(KERN_WARNING 1478 printk(KERN_WARNING
1479 "HFC_SX: invalid irq %d specified\n",cs->irq & 0xF); 1479 "HFC_SX: invalid irq %d specified\n", cs->irq & 0xF);
1480 release_region(cs->hw.hfcsx.base, 2); 1480 release_region(cs->hw.hfcsx.base, 2);
1481 return(0); 1481 return (0);
1482 } 1482 }
1483 if (!(cs->hw.hfcsx.extra = (void *) 1483 if (!(cs->hw.hfcsx.extra = (void *)
1484 kmalloc(sizeof(struct hfcsx_extra), GFP_ATOMIC))) { 1484 kmalloc(sizeof(struct hfcsx_extra), GFP_ATOMIC))) {
1485 release_region(cs->hw.hfcsx.base, 2); 1485 release_region(cs->hw.hfcsx.base, 2);
1486 printk(KERN_WARNING "HFC-SX: unable to allocate memory\n"); 1486 printk(KERN_WARNING "HFC-SX: unable to allocate memory\n");
1487 return(0); 1487 return (0);
1488 } 1488 }
1489 printk(KERN_INFO "HFC-S%c chip detected at base 0x%x IRQ %d HZ %d\n", 1489 printk(KERN_INFO "HFC-S%c chip detected at base 0x%x IRQ %d HZ %d\n",
1490 tmp[0], (u_int) cs->hw.hfcsx.base, cs->irq, HZ); 1490 tmp[0], (u_int) cs->hw.hfcsx.base, cs->irq, HZ);
1491 cs->hw.hfcsx.int_m2 = 0; /* disable alle interrupts */ 1491 cs->hw.hfcsx.int_m2 = 0; /* disable alle interrupts */
1492 cs->hw.hfcsx.int_m1 = 0; 1492 cs->hw.hfcsx.int_m1 = 0;
1493 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1); 1493 Write_hfc(cs, HFCSX_INT_M1, cs->hw.hfcsx.int_m1);
diff --git a/drivers/isdn/hisax/hfc_sx.h b/drivers/isdn/hisax/hfc_sx.h
index 6792f13dc220..eee85dbb0883 100644
--- a/drivers/isdn/hisax/hfc_sx.h
+++ b/drivers/isdn/hisax/hfc_sx.h
@@ -5,7 +5,7 @@
5 * Author Werner Cornelius 5 * Author Werner Cornelius
6 * based on existing driver for CCD HFC PCI cards 6 * based on existing driver for CCD HFC PCI cards
7 * Copyright by Werner Cornelius <werner@isdn4linux.de> 7 * Copyright by Werner Cornelius <werner@isdn4linux.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -48,7 +48,7 @@
48 48
49#define HFCSX_MST_EMOD 0x2D 49#define HFCSX_MST_EMOD 0x2D
50#define HFCSX_MST_MODE 0x2E 50#define HFCSX_MST_MODE 0x2E
51#define HFCSX_CONNECT 0x2F 51#define HFCSX_CONNECT 0x2F
52 52
53 53
54/* Interrupt and status registers */ 54/* Interrupt and status registers */
@@ -56,22 +56,22 @@
56#define HFCSX_TRM 0x12 56#define HFCSX_TRM 0x12
57#define HFCSX_B_MODE 0x13 57#define HFCSX_B_MODE 0x13
58#define HFCSX_CHIP_ID 0x16 58#define HFCSX_CHIP_ID 0x16
59#define HFCSX_CIRM 0x18 59#define HFCSX_CIRM 0x18
60#define HFCSX_CTMT 0x19 60#define HFCSX_CTMT 0x19
61#define HFCSX_INT_M1 0x1A 61#define HFCSX_INT_M1 0x1A
62#define HFCSX_INT_M2 0x1B 62#define HFCSX_INT_M2 0x1B
63#define HFCSX_INT_S1 0x1E 63#define HFCSX_INT_S1 0x1E
64#define HFCSX_INT_S2 0x1F 64#define HFCSX_INT_S2 0x1F
65#define HFCSX_STATUS 0x1C 65#define HFCSX_STATUS 0x1C
66 66
67/* S/T section registers */ 67/* S/T section registers */
68 68
69#define HFCSX_STATES 0x30 69#define HFCSX_STATES 0x30
70#define HFCSX_SCTRL 0x31 70#define HFCSX_SCTRL 0x31
71#define HFCSX_SCTRL_E 0x32 71#define HFCSX_SCTRL_E 0x32
72#define HFCSX_SCTRL_R 0x33 72#define HFCSX_SCTRL_R 0x33
73#define HFCSX_SQ 0x34 73#define HFCSX_SQ 0x34
74#define HFCSX_CLKDEL 0x37 74#define HFCSX_CLKDEL 0x37
75#define HFCSX_B1_REC 0x3C 75#define HFCSX_B1_REC 0x3C
76#define HFCSX_B1_SEND 0x3C 76#define HFCSX_B1_SEND 0x3C
77#define HFCSX_B2_REC 0x3D 77#define HFCSX_B2_REC 0x3D
@@ -97,7 +97,7 @@
97 97
98/* bits in status register (READ) */ 98/* bits in status register (READ) */
99#define HFCSX_SX_PROC 0x02 99#define HFCSX_SX_PROC 0x02
100#define HFCSX_NBUSY 0x04 100#define HFCSX_NBUSY 0x04
101#define HFCSX_TIMER_ELAP 0x10 101#define HFCSX_TIMER_ELAP 0x10
102#define HFCSX_STATINT 0x20 102#define HFCSX_STATINT 0x20
103#define HFCSX_FRAMEINT 0x40 103#define HFCSX_FRAMEINT 0x40
@@ -117,7 +117,7 @@
117/* bits in CIRM (Write) */ 117/* bits in CIRM (Write) */
118#define HFCSX_IRQ_SELMSK 0x07 118#define HFCSX_IRQ_SELMSK 0x07
119#define HFCSX_IRQ_SELDIS 0x00 119#define HFCSX_IRQ_SELDIS 0x00
120#define HFCSX_RESET 0x08 120#define HFCSX_RESET 0x08
121#define HFCSX_FIFO_RESET 0x80 121#define HFCSX_FIFO_RESET 0x80
122 122
123 123
@@ -189,7 +189,7 @@
189/* structure holding additional dynamic data -> send marker */ 189/* structure holding additional dynamic data -> send marker */
190/************************************************************/ 190/************************************************************/
191struct hfcsx_extra { 191struct hfcsx_extra {
192 unsigned short marker[2*(MAX_B_FRAMES+1) + (MAX_D_FRAMES+1)]; 192 unsigned short marker[2 * (MAX_B_FRAMES + 1) + (MAX_D_FRAMES + 1)];
193}; 193};
194 194
195extern void main_irq_hfcsx(struct BCState *bcs); 195extern void main_irq_hfcsx(struct BCState *bcs);
diff --git a/drivers/isdn/hisax/hfc_usb.c b/drivers/isdn/hisax/hfc_usb.c
index f407de0e006d..62c65bdefd8a 100644
--- a/drivers/isdn/hisax/hfc_usb.c
+++ b/drivers/isdn/hisax/hfc_usb.c
@@ -27,7 +27,7 @@
27 * 27 *
28 * See Version Histroy at the bottom of this file 28 * See Version Histroy at the bottom of this file
29 * 29 *
30*/ 30 */
31 31
32#include <linux/types.h> 32#include <linux/types.h>
33#include <linux/stddef.h> 33#include <linux/stddef.h>
@@ -45,11 +45,11 @@
45#include "hfc_usb.h" 45#include "hfc_usb.h"
46 46
47static const char *hfcusb_revision = 47static const char *hfcusb_revision =
48 "$Revision: 2.3.2.24 $ $Date: 2007/10/14 08:40:29 $ "; 48 "$Revision: 2.3.2.24 $ $Date: 2007/10/14 08:40:29 $ ";
49 49
50/* Hisax debug support 50/* Hisax debug support
51* debug flags defined in hfc_usb.h as HFCUSB_DBG_[*] 51 * debug flags defined in hfc_usb.h as HFCUSB_DBG_[*]
52*/ 52 */
53#define __debug_variable hfc_debug 53#define __debug_variable hfc_debug
54#include "hisax_debug.h" 54#include "hisax_debug.h"
55static u_int debug; 55static u_int debug;
@@ -67,70 +67,70 @@ typedef struct {
67/* VID/PID device list */ 67/* VID/PID device list */
68static struct usb_device_id hfcusb_idtab[] = { 68static struct usb_device_id hfcusb_idtab[] = {
69 { 69 {
70 USB_DEVICE(0x0959, 0x2bd0), 70 USB_DEVICE(0x0959, 0x2bd0),
71 .driver_info = (unsigned long) &((hfcsusb_vdata) 71 .driver_info = (unsigned long) &((hfcsusb_vdata)
72 {LED_OFF, {4, 0, 2, 1}, 72 {LED_OFF, {4, 0, 2, 1},
73 "ISDN USB TA (Cologne Chip HFC-S USB based)"}), 73 "ISDN USB TA (Cologne Chip HFC-S USB based)"}),
74 }, 74 },
75 { 75 {
76 USB_DEVICE(0x0675, 0x1688), 76 USB_DEVICE(0x0675, 0x1688),
77 .driver_info = (unsigned long) &((hfcsusb_vdata) 77 .driver_info = (unsigned long) &((hfcsusb_vdata)
78 {LED_SCHEME1, {1, 2, 0, 0}, 78 {LED_SCHEME1, {1, 2, 0, 0},
79 "DrayTek miniVigor 128 USB ISDN TA"}), 79 "DrayTek miniVigor 128 USB ISDN TA"}),
80 }, 80 },
81 { 81 {
82 USB_DEVICE(0x07b0, 0x0007), 82 USB_DEVICE(0x07b0, 0x0007),
83 .driver_info = (unsigned long) &((hfcsusb_vdata) 83 .driver_info = (unsigned long) &((hfcsusb_vdata)
84 {LED_SCHEME1, {0x80, -64, -32, -16}, 84 {LED_SCHEME1, {0x80, -64, -32, -16},
85 "Billion tiny USB ISDN TA 128"}), 85 "Billion tiny USB ISDN TA 128"}),
86 }, 86 },
87 { 87 {
88 USB_DEVICE(0x0742, 0x2008), 88 USB_DEVICE(0x0742, 0x2008),
89 .driver_info = (unsigned long) &((hfcsusb_vdata) 89 .driver_info = (unsigned long) &((hfcsusb_vdata)
90 {LED_SCHEME1, {4, 0, 2, 1}, 90 {LED_SCHEME1, {4, 0, 2, 1},
91 "Stollmann USB TA"}), 91 "Stollmann USB TA"}),
92 }, 92 },
93 { 93 {
94 USB_DEVICE(0x0742, 0x2009), 94 USB_DEVICE(0x0742, 0x2009),
95 .driver_info = (unsigned long) &((hfcsusb_vdata) 95 .driver_info = (unsigned long) &((hfcsusb_vdata)
96 {LED_SCHEME1, {4, 0, 2, 1}, 96 {LED_SCHEME1, {4, 0, 2, 1},
97 "Aceex USB ISDN TA"}), 97 "Aceex USB ISDN TA"}),
98 }, 98 },
99 { 99 {
100 USB_DEVICE(0x0742, 0x200A), 100 USB_DEVICE(0x0742, 0x200A),
101 .driver_info = (unsigned long) &((hfcsusb_vdata) 101 .driver_info = (unsigned long) &((hfcsusb_vdata)
102 {LED_SCHEME1, {4, 0, 2, 1}, 102 {LED_SCHEME1, {4, 0, 2, 1},
103 "OEM USB ISDN TA"}), 103 "OEM USB ISDN TA"}),
104 }, 104 },
105 { 105 {
106 USB_DEVICE(0x08e3, 0x0301), 106 USB_DEVICE(0x08e3, 0x0301),
107 .driver_info = (unsigned long) &((hfcsusb_vdata) 107 .driver_info = (unsigned long) &((hfcsusb_vdata)
108 {LED_SCHEME1, {2, 0, 1, 4}, 108 {LED_SCHEME1, {2, 0, 1, 4},
109 "Olitec USB RNIS"}), 109 "Olitec USB RNIS"}),
110 }, 110 },
111 { 111 {
112 USB_DEVICE(0x07fa, 0x0846), 112 USB_DEVICE(0x07fa, 0x0846),
113 .driver_info = (unsigned long) &((hfcsusb_vdata) 113 .driver_info = (unsigned long) &((hfcsusb_vdata)
114 {LED_SCHEME1, {0x80, -64, -32, -16}, 114 {LED_SCHEME1, {0x80, -64, -32, -16},
115 "Bewan Modem RNIS USB"}), 115 "Bewan Modem RNIS USB"}),
116 }, 116 },
117 { 117 {
118 USB_DEVICE(0x07fa, 0x0847), 118 USB_DEVICE(0x07fa, 0x0847),
119 .driver_info = (unsigned long) &((hfcsusb_vdata) 119 .driver_info = (unsigned long) &((hfcsusb_vdata)
120 {LED_SCHEME1, {0x80, -64, -32, -16}, 120 {LED_SCHEME1, {0x80, -64, -32, -16},
121 "Djinn Numeris USB"}), 121 "Djinn Numeris USB"}),
122 }, 122 },
123 { 123 {
124 USB_DEVICE(0x07b0, 0x0006), 124 USB_DEVICE(0x07b0, 0x0006),
125 .driver_info = (unsigned long) &((hfcsusb_vdata) 125 .driver_info = (unsigned long) &((hfcsusb_vdata)
126 {LED_SCHEME1, {0x80, -64, -32, -16}, 126 {LED_SCHEME1, {0x80, -64, -32, -16},
127 "Twister ISDN TA"}), 127 "Twister ISDN TA"}),
128 }, 128 },
129 { 129 {
130 USB_DEVICE(0x071d, 0x1005), 130 USB_DEVICE(0x071d, 0x1005),
131 .driver_info = (unsigned long) &((hfcsusb_vdata) 131 .driver_info = (unsigned long) &((hfcsusb_vdata)
132 {LED_SCHEME1, {0x02, 0, 0x01, 0x04}, 132 {LED_SCHEME1, {0x02, 0, 0x01, 0x04},
133 "Eicon DIVA USB 4.0"}), 133 "Eicon DIVA USB 4.0"}),
134 }, 134 },
135 { } 135 { }
136}; 136};
@@ -177,7 +177,7 @@ typedef struct hfcusb_data {
177 int alt_used; /* used alternate config */ 177 int alt_used; /* used alternate config */
178 int ctrl_paksize; /* control pipe packet size */ 178 int ctrl_paksize; /* control pipe packet size */
179 int ctrl_in_pipe, /* handles for control pipe */ 179 int ctrl_in_pipe, /* handles for control pipe */
180 ctrl_out_pipe; 180 ctrl_out_pipe;
181 int cfg_used; /* configuration index used */ 181 int cfg_used; /* configuration index used */
182 int vend_idx; /* vendor found */ 182 int vend_idx; /* vendor found */
183 int b_mode[2]; /* B-channel mode */ 183 int b_mode[2]; /* B-channel mode */
@@ -206,7 +206,7 @@ typedef struct hfcusb_data {
206} hfcusb_data; 206} hfcusb_data;
207 207
208 208
209static void collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, 209static void collect_rx_frame(usb_fifo *fifo, __u8 *data, int len,
210 int finish); 210 int finish);
211 211
212static inline const char * 212static inline const char *
@@ -220,24 +220,24 @@ symbolic(struct hfcusb_symbolic_list list[], const int num)
220} 220}
221 221
222static void 222static void
223ctrl_start_transfer(hfcusb_data * hfc) 223ctrl_start_transfer(hfcusb_data *hfc)
224{ 224{
225 if (hfc->ctrl_cnt) { 225 if (hfc->ctrl_cnt) {
226 hfc->ctrl_urb->pipe = hfc->ctrl_out_pipe; 226 hfc->ctrl_urb->pipe = hfc->ctrl_out_pipe;
227 hfc->ctrl_urb->setup_packet = (u_char *) & hfc->ctrl_write; 227 hfc->ctrl_urb->setup_packet = (u_char *)&hfc->ctrl_write;
228 hfc->ctrl_urb->transfer_buffer = NULL; 228 hfc->ctrl_urb->transfer_buffer = NULL;
229 hfc->ctrl_urb->transfer_buffer_length = 0; 229 hfc->ctrl_urb->transfer_buffer_length = 0;
230 hfc->ctrl_write.wIndex = 230 hfc->ctrl_write.wIndex =
231 cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].hfc_reg); 231 cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].hfc_reg);
232 hfc->ctrl_write.wValue = 232 hfc->ctrl_write.wValue =
233 cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].reg_val); 233 cpu_to_le16(hfc->ctrl_buff[hfc->ctrl_out_idx].reg_val);
234 234
235 usb_submit_urb(hfc->ctrl_urb, GFP_ATOMIC); /* start transfer */ 235 usb_submit_urb(hfc->ctrl_urb, GFP_ATOMIC); /* start transfer */
236 } 236 }
237} /* ctrl_start_transfer */ 237} /* ctrl_start_transfer */
238 238
239static int 239static int
240queue_control_request(hfcusb_data * hfc, __u8 reg, __u8 val, int action) 240queue_control_request(hfcusb_data *hfc, __u8 reg, __u8 val, int action)
241{ 241{
242 ctrl_buft *buf; 242 ctrl_buft *buf;
243 243
@@ -271,7 +271,7 @@ ctrl_complete(struct urb *urb)
271 271
272/* write led data to auxport & invert if necessary */ 272/* write led data to auxport & invert if necessary */
273static void 273static void
274write_led(hfcusb_data * hfc, __u8 led_state) 274write_led(hfcusb_data *hfc, __u8 led_state)
275{ 275{
276 if (led_state != hfc->old_led_state) { 276 if (led_state != hfc->old_led_state) {
277 hfc->old_led_state = led_state; 277 hfc->old_led_state = led_state;
@@ -280,7 +280,7 @@ write_led(hfcusb_data * hfc, __u8 led_state)
280} 280}
281 281
282static void 282static void
283set_led_bit(hfcusb_data * hfc, signed short led_bits, int on) 283set_led_bit(hfcusb_data *hfc, signed short led_bits, int on)
284{ 284{
285 if (on) { 285 if (on) {
286 if (led_bits < 0) 286 if (led_bits < 0)
@@ -297,53 +297,53 @@ set_led_bit(hfcusb_data * hfc, signed short led_bits, int on)
297 297
298/* handle LED requests */ 298/* handle LED requests */
299static void 299static void
300handle_led(hfcusb_data * hfc, int event) 300handle_led(hfcusb_data *hfc, int event)
301{ 301{
302 hfcsusb_vdata *driver_info = 302 hfcsusb_vdata *driver_info =
303 (hfcsusb_vdata *) hfcusb_idtab[hfc->vend_idx].driver_info; 303 (hfcsusb_vdata *) hfcusb_idtab[hfc->vend_idx].driver_info;
304 304
305 /* if no scheme -> no LED action */ 305 /* if no scheme -> no LED action */
306 if (driver_info->led_scheme == LED_OFF) 306 if (driver_info->led_scheme == LED_OFF)
307 return; 307 return;
308 308
309 switch (event) { 309 switch (event) {
310 case LED_POWER_ON: 310 case LED_POWER_ON:
311 set_led_bit(hfc, driver_info->led_bits[0], 1); 311 set_led_bit(hfc, driver_info->led_bits[0], 1);
312 set_led_bit(hfc, driver_info->led_bits[1], 0); 312 set_led_bit(hfc, driver_info->led_bits[1], 0);
313 set_led_bit(hfc, driver_info->led_bits[2], 0); 313 set_led_bit(hfc, driver_info->led_bits[2], 0);
314 set_led_bit(hfc, driver_info->led_bits[3], 0); 314 set_led_bit(hfc, driver_info->led_bits[3], 0);
315 break; 315 break;
316 case LED_POWER_OFF: 316 case LED_POWER_OFF:
317 set_led_bit(hfc, driver_info->led_bits[0], 0); 317 set_led_bit(hfc, driver_info->led_bits[0], 0);
318 set_led_bit(hfc, driver_info->led_bits[1], 0); 318 set_led_bit(hfc, driver_info->led_bits[1], 0);
319 set_led_bit(hfc, driver_info->led_bits[2], 0); 319 set_led_bit(hfc, driver_info->led_bits[2], 0);
320 set_led_bit(hfc, driver_info->led_bits[3], 0); 320 set_led_bit(hfc, driver_info->led_bits[3], 0);
321 break; 321 break;
322 case LED_S0_ON: 322 case LED_S0_ON:
323 set_led_bit(hfc, driver_info->led_bits[1], 1); 323 set_led_bit(hfc, driver_info->led_bits[1], 1);
324 break; 324 break;
325 case LED_S0_OFF: 325 case LED_S0_OFF:
326 set_led_bit(hfc, driver_info->led_bits[1], 0); 326 set_led_bit(hfc, driver_info->led_bits[1], 0);
327 break; 327 break;
328 case LED_B1_ON: 328 case LED_B1_ON:
329 set_led_bit(hfc, driver_info->led_bits[2], 1); 329 set_led_bit(hfc, driver_info->led_bits[2], 1);
330 break; 330 break;
331 case LED_B1_OFF: 331 case LED_B1_OFF:
332 set_led_bit(hfc, driver_info->led_bits[2], 0); 332 set_led_bit(hfc, driver_info->led_bits[2], 0);
333 break; 333 break;
334 case LED_B2_ON: 334 case LED_B2_ON:
335 set_led_bit(hfc, driver_info->led_bits[3], 1); 335 set_led_bit(hfc, driver_info->led_bits[3], 1);
336 break; 336 break;
337 case LED_B2_OFF: 337 case LED_B2_OFF:
338 set_led_bit(hfc, driver_info->led_bits[3], 0); 338 set_led_bit(hfc, driver_info->led_bits[3], 0);
339 break; 339 break;
340 } 340 }
341 write_led(hfc, hfc->led_state); 341 write_led(hfc, hfc->led_state);
342} 342}
343 343
344/* ISDN l1 timer T3 expires */ 344/* ISDN l1 timer T3 expires */
345static void 345static void
346l1_timer_expire_t3(hfcusb_data * hfc) 346l1_timer_expire_t3(hfcusb_data *hfc)
347{ 347{
348 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION, 348 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION,
349 NULL); 349 NULL);
@@ -360,7 +360,7 @@ l1_timer_expire_t3(hfcusb_data * hfc)
360 360
361/* ISDN l1 timer T4 expires */ 361/* ISDN l1 timer T4 expires */
362static void 362static void
363l1_timer_expire_t4(hfcusb_data * hfc) 363l1_timer_expire_t4(hfcusb_data *hfc)
364{ 364{
365 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION, 365 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, PH_DEACTIVATE | INDICATION,
366 NULL); 366 NULL);
@@ -374,7 +374,7 @@ l1_timer_expire_t4(hfcusb_data * hfc)
374 374
375/* S0 state changed */ 375/* S0 state changed */
376static void 376static void
377s0_state_handler(hfcusb_data * hfc, __u8 state) 377s0_state_handler(hfcusb_data *hfc, __u8 state)
378{ 378{
379 __u8 old_state; 379 __u8 old_state;
380 380
@@ -402,12 +402,12 @@ s0_state_handler(hfcusb_data * hfc, __u8 state)
402 DBG(HFCUSB_DBG_STATES, "HFC-S USB: PH_ACTIVATE | INDICATION sent"); 402 DBG(HFCUSB_DBG_STATES, "HFC-S USB: PH_ACTIVATE | INDICATION sent");
403 hfc->l1_activated = 1; 403 hfc->l1_activated = 1;
404 handle_led(hfc, LED_S0_ON); 404 handle_led(hfc, LED_S0_ON);
405 } else if (state <= 3 /* && activated */ ) { 405 } else if (state <= 3 /* && activated */) {
406 if (old_state == 7 || old_state == 8) { 406 if (old_state == 7 || old_state == 8) {
407 DBG(HFCUSB_DBG_STATES, "HFC-S USB: T4 activated"); 407 DBG(HFCUSB_DBG_STATES, "HFC-S USB: T4 activated");
408 if (!timer_pending(&hfc->t4_timer)) { 408 if (!timer_pending(&hfc->t4_timer)) {
409 hfc->t4_timer.expires = 409 hfc->t4_timer.expires =
410 jiffies + (HFC_TIMER_T4 * HZ) / 1000; 410 jiffies + (HFC_TIMER_T4 * HZ) / 1000;
411 add_timer(&hfc->t4_timer); 411 add_timer(&hfc->t4_timer);
412 } 412 }
413 } else { 413 } else {
@@ -451,7 +451,7 @@ fill_isoc_urb(struct urb *urb, struct usb_device *dev, unsigned int pipe,
451 * gaps in the transfer chain 451 * gaps in the transfer chain
452 */ 452 */
453static int 453static int
454start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb, 454start_isoc_chain(usb_fifo *fifo, int num_packets_per_urb,
455 usb_complete_t complete, int packet_size) 455 usb_complete_t complete, int packet_size)
456{ 456{
457 int i, k, errcode; 457 int i, k, errcode;
@@ -463,7 +463,7 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
463 for (i = 0; i < 2; i++) { 463 for (i = 0; i < 2; i++) {
464 if (!(fifo->iso[i].purb)) { 464 if (!(fifo->iso[i].purb)) {
465 fifo->iso[i].purb = 465 fifo->iso[i].purb =
466 usb_alloc_urb(num_packets_per_urb, GFP_KERNEL); 466 usb_alloc_urb(num_packets_per_urb, GFP_KERNEL);
467 if (!(fifo->iso[i].purb)) { 467 if (!(fifo->iso[i].purb)) {
468 printk(KERN_INFO 468 printk(KERN_INFO
469 "alloc urb for fifo %i failed!!!", 469 "alloc urb for fifo %i failed!!!",
@@ -487,11 +487,11 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
487 /* defining packet delimeters in fifo->buffer */ 487 /* defining packet delimeters in fifo->buffer */
488 for (k = 0; k < num_packets_per_urb; k++) { 488 for (k = 0; k < num_packets_per_urb; k++) {
489 fifo->iso[i].purb-> 489 fifo->iso[i].purb->
490 iso_frame_desc[k].offset = 490 iso_frame_desc[k].offset =
491 k * packet_size; 491 k * packet_size;
492 fifo->iso[i].purb-> 492 fifo->iso[i].purb->
493 iso_frame_desc[k].length = 493 iso_frame_desc[k].length =
494 packet_size; 494 packet_size;
495 } 495 }
496 } else { 496 } else {
497 printk(KERN_INFO 497 printk(KERN_INFO
@@ -511,7 +511,7 @@ start_isoc_chain(usb_fifo * fifo, int num_packets_per_urb,
511 511
512/* stops running iso chain and frees their pending urbs */ 512/* stops running iso chain and frees their pending urbs */
513static void 513static void
514stop_isoc_chain(usb_fifo * fifo) 514stop_isoc_chain(usb_fifo *fifo)
515{ 515{
516 int i; 516 int i;
517 517
@@ -534,8 +534,8 @@ stop_isoc_chain(usb_fifo * fifo)
534 534
535/* defines how much ISO packets are handled in one URB */ 535/* defines how much ISO packets are handled in one URB */
536static int iso_packets[8] = 536static int iso_packets[8] =
537 { ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, 537{ ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B, ISOC_PACKETS_B,
538 ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D 538 ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D, ISOC_PACKETS_D
539}; 539};
540 540
541static void 541static void
@@ -545,7 +545,7 @@ tx_iso_complete(struct urb *urb)
545 usb_fifo *fifo = context_iso_urb->owner_fifo; 545 usb_fifo *fifo = context_iso_urb->owner_fifo;
546 hfcusb_data *hfc = fifo->hfc; 546 hfcusb_data *hfc = fifo->hfc;
547 int k, tx_offset, num_isoc_packets, sink, len, current_len, 547 int k, tx_offset, num_isoc_packets, sink, len, current_len,
548 errcode; 548 errcode;
549 int frame_complete, transp_mode, fifon, status; 549 int frame_complete, transp_mode, fifon, status;
550 __u8 threshbit; 550 __u8 threshbit;
551 551
@@ -565,8 +565,8 @@ tx_iso_complete(struct urb *urb)
565 errcode = urb->iso_frame_desc[k].status; 565 errcode = urb->iso_frame_desc[k].status;
566 if (errcode) 566 if (errcode)
567 DBG(HFCUSB_DBG_VERBOSE_USB, "HFC-S USB: tx_iso_complete " 567 DBG(HFCUSB_DBG_VERBOSE_USB, "HFC-S USB: tx_iso_complete "
568 "packet %i, status: %i\n", 568 "packet %i, status: %i\n",
569 k, errcode); 569 k, errcode);
570 } 570 }
571 571
572 // clear status, so go on with ISO transfers 572 // clear status, so go on with ISO transfers
@@ -607,8 +607,8 @@ tx_iso_complete(struct urb *urb)
607 if (current_len > 14) 607 if (current_len > 14)
608 current_len = 14; 608 current_len = 14;
609 current_len = 609 current_len =
610 (len <= 610 (len <=
611 current_len) ? len : current_len; 611 current_len) ? len : current_len;
612 /* how much bit do we put on the line? */ 612 /* how much bit do we put on the line? */
613 fifo->bit_line += current_len * 8; 613 fifo->bit_line += current_len * 8;
614 614
@@ -617,7 +617,7 @@ tx_iso_complete(struct urb *urb)
617 if (!transp_mode) { 617 if (!transp_mode) {
618 /* here frame completion */ 618 /* here frame completion */
619 context_iso_urb-> 619 context_iso_urb->
620 buffer[tx_offset] = 1; 620 buffer[tx_offset] = 1;
621 /* add 2 byte flags and 16bit CRC at end of ISDN frame */ 621 /* add 2 byte flags and 16bit CRC at end of ISDN frame */
622 fifo->bit_line += 32; 622 fifo->bit_line += 32;
623 } 623 }
@@ -632,12 +632,12 @@ tx_iso_complete(struct urb *urb)
632 /* define packet delimeters within the URB buffer */ 632 /* define packet delimeters within the URB buffer */
633 urb->iso_frame_desc[k].offset = tx_offset; 633 urb->iso_frame_desc[k].offset = tx_offset;
634 urb->iso_frame_desc[k].length = 634 urb->iso_frame_desc[k].length =
635 current_len + 1; 635 current_len + 1;
636 636
637 tx_offset += (current_len + 1); 637 tx_offset += (current_len + 1);
638 } else { 638 } else {
639 urb->iso_frame_desc[k].offset = 639 urb->iso_frame_desc[k].offset =
640 tx_offset++; 640 tx_offset++;
641 641
642 urb->iso_frame_desc[k].length = 1; 642 urb->iso_frame_desc[k].length = 1;
643 fifo->bit_line -= sink; /* we lower data margin every msec */ 643 fifo->bit_line -= sink; /* we lower data margin every msec */
@@ -683,7 +683,7 @@ rx_iso_complete(struct urb *urb)
683 usb_fifo *fifo = context_iso_urb->owner_fifo; 683 usb_fifo *fifo = context_iso_urb->owner_fifo;
684 hfcusb_data *hfc = fifo->hfc; 684 hfcusb_data *hfc = fifo->hfc;
685 int k, len, errcode, offset, num_isoc_packets, fifon, maxlen, 685 int k, len, errcode, offset, num_isoc_packets, fifon, maxlen,
686 status; 686 status;
687 unsigned int iso_status; 687 unsigned int iso_status;
688 __u8 *buf; 688 __u8 *buf;
689 static __u8 eof[8]; 689 static __u8 eof[8];
@@ -723,10 +723,10 @@ rx_iso_complete(struct urb *urb)
723 723
724 if (fifon == HFCUSB_D_RX) { 724 if (fifon == HFCUSB_D_RX) {
725 DBG(HFCUSB_DBG_VERBOSE_USB, 725 DBG(HFCUSB_DBG_VERBOSE_USB,
726 "HFC-S USB: ISO-D-RX lst_urblen:%2d " 726 "HFC-S USB: ISO-D-RX lst_urblen:%2d "
727 "act_urblen:%2d max-urblen:%2d EOF:0x%0x", 727 "act_urblen:%2d max-urblen:%2d EOF:0x%0x",
728 fifo->last_urblen, len, maxlen, 728 fifo->last_urblen, len, maxlen,
729 eof[5]); 729 eof[5]);
730 730
731 DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len); 731 DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len);
732 } 732 }
@@ -778,7 +778,7 @@ rx_iso_complete(struct urb *urb)
778 778
779/* collect rx data from INT- and ISO-URBs */ 779/* collect rx data from INT- and ISO-URBs */
780static void 780static void
781collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish) 781collect_rx_frame(usb_fifo *fifo, __u8 *data, int len, int finish)
782{ 782{
783 hfcusb_data *hfc = fifo->hfc; 783 hfcusb_data *hfc = fifo->hfc;
784 int transp_mode, fifon; 784 int transp_mode, fifon;
@@ -802,8 +802,8 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
802 memcpy(skb_put(fifo->skbuff, len), data, len); 802 memcpy(skb_put(fifo->skbuff, len), data, len);
803 } else { 803 } else {
804 DBG(HFCUSB_DBG_FIFO_ERR, 804 DBG(HFCUSB_DBG_FIFO_ERR,
805 "HCF-USB: got frame exceeded fifo->max_size(%d) fifo(%d)", 805 "HCF-USB: got frame exceeded fifo->max_size(%d) fifo(%d)",
806 fifo->max_size, fifon); 806 fifo->max_size, fifon);
807 DBG_SKB(HFCUSB_DBG_VERBOSE_USB, fifo->skbuff); 807 DBG_SKB(HFCUSB_DBG_VERBOSE_USB, fifo->skbuff);
808 skb_trim(fifo->skbuff, 0); 808 skb_trim(fifo->skbuff, 0);
809 } 809 }
@@ -817,7 +817,7 @@ collect_rx_frame(usb_fifo * fifo, __u8 * data, int len, int finish)
817 /* we have a complete hdlc packet */ 817 /* we have a complete hdlc packet */
818 if (finish) { 818 if (finish) {
819 if (fifo->skbuff->len > 3 && 819 if (fifo->skbuff->len > 3 &&
820 !fifo->skbuff->data[fifo->skbuff->len - 1]) { 820 !fifo->skbuff->data[fifo->skbuff->len - 1]) {
821 821
822 if (fifon == HFCUSB_D_RX) { 822 if (fifon == HFCUSB_D_RX) {
823 DBG(HFCUSB_DBG_DCHANNEL, 823 DBG(HFCUSB_DBG_DCHANNEL,
@@ -876,10 +876,10 @@ rx_int_complete(struct urb *urb)
876 876
877 if (fifon == HFCUSB_D_RX) { 877 if (fifon == HFCUSB_D_RX) {
878 DBG(HFCUSB_DBG_VERBOSE_USB, 878 DBG(HFCUSB_DBG_VERBOSE_USB,
879 "HFC-S USB: INT-D-RX lst_urblen:%2d " 879 "HFC-S USB: INT-D-RX lst_urblen:%2d "
880 "act_urblen:%2d max-urblen:%2d EOF:0x%0x", 880 "act_urblen:%2d max-urblen:%2d EOF:0x%0x",
881 fifo->last_urblen, len, maxlen, 881 fifo->last_urblen, len, maxlen,
882 eof[5]); 882 eof[5]);
883 DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len); 883 DBG_PACKET(HFCUSB_DBG_VERBOSE_USB, buf, len);
884 } 884 }
885 885
@@ -909,7 +909,7 @@ rx_int_complete(struct urb *urb)
909 909
910/* start initial INT-URB for certain fifo */ 910/* start initial INT-URB for certain fifo */
911static void 911static void
912start_int_fifo(usb_fifo * fifo) 912start_int_fifo(usb_fifo *fifo)
913{ 913{
914 int errcode; 914 int errcode;
915 915
@@ -936,7 +936,7 @@ start_int_fifo(usb_fifo * fifo)
936} 936}
937 937
938static void 938static void
939setup_bchannel(hfcusb_data * hfc, int channel, int mode) 939setup_bchannel(hfcusb_data *hfc, int channel, int mode)
940{ 940{
941 __u8 val, idx_table[2] = { 0, 2 }; 941 __u8 val, idx_table[2] = { 0, 2 };
942 942
@@ -999,100 +999,100 @@ hfc_usb_l2l1(struct hisax_if *my_hisax_if, int pr, void *arg)
999 hfcusb_data *hfc = fifo->hfc; 999 hfcusb_data *hfc = fifo->hfc;
1000 1000
1001 switch (pr) { 1001 switch (pr) {
1002 case PH_ACTIVATE | REQUEST: 1002 case PH_ACTIVATE | REQUEST:
1003 if (fifo->fifonum == HFCUSB_D_TX) { 1003 if (fifo->fifonum == HFCUSB_D_TX) {
1004 DBG(HFCUSB_DBG_STATES,
1005 "HFC_USB: hfc_usb_d_l2l1 D-chan: PH_ACTIVATE | REQUEST");
1006
1007 if (hfc->l1_state != 3
1008 && hfc->l1_state != 7) {
1009 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc,
1010 PH_DEACTIVATE |
1011 INDICATION,
1012 NULL);
1004 DBG(HFCUSB_DBG_STATES, 1013 DBG(HFCUSB_DBG_STATES,
1005 "HFC_USB: hfc_usb_d_l2l1 D-chan: PH_ACTIVATE | REQUEST"); 1014 "HFC-S USB: PH_DEACTIVATE | INDICATION sent (not state 3 or 7)");
1006 1015 } else {
1007 if (hfc->l1_state != 3 1016 if (hfc->l1_state == 7) { /* l1 already active */
1008 && hfc->l1_state != 7) { 1017 hfc->d_if.ifc.l1l2(&hfc->
1009 hfc->d_if.ifc.l1l2(&hfc->d_if.ifc, 1018 d_if.
1010 PH_DEACTIVATE | 1019 ifc,
1020 PH_ACTIVATE
1021 |
1011 INDICATION, 1022 INDICATION,
1012 NULL); 1023 NULL);
1013 DBG(HFCUSB_DBG_STATES, 1024 DBG(HFCUSB_DBG_STATES,
1014 "HFC-S USB: PH_DEACTIVATE | INDICATION sent (not state 3 or 7)"); 1025 "HFC-S USB: PH_ACTIVATE | INDICATION sent again ;)");
1015 } else { 1026 } else {
1016 if (hfc->l1_state == 7) { /* l1 already active */ 1027 /* force sending sending INFO1 */
1017 hfc->d_if.ifc.l1l2(&hfc-> 1028 queue_control_request(hfc,
1018 d_if. 1029 HFCUSB_STATES,
1019 ifc, 1030 0x14,
1020 PH_ACTIVATE 1031 1);
1021 | 1032 mdelay(1);
1022 INDICATION, 1033 /* start l1 activation */
1023 NULL); 1034 queue_control_request(hfc,
1024 DBG(HFCUSB_DBG_STATES, 1035 HFCUSB_STATES,
1025 "HFC-S USB: PH_ACTIVATE | INDICATION sent again ;)"); 1036 0x04,
1026 } else { 1037 1);
1027 /* force sending sending INFO1 */ 1038 if (!timer_pending
1028 queue_control_request(hfc, 1039 (&hfc->t3_timer)) {
1029 HFCUSB_STATES, 1040 hfc->t3_timer.
1030 0x14, 1041 expires =
1031 1); 1042 jiffies +
1032 mdelay(1); 1043 (HFC_TIMER_T3 *
1033 /* start l1 activation */ 1044 HZ) / 1000;
1034 queue_control_request(hfc, 1045 add_timer(&hfc->
1035 HFCUSB_STATES, 1046 t3_timer);
1036 0x04,
1037 1);
1038 if (!timer_pending
1039 (&hfc->t3_timer)) {
1040 hfc->t3_timer.
1041 expires =
1042 jiffies +
1043 (HFC_TIMER_T3 *
1044 HZ) / 1000;
1045 add_timer(&hfc->
1046 t3_timer);
1047 }
1048 } 1047 }
1049 } 1048 }
1050 } else {
1051 DBG(HFCUSB_DBG_STATES,
1052 "HFC_USB: hfc_usb_d_l2l1 B-chan: PH_ACTIVATE | REQUEST");
1053 setup_bchannel(hfc,
1054 (fifo->fifonum ==
1055 HFCUSB_B1_TX) ? 0 : 1,
1056 (long) arg);
1057 fifo->hif->l1l2(fifo->hif,
1058 PH_ACTIVATE | INDICATION,
1059 NULL);
1060 }
1061 break;
1062 case PH_DEACTIVATE | REQUEST:
1063 if (fifo->fifonum == HFCUSB_D_TX) {
1064 DBG(HFCUSB_DBG_STATES,
1065 "HFC_USB: hfc_usb_d_l2l1 D-chan: PH_DEACTIVATE | REQUEST");
1066 } else {
1067 DBG(HFCUSB_DBG_STATES,
1068 "HFC_USB: hfc_usb_d_l2l1 Bx-chan: PH_DEACTIVATE | REQUEST");
1069 setup_bchannel(hfc,
1070 (fifo->fifonum ==
1071 HFCUSB_B1_TX) ? 0 : 1,
1072 (int) L1_MODE_NULL);
1073 fifo->hif->l1l2(fifo->hif,
1074 PH_DEACTIVATE | INDICATION,
1075 NULL);
1076 }
1077 break;
1078 case PH_DATA | REQUEST:
1079 if (fifo->skbuff && fifo->delete_flg) {
1080 dev_kfree_skb_any(fifo->skbuff);
1081 fifo->skbuff = NULL;
1082 fifo->delete_flg = 0;
1083 } 1049 }
1084 fifo->skbuff = arg; /* we have a new buffer */ 1050 } else {
1085 break; 1051 DBG(HFCUSB_DBG_STATES,
1086 default: 1052 "HFC_USB: hfc_usb_d_l2l1 B-chan: PH_ACTIVATE | REQUEST");
1053 setup_bchannel(hfc,
1054 (fifo->fifonum ==
1055 HFCUSB_B1_TX) ? 0 : 1,
1056 (long) arg);
1057 fifo->hif->l1l2(fifo->hif,
1058 PH_ACTIVATE | INDICATION,
1059 NULL);
1060 }
1061 break;
1062 case PH_DEACTIVATE | REQUEST:
1063 if (fifo->fifonum == HFCUSB_D_TX) {
1064 DBG(HFCUSB_DBG_STATES,
1065 "HFC_USB: hfc_usb_d_l2l1 D-chan: PH_DEACTIVATE | REQUEST");
1066 } else {
1087 DBG(HFCUSB_DBG_STATES, 1067 DBG(HFCUSB_DBG_STATES,
1088 "HFC_USB: hfc_usb_d_l2l1: unknown state : %#x", pr); 1068 "HFC_USB: hfc_usb_d_l2l1 Bx-chan: PH_DEACTIVATE | REQUEST");
1089 break; 1069 setup_bchannel(hfc,
1070 (fifo->fifonum ==
1071 HFCUSB_B1_TX) ? 0 : 1,
1072 (int) L1_MODE_NULL);
1073 fifo->hif->l1l2(fifo->hif,
1074 PH_DEACTIVATE | INDICATION,
1075 NULL);
1076 }
1077 break;
1078 case PH_DATA | REQUEST:
1079 if (fifo->skbuff && fifo->delete_flg) {
1080 dev_kfree_skb_any(fifo->skbuff);
1081 fifo->skbuff = NULL;
1082 fifo->delete_flg = 0;
1083 }
1084 fifo->skbuff = arg; /* we have a new buffer */
1085 break;
1086 default:
1087 DBG(HFCUSB_DBG_STATES,
1088 "HFC_USB: hfc_usb_d_l2l1: unknown state : %#x", pr);
1089 break;
1090 } 1090 }
1091} 1091}
1092 1092
1093/* initial init HFC-S USB chip registers, HiSax interface, USB URBs */ 1093/* initial init HFC-S USB chip registers, HiSax interface, USB URBs */
1094static int 1094static int
1095hfc_usb_init(hfcusb_data * hfc) 1095hfc_usb_init(hfcusb_data *hfc)
1096{ 1096{
1097 usb_fifo *fifo; 1097 usb_fifo *fifo;
1098 int i; 1098 int i;
@@ -1138,7 +1138,7 @@ hfc_usb_init(hfcusb_data * hfc)
1138 write_usb(hfc, HFCUSB_FIFO, i); /* select the desired fifo */ 1138 write_usb(hfc, HFCUSB_FIFO, i); /* select the desired fifo */
1139 fifo[i].skbuff = NULL; /* init buffer pointer */ 1139 fifo[i].skbuff = NULL; /* init buffer pointer */
1140 fifo[i].max_size = 1140 fifo[i].max_size =
1141 (i <= HFCUSB_B2_RX) ? MAX_BCH_SIZE : MAX_DFRAME_LEN; 1141 (i <= HFCUSB_B2_RX) ? MAX_BCH_SIZE : MAX_DFRAME_LEN;
1142 fifo[i].last_urblen = 0; 1142 fifo[i].last_urblen = 0;
1143 /* set 2 bit for D- & E-channel */ 1143 /* set 2 bit for D- & E-channel */
1144 write_usb(hfc, HFCUSB_HDLC_PAR, 1144 write_usb(hfc, HFCUSB_HDLC_PAR,
@@ -1185,7 +1185,7 @@ hfc_usb_init(hfcusb_data * hfc)
1185 usb_fill_control_urb(hfc->ctrl_urb, 1185 usb_fill_control_urb(hfc->ctrl_urb,
1186 hfc->dev, 1186 hfc->dev,
1187 hfc->ctrl_out_pipe, 1187 hfc->ctrl_out_pipe,
1188 (u_char *) & hfc->ctrl_write, 1188 (u_char *)&hfc->ctrl_write,
1189 NULL, 0, ctrl_complete, hfc); 1189 NULL, 0, ctrl_complete, hfc);
1190 /* Init All Fifos */ 1190 /* Init All Fifos */
1191 for (i = 0; i < HFCUSB_NUM_FIFOS; i++) { 1191 for (i = 0; i < HFCUSB_NUM_FIFOS; i++) {
@@ -1264,9 +1264,9 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
1264 struct usb_host_endpoint *ep; 1264 struct usb_host_endpoint *ep;
1265 int ifnum = iface->desc.bInterfaceNumber; 1265 int ifnum = iface->desc.bInterfaceNumber;
1266 int i, idx, alt_idx, probe_alt_setting, vend_idx, cfg_used, *vcf, 1266 int i, idx, alt_idx, probe_alt_setting, vend_idx, cfg_used, *vcf,
1267 attr, cfg_found, cidx, ep_addr; 1267 attr, cfg_found, cidx, ep_addr;
1268 int cmptbl[16], small_match, iso_packet_size, packet_size, 1268 int cmptbl[16], small_match, iso_packet_size, packet_size,
1269 alt_used = 0; 1269 alt_used = 0;
1270 hfcsusb_vdata *driver_info; 1270 hfcsusb_vdata *driver_info;
1271 1271
1272 vend_idx = 0xffff; 1272 vend_idx = 0xffff;
@@ -1309,7 +1309,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
1309 for (i = 0; i < iface->desc.bNumEndpoints; 1309 for (i = 0; i < iface->desc.bNumEndpoints;
1310 i++) { 1310 i++) {
1311 ep_addr = 1311 ep_addr =
1312 ep->desc.bEndpointAddress; 1312 ep->desc.bEndpointAddress;
1313 /* get endpoint base */ 1313 /* get endpoint base */
1314 idx = ((ep_addr & 0x7f) - 1) * 2; 1314 idx = ((ep_addr & 0x7f) - 1) * 2;
1315 if (ep_addr & 0x80) 1315 if (ep_addr & 0x80)
@@ -1345,7 +1345,7 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
1345 if (cfg_used < small_match) { 1345 if (cfg_used < small_match) {
1346 small_match = cfg_used; 1346 small_match = cfg_used;
1347 alt_used = 1347 alt_used =
1348 probe_alt_setting; 1348 probe_alt_setting;
1349 iface_used = iface; 1349 iface_used = iface;
1350 } 1350 }
1351 } 1351 }
@@ -1376,95 +1376,95 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
1376 if (vcf[idx] != EP_NOP 1376 if (vcf[idx] != EP_NOP
1377 && vcf[idx] != EP_NUL) { 1377 && vcf[idx] != EP_NUL) {
1378 switch (attr) { 1378 switch (attr) {
1379 case USB_ENDPOINT_XFER_INT: 1379 case USB_ENDPOINT_XFER_INT:
1380 context-> 1380 context->
1381 fifos[cidx]. 1381 fifos[cidx].
1382 pipe = 1382 pipe =
1383 usb_rcvintpipe 1383 usb_rcvintpipe
1384 (dev, 1384 (dev,
1385 ep->desc. 1385 ep->desc.
1386 bEndpointAddress); 1386 bEndpointAddress);
1387 context->
1388 fifos[cidx].
1389 usb_transfer_mode
1390 = USB_INT;
1391 packet_size =
1392 le16_to_cpu(ep->desc.wMaxPacketSize);
1393 break;
1394 case USB_ENDPOINT_XFER_BULK:
1395 if (ep_addr & 0x80)
1387 context-> 1396 context->
1388 fifos[cidx]. 1397 fifos
1389 usb_transfer_mode 1398 [cidx].
1390 = USB_INT; 1399 pipe =
1391 packet_size = 1400 usb_rcvbulkpipe
1392 le16_to_cpu(ep->desc.wMaxPacketSize); 1401 (dev,
1393 break; 1402 ep->
1394 case USB_ENDPOINT_XFER_BULK: 1403 desc.
1395 if (ep_addr & 0x80) 1404 bEndpointAddress);
1396 context-> 1405 else
1397 fifos
1398 [cidx].
1399 pipe =
1400 usb_rcvbulkpipe
1401 (dev,
1402 ep->
1403 desc.
1404 bEndpointAddress);
1405 else
1406 context->
1407 fifos
1408 [cidx].
1409 pipe =
1410 usb_sndbulkpipe
1411 (dev,
1412 ep->
1413 desc.
1414 bEndpointAddress);
1415 context-> 1406 context->
1416 fifos[cidx]. 1407 fifos
1417 usb_transfer_mode 1408 [cidx].
1418 = USB_BULK; 1409 pipe =
1419 packet_size = 1410 usb_sndbulkpipe
1420 le16_to_cpu(ep->desc.wMaxPacketSize); 1411 (dev,
1421 break; 1412 ep->
1422 case USB_ENDPOINT_XFER_ISOC: 1413 desc.
1423 if (ep_addr & 0x80) 1414 bEndpointAddress);
1424 context-> 1415 context->
1425 fifos 1416 fifos[cidx].
1426 [cidx]. 1417 usb_transfer_mode
1427 pipe = 1418 = USB_BULK;
1428 usb_rcvisocpipe 1419 packet_size =
1429 (dev, 1420 le16_to_cpu(ep->desc.wMaxPacketSize);
1430 ep-> 1421 break;
1431 desc. 1422 case USB_ENDPOINT_XFER_ISOC:
1432 bEndpointAddress); 1423 if (ep_addr & 0x80)
1433 else
1434 context->
1435 fifos
1436 [cidx].
1437 pipe =
1438 usb_sndisocpipe
1439 (dev,
1440 ep->
1441 desc.
1442 bEndpointAddress);
1443 context-> 1424 context->
1444 fifos[cidx]. 1425 fifos
1445 usb_transfer_mode 1426 [cidx].
1446 = USB_ISOC; 1427 pipe =
1447 iso_packet_size = 1428 usb_rcvisocpipe
1448 le16_to_cpu(ep->desc.wMaxPacketSize); 1429 (dev,
1449 break; 1430 ep->
1450 default: 1431 desc.
1432 bEndpointAddress);
1433 else
1451 context-> 1434 context->
1452 fifos[cidx]. 1435 fifos
1453 pipe = 0; 1436 [cidx].
1437 pipe =
1438 usb_sndisocpipe
1439 (dev,
1440 ep->
1441 desc.
1442 bEndpointAddress);
1443 context->
1444 fifos[cidx].
1445 usb_transfer_mode
1446 = USB_ISOC;
1447 iso_packet_size =
1448 le16_to_cpu(ep->desc.wMaxPacketSize);
1449 break;
1450 default:
1451 context->
1452 fifos[cidx].
1453 pipe = 0;
1454 } /* switch attribute */ 1454 } /* switch attribute */
1455 1455
1456 if (context->fifos[cidx].pipe) { 1456 if (context->fifos[cidx].pipe) {
1457 context->fifos[cidx]. 1457 context->fifos[cidx].
1458 fifonum = cidx; 1458 fifonum = cidx;
1459 context->fifos[cidx].hfc = 1459 context->fifos[cidx].hfc =
1460 context; 1460 context;
1461 context->fifos[cidx].usb_packet_maxlen = 1461 context->fifos[cidx].usb_packet_maxlen =
1462 le16_to_cpu(ep->desc.wMaxPacketSize); 1462 le16_to_cpu(ep->desc.wMaxPacketSize);
1463 context->fifos[cidx]. 1463 context->fifos[cidx].
1464 intervall = 1464 intervall =
1465 ep->desc.bInterval; 1465 ep->desc.bInterval;
1466 context->fifos[cidx]. 1466 context->fifos[cidx].
1467 skbuff = NULL; 1467 skbuff = NULL;
1468 } 1468 }
1469 } 1469 }
1470 ep++; 1470 ep++;
@@ -1480,14 +1480,14 @@ hfc_usb_probe(struct usb_interface *intf, const struct usb_device_id *id)
1480 1480
1481 /* create the control pipes needed for register access */ 1481 /* create the control pipes needed for register access */
1482 context->ctrl_in_pipe = 1482 context->ctrl_in_pipe =
1483 usb_rcvctrlpipe(context->dev, 0); 1483 usb_rcvctrlpipe(context->dev, 0);
1484 context->ctrl_out_pipe = 1484 context->ctrl_out_pipe =
1485 usb_sndctrlpipe(context->dev, 0); 1485 usb_sndctrlpipe(context->dev, 0);
1486 context->ctrl_urb = usb_alloc_urb(0, GFP_KERNEL); 1486 context->ctrl_urb = usb_alloc_urb(0, GFP_KERNEL);
1487 1487
1488 driver_info = 1488 driver_info =
1489 (hfcsusb_vdata *) hfcusb_idtab[vend_idx]. 1489 (hfcsusb_vdata *) hfcusb_idtab[vend_idx].
1490 driver_info; 1490 driver_info;
1491 printk(KERN_INFO "HFC-S USB: detected \"%s\"\n", 1491 printk(KERN_INFO "HFC-S USB: detected \"%s\"\n",
1492 driver_info->vend_name); 1492 driver_info->vend_name);
1493 1493
diff --git a/drivers/isdn/hisax/hfc_usb.h b/drivers/isdn/hisax/hfc_usb.h
index 2f581c0b4693..f987bf89da1a 100644
--- a/drivers/isdn/hisax/hfc_usb.h
+++ b/drivers/isdn/hisax/hfc_usb.h
@@ -76,11 +76,11 @@
76#define SINK_MIN 48 76#define SINK_MIN 48
77#define SINK_DMIN 12 77#define SINK_DMIN 12
78#define SINK_DMAX 18 78#define SINK_DMAX 18
79#define BITLINE_INF (-64*8) 79#define BITLINE_INF (-64 * 8)
80 80
81/* HFC-S USB register access by Control-URSs */ 81/* HFC-S USB register access by Control-URSs */
82#define write_usb(a,b,c)usb_control_msg((a)->dev,(a)->ctrl_out_pipe,0,0x40,(c),(b),NULL,0,HFC_CTRL_TIMEOUT) 82#define write_usb(a, b, c) usb_control_msg((a)->dev, (a)->ctrl_out_pipe, 0, 0x40, (c), (b), NULL, 0, HFC_CTRL_TIMEOUT)
83#define read_usb(a,b,c) usb_control_msg((a)->dev,(a)->ctrl_in_pipe,1,0xC0,0,(b),(c),1,HFC_CTRL_TIMEOUT) 83#define read_usb(a, b, c) usb_control_msg((a)->dev, (a)->ctrl_in_pipe, 1, 0xC0, 0, (b), (c), 1, HFC_CTRL_TIMEOUT)
84#define HFC_CTRL_BUFSIZE 32 84#define HFC_CTRL_BUFSIZE 32
85 85
86/* entry and size of output/input control buffer */ 86/* entry and size of output/input control buffer */
@@ -200,8 +200,8 @@ typedef struct {
200#define LED_B2_OFF 9 200#define LED_B2_OFF 9
201#define LED_B2_DATA 10 201#define LED_B2_DATA 10
202 202
203#define LED_NORMAL 0 // LEDs are normal 203#define LED_NORMAL 0 // LEDs are normal
204#define LED_INVERTED 1 // LEDs are inverted 204#define LED_INVERTED 1 // LEDs are inverted
205 205
206 206
207#endif // __HFC_USB_H__ 207#endif // __HFC_USB_H__
diff --git a/drivers/isdn/hisax/hfcscard.c b/drivers/isdn/hisax/hfcscard.c
index 20d7688b397b..a5f048bd2bb3 100644
--- a/drivers/isdn/hisax/hfcscard.c
+++ b/drivers/isdn/hisax/hfcscard.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -26,8 +26,8 @@ hfcs_interrupt(int intno, void *dev_id)
26 u_long flags; 26 u_long flags;
27 27
28 spin_lock_irqsave(&cs->lock, flags); 28 spin_lock_irqsave(&cs->lock, flags);
29 if ((HFCD_ANYINT | HFCD_BUSY_NBUSY) & 29 if ((HFCD_ANYINT | HFCD_BUSY_NBUSY) &
30 (stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) { 30 (stat = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_STAT))) {
31 val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1); 31 val = cs->BC_Read_Reg(cs, HFCD_DATA, HFCD_INT_S1);
32 if (cs->debug & L1_DEB_ISAC) 32 if (cs->debug & L1_DEB_ISAC)
33 debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val); 33 debugl1(cs, "HFCS: stat(%02x) s1(%02x)", stat, val);
@@ -106,57 +106,57 @@ hfcs_card_msg(struct IsdnCardState *cs, int mt, void *arg)
106 if (cs->debug & L1_DEB_ISAC) 106 if (cs->debug & L1_DEB_ISAC)
107 debugl1(cs, "HFCS: card_msg %x", mt); 107 debugl1(cs, "HFCS: card_msg %x", mt);
108 switch (mt) { 108 switch (mt) {
109 case CARD_RESET: 109 case CARD_RESET:
110 spin_lock_irqsave(&cs->lock, flags); 110 spin_lock_irqsave(&cs->lock, flags);
111 reset_hfcs(cs); 111 reset_hfcs(cs);
112 spin_unlock_irqrestore(&cs->lock, flags); 112 spin_unlock_irqrestore(&cs->lock, flags);
113 return(0); 113 return (0);
114 case CARD_RELEASE: 114 case CARD_RELEASE:
115 release_io_hfcs(cs); 115 release_io_hfcs(cs);
116 return(0); 116 return (0);
117 case CARD_INIT: 117 case CARD_INIT:
118 delay = (75*HZ)/100 +1; 118 delay = (75 * HZ) / 100 + 1;
119 mod_timer(&cs->hw.hfcD.timer, jiffies + delay); 119 mod_timer(&cs->hw.hfcD.timer, jiffies + delay);
120 spin_lock_irqsave(&cs->lock, flags); 120 spin_lock_irqsave(&cs->lock, flags);
121 reset_hfcs(cs); 121 reset_hfcs(cs);
122 init2bds0(cs); 122 init2bds0(cs);
123 spin_unlock_irqrestore(&cs->lock, flags); 123 spin_unlock_irqrestore(&cs->lock, flags);
124 delay = (80*HZ)/1000 +1; 124 delay = (80 * HZ) / 1000 + 1;
125 msleep(80); 125 msleep(80);
126 spin_lock_irqsave(&cs->lock, flags); 126 spin_lock_irqsave(&cs->lock, flags);
127 cs->hw.hfcD.ctmt |= HFCD_TIM800; 127 cs->hw.hfcD.ctmt |= HFCD_TIM800;
128 cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt); 128 cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_CTMT, cs->hw.hfcD.ctmt);
129 cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m); 129 cs->BC_Write_Reg(cs, HFCD_DATA, HFCD_MST_MODE, cs->hw.hfcD.mst_m);
130 spin_unlock_irqrestore(&cs->lock, flags); 130 spin_unlock_irqrestore(&cs->lock, flags);
131 return(0); 131 return (0);
132 case CARD_TEST: 132 case CARD_TEST:
133 return(0); 133 return (0);
134 } 134 }
135 return(0); 135 return (0);
136} 136}
137 137
138#ifdef __ISAPNP__ 138#ifdef __ISAPNP__
139static struct isapnp_device_id hfc_ids[] __devinitdata = { 139static struct isapnp_device_id hfc_ids[] __devinitdata = {
140 { ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114), 140 { ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114),
141 ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114), 141 ISAPNP_VENDOR('A', 'N', 'X'), ISAPNP_FUNCTION(0x1114),
142 (unsigned long) "Acer P10" }, 142 (unsigned long) "Acer P10" },
143 { ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002), 143 { ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002),
144 ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002), 144 ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0002),
145 (unsigned long) "Billion 2" }, 145 (unsigned long) "Billion 2" },
146 { ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001), 146 { ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001),
147 ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001), 147 ISAPNP_VENDOR('B', 'I', 'L'), ISAPNP_FUNCTION(0x0001),
148 (unsigned long) "Billion 1" }, 148 (unsigned long) "Billion 1" },
149 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410), 149 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410),
150 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410), 150 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x7410),
151 (unsigned long) "IStar PnP" }, 151 (unsigned long) "IStar PnP" },
152 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610), 152 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610),
153 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610), 153 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2610),
154 (unsigned long) "Teles 16.3c" }, 154 (unsigned long) "Teles 16.3c" },
155 { ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001), 155 { ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001),
156 ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001), 156 ISAPNP_VENDOR('S', 'F', 'M'), ISAPNP_FUNCTION(0x0001),
157 (unsigned long) "Tornado Tipa C" }, 157 (unsigned long) "Tornado Tipa C" },
158 { ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001), 158 { ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001),
159 ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001), 159 ISAPNP_VENDOR('K', 'Y', 'E'), ISAPNP_FUNCTION(0x0001),
160 (unsigned long) "Genius Speed Surfer" }, 160 (unsigned long) "Genius Speed Surfer" },
161 { 0, } 161 { 0, }
162}; 162};
@@ -177,30 +177,30 @@ setup_hfcs(struct IsdnCard *card)
177#ifdef __ISAPNP__ 177#ifdef __ISAPNP__
178 if (!card->para[1] && isapnp_present()) { 178 if (!card->para[1] && isapnp_present()) {
179 struct pnp_dev *pnp_d; 179 struct pnp_dev *pnp_d;
180 while(ipid->card_vendor) { 180 while (ipid->card_vendor) {
181 if ((pnp_c = pnp_find_card(ipid->card_vendor, 181 if ((pnp_c = pnp_find_card(ipid->card_vendor,
182 ipid->card_device, pnp_c))) { 182 ipid->card_device, pnp_c))) {
183 pnp_d = NULL; 183 pnp_d = NULL;
184 if ((pnp_d = pnp_find_dev(pnp_c, 184 if ((pnp_d = pnp_find_dev(pnp_c,
185 ipid->vendor, ipid->function, pnp_d))) { 185 ipid->vendor, ipid->function, pnp_d))) {
186 int err; 186 int err;
187 187
188 printk(KERN_INFO "HiSax: %s detected\n", 188 printk(KERN_INFO "HiSax: %s detected\n",
189 (char *)ipid->driver_data); 189 (char *)ipid->driver_data);
190 pnp_disable_dev(pnp_d); 190 pnp_disable_dev(pnp_d);
191 err = pnp_activate_dev(pnp_d); 191 err = pnp_activate_dev(pnp_d);
192 if (err<0) { 192 if (err < 0) {
193 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 193 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
194 __func__, err); 194 __func__, err);
195 return(0); 195 return (0);
196 } 196 }
197 card->para[1] = pnp_port_start(pnp_d, 0); 197 card->para[1] = pnp_port_start(pnp_d, 0);
198 card->para[0] = pnp_irq(pnp_d, 0); 198 card->para[0] = pnp_irq(pnp_d, 0);
199 if (!card->para[0] || !card->para[1]) { 199 if (!card->para[0] || !card->para[1]) {
200 printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n", 200 printk(KERN_ERR "HFC PnP:some resources are missing %ld/%lx\n",
201 card->para[0], card->para[1]); 201 card->para[0], card->para[1]);
202 pnp_disable_dev(pnp_d); 202 pnp_disable_dev(pnp_d);
203 return(0); 203 return (0);
204 } 204 }
205 break; 205 break;
206 } else { 206 } else {
@@ -209,10 +209,10 @@ setup_hfcs(struct IsdnCard *card)
209 } 209 }
210 ipid++; 210 ipid++;
211 pnp_c = NULL; 211 pnp_c = NULL;
212 } 212 }
213 if (!ipid->card_vendor) { 213 if (!ipid->card_vendor) {
214 printk(KERN_INFO "HFC PnP: no ISAPnP card found\n"); 214 printk(KERN_INFO "HFC PnP: no ISAPnP card found\n");
215 return(0); 215 return (0);
216 } 216 }
217 } 217 }
218#endif 218#endif
@@ -229,7 +229,7 @@ setup_hfcs(struct IsdnCard *card)
229 if (cs->typ == ISDN_CTYPE_TELES3C) { 229 if (cs->typ == ISDN_CTYPE_TELES3C) {
230 cs->hw.hfcD.bfifosize = 1024 + 512; 230 cs->hw.hfcD.bfifosize = 1024 + 512;
231 } else if (cs->typ == ISDN_CTYPE_ACERP10) { 231 } else if (cs->typ == ISDN_CTYPE_ACERP10) {
232 cs->hw.hfcD.bfifosize = 7*1024 + 512; 232 cs->hw.hfcD.bfifosize = 7 * 1024 + 512;
233 } else 233 } else
234 return (0); 234 return (0);
235 if (!request_region(cs->hw.hfcD.addr, 2, "HFCS isdn")) { 235 if (!request_region(cs->hw.hfcD.addr, 2, "HFCS isdn")) {
diff --git a/drivers/isdn/hisax/hisax.h b/drivers/isdn/hisax/hisax.h
index aff45a11a92d..6ead6314e6d2 100644
--- a/drivers/isdn/hisax/hisax.h
+++ b/drivers/isdn/hisax/hisax.h
@@ -133,15 +133,15 @@ extern const char *tei_revision;
133 133
134/* include l3dss1 & ni1 specific process structures, but no other defines */ 134/* include l3dss1 & ni1 specific process structures, but no other defines */
135#ifdef CONFIG_HISAX_EURO 135#ifdef CONFIG_HISAX_EURO
136 #define l3dss1_process 136#define l3dss1_process
137 #include "l3dss1.h" 137#include "l3dss1.h"
138 #undef l3dss1_process 138#undef l3dss1_process
139#endif /* CONFIG_HISAX_EURO */ 139#endif /* CONFIG_HISAX_EURO */
140 140
141#ifdef CONFIG_HISAX_NI1 141#ifdef CONFIG_HISAX_NI1
142 #define l3ni1_process 142#define l3ni1_process
143 #include "l3ni1.h" 143#include "l3ni1.h"
144 #undef l3ni1_process 144#undef l3ni1_process
145#endif /* CONFIG_HISAX_NI1 */ 145#endif /* CONFIG_HISAX_NI1 */
146 146
147#define MAX_DFRAME_LEN 260 147#define MAX_DFRAME_LEN 260
@@ -149,7 +149,7 @@ extern const char *tei_revision;
149#define HSCX_BUFMAX 4096 149#define HSCX_BUFMAX 4096
150#define MAX_DATA_SIZE (HSCX_BUFMAX - 4) 150#define MAX_DATA_SIZE (HSCX_BUFMAX - 4)
151#define MAX_DATA_MEM (HSCX_BUFMAX + 64) 151#define MAX_DATA_MEM (HSCX_BUFMAX + 64)
152#define RAW_BUFMAX (((HSCX_BUFMAX*6)/5) + 5) 152#define RAW_BUFMAX (((HSCX_BUFMAX * 6) / 5) + 5)
153#define MAX_HEADER_LEN 4 153#define MAX_HEADER_LEN 4
154#define MAX_WINDOW 8 154#define MAX_WINDOW 8
155#define MAX_MON_FRAME 32 155#define MAX_MON_FRAME 32
@@ -165,7 +165,7 @@ extern const char *tei_revision;
165 165
166struct FsmInst; 166struct FsmInst;
167 167
168typedef void (* FSMFNPTR)(struct FsmInst *, int, void *); 168typedef void (*FSMFNPTR)(struct FsmInst *, int, void *);
169 169
170struct Fsm { 170struct Fsm {
171 FSMFNPTR *jumpmatrix; 171 FSMFNPTR *jumpmatrix;
@@ -272,10 +272,10 @@ struct Layer2 {
272 272
273struct Layer3 { 273struct Layer3 {
274 void (*l3l4) (struct PStack *, int, void *); 274 void (*l3l4) (struct PStack *, int, void *);
275 void (*l3ml3) (struct PStack *, int, void *); 275 void (*l3ml3) (struct PStack *, int, void *);
276 void (*l3l2) (struct PStack *, int, void *); 276 void (*l3l2) (struct PStack *, int, void *);
277 struct FsmInst l3m; 277 struct FsmInst l3m;
278 struct FsmTimer l3m_timer; 278 struct FsmTimer l3m_timer;
279 struct sk_buff_head squeue; 279 struct sk_buff_head squeue;
280 struct l3_process *proc; 280 struct l3_process *proc;
281 struct l3_process *global; 281 struct l3_process *global;
@@ -286,7 +286,7 @@ struct Layer3 {
286 286
287struct LLInterface { 287struct LLInterface {
288 void (*l4l3) (struct PStack *, int, void *); 288 void (*l4l3) (struct PStack *, int, void *);
289 int (*l4l3_proto) (struct PStack *, isdn_ctrl *); 289 int (*l4l3_proto) (struct PStack *, isdn_ctrl *);
290 void *userdata; 290 void *userdata;
291 u_long flag; 291 u_long flag;
292}; 292};
@@ -325,16 +325,16 @@ struct PStack {
325 struct Management ma; 325 struct Management ma;
326 int protocol; /* EDSS1, 1TR6 or NI1 */ 326 int protocol; /* EDSS1, 1TR6 or NI1 */
327 327
328 /* protocol specific data fields */ 328 /* protocol specific data fields */
329 union 329 union
330 { u_char uuuu; /* only as dummy */ 330 { u_char uuuu; /* only as dummy */
331#ifdef CONFIG_HISAX_EURO 331#ifdef CONFIG_HISAX_EURO
332 dss1_stk_priv dss1; /* private dss1 data */ 332 dss1_stk_priv dss1; /* private dss1 data */
333#endif /* CONFIG_HISAX_EURO */ 333#endif /* CONFIG_HISAX_EURO */
334#ifdef CONFIG_HISAX_NI1 334#ifdef CONFIG_HISAX_NI1
335 ni1_stk_priv ni1; /* private ni1 data */ 335 ni1_stk_priv ni1; /* private ni1 data */
336#endif /* CONFIG_HISAX_NI1 */ 336#endif /* CONFIG_HISAX_NI1 */
337 } prot; 337 } prot;
338}; 338};
339 339
340struct l3_process { 340struct l3_process {
@@ -347,18 +347,18 @@ struct l3_process {
347 struct Channel *chan; 347 struct Channel *chan;
348 struct PStack *st; 348 struct PStack *st;
349 struct l3_process *next; 349 struct l3_process *next;
350 ulong redir_result; 350 ulong redir_result;
351 351
352 /* protocol specific data fields */ 352 /* protocol specific data fields */
353 union 353 union
354 { u_char uuuu; /* only when euro not defined, avoiding empty union */ 354 { u_char uuuu; /* only when euro not defined, avoiding empty union */
355#ifdef CONFIG_HISAX_EURO 355#ifdef CONFIG_HISAX_EURO
356 dss1_proc_priv dss1; /* private dss1 data */ 356 dss1_proc_priv dss1; /* private dss1 data */
357#endif /* CONFIG_HISAX_EURO */ 357#endif /* CONFIG_HISAX_EURO */
358#ifdef CONFIG_HISAX_NI1 358#ifdef CONFIG_HISAX_NI1
359 ni1_proc_priv ni1; /* private ni1 data */ 359 ni1_proc_priv ni1; /* private ni1 data */
360#endif /* CONFIG_HISAX_NI1 */ 360#endif /* CONFIG_HISAX_NI1 */
361 } prot; 361 } prot;
362}; 362};
363 363
364struct hscx_hw { 364struct hscx_hw {
@@ -642,7 +642,7 @@ struct hfc_hw {
642 unsigned char cip; 642 unsigned char cip;
643 u_char isac_spcr; 643 u_char isac_spcr;
644 struct timer_list timer; 644 struct timer_list timer;
645}; 645};
646 646
647struct sedl_hw { 647struct sedl_hw {
648 unsigned int cfg_reg; 648 unsigned int cfg_reg;
@@ -693,25 +693,25 @@ struct hfcPCI_hw {
693 unsigned char int_m2; 693 unsigned char int_m2;
694 unsigned char int_s1; 694 unsigned char int_s1;
695 unsigned char sctrl; 695 unsigned char sctrl;
696 unsigned char sctrl_r; 696 unsigned char sctrl_r;
697 unsigned char sctrl_e; 697 unsigned char sctrl_e;
698 unsigned char trm; 698 unsigned char trm;
699 unsigned char stat; 699 unsigned char stat;
700 unsigned char fifo; 700 unsigned char fifo;
701 unsigned char fifo_en; 701 unsigned char fifo_en;
702 unsigned char bswapped; 702 unsigned char bswapped;
703 unsigned char nt_mode; 703 unsigned char nt_mode;
704 int nt_timer; 704 int nt_timer;
705 struct pci_dev *dev; 705 struct pci_dev *dev;
706 unsigned char *pci_io; /* start of PCI IO memory */ 706 unsigned char *pci_io; /* start of PCI IO memory */
707 dma_addr_t dma; /* dma handle for Fifos */ 707 dma_addr_t dma; /* dma handle for Fifos */
708 void *fifos; /* FIFO memory */ 708 void *fifos; /* FIFO memory */
709 int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */ 709 int last_bfifo_cnt[2]; /* marker saving last b-fifo frame count */
710 struct timer_list timer; 710 struct timer_list timer;
711}; 711};
712 712
713struct hfcSX_hw { 713struct hfcSX_hw {
714 unsigned long base; 714 unsigned long base;
715 unsigned char cirm; 715 unsigned char cirm;
716 unsigned char ctmt; 716 unsigned char ctmt;
717 unsigned char conn; 717 unsigned char conn;
@@ -720,18 +720,18 @@ struct hfcSX_hw {
720 unsigned char int_m2; 720 unsigned char int_m2;
721 unsigned char int_s1; 721 unsigned char int_s1;
722 unsigned char sctrl; 722 unsigned char sctrl;
723 unsigned char sctrl_r; 723 unsigned char sctrl_r;
724 unsigned char sctrl_e; 724 unsigned char sctrl_e;
725 unsigned char trm; 725 unsigned char trm;
726 unsigned char stat; 726 unsigned char stat;
727 unsigned char fifo; 727 unsigned char fifo;
728 unsigned char bswapped; 728 unsigned char bswapped;
729 unsigned char nt_mode; 729 unsigned char nt_mode;
730 unsigned char chip; 730 unsigned char chip;
731 int b_fifo_size; 731 int b_fifo_size;
732 unsigned char last_fifo; 732 unsigned char last_fifo;
733 void *extra; 733 void *extra;
734 int nt_timer; 734 int nt_timer;
735 struct timer_list timer; 735 struct timer_list timer;
736}; 736};
737 737
@@ -784,13 +784,13 @@ struct bkm_hw {
784 /* Scitel Quadro stuff */ 784 /* Scitel Quadro stuff */
785 unsigned long plx_adr; 785 unsigned long plx_adr;
786 unsigned long data_adr; 786 unsigned long data_adr;
787}; 787};
788 788
789struct gazel_hw { 789struct gazel_hw {
790 struct pci_dev *dev; 790 struct pci_dev *dev;
791 unsigned int cfg_reg; 791 unsigned int cfg_reg;
792 unsigned int pciaddr[2]; 792 unsigned int pciaddr[2];
793 signed int ipac; 793 signed int ipac;
794 signed int isac; 794 signed int isac;
795 signed int hscx[2]; 795 signed int hscx[2];
796 signed int isacfifo; 796 signed int isacfifo;
@@ -877,8 +877,8 @@ struct icc_chip {
877#define HW_ARCOFI 3 877#define HW_ARCOFI 3
878#define FLG_TWO_DCHAN 4 878#define FLG_TWO_DCHAN 4
879#define FLG_L1_DBUSY 5 879#define FLG_L1_DBUSY 5
880#define FLG_DBUSY_TIMER 6 880#define FLG_DBUSY_TIMER 6
881#define FLG_LOCK_ATOMIC 7 881#define FLG_LOCK_ATOMIC 7
882#define FLG_ARCOFI_TIMER 8 882#define FLG_ARCOFI_TIMER 8
883#define FLG_ARCOFI_ERROR 9 883#define FLG_ARCOFI_ERROR 9
884#define FLG_HW_L1_UINT 10 884#define FLG_HW_L1_UINT 10
@@ -892,8 +892,8 @@ struct IsdnCardState {
892 u_long irq_flags; 892 u_long irq_flags;
893 u_long HW_Flags; 893 u_long HW_Flags;
894 int *busy_flag; 894 int *busy_flag;
895 int chanlimit; /* limited number of B-chans to use */ 895 int chanlimit; /* limited number of B-chans to use */
896 int logecho; /* log echo if supported by card */ 896 int logecho; /* log echo if supported by card */
897 union { 897 union {
898 struct elsa_hw elsa; 898 struct elsa_hw elsa;
899 struct teles0_hw teles0; 899 struct teles0_hw teles0;
@@ -937,8 +937,8 @@ struct IsdnCardState {
937 void (*DC_Close) (struct IsdnCardState *); 937 void (*DC_Close) (struct IsdnCardState *);
938 irq_handler_t irq_func; 938 irq_handler_t irq_func;
939 int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *); 939 int (*auxcmd) (struct IsdnCardState *, isdn_ctrl *);
940 struct Channel channel[2+MAX_WAITING_CALLS]; 940 struct Channel channel[2 + MAX_WAITING_CALLS];
941 struct BCState bcs[2+MAX_WAITING_CALLS]; 941 struct BCState bcs[2 + MAX_WAITING_CALLS];
942 struct PStack *stlist; 942 struct PStack *stlist;
943 struct sk_buff_head rq, sq; /* D-channel queues */ 943 struct sk_buff_head rq, sq; /* D-channel queues */
944 int cardnr; 944 int cardnr;
@@ -969,7 +969,7 @@ struct IsdnCardState {
969}; 969};
970 970
971 971
972#define schedule_event(s, ev) do {test_and_set_bit(ev, &s->event);schedule_work(&s->tqueue); } while(0) 972#define schedule_event(s, ev) do { test_and_set_bit(ev, &s->event); schedule_work(&s->tqueue); } while (0)
973 973
974#define MON0_RX 1 974#define MON0_RX 1
975#define MON1_RX 2 975#define MON1_RX 2
@@ -1053,7 +1053,7 @@ struct IsdnCardState {
1053#define CARD_IX1MICROR2 0 1053#define CARD_IX1MICROR2 0
1054#endif 1054#endif
1055 1055
1056#ifdef CONFIG_HISAX_DIEHLDIVA 1056#ifdef CONFIG_HISAX_DIEHLDIVA
1057#define CARD_DIEHLDIVA 1 1057#define CARD_DIEHLDIVA 1
1058#ifndef ISDN_CHIP_ISAC 1058#ifndef ISDN_CHIP_ISAC
1059#define ISDN_CHIP_ISAC 1 1059#define ISDN_CHIP_ISAC 1
@@ -1062,7 +1062,7 @@ struct IsdnCardState {
1062#define CARD_DIEHLDIVA 0 1062#define CARD_DIEHLDIVA 0
1063#endif 1063#endif
1064 1064
1065#ifdef CONFIG_HISAX_ASUSCOM 1065#ifdef CONFIG_HISAX_ASUSCOM
1066#define CARD_ASUSCOM 1 1066#define CARD_ASUSCOM 1
1067#ifndef ISDN_CHIP_ISAC 1067#ifndef ISDN_CHIP_ISAC
1068#define ISDN_CHIP_ISAC 1 1068#define ISDN_CHIP_ISAC 1
@@ -1071,7 +1071,7 @@ struct IsdnCardState {
1071#define CARD_ASUSCOM 0 1071#define CARD_ASUSCOM 0
1072#endif 1072#endif
1073 1073
1074#ifdef CONFIG_HISAX_TELEINT 1074#ifdef CONFIG_HISAX_TELEINT
1075#define CARD_TELEINT 1 1075#define CARD_TELEINT 1
1076#ifndef ISDN_CHIP_ISAC 1076#ifndef ISDN_CHIP_ISAC
1077#define ISDN_CHIP_ISAC 1 1077#define ISDN_CHIP_ISAC 1
@@ -1080,7 +1080,7 @@ struct IsdnCardState {
1080#define CARD_TELEINT 0 1080#define CARD_TELEINT 0
1081#endif 1081#endif
1082 1082
1083#ifdef CONFIG_HISAX_SEDLBAUER 1083#ifdef CONFIG_HISAX_SEDLBAUER
1084#define CARD_SEDLBAUER 1 1084#define CARD_SEDLBAUER 1
1085#ifndef ISDN_CHIP_ISAC 1085#ifndef ISDN_CHIP_ISAC
1086#define ISDN_CHIP_ISAC 1 1086#define ISDN_CHIP_ISAC 1
@@ -1089,7 +1089,7 @@ struct IsdnCardState {
1089#define CARD_SEDLBAUER 0 1089#define CARD_SEDLBAUER 0
1090#endif 1090#endif
1091 1091
1092#ifdef CONFIG_HISAX_SPORTSTER 1092#ifdef CONFIG_HISAX_SPORTSTER
1093#define CARD_SPORTSTER 1 1093#define CARD_SPORTSTER 1
1094#ifndef ISDN_CHIP_ISAC 1094#ifndef ISDN_CHIP_ISAC
1095#define ISDN_CHIP_ISAC 1 1095#define ISDN_CHIP_ISAC 1
@@ -1098,7 +1098,7 @@ struct IsdnCardState {
1098#define CARD_SPORTSTER 0 1098#define CARD_SPORTSTER 0
1099#endif 1099#endif
1100 1100
1101#ifdef CONFIG_HISAX_MIC 1101#ifdef CONFIG_HISAX_MIC
1102#define CARD_MIC 1 1102#define CARD_MIC 1
1103#ifndef ISDN_CHIP_ISAC 1103#ifndef ISDN_CHIP_ISAC
1104#define ISDN_CHIP_ISAC 1 1104#define ISDN_CHIP_ISAC 1
@@ -1107,7 +1107,7 @@ struct IsdnCardState {
1107#define CARD_MIC 0 1107#define CARD_MIC 0
1108#endif 1108#endif
1109 1109
1110#ifdef CONFIG_HISAX_NETJET 1110#ifdef CONFIG_HISAX_NETJET
1111#define CARD_NETJET_S 1 1111#define CARD_NETJET_S 1
1112#ifndef ISDN_CHIP_ISAC 1112#ifndef ISDN_CHIP_ISAC
1113#define ISDN_CHIP_ISAC 1 1113#define ISDN_CHIP_ISAC 1
@@ -1206,7 +1206,7 @@ struct IsdnCardState {
1206#define CARD_W6692 0 1206#define CARD_W6692 0
1207#endif 1207#endif
1208 1208
1209#ifdef CONFIG_HISAX_NETJET_U 1209#ifdef CONFIG_HISAX_NETJET_U
1210#define CARD_NETJET_U 1 1210#define CARD_NETJET_U 1
1211#ifndef ISDN_CHIP_ICC 1211#ifndef ISDN_CHIP_ICC
1212#define ISDN_CHIP_ICC 1 1212#define ISDN_CHIP_ICC 1
@@ -1269,8 +1269,8 @@ void setstack_l3dc(struct PStack *st, struct Channel *chanp);
1269void setstack_l3bc(struct PStack *st, struct Channel *chanp); 1269void setstack_l3bc(struct PStack *st, struct Channel *chanp);
1270void releasestack_isdnl3(struct PStack *st); 1270void releasestack_isdnl3(struct PStack *st);
1271 1271
1272u_char *findie(u_char * p, int size, u_char ie, int wanted_set); 1272u_char *findie(u_char *p, int size, u_char ie, int wanted_set);
1273int getcallref(u_char * p); 1273int getcallref(u_char *p);
1274int newcallref(void); 1274int newcallref(void);
1275 1275
1276int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount); 1276int FsmNew(struct Fsm *fsm, struct FsmNode *fnlist, int fncount);
@@ -1279,36 +1279,36 @@ int FsmEvent(struct FsmInst *fi, int event, void *arg);
1279void FsmChangeState(struct FsmInst *fi, int newstate); 1279void FsmChangeState(struct FsmInst *fi, int newstate);
1280void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft); 1280void FsmInitTimer(struct FsmInst *fi, struct FsmTimer *ft);
1281int FsmAddTimer(struct FsmTimer *ft, int millisec, int event, 1281int FsmAddTimer(struct FsmTimer *ft, int millisec, int event,
1282 void *arg, int where); 1282 void *arg, int where);
1283void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event, 1283void FsmRestartTimer(struct FsmTimer *ft, int millisec, int event,
1284 void *arg, int where); 1284 void *arg, int where);
1285void FsmDelTimer(struct FsmTimer *ft, int where); 1285void FsmDelTimer(struct FsmTimer *ft, int where);
1286int jiftime(char *s, long mark); 1286int jiftime(char *s, long mark);
1287 1287
1288int HiSax_command(isdn_ctrl * ic); 1288int HiSax_command(isdn_ctrl *ic);
1289int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb); 1289int HiSax_writebuf_skb(int id, int chan, int ack, struct sk_buff *skb);
1290__printf(3, 4) 1290__printf(3, 4)
1291void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...); 1291void HiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, ...);
1292__printf(3, 0) 1292__printf(3, 0)
1293void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args); 1293void VHiSax_putstatus(struct IsdnCardState *cs, char *head, char *fmt, va_list args);
1294void HiSax_reportcard(int cardnr, int sel); 1294void HiSax_reportcard(int cardnr, int sel);
1295int QuickHex(char *txt, u_char * p, int cnt); 1295int QuickHex(char *txt, u_char *p, int cnt);
1296void LogFrame(struct IsdnCardState *cs, u_char * p, int size); 1296void LogFrame(struct IsdnCardState *cs, u_char *p, int size);
1297void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir); 1297void dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir);
1298void iecpy(u_char * dest, u_char * iestart, int ieoffset); 1298void iecpy(u_char *dest, u_char *iestart, int ieoffset);
1299#endif /* __KERNEL__ */ 1299#endif /* __KERNEL__ */
1300 1300
1301/* 1301/*
1302 * Busywait delay for `jiffs' jiffies 1302 * Busywait delay for `jiffs' jiffies
1303 */ 1303 */
1304#define HZDELAY(jiffs) do { \ 1304#define HZDELAY(jiffs) do { \
1305 int tout = jiffs; \ 1305 int tout = jiffs; \
1306 \ 1306 \
1307 while (tout--) { \ 1307 while (tout--) { \
1308 int loops = USEC_PER_SEC / HZ; \ 1308 int loops = USEC_PER_SEC / HZ; \
1309 while (loops--) \ 1309 while (loops--) \
1310 udelay(1); \ 1310 udelay(1); \
1311 } \ 1311 } \
1312 } while (0) 1312 } while (0)
1313 1313
1314int ll_run(struct IsdnCardState *cs, int addfeatures); 1314int ll_run(struct IsdnCardState *cs, int addfeatures);
diff --git a/drivers/isdn/hisax/hisax_cfg.h b/drivers/isdn/hisax/hisax_cfg.h
index 17a2fea64efe..487dcfe9e718 100644
--- a/drivers/isdn/hisax/hisax_cfg.h
+++ b/drivers/isdn/hisax/hisax_cfg.h
@@ -54,9 +54,9 @@ typedef struct IsdnCardState IsdnCardState_t;
54typedef struct IsdnCard IsdnCard_t; 54typedef struct IsdnCard IsdnCard_t;
55 55
56struct IsdnCard { 56struct IsdnCard {
57 int typ; 57 int typ;
58 int protocol; /* EDSS1, 1TR6 or NI1 */ 58 int protocol; /* EDSS1, 1TR6 or NI1 */
59 unsigned long para[4]; 59 unsigned long para[4];
60 IsdnCardState_t *cs; 60 IsdnCardState_t *cs;
61}; 61};
62 62
diff --git a/drivers/isdn/hisax/hisax_debug.h b/drivers/isdn/hisax/hisax_debug.h
index 5ed3b1c44184..7b3093d0856a 100644
--- a/drivers/isdn/hisax/hisax_debug.h
+++ b/drivers/isdn/hisax/hisax_debug.h
@@ -4,12 +4,12 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 * How to use: 11 * How to use:
12 * 12 *
13 * Before including this file, you need to 13 * Before including this file, you need to
14 * #define __debug_variable my_debug 14 * #define __debug_variable my_debug
15 * where my_debug is a variable in your code which 15 * where my_debug is a variable in your code which
@@ -25,45 +25,45 @@
25 25
26#ifdef CONFIG_HISAX_DEBUG 26#ifdef CONFIG_HISAX_DEBUG
27 27
28#define DBG(level, format, arg...) do { \ 28#define DBG(level, format, arg...) do { \
29if (level & __debug_variable) \ 29 if (level & __debug_variable) \
30printk(KERN_DEBUG "%s: " format "\n" , __func__ , ## arg); \ 30 printk(KERN_DEBUG "%s: " format "\n" , __func__ , ## arg); \
31} while (0) 31 } while (0)
32 32
33#define DBG_PACKET(level,data,count) \ 33#define DBG_PACKET(level, data, count) \
34 if (level & __debug_variable) dump_packet(__func__,data,count) 34 if (level & __debug_variable) dump_packet(__func__, data, count)
35 35
36#define DBG_SKB(level,skb) \ 36#define DBG_SKB(level, skb) \
37 if ((level & __debug_variable) && skb) dump_packet(__func__,skb->data,skb->len) 37 if ((level & __debug_variable) && skb) dump_packet(__func__, skb->data, skb->len)
38 38
39 39
40static void __attribute__((unused)) 40static void __attribute__((unused))
41dump_packet(const char *name,const u_char *data,int pkt_len) 41dump_packet(const char *name, const u_char *data, int pkt_len)
42{ 42{
43#define DUMP_HDR_SIZE 20 43#define DUMP_HDR_SIZE 20
44#define DUMP_TLR_SIZE 8 44#define DUMP_TLR_SIZE 8
45 if (pkt_len) { 45 if (pkt_len) {
46 int i,len1,len2; 46 int i, len1, len2;
47 47
48 printk(KERN_DEBUG "%s: length=%d,data=",name,pkt_len); 48 printk(KERN_DEBUG "%s: length=%d,data=", name, pkt_len);
49 49
50 if (pkt_len > DUMP_HDR_SIZE+ DUMP_TLR_SIZE) { 50 if (pkt_len > DUMP_HDR_SIZE + DUMP_TLR_SIZE) {
51 len1 = DUMP_HDR_SIZE; 51 len1 = DUMP_HDR_SIZE;
52 len2 = DUMP_TLR_SIZE; 52 len2 = DUMP_TLR_SIZE;
53 } else { 53 } else {
54 len1 = pkt_len > DUMP_HDR_SIZE ? DUMP_HDR_SIZE : pkt_len; 54 len1 = pkt_len > DUMP_HDR_SIZE ? DUMP_HDR_SIZE : pkt_len;
55 len2 = 0; 55 len2 = 0;
56 } 56 }
57 for (i = 0; i < len1; ++i) { 57 for (i = 0; i < len1; ++i) {
58 printk ("%.2x", data[i]); 58 printk("%.2x", data[i]);
59 } 59 }
60 if (len2) { 60 if (len2) {
61 printk (".."); 61 printk("..");
62 for (i = pkt_len-DUMP_TLR_SIZE; i < pkt_len; ++i) { 62 for (i = pkt_len-DUMP_TLR_SIZE; i < pkt_len; ++i) {
63 printk ("%.2x", data[i]); 63 printk("%.2x", data[i]);
64 } 64 }
65 } 65 }
66 printk ("\n"); 66 printk("\n");
67 } 67 }
68#undef DUMP_HDR_SIZE 68#undef DUMP_HDR_SIZE
69#undef DUMP_TLR_SIZE 69#undef DUMP_TLR_SIZE
@@ -72,8 +72,8 @@ dump_packet(const char *name,const u_char *data,int pkt_len)
72#else 72#else
73 73
74#define DBG(level, format, arg...) do {} while (0) 74#define DBG(level, format, arg...) do {} while (0)
75#define DBG_PACKET(level,data,count) do {} while (0) 75#define DBG_PACKET(level, data, count) do {} while (0)
76#define DBG_SKB(level,skb) do {} while (0) 76#define DBG_SKB(level, skb) do {} while (0)
77 77
78#endif 78#endif
79 79
diff --git a/drivers/isdn/hisax/hisax_fcpcipnp.c b/drivers/isdn/hisax/hisax_fcpcipnp.c
index 478ebab54ca4..e4f47fe3f7fd 100644
--- a/drivers/isdn/hisax/hisax_fcpcipnp.c
+++ b/drivers/isdn/hisax/hisax_fcpcipnp.c
@@ -4,7 +4,7 @@
4 * Author Kai Germaschewski 4 * Author Kai Germaschewski
5 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 5 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
6 * 2001 by Karsten Keil <keil@isdn4linux.de> 6 * 2001 by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * based upon Karsten Keil's original avm_pci.c driver 8 * based upon Karsten Keil's original avm_pci.c driver
9 * 9 *
10 * This software may be used and distributed according to the terms 10 * This software may be used and distributed according to the terms
@@ -71,7 +71,7 @@ MODULE_DEVICE_TABLE(pci, fcpci_ids);
71 71
72#ifdef CONFIG_PNP 72#ifdef CONFIG_PNP
73static struct pnp_device_id fcpnp_ids[] __devinitdata = { 73static struct pnp_device_id fcpnp_ids[] __devinitdata = {
74 { 74 {
75 .id = "AVM0900", 75 .id = "AVM0900",
76 .driver_data = (unsigned long) "Fritz!Card PnP", 76 .driver_data = (unsigned long) "Fritz!Card PnP",
77 }, 77 },
@@ -153,7 +153,7 @@ MODULE_LICENSE("GPL");
153static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset) 153static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
154{ 154{
155 struct fritz_adapter *adapter = isac->priv; 155 struct fritz_adapter *adapter = isac->priv;
156 unsigned char idx = (offset > 0x2f) ? 156 unsigned char idx = (offset > 0x2f) ?
157 AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW; 157 AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
158 unsigned char val; 158 unsigned char val;
159 unsigned long flags; 159 unsigned long flags;
@@ -161,7 +161,7 @@ static unsigned char fcpci_read_isac(struct isac *isac, unsigned char offset)
161 spin_lock_irqsave(&adapter->hw_lock, flags); 161 spin_lock_irqsave(&adapter->hw_lock, flags);
162 outb(idx, adapter->io + AVM_INDEX); 162 outb(idx, adapter->io + AVM_INDEX);
163 val = inb(adapter->io + AVM_DATA + (offset & 0xf)); 163 val = inb(adapter->io + AVM_DATA + (offset & 0xf));
164 spin_unlock_irqrestore(&adapter->hw_lock, flags); 164 spin_unlock_irqrestore(&adapter->hw_lock, flags);
165 DBG(0x1000, " port %#x, value %#x", 165 DBG(0x1000, " port %#x, value %#x",
166 offset, val); 166 offset, val);
167 return val; 167 return val;
@@ -171,7 +171,7 @@ static void fcpci_write_isac(struct isac *isac, unsigned char offset,
171 unsigned char value) 171 unsigned char value)
172{ 172{
173 struct fritz_adapter *adapter = isac->priv; 173 struct fritz_adapter *adapter = isac->priv;
174 unsigned char idx = (offset > 0x2f) ? 174 unsigned char idx = (offset > 0x2f) ?
175 AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW; 175 AVM_IDX_ISAC_REG_HIGH : AVM_IDX_ISAC_REG_LOW;
176 unsigned long flags; 176 unsigned long flags;
177 177
@@ -180,10 +180,10 @@ static void fcpci_write_isac(struct isac *isac, unsigned char offset,
180 spin_lock_irqsave(&adapter->hw_lock, flags); 180 spin_lock_irqsave(&adapter->hw_lock, flags);
181 outb(idx, adapter->io + AVM_INDEX); 181 outb(idx, adapter->io + AVM_INDEX);
182 outb(value, adapter->io + AVM_DATA + (offset & 0xf)); 182 outb(value, adapter->io + AVM_DATA + (offset & 0xf));
183 spin_unlock_irqrestore(&adapter->hw_lock, flags); 183 spin_unlock_irqrestore(&adapter->hw_lock, flags);
184} 184}
185 185
186static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data, 186static void fcpci_read_isac_fifo(struct isac *isac, unsigned char *data,
187 int size) 187 int size)
188{ 188{
189 struct fritz_adapter *adapter = isac->priv; 189 struct fritz_adapter *adapter = isac->priv;
@@ -192,10 +192,10 @@ static void fcpci_read_isac_fifo(struct isac *isac, unsigned char * data,
192 spin_lock_irqsave(&adapter->hw_lock, flags); 192 spin_lock_irqsave(&adapter->hw_lock, flags);
193 outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX); 193 outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
194 insb(adapter->io + AVM_DATA, data, size); 194 insb(adapter->io + AVM_DATA, data, size);
195 spin_unlock_irqrestore(&adapter->hw_lock, flags); 195 spin_unlock_irqrestore(&adapter->hw_lock, flags);
196} 196}
197 197
198static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data, 198static void fcpci_write_isac_fifo(struct isac *isac, unsigned char *data,
199 int size) 199 int size)
200{ 200{
201 struct fritz_adapter *adapter = isac->priv; 201 struct fritz_adapter *adapter = isac->priv;
@@ -204,7 +204,7 @@ static void fcpci_write_isac_fifo(struct isac *isac, unsigned char * data,
204 spin_lock_irqsave(&adapter->hw_lock, flags); 204 spin_lock_irqsave(&adapter->hw_lock, flags);
205 outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX); 205 outb(AVM_IDX_ISAC_FIFO, adapter->io + AVM_INDEX);
206 outsb(adapter->io + AVM_DATA, data, size); 206 outsb(adapter->io + AVM_DATA, data, size);
207 spin_unlock_irqrestore(&adapter->hw_lock, flags); 207 spin_unlock_irqrestore(&adapter->hw_lock, flags);
208} 208}
209 209
210static u32 fcpci_read_hdlc_status(struct fritz_adapter *adapter, int nr) 210static u32 fcpci_read_hdlc_status(struct fritz_adapter *adapter, int nr)
@@ -254,14 +254,14 @@ static unsigned char fcpci2_read_isac(struct isac *isac, unsigned char offset)
254 spin_lock_irqsave(&adapter->hw_lock, flags); 254 spin_lock_irqsave(&adapter->hw_lock, flags);
255 outl(offset, adapter->io + AVM_ISACSX_INDEX); 255 outl(offset, adapter->io + AVM_ISACSX_INDEX);
256 val = inl(adapter->io + AVM_ISACSX_DATA); 256 val = inl(adapter->io + AVM_ISACSX_DATA);
257 spin_unlock_irqrestore(&adapter->hw_lock, flags); 257 spin_unlock_irqrestore(&adapter->hw_lock, flags);
258 DBG(0x1000, " port %#x, value %#x", 258 DBG(0x1000, " port %#x, value %#x",
259 offset, val); 259 offset, val);
260 260
261 return val; 261 return val;
262} 262}
263 263
264static void fcpci2_write_isac(struct isac *isac, unsigned char offset, 264static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
265 unsigned char value) 265 unsigned char value)
266{ 266{
267 struct fritz_adapter *adapter = isac->priv; 267 struct fritz_adapter *adapter = isac->priv;
@@ -272,10 +272,10 @@ static void fcpci2_write_isac(struct isac *isac, unsigned char offset,
272 spin_lock_irqsave(&adapter->hw_lock, flags); 272 spin_lock_irqsave(&adapter->hw_lock, flags);
273 outl(offset, adapter->io + AVM_ISACSX_INDEX); 273 outl(offset, adapter->io + AVM_ISACSX_INDEX);
274 outl(value, adapter->io + AVM_ISACSX_DATA); 274 outl(value, adapter->io + AVM_ISACSX_DATA);
275 spin_unlock_irqrestore(&adapter->hw_lock, flags); 275 spin_unlock_irqrestore(&adapter->hw_lock, flags);
276} 276}
277 277
278static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data, 278static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char *data,
279 int size) 279 int size)
280{ 280{
281 struct fritz_adapter *adapter = isac->priv; 281 struct fritz_adapter *adapter = isac->priv;
@@ -286,10 +286,10 @@ static void fcpci2_read_isac_fifo(struct isac *isac, unsigned char * data,
286 outl(0, adapter->io + AVM_ISACSX_INDEX); 286 outl(0, adapter->io + AVM_ISACSX_INDEX);
287 for (i = 0; i < size; i++) 287 for (i = 0; i < size; i++)
288 data[i] = inl(adapter->io + AVM_ISACSX_DATA); 288 data[i] = inl(adapter->io + AVM_ISACSX_DATA);
289 spin_unlock_irqrestore(&adapter->hw_lock, flags); 289 spin_unlock_irqrestore(&adapter->hw_lock, flags);
290} 290}
291 291
292static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data, 292static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char *data,
293 int size) 293 int size)
294{ 294{
295 struct fritz_adapter *adapter = isac->priv; 295 struct fritz_adapter *adapter = isac->priv;
@@ -300,7 +300,7 @@ static void fcpci2_write_isac_fifo(struct isac *isac, unsigned char * data,
300 outl(0, adapter->io + AVM_ISACSX_INDEX); 300 outl(0, adapter->io + AVM_ISACSX_INDEX);
301 for (i = 0; i < size; i++) 301 for (i = 0; i < size; i++)
302 outl(data[i], adapter->io + AVM_ISACSX_DATA); 302 outl(data[i], adapter->io + AVM_ISACSX_DATA);
303 spin_unlock_irqrestore(&adapter->hw_lock, flags); 303 spin_unlock_irqrestore(&adapter->hw_lock, flags);
304} 304}
305 305
306static u32 fcpci2_read_hdlc_status(struct fritz_adapter *adapter, int nr) 306static u32 fcpci2_read_hdlc_status(struct fritz_adapter *adapter, int nr)
@@ -349,10 +349,10 @@ static void __fcpnp_write_ctrl(struct fritz_bcs *bcs, int which)
349 349
350 outb(idx, adapter->io + AVM_INDEX); 350 outb(idx, adapter->io + AVM_INDEX);
351 if (which & 4) 351 if (which & 4)
352 outb(bcs->ctrl.sr.mode, 352 outb(bcs->ctrl.sr.mode,
353 adapter->io + AVM_DATA + HDLC_STATUS + 2); 353 adapter->io + AVM_DATA + HDLC_STATUS + 2);
354 if (which & 2) 354 if (which & 2)
355 outb(bcs->ctrl.sr.xml, 355 outb(bcs->ctrl.sr.xml,
356 adapter->io + AVM_DATA + HDLC_STATUS + 1); 356 adapter->io + AVM_DATA + HDLC_STATUS + 1);
357 if (which & 1) 357 if (which & 1)
358 outb(bcs->ctrl.sr.cmd, 358 outb(bcs->ctrl.sr.cmd,
@@ -416,7 +416,7 @@ static void hdlc_fill_fifo(struct fritz_bcs *bcs)
416 break; 416 break;
417 case AVM_FRITZ_PCIV2: 417 case AVM_FRITZ_PCIV2:
418 fcpci2_write_ctrl(bcs, 3); 418 fcpci2_write_ctrl(bcs, 3);
419 outsl(adapter->io + 419 outsl(adapter->io +
420 (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1), 420 (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
421 p, (count + 3) / 4); 421 p, (count + 3) / 4);
422 break; 422 break;
@@ -447,12 +447,12 @@ static inline void hdlc_empty_fifo(struct fritz_bcs *bcs, int count)
447 case AVM_FRITZ_PCI: 447 case AVM_FRITZ_PCI:
448 spin_lock(&adapter->hw_lock); 448 spin_lock(&adapter->hw_lock);
449 outl(idx, adapter->io + AVM_INDEX); 449 outl(idx, adapter->io + AVM_INDEX);
450 insl(adapter->io + AVM_DATA + HDLC_FIFO, 450 insl(adapter->io + AVM_DATA + HDLC_FIFO,
451 p, (count + 3) / 4); 451 p, (count + 3) / 4);
452 spin_unlock(&adapter->hw_lock); 452 spin_unlock(&adapter->hw_lock);
453 break; 453 break;
454 case AVM_FRITZ_PCIV2: 454 case AVM_FRITZ_PCIV2:
455 insl(adapter->io + 455 insl(adapter->io +
456 (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1), 456 (bcs->channel ? AVM_HDLC_FIFO_2 : AVM_HDLC_FIFO_1),
457 p, (count + 3) / 4); 457 p, (count + 3) / 4);
458 break; 458 break;
@@ -489,7 +489,7 @@ static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
489 hdlc_empty_fifo(bcs, len); 489 hdlc_empty_fifo(bcs, len);
490 490
491 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) { 491 if ((stat & HDLC_STAT_RME) || (bcs->mode == L1_MODE_TRANS)) {
492 if (((stat & HDLC_STAT_CRCVFRRAB)== HDLC_STAT_CRCVFR) || 492 if (((stat & HDLC_STAT_CRCVFRRAB) == HDLC_STAT_CRCVFR) ||
493 (bcs->mode == L1_MODE_TRANS)) { 493 (bcs->mode == L1_MODE_TRANS)) {
494 skb = dev_alloc_skb(bcs->rcvidx); 494 skb = dev_alloc_skb(bcs->rcvidx);
495 if (!skb) { 495 if (!skb) {
@@ -512,7 +512,7 @@ static inline void hdlc_rpr_irq(struct fritz_bcs *bcs, u32 stat)
512static inline void hdlc_xdu_irq(struct fritz_bcs *bcs) 512static inline void hdlc_xdu_irq(struct fritz_bcs *bcs)
513{ 513{
514 struct fritz_adapter *adapter = bcs->adapter; 514 struct fritz_adapter *adapter = bcs->adapter;
515 515
516 516
517 /* Here we lost an TX interrupt, so 517 /* Here we lost an TX interrupt, so
518 * restart transmitting the whole frame. 518 * restart transmitting the whole frame.
@@ -587,7 +587,7 @@ static inline void hdlc_irq(struct fritz_adapter *adapter)
587static void modehdlc(struct fritz_bcs *bcs, int mode) 587static void modehdlc(struct fritz_bcs *bcs, int mode)
588{ 588{
589 struct fritz_adapter *adapter = bcs->adapter; 589 struct fritz_adapter *adapter = bcs->adapter;
590 590
591 DBG(0x40, "hdlc %c mode %d --> %d", 591 DBG(0x40, "hdlc %c mode %d --> %d",
592 'A' + bcs->channel, bcs->mode, mode); 592 'A' + bcs->channel, bcs->mode, mode);
593 593
@@ -638,12 +638,12 @@ static void fritz_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
638 break; 638 break;
639 case PH_ACTIVATE | REQUEST: 639 case PH_ACTIVATE | REQUEST:
640 mode = (long) arg; 640 mode = (long) arg;
641 DBG(4,"B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode); 641 DBG(4, "B%d,PH_ACTIVATE_REQUEST %d", bcs->channel + 1, mode);
642 modehdlc(bcs, mode); 642 modehdlc(bcs, mode);
643 B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL); 643 B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
644 break; 644 break;
645 case PH_DEACTIVATE | REQUEST: 645 case PH_DEACTIVATE | REQUEST:
646 DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1); 646 DBG(4, "B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
647 modehdlc(bcs, L1_MODE_NULL); 647 modehdlc(bcs, L1_MODE_NULL);
648 B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL); 648 B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
649 break; 649 break;
@@ -702,10 +702,10 @@ static inline void fcpci2_init(struct fritz_adapter *adapter)
702 702
703static inline void fcpci_init(struct fritz_adapter *adapter) 703static inline void fcpci_init(struct fritz_adapter *adapter)
704{ 704{
705 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER | 705 outb(AVM_STATUS0_DIS_TIMER | AVM_STATUS0_RES_TIMER |
706 AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0); 706 AVM_STATUS0_ENA_IRQ, adapter->io + AVM_STATUS0);
707 707
708 outb(AVM_STATUS1_ENA_IOM | adapter->irq, 708 outb(AVM_STATUS1_ENA_IOM | adapter->irq,
709 adapter->io + AVM_STATUS1); 709 adapter->io + AVM_STATUS1);
710 mdelay(10); 710 mdelay(10);
711} 711}
@@ -717,7 +717,7 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
717 u32 val = 0; 717 u32 val = 0;
718 int retval; 718 int retval;
719 719
720 DBG(1,""); 720 DBG(1, "");
721 721
722 isac_init(&adapter->isac); // FIXME is this okay now 722 isac_init(&adapter->isac); // FIXME is this okay now
723 723
@@ -737,7 +737,7 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
737 } 737 }
738 738
739 DBG(1, "stat %#x Class %X Rev %d", 739 DBG(1, "stat %#x Class %X Rev %d",
740 val, val & 0xff, (val>>8) & 0xff); 740 val, val & 0xff, (val >> 8) & 0xff);
741 741
742 spin_lock_init(&adapter->hw_lock); 742 spin_lock_init(&adapter->hw_lock);
743 adapter->isac.priv = adapter; 743 adapter->isac.priv = adapter;
@@ -819,15 +819,15 @@ static int __devinit fcpcipnp_setup(struct fritz_adapter *adapter)
819 819
820 return 0; 820 return 0;
821 821
822 err_region: 822err_region:
823 release_region(adapter->io, 32); 823 release_region(adapter->io, 32);
824 err: 824err:
825 return retval; 825 return retval;
826} 826}
827 827
828static void __devexit fcpcipnp_release(struct fritz_adapter *adapter) 828static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
829{ 829{
830 DBG(1,""); 830 DBG(1, "");
831 831
832 outb(0, adapter->io + AVM_STATUS0); 832 outb(0, adapter->io + AVM_STATUS0);
833 free_irq(adapter->irq, adapter); 833 free_irq(adapter->irq, adapter);
@@ -836,7 +836,7 @@ static void __devexit fcpcipnp_release(struct fritz_adapter *adapter)
836 836
837// ---------------------------------------------------------------------- 837// ----------------------------------------------------------------------
838 838
839static struct fritz_adapter * __devinit 839static struct fritz_adapter * __devinit
840new_adapter(void) 840new_adapter(void)
841{ 841{
842 struct fritz_adapter *adapter; 842 struct fritz_adapter *adapter;
@@ -850,7 +850,7 @@ new_adapter(void)
850 adapter->isac.hisax_d_if.owner = THIS_MODULE; 850 adapter->isac.hisax_d_if.owner = THIS_MODULE;
851 adapter->isac.hisax_d_if.ifc.priv = &adapter->isac; 851 adapter->isac.hisax_d_if.ifc.priv = &adapter->isac;
852 adapter->isac.hisax_d_if.ifc.l2l1 = isac_d_l2l1; 852 adapter->isac.hisax_d_if.ifc.l2l1 = isac_d_l2l1;
853 853
854 for (i = 0; i < 2; i++) { 854 for (i = 0; i < 2; i++) {
855 adapter->bcs[i].adapter = adapter; 855 adapter->bcs[i].adapter = adapter;
856 adapter->bcs[i].channel = i; 856 adapter->bcs[i].channel = i;
@@ -862,7 +862,7 @@ new_adapter(void)
862 b_if[i] = &adapter->bcs[i].b_if; 862 b_if[i] = &adapter->bcs[i].b_if;
863 863
864 if (hisax_register(&adapter->isac.hisax_d_if, b_if, "fcpcipnp", 864 if (hisax_register(&adapter->isac.hisax_d_if, b_if, "fcpcipnp",
865 protocol) != 0) { 865 protocol) != 0) {
866 kfree(adapter); 866 kfree(adapter);
867 adapter = NULL; 867 adapter = NULL;
868 } 868 }
@@ -889,7 +889,7 @@ static int __devinit fcpci_probe(struct pci_dev *pdev,
889 889
890 pci_set_drvdata(pdev, adapter); 890 pci_set_drvdata(pdev, adapter);
891 891
892 if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2) 892 if (pdev->device == PCI_DEVICE_ID_AVM_A1_V2)
893 adapter->type = AVM_FRITZ_PCIV2; 893 adapter->type = AVM_FRITZ_PCIV2;
894 else 894 else
895 adapter->type = AVM_FRITZ_PCI; 895 adapter->type = AVM_FRITZ_PCI;
@@ -909,10 +909,10 @@ static int __devinit fcpci_probe(struct pci_dev *pdev,
909 goto err_free; 909 goto err_free;
910 910
911 return 0; 911 return 0;
912 912
913 err_free: 913err_free:
914 delete_adapter(adapter); 914 delete_adapter(adapter);
915 err: 915err:
916 return retval; 916 return retval;
917} 917}
918 918
@@ -923,7 +923,7 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
923 int retval; 923 int retval;
924 924
925 if (!pdev) 925 if (!pdev)
926 return(-ENODEV); 926 return (-ENODEV);
927 927
928 retval = -ENOMEM; 928 retval = -ENOMEM;
929 adapter = new_adapter(); 929 adapter = new_adapter();
@@ -938,7 +938,7 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
938 retval = pnp_activate_dev(pdev); 938 retval = pnp_activate_dev(pdev);
939 if (retval < 0) { 939 if (retval < 0) {
940 printk(KERN_WARNING "%s: pnp_activate_dev(%s) ret(%d)\n", __func__, 940 printk(KERN_WARNING "%s: pnp_activate_dev(%s) ret(%d)\n", __func__,
941 (char *)dev_id->driver_data, retval); 941 (char *)dev_id->driver_data, retval);
942 goto err_free; 942 goto err_free;
943 } 943 }
944 adapter->io = pnp_port_start(pdev, 0); 944 adapter->io = pnp_port_start(pdev, 0);
@@ -952,10 +952,10 @@ static int __devinit fcpnp_probe(struct pnp_dev *pdev, const struct pnp_device_i
952 goto err_free; 952 goto err_free;
953 953
954 return 0; 954 return 0;
955 955
956 err_free: 956err_free:
957 delete_adapter(adapter); 957 delete_adapter(adapter);
958 err: 958err:
959 return retval; 959 return retval;
960} 960}
961 961
diff --git a/drivers/isdn/hisax/hisax_fcpcipnp.h b/drivers/isdn/hisax/hisax_fcpcipnp.h
index 21fbcedf3a94..aedef97827fe 100644
--- a/drivers/isdn/hisax/hisax_fcpcipnp.h
+++ b/drivers/isdn/hisax/hisax_fcpcipnp.h
@@ -38,7 +38,7 @@ struct fritz_bcs {
38 int rcvidx; 38 int rcvidx;
39 int fifo_size; 39 int fifo_size;
40 u_char rcvbuf[HSCX_BUFMAX]; /* B-Channel receive Buffer */ 40 u_char rcvbuf[HSCX_BUFMAX]; /* B-Channel receive Buffer */
41 41
42 int tx_cnt; /* B-Channel transmit counter */ 42 int tx_cnt; /* B-Channel transmit counter */
43 struct sk_buff *tx_skb; /* B-Channel transmit Buffer */ 43 struct sk_buff *tx_skb; /* B-Channel transmit Buffer */
44}; 44};
@@ -55,4 +55,3 @@ struct fritz_adapter {
55 u32 (*read_hdlc_status) (struct fritz_adapter *adapter, int nr); 55 u32 (*read_hdlc_status) (struct fritz_adapter *adapter, int nr);
56 void (*write_ctrl) (struct fritz_bcs *bcs, int which); 56 void (*write_ctrl) (struct fritz_bcs *bcs, int which);
57}; 57};
58
diff --git a/drivers/isdn/hisax/hisax_if.h b/drivers/isdn/hisax/hisax_if.h
index aa7c94037b2b..7098d6bd5ff2 100644
--- a/drivers/isdn/hisax/hisax_if.h
+++ b/drivers/isdn/hisax/hisax_if.h
@@ -1,10 +1,10 @@
1/* 1/*
2 * Interface between low level (hardware) drivers and 2 * Interface between low level (hardware) drivers and
3 * HiSax protocol stack 3 * HiSax protocol stack
4 * 4 *
5 * Author Kai Germaschewski 5 * Author Kai Germaschewski
6 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
diff --git a/drivers/isdn/hisax/hisax_isac.c b/drivers/isdn/hisax/hisax_isac.c
index a8447fa2f470..5154c252a25f 100644
--- a/drivers/isdn/hisax/hisax_isac.c
+++ b/drivers/isdn/hisax/hisax_isac.c
@@ -1,11 +1,11 @@
1/* 1/*
2 * Driver for ISAC-S and ISAC-SX 2 * Driver for ISAC-S and ISAC-SX
3 * ISDN Subscriber Access Controller for Terminals 3 * ISDN Subscriber Access Controller for Terminals
4 * 4 *
5 * Author Kai Germaschewski 5 * Author Kai Germaschewski
6 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * Copyright 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 2001 by Karsten Keil <keil@isdn4linux.de> 7 * 2001 by Karsten Keil <keil@isdn4linux.de>
8 * 8 *
9 * based upon Karsten Keil's original isac.c driver 9 * based upon Karsten Keil's original isac.c driver
10 * 10 *
11 * This software may be used and distributed according to the terms 11 * This software may be used and distributed according to the terms
@@ -36,10 +36,10 @@ static int debug = 1;
36module_param(debug, int, 0); 36module_param(debug, int, 0);
37 37
38static char *ISACVer[] = { 38static char *ISACVer[] = {
39 "2086/2186 V1.1", 39 "2086/2186 V1.1",
40 "2085 B1", 40 "2085 B1",
41 "2085 B2", 41 "2085 B2",
42 "2085 V2.3" 42 "2085 V2.3"
43}; 43};
44#endif 44#endif
45 45
@@ -178,7 +178,7 @@ enum {
178 ST_L1_F8, 178 ST_L1_F8,
179}; 179};
180 180
181#define L1_STATE_COUNT (ST_L1_F8+1) 181#define L1_STATE_COUNT (ST_L1_F8 + 1)
182 182
183static char *strL1State[] = 183static char *strL1State[] =
184{ 184{
@@ -382,7 +382,7 @@ static struct FsmNode L1FnList[] __initdata =
382 {ST_L1_F3_PDOWN, EV_PH_AI8, l1_go_f7_act_ind}, 382 {ST_L1_F3_PDOWN, EV_PH_AI8, l1_go_f7_act_ind},
383 {ST_L1_F3_PDOWN, EV_PH_ACTIVATE_REQ, l1_ar8}, 383 {ST_L1_F3_PDOWN, EV_PH_ACTIVATE_REQ, l1_ar8},
384 {ST_L1_F3_PDOWN, EV_TIMER3, l1_timer3}, 384 {ST_L1_F3_PDOWN, EV_TIMER3, l1_timer3},
385 385
386 {ST_L1_F3_PEND_DEACT, EV_PH_RES, l1_di}, 386 {ST_L1_F3_PEND_DEACT, EV_PH_RES, l1_di},
387 {ST_L1_F3_PEND_DEACT, EV_PH_EI, l1_di}, 387 {ST_L1_F3_PEND_DEACT, EV_PH_EI, l1_di},
388 {ST_L1_F3_PEND_DEACT, EV_PH_DC, l1_go_f3pdown}, 388 {ST_L1_F3_PEND_DEACT, EV_PH_DC, l1_go_f3pdown},
@@ -432,7 +432,7 @@ static void l1m_debug(struct FsmInst *fi, char *fmt, ...)
432{ 432{
433 va_list args; 433 va_list args;
434 char buf[256]; 434 char buf[256];
435 435
436 va_start(args, fmt); 436 va_start(args, fmt);
437 vsnprintf(buf, sizeof(buf), fmt, args); 437 vsnprintf(buf, sizeof(buf), fmt, args);
438 DBG(DBG_L1M, "%s", buf); 438 DBG(DBG_L1M, "%s", buf);
@@ -522,7 +522,7 @@ static inline void isac_cisq_interrupt(struct isac *isac)
522 } 522 }
523 if (val & ISAC_CIR0_CIC1) { 523 if (val & ISAC_CIR0_CIC1) {
524 val = isac->read_isac(isac, ISAC_CIR1); 524 val = isac->read_isac(isac, ISAC_CIR1);
525 DBG(DBG_WARN, "ISAC CIR1 %#x", val ); 525 DBG(DBG_WARN, "ISAC CIR1 %#x", val);
526 } 526 }
527} 527}
528 528
@@ -531,10 +531,10 @@ static inline void isac_rme_interrupt(struct isac *isac)
531 unsigned char val; 531 unsigned char val;
532 int count; 532 int count;
533 struct sk_buff *skb; 533 struct sk_buff *skb;
534 534
535 val = isac->read_isac(isac, ISAC_RSTA); 535 val = isac->read_isac(isac, ISAC_RSTA);
536 if ((val & (ISAC_RSTA_RDO | ISAC_RSTA_CRC | ISAC_RSTA_RAB) ) 536 if ((val & (ISAC_RSTA_RDO | ISAC_RSTA_CRC | ISAC_RSTA_RAB))
537 != ISAC_RSTA_CRC) { 537 != ISAC_RSTA_CRC) {
538 DBG(DBG_WARN, "RSTA %#x, dropped", val); 538 DBG(DBG_WARN, "RSTA %#x, dropped", val);
539 isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC); 539 isac->write_isac(isac, ISAC_CMDR, ISAC_CMDR_RMC);
540 goto out; 540 goto out;
@@ -560,7 +560,7 @@ static inline void isac_rme_interrupt(struct isac *isac)
560 memcpy(skb_put(skb, count), isac->rcvbuf, count); 560 memcpy(skb_put(skb, count), isac->rcvbuf, count);
561 DBG_SKB(DBG_RPACKET, skb); 561 DBG_SKB(DBG_RPACKET, skb);
562 D_L1L2(isac, PH_DATA | INDICATION, skb); 562 D_L1L2(isac, PH_DATA | INDICATION, skb);
563 out: 563out:
564 isac->rcvidx = 0; 564 isac->rcvidx = 0;
565} 565}
566 566
@@ -659,10 +659,10 @@ static inline void isacsx_rme_interrupt(struct isac *isac)
659 unsigned char val; 659 unsigned char val;
660 660
661 val = isac->read_isac(isac, ISACSX_RSTAD); 661 val = isac->read_isac(isac, ISACSX_RSTAD);
662 if ((val & (ISACSX_RSTAD_VFR | 662 if ((val & (ISACSX_RSTAD_VFR |
663 ISACSX_RSTAD_RDO | 663 ISACSX_RSTAD_RDO |
664 ISACSX_RSTAD_CRC | 664 ISACSX_RSTAD_CRC |
665 ISACSX_RSTAD_RAB)) 665 ISACSX_RSTAD_RAB))
666 != (ISACSX_RSTAD_VFR | ISACSX_RSTAD_CRC)) { 666 != (ISACSX_RSTAD_VFR | ISACSX_RSTAD_CRC)) {
667 DBG(DBG_WARN, "RSTAD %#x, dropped", val); 667 DBG(DBG_WARN, "RSTAD %#x, dropped", val);
668 isac->write_isac(isac, ISACSX_CMDRD, ISACSX_CMDRD_RMC); 668 isac->write_isac(isac, ISACSX_CMDRD, ISACSX_CMDRD_RMC);
@@ -690,7 +690,7 @@ static inline void isacsx_rme_interrupt(struct isac *isac)
690 memcpy(skb_put(skb, count), isac->rcvbuf, count); 690 memcpy(skb_put(skb, count), isac->rcvbuf, count);
691 DBG_SKB(DBG_RPACKET, skb); 691 DBG_SKB(DBG_RPACKET, skb);
692 D_L1L2(isac, PH_DATA | INDICATION, skb); 692 D_L1L2(isac, PH_DATA | INDICATION, skb);
693 out: 693out:
694 isac->rcvidx = 0; 694 isac->rcvidx = 0;
695} 695}
696 696
@@ -778,8 +778,8 @@ void isac_setup(struct isac *isac)
778 778
779 ph_command(isac, ISAC_CMD_RES); 779 ph_command(isac, ISAC_CMD_RES);
780 780
781 isac->write_isac(isac, ISAC_MASK, 0xff); 781 isac->write_isac(isac, ISAC_MASK, 0xff);
782 isac->mocr = 0xaa; 782 isac->mocr = 0xaa;
783 if (test_bit(ISAC_IOM1, &isac->flags)) { 783 if (test_bit(ISAC_IOM1, &isac->flags)) {
784 /* IOM 1 Mode */ 784 /* IOM 1 Mode */
785 isac->write_isac(isac, ISAC_ADF2, 0x0); 785 isac->write_isac(isac, ISAC_ADF2, 0x0);
@@ -832,7 +832,7 @@ void isacsx_setup(struct isac *isac)
832 // all HDLC IRQ unmasked 832 // all HDLC IRQ unmasked
833 isac->write_isac(isac, ISACSX_MASKD, 0x03); 833 isac->write_isac(isac, ISACSX_MASKD, 0x03);
834 // unmask ICD, CID IRQs 834 // unmask ICD, CID IRQs
835 isac->write_isac(isac, ISACSX_MASK, 835 isac->write_isac(isac, ISACSX_MASK,
836 ~(ISACSX_ISTA_ICD | ISACSX_ISTA_CIC)); 836 ~(ISACSX_ISTA_ICD | ISACSX_ISTA_CIC));
837} 837}
838 838
diff --git a/drivers/isdn/hisax/hscx.c b/drivers/isdn/hisax/hscx.c
index 904b9100df95..3e305fec0ed9 100644
--- a/drivers/isdn/hisax/hscx.c
+++ b/drivers/isdn/hisax/hscx.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -54,7 +54,7 @@ modehscx(struct BCState *bcs, int mode, int bc)
54 cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0); 54 cs->BC_Write_Reg(cs, hscx, HSCX_XBCH, 0x0);
55 cs->BC_Write_Reg(cs, hscx, HSCX_RLCR, 0x0); 55 cs->BC_Write_Reg(cs, hscx, HSCX_RLCR, 0x0);
56 cs->BC_Write_Reg(cs, hscx, HSCX_CCR1, 56 cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
57 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x82 : 0x85); 57 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x82 : 0x85);
58 cs->BC_Write_Reg(cs, hscx, HSCX_CCR2, 0x30); 58 cs->BC_Write_Reg(cs, hscx, HSCX_CCR2, 0x30);
59 cs->BC_Write_Reg(cs, hscx, HSCX_XCCR, 7); 59 cs->BC_Write_Reg(cs, hscx, HSCX_XCCR, 7);
60 cs->BC_Write_Reg(cs, hscx, HSCX_RCCR, 7); 60 cs->BC_Write_Reg(cs, hscx, HSCX_RCCR, 7);
@@ -65,27 +65,27 @@ modehscx(struct BCState *bcs, int mode, int bc)
65 65
66 if (bc == 0) { 66 if (bc == 0) {
67 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 67 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX,
68 test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0); 68 test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
69 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 69 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR,
70 test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0); 70 test_bit(HW_IOM1, &cs->HW_Flags) ? 0x7 : bcs->hw.hscx.tsaxr0);
71 } else { 71 } else {
72 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, bcs->hw.hscx.tsaxr1); 72 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, bcs->hw.hscx.tsaxr1);
73 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, bcs->hw.hscx.tsaxr1); 73 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, bcs->hw.hscx.tsaxr1);
74 } 74 }
75 switch (mode) { 75 switch (mode) {
76 case (L1_MODE_NULL): 76 case (L1_MODE_NULL):
77 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 0x1f); 77 cs->BC_Write_Reg(cs, hscx, HSCX_TSAX, 0x1f);
78 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 0x1f); 78 cs->BC_Write_Reg(cs, hscx, HSCX_TSAR, 0x1f);
79 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x84); 79 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x84);
80 break; 80 break;
81 case (L1_MODE_TRANS): 81 case (L1_MODE_TRANS):
82 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0xe4); 82 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0xe4);
83 break; 83 break;
84 case (L1_MODE_HDLC): 84 case (L1_MODE_HDLC):
85 cs->BC_Write_Reg(cs, hscx, HSCX_CCR1, 85 cs->BC_Write_Reg(cs, hscx, HSCX_CCR1,
86 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d); 86 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x8a : 0x8d);
87 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x8c); 87 cs->BC_Write_Reg(cs, hscx, HSCX_MODE, 0x8c);
88 break; 88 break;
89 } 89 }
90 if (mode) 90 if (mode)
91 cs->BC_Write_Reg(cs, hscx, HSCX_CMDR, 0x41); 91 cs->BC_Write_Reg(cs, hscx, HSCX_CMDR, 0x41);
@@ -100,55 +100,55 @@ hscx_l2l1(struct PStack *st, int pr, void *arg)
100 struct sk_buff *skb = arg; 100 struct sk_buff *skb = arg;
101 101
102 switch (pr) { 102 switch (pr) {
103 case (PH_DATA | REQUEST): 103 case (PH_DATA | REQUEST):
104 spin_lock_irqsave(&bcs->cs->lock, flags); 104 spin_lock_irqsave(&bcs->cs->lock, flags);
105 if (bcs->tx_skb) { 105 if (bcs->tx_skb) {
106 skb_queue_tail(&bcs->squeue, skb); 106 skb_queue_tail(&bcs->squeue, skb);
107 } else { 107 } else {
108 bcs->tx_skb = skb; 108 bcs->tx_skb = skb;
109 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 109 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
110 bcs->hw.hscx.count = 0; 110 bcs->hw.hscx.count = 0;
111 bcs->cs->BC_Send_Data(bcs); 111 bcs->cs->BC_Send_Data(bcs);
112 } 112 }
113 spin_unlock_irqrestore(&bcs->cs->lock, flags); 113 spin_unlock_irqrestore(&bcs->cs->lock, flags);
114 break; 114 break;
115 case (PH_PULL | INDICATION): 115 case (PH_PULL | INDICATION):
116 spin_lock_irqsave(&bcs->cs->lock, flags); 116 spin_lock_irqsave(&bcs->cs->lock, flags);
117 if (bcs->tx_skb) { 117 if (bcs->tx_skb) {
118 printk(KERN_WARNING "hscx_l2l1: this shouldn't happen\n"); 118 printk(KERN_WARNING "hscx_l2l1: this shouldn't happen\n");
119 } else { 119 } else {
120 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 120 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
121 bcs->tx_skb = skb; 121 bcs->tx_skb = skb;
122 bcs->hw.hscx.count = 0; 122 bcs->hw.hscx.count = 0;
123 bcs->cs->BC_Send_Data(bcs); 123 bcs->cs->BC_Send_Data(bcs);
124 } 124 }
125 spin_unlock_irqrestore(&bcs->cs->lock, flags); 125 spin_unlock_irqrestore(&bcs->cs->lock, flags);
126 break; 126 break;
127 case (PH_PULL | REQUEST): 127 case (PH_PULL | REQUEST):
128 if (!bcs->tx_skb) { 128 if (!bcs->tx_skb) {
129 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 129 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
130 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 130 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
131 } else 131 } else
132 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 132 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
133 break; 133 break;
134 case (PH_ACTIVATE | REQUEST): 134 case (PH_ACTIVATE | REQUEST):
135 spin_lock_irqsave(&bcs->cs->lock, flags); 135 spin_lock_irqsave(&bcs->cs->lock, flags);
136 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 136 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
137 modehscx(bcs, st->l1.mode, st->l1.bc); 137 modehscx(bcs, st->l1.mode, st->l1.bc);
138 spin_unlock_irqrestore(&bcs->cs->lock, flags); 138 spin_unlock_irqrestore(&bcs->cs->lock, flags);
139 l1_msg_b(st, pr, arg); 139 l1_msg_b(st, pr, arg);
140 break; 140 break;
141 case (PH_DEACTIVATE | REQUEST): 141 case (PH_DEACTIVATE | REQUEST):
142 l1_msg_b(st, pr, arg); 142 l1_msg_b(st, pr, arg);
143 break; 143 break;
144 case (PH_DEACTIVATE | CONFIRM): 144 case (PH_DEACTIVATE | CONFIRM):
145 spin_lock_irqsave(&bcs->cs->lock, flags); 145 spin_lock_irqsave(&bcs->cs->lock, flags);
146 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 146 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
147 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 147 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
148 modehscx(bcs, 0, st->l1.bc); 148 modehscx(bcs, 0, st->l1.bc);
149 spin_unlock_irqrestore(&bcs->cs->lock, flags); 149 spin_unlock_irqrestore(&bcs->cs->lock, flags);
150 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 150 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
151 break; 151 break;
152 } 152 }
153} 153}
154 154
@@ -177,13 +177,13 @@ open_hscxstate(struct IsdnCardState *cs, struct BCState *bcs)
177 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { 177 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
178 if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { 178 if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
179 printk(KERN_WARNING 179 printk(KERN_WARNING
180 "HiSax: No memory for hscx.rcvbuf\n"); 180 "HiSax: No memory for hscx.rcvbuf\n");
181 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); 181 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
182 return (1); 182 return (1);
183 } 183 }
184 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { 184 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
185 printk(KERN_WARNING 185 printk(KERN_WARNING
186 "HiSax: No memory for bcs->blog\n"); 186 "HiSax: No memory for bcs->blog\n");
187 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); 187 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
188 kfree(bcs->hw.hscx.rcvbuf); 188 kfree(bcs->hw.hscx.rcvbuf);
189 bcs->hw.hscx.rcvbuf = NULL; 189 bcs->hw.hscx.rcvbuf = NULL;
diff --git a/drivers/isdn/hisax/hscx.h b/drivers/isdn/hisax/hscx.h
index 268bfd3549b0..1148b4bbe711 100644
--- a/drivers/isdn/hisax/hscx.h
+++ b/drivers/isdn/hisax/hscx.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
diff --git a/drivers/isdn/hisax/hscx_irq.c b/drivers/isdn/hisax/hscx_irq.c
index 2387d76c721a..f398d4838937 100644
--- a/drivers/isdn/hisax/hscx_irq.c
+++ b/drivers/isdn/hisax/hscx_irq.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -84,7 +84,7 @@ hscx_fill_fifo(struct BCState *bcs)
84{ 84{
85 struct IsdnCardState *cs = bcs->cs; 85 struct IsdnCardState *cs = bcs->cs;
86 int more, count; 86 int more, count;
87 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32; 87 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
88 u_char *ptr; 88 u_char *ptr;
89 89
90 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 90 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
@@ -125,7 +125,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
125 u_char r; 125 u_char r;
126 struct BCState *bcs = cs->bcs + hscx; 126 struct BCState *bcs = cs->bcs + hscx;
127 struct sk_buff *skb; 127 struct sk_buff *skb;
128 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags)? 64: 32; 128 int fifo_size = test_bit(HW_IPAC, &cs->HW_Flags) ? 64 : 32;
129 int count; 129 int count;
130 130
131 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) 131 if (!test_bit(BC_FLG_INIT, &bcs->Flag))
@@ -159,7 +159,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
159 WriteHSCXCMDR(cs, hscx, 0x80); 159 WriteHSCXCMDR(cs, hscx, 0x80);
160 } else { 160 } else {
161 count = READHSCX(cs, hscx, HSCX_RBCL) & ( 161 count = READHSCX(cs, hscx, HSCX_RBCL) & (
162 test_bit(HW_IPAC, &cs->HW_Flags)? 0x3f: 0x1f); 162 test_bit(HW_IPAC, &cs->HW_Flags) ? 0x3f : 0x1f);
163 if (count == 0) 163 if (count == 0)
164 count = fifo_size; 164 count = fifo_size;
165 hscx_empty_fifo(bcs, count); 165 hscx_empty_fifo(bcs, count);
@@ -197,8 +197,8 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
197 hscx_fill_fifo(bcs); 197 hscx_fill_fifo(bcs);
198 return; 198 return;
199 } else { 199 } else {
200 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 200 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
201 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 201 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
202 u_long flags; 202 u_long flags;
203 spin_lock_irqsave(&bcs->aclock, flags); 203 spin_lock_irqsave(&bcs->aclock, flags);
204 bcs->ackcnt += bcs->hw.hscx.count; 204 bcs->ackcnt += bcs->hw.hscx.count;
@@ -206,7 +206,7 @@ hscx_interrupt(struct IsdnCardState *cs, u_char val, u_char hscx)
206 schedule_event(bcs, B_ACKPENDING); 206 schedule_event(bcs, B_ACKPENDING);
207 } 207 }
208 dev_kfree_skb_irq(bcs->tx_skb); 208 dev_kfree_skb_irq(bcs->tx_skb);
209 bcs->hw.hscx.count = 0; 209 bcs->hw.hscx.count = 0;
210 bcs->tx_skb = NULL; 210 bcs->tx_skb = NULL;
211 } 211 }
212 } 212 }
@@ -239,7 +239,7 @@ hscx_int_main(struct IsdnCardState *cs, u_char val)
239 bcs->err_tx++; 239 bcs->err_tx++;
240#endif 240#endif
241 /* Here we lost an TX interrupt, so 241 /* Here we lost an TX interrupt, so
242 * restart transmitting the whole frame. 242 * restart transmitting the whole frame.
243 */ 243 */
244 if (bcs->tx_skb) { 244 if (bcs->tx_skb) {
245 skb_push(bcs->tx_skb, bcs->hw.hscx.count); 245 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
@@ -266,7 +266,7 @@ hscx_int_main(struct IsdnCardState *cs, u_char val)
266 hscx_fill_fifo(bcs); 266 hscx_fill_fifo(bcs);
267 else { 267 else {
268 /* Here we lost an TX interrupt, so 268 /* Here we lost an TX interrupt, so
269 * restart transmitting the whole frame. 269 * restart transmitting the whole frame.
270 */ 270 */
271#ifdef ERROR_STATISTIC 271#ifdef ERROR_STATISTIC
272 bcs->err_tx++; 272 bcs->err_tx++;
diff --git a/drivers/isdn/hisax/icc.c b/drivers/isdn/hisax/icc.c
index 63057268cc3d..7be762b17c70 100644
--- a/drivers/isdn/hisax/icc.c
+++ b/drivers/isdn/hisax/icc.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Matt Henderson & Guy Ellis 5 * Author Matt Henderson & Guy Ellis
6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au 6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -50,30 +50,30 @@ static void
50icc_new_ph(struct IsdnCardState *cs) 50icc_new_ph(struct IsdnCardState *cs)
51{ 51{
52 switch (cs->dc.icc.ph_state) { 52 switch (cs->dc.icc.ph_state) {
53 case (ICC_IND_EI1): 53 case (ICC_IND_EI1):
54 ph_command(cs, ICC_CMD_DI); 54 ph_command(cs, ICC_CMD_DI);
55 l1_msg(cs, HW_RESET | INDICATION, NULL); 55 l1_msg(cs, HW_RESET | INDICATION, NULL);
56 break; 56 break;
57 case (ICC_IND_DC): 57 case (ICC_IND_DC):
58 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL); 58 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
59 break; 59 break;
60 case (ICC_IND_DR): 60 case (ICC_IND_DR):
61 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 61 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
62 break; 62 break;
63 case (ICC_IND_PU): 63 case (ICC_IND_PU):
64 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 64 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
65 break; 65 break;
66 case (ICC_IND_FJ): 66 case (ICC_IND_FJ):
67 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 67 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
68 break; 68 break;
69 case (ICC_IND_AR): 69 case (ICC_IND_AR):
70 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 70 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
71 break; 71 break;
72 case (ICC_IND_AI): 72 case (ICC_IND_AI):
73 l1_msg(cs, HW_INFO4 | INDICATION, NULL); 73 l1_msg(cs, HW_INFO4 | INDICATION, NULL);
74 break; 74 break;
75 default: 75 default:
76 break; 76 break;
77 } 77 }
78} 78}
79 79
@@ -83,7 +83,7 @@ icc_bh(struct work_struct *work)
83 struct IsdnCardState *cs = 83 struct IsdnCardState *cs =
84 container_of(work, struct IsdnCardState, tqueue); 84 container_of(work, struct IsdnCardState, tqueue);
85 struct PStack *stptr; 85 struct PStack *stptr;
86 86
87 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) { 87 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
88 if (cs->debug) 88 if (cs->debug)
89 debugl1(cs, "D-Channel Busy cleared"); 89 debugl1(cs, "D-Channel Busy cleared");
@@ -94,7 +94,7 @@ icc_bh(struct work_struct *work)
94 } 94 }
95 } 95 }
96 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) 96 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
97 icc_new_ph(cs); 97 icc_new_ph(cs);
98 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) 98 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
99 DChannel_proc_rcv(cs); 99 DChannel_proc_rcv(cs);
100 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) 100 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
@@ -254,11 +254,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
254 } else 254 } else
255 schedule_event(cs, D_XMTBUFREADY); 255 schedule_event(cs, D_XMTBUFREADY);
256 } 256 }
257 afterXPR: 257afterXPR:
258 if (val & 0x04) { /* CISQ */ 258 if (val & 0x04) { /* CISQ */
259 exval = cs->readisac(cs, ICC_CIR0); 259 exval = cs->readisac(cs, ICC_CIR0);
260 if (cs->debug & L1_DEB_ISAC) 260 if (cs->debug & L1_DEB_ISAC)
261 debugl1(cs, "ICC CIR0 %02X", exval ); 261 debugl1(cs, "ICC CIR0 %02X", exval);
262 if (exval & 2) { 262 if (exval & 2) {
263 cs->dc.icc.ph_state = (exval >> 2) & 0xf; 263 cs->dc.icc.ph_state = (exval >> 2) & 0xf;
264 if (cs->debug & L1_DEB_ISAC) 264 if (cs->debug & L1_DEB_ISAC)
@@ -268,7 +268,7 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
268 if (exval & 1) { 268 if (exval & 1) {
269 exval = cs->readisac(cs, ICC_CIR1); 269 exval = cs->readisac(cs, ICC_CIR1);
270 if (cs->debug & L1_DEB_ISAC) 270 if (cs->debug & L1_DEB_ISAC)
271 debugl1(cs, "ICC CIR1 %02X", exval ); 271 debugl1(cs, "ICC CIR1 %02X", exval);
272 } 272 }
273 } 273 }
274 if (val & 0x02) { /* SIN */ 274 if (val & 0x02) { /* SIN */
@@ -331,13 +331,13 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
331 } 331 }
332 cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR0); 332 cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR0);
333 if (cs->debug & L1_DEB_MONITOR) 333 if (cs->debug & L1_DEB_MONITOR)
334 debugl1(cs, "ICC MOR0 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp -1]); 334 debugl1(cs, "ICC MOR0 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp - 1]);
335 if (cs->dc.icc.mon_rxp == 1) { 335 if (cs->dc.icc.mon_rxp == 1) {
336 cs->dc.icc.mocr |= 0x04; 336 cs->dc.icc.mocr |= 0x04;
337 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 337 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
338 } 338 }
339 } 339 }
340 afterMONR0: 340 afterMONR0:
341 if (v1 & 0x80) { 341 if (v1 & 0x80) {
342 if (!cs->dc.icc.mon_rx) { 342 if (!cs->dc.icc.mon_rx) {
343 if (!(cs->dc.icc.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) { 343 if (!(cs->dc.icc.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
@@ -361,11 +361,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
361 } 361 }
362 cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR1); 362 cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp++] = cs->readisac(cs, ICC_MOR1);
363 if (cs->debug & L1_DEB_MONITOR) 363 if (cs->debug & L1_DEB_MONITOR)
364 debugl1(cs, "ICC MOR1 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp -1]); 364 debugl1(cs, "ICC MOR1 %02x", cs->dc.icc.mon_rx[cs->dc.icc.mon_rxp - 1]);
365 cs->dc.icc.mocr |= 0x40; 365 cs->dc.icc.mocr |= 0x40;
366 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 366 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
367 } 367 }
368 afterMONR1: 368 afterMONR1:
369 if (v1 & 0x04) { 369 if (v1 & 0x04) {
370 cs->dc.icc.mocr &= 0xf0; 370 cs->dc.icc.mocr &= 0xf0;
371 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 371 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
@@ -381,15 +381,15 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
381 schedule_event(cs, D_RX_MON1); 381 schedule_event(cs, D_RX_MON1);
382 } 382 }
383 if (v1 & 0x02) { 383 if (v1 & 0x02) {
384 if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc && 384 if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
385 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) && 385 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
386 !(v1 & 0x08))) { 386 !(v1 & 0x08))) {
387 cs->dc.icc.mocr &= 0xf0; 387 cs->dc.icc.mocr &= 0xf0;
388 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 388 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
389 cs->dc.icc.mocr |= 0x0a; 389 cs->dc.icc.mocr |= 0x0a;
390 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 390 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
391 if (cs->dc.icc.mon_txc && 391 if (cs->dc.icc.mon_txc &&
392 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) 392 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
393 schedule_event(cs, D_TX_MON0); 393 schedule_event(cs, D_TX_MON0);
394 goto AfterMOX0; 394 goto AfterMOX0;
395 } 395 }
@@ -398,21 +398,21 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
398 goto AfterMOX0; 398 goto AfterMOX0;
399 } 399 }
400 cs->writeisac(cs, ICC_MOX0, 400 cs->writeisac(cs, ICC_MOX0,
401 cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]); 401 cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
402 if (cs->debug & L1_DEB_MONITOR) 402 if (cs->debug & L1_DEB_MONITOR)
403 debugl1(cs, "ICC %02x -> MOX0", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp -1]); 403 debugl1(cs, "ICC %02x -> MOX0", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]);
404 } 404 }
405 AfterMOX0: 405 AfterMOX0:
406 if (v1 & 0x20) { 406 if (v1 & 0x20) {
407 if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc && 407 if ((!cs->dc.icc.mon_tx) || (cs->dc.icc.mon_txc &&
408 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) && 408 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc) &&
409 !(v1 & 0x80))) { 409 !(v1 & 0x80))) {
410 cs->dc.icc.mocr &= 0x0f; 410 cs->dc.icc.mocr &= 0x0f;
411 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 411 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
412 cs->dc.icc.mocr |= 0xa0; 412 cs->dc.icc.mocr |= 0xa0;
413 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr); 413 cs->writeisac(cs, ICC_MOCR, cs->dc.icc.mocr);
414 if (cs->dc.icc.mon_txc && 414 if (cs->dc.icc.mon_txc &&
415 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc)) 415 (cs->dc.icc.mon_txp >= cs->dc.icc.mon_txc))
416 schedule_event(cs, D_TX_MON1); 416 schedule_event(cs, D_TX_MON1);
417 goto AfterMOX1; 417 goto AfterMOX1;
418 } 418 }
@@ -421,11 +421,11 @@ icc_interrupt(struct IsdnCardState *cs, u_char val)
421 goto AfterMOX1; 421 goto AfterMOX1;
422 } 422 }
423 cs->writeisac(cs, ICC_MOX1, 423 cs->writeisac(cs, ICC_MOX1,
424 cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]); 424 cs->dc.icc.mon_tx[cs->dc.icc.mon_txp++]);
425 if (cs->debug & L1_DEB_MONITOR) 425 if (cs->debug & L1_DEB_MONITOR)
426 debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp -1]); 426 debugl1(cs, "ICC %02x -> MOX1", cs->dc.icc.mon_tx[cs->dc.icc.mon_txp - 1]);
427 } 427 }
428 AfterMOX1: 428 AfterMOX1:
429#endif 429#endif
430 } 430 }
431 } 431 }
@@ -440,128 +440,128 @@ ICC_l1hw(struct PStack *st, int pr, void *arg)
440 int val; 440 int val;
441 441
442 switch (pr) { 442 switch (pr) {
443 case (PH_DATA |REQUEST): 443 case (PH_DATA | REQUEST):
444 if (cs->debug & DEB_DLOG_HEX) 444 if (cs->debug & DEB_DLOG_HEX)
445 LogFrame(cs, skb->data, skb->len); 445 LogFrame(cs, skb->data, skb->len);
446 if (cs->debug & DEB_DLOG_VERBOSE) 446 if (cs->debug & DEB_DLOG_VERBOSE)
447 dlogframe(cs, skb, 0); 447 dlogframe(cs, skb, 0);
448 spin_lock_irqsave(&cs->lock, flags); 448 spin_lock_irqsave(&cs->lock, flags);
449 if (cs->tx_skb) { 449 if (cs->tx_skb) {
450 skb_queue_tail(&cs->sq, skb); 450 skb_queue_tail(&cs->sq, skb);
451#ifdef L2FRAME_DEBUG /* psa */
452 if (cs->debug & L1_DEB_LAPD)
453 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
454#endif
455 } else {
456 cs->tx_skb = skb;
457 cs->tx_cnt = 0;
458#ifdef L2FRAME_DEBUG /* psa */ 451#ifdef L2FRAME_DEBUG /* psa */
459 if (cs->debug & L1_DEB_LAPD) 452 if (cs->debug & L1_DEB_LAPD)
460 Logl2Frame(cs, skb, "PH_DATA", 0); 453 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
461#endif 454#endif
462 icc_fill_fifo(cs); 455 } else {
463 }
464 spin_unlock_irqrestore(&cs->lock, flags);
465 break;
466 case (PH_PULL |INDICATION):
467 spin_lock_irqsave(&cs->lock, flags);
468 if (cs->tx_skb) {
469 if (cs->debug & L1_DEB_WARN)
470 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
471 skb_queue_tail(&cs->sq, skb);
472 spin_unlock_irqrestore(&cs->lock, flags);
473 break;
474 }
475 if (cs->debug & DEB_DLOG_HEX)
476 LogFrame(cs, skb->data, skb->len);
477 if (cs->debug & DEB_DLOG_VERBOSE)
478 dlogframe(cs, skb, 0);
479 cs->tx_skb = skb; 456 cs->tx_skb = skb;
480 cs->tx_cnt = 0; 457 cs->tx_cnt = 0;
481#ifdef L2FRAME_DEBUG /* psa */ 458#ifdef L2FRAME_DEBUG /* psa */
482 if (cs->debug & L1_DEB_LAPD) 459 if (cs->debug & L1_DEB_LAPD)
483 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 460 Logl2Frame(cs, skb, "PH_DATA", 0);
484#endif 461#endif
485 icc_fill_fifo(cs); 462 icc_fill_fifo(cs);
463 }
464 spin_unlock_irqrestore(&cs->lock, flags);
465 break;
466 case (PH_PULL | INDICATION):
467 spin_lock_irqsave(&cs->lock, flags);
468 if (cs->tx_skb) {
469 if (cs->debug & L1_DEB_WARN)
470 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
471 skb_queue_tail(&cs->sq, skb);
486 spin_unlock_irqrestore(&cs->lock, flags); 472 spin_unlock_irqrestore(&cs->lock, flags);
487 break; 473 break;
488 case (PH_PULL | REQUEST): 474 }
475 if (cs->debug & DEB_DLOG_HEX)
476 LogFrame(cs, skb->data, skb->len);
477 if (cs->debug & DEB_DLOG_VERBOSE)
478 dlogframe(cs, skb, 0);
479 cs->tx_skb = skb;
480 cs->tx_cnt = 0;
489#ifdef L2FRAME_DEBUG /* psa */ 481#ifdef L2FRAME_DEBUG /* psa */
490 if (cs->debug & L1_DEB_LAPD) 482 if (cs->debug & L1_DEB_LAPD)
491 debugl1(cs, "-> PH_REQUEST_PULL"); 483 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
492#endif 484#endif
493 if (!cs->tx_skb) { 485 icc_fill_fifo(cs);
494 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 486 spin_unlock_irqrestore(&cs->lock, flags);
495 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 487 break;
496 } else 488 case (PH_PULL | REQUEST):
497 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 489#ifdef L2FRAME_DEBUG /* psa */
498 break; 490 if (cs->debug & L1_DEB_LAPD)
499 case (HW_RESET | REQUEST): 491 debugl1(cs, "-> PH_REQUEST_PULL");
500 spin_lock_irqsave(&cs->lock, flags); 492#endif
501 if ((cs->dc.icc.ph_state == ICC_IND_EI1) || 493 if (!cs->tx_skb) {
502 (cs->dc.icc.ph_state == ICC_IND_DR)) 494 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
503 ph_command(cs, ICC_CMD_DI); 495 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
504 else 496 } else
505 ph_command(cs, ICC_CMD_RES); 497 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
506 spin_unlock_irqrestore(&cs->lock, flags); 498 break;
507 break; 499 case (HW_RESET | REQUEST):
508 case (HW_ENABLE | REQUEST): 500 spin_lock_irqsave(&cs->lock, flags);
509 spin_lock_irqsave(&cs->lock, flags); 501 if ((cs->dc.icc.ph_state == ICC_IND_EI1) ||
502 (cs->dc.icc.ph_state == ICC_IND_DR))
510 ph_command(cs, ICC_CMD_DI); 503 ph_command(cs, ICC_CMD_DI);
511 spin_unlock_irqrestore(&cs->lock, flags); 504 else
512 break; 505 ph_command(cs, ICC_CMD_RES);
513 case (HW_INFO1 | REQUEST): 506 spin_unlock_irqrestore(&cs->lock, flags);
514 spin_lock_irqsave(&cs->lock, flags); 507 break;
515 ph_command(cs, ICC_CMD_AR); 508 case (HW_ENABLE | REQUEST):
516 spin_unlock_irqrestore(&cs->lock, flags); 509 spin_lock_irqsave(&cs->lock, flags);
517 break; 510 ph_command(cs, ICC_CMD_DI);
518 case (HW_INFO3 | REQUEST): 511 spin_unlock_irqrestore(&cs->lock, flags);
519 spin_lock_irqsave(&cs->lock, flags); 512 break;
520 ph_command(cs, ICC_CMD_AI); 513 case (HW_INFO1 | REQUEST):
521 spin_unlock_irqrestore(&cs->lock, flags); 514 spin_lock_irqsave(&cs->lock, flags);
522 break; 515 ph_command(cs, ICC_CMD_AR);
523 case (HW_TESTLOOP | REQUEST): 516 spin_unlock_irqrestore(&cs->lock, flags);
524 spin_lock_irqsave(&cs->lock, flags); 517 break;
525 val = 0; 518 case (HW_INFO3 | REQUEST):
526 if (1 & (long) arg) 519 spin_lock_irqsave(&cs->lock, flags);
527 val |= 0x0c; 520 ph_command(cs, ICC_CMD_AI);
528 if (2 & (long) arg) 521 spin_unlock_irqrestore(&cs->lock, flags);
529 val |= 0x3; 522 break;
530 if (test_bit(HW_IOM1, &cs->HW_Flags)) { 523 case (HW_TESTLOOP | REQUEST):
531 /* IOM 1 Mode */ 524 spin_lock_irqsave(&cs->lock, flags);
532 if (!val) { 525 val = 0;
533 cs->writeisac(cs, ICC_SPCR, 0xa); 526 if (1 & (long) arg)
534 cs->writeisac(cs, ICC_ADF1, 0x2); 527 val |= 0x0c;
535 } else { 528 if (2 & (long) arg)
536 cs->writeisac(cs, ICC_SPCR, val); 529 val |= 0x3;
537 cs->writeisac(cs, ICC_ADF1, 0xa); 530 if (test_bit(HW_IOM1, &cs->HW_Flags)) {
538 } 531 /* IOM 1 Mode */
532 if (!val) {
533 cs->writeisac(cs, ICC_SPCR, 0xa);
534 cs->writeisac(cs, ICC_ADF1, 0x2);
539 } else { 535 } else {
540 /* IOM 2 Mode */
541 cs->writeisac(cs, ICC_SPCR, val); 536 cs->writeisac(cs, ICC_SPCR, val);
542 if (val) 537 cs->writeisac(cs, ICC_ADF1, 0xa);
543 cs->writeisac(cs, ICC_ADF1, 0x8);
544 else
545 cs->writeisac(cs, ICC_ADF1, 0x0);
546 }
547 spin_unlock_irqrestore(&cs->lock, flags);
548 break;
549 case (HW_DEACTIVATE | RESPONSE):
550 skb_queue_purge(&cs->rq);
551 skb_queue_purge(&cs->sq);
552 if (cs->tx_skb) {
553 dev_kfree_skb_any(cs->tx_skb);
554 cs->tx_skb = NULL;
555 } 538 }
556 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 539 } else {
557 del_timer(&cs->dbusytimer); 540 /* IOM 2 Mode */
558 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 541 cs->writeisac(cs, ICC_SPCR, val);
559 schedule_event(cs, D_CLEARBUSY); 542 if (val)
560 break; 543 cs->writeisac(cs, ICC_ADF1, 0x8);
561 default: 544 else
562 if (cs->debug & L1_DEB_WARN) 545 cs->writeisac(cs, ICC_ADF1, 0x0);
563 debugl1(cs, "icc_l1hw unknown %04x", pr); 546 }
564 break; 547 spin_unlock_irqrestore(&cs->lock, flags);
548 break;
549 case (HW_DEACTIVATE | RESPONSE):
550 skb_queue_purge(&cs->rq);
551 skb_queue_purge(&cs->sq);
552 if (cs->tx_skb) {
553 dev_kfree_skb_any(cs->tx_skb);
554 cs->tx_skb = NULL;
555 }
556 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
557 del_timer(&cs->dbusytimer);
558 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
559 schedule_event(cs, D_CLEARBUSY);
560 break;
561 default:
562 if (cs->debug & L1_DEB_WARN)
563 debugl1(cs, "icc_l1hw unknown %04x", pr);
564 break;
565 } 565 }
566} 566}
567 567
@@ -588,7 +588,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
588 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 588 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
589 rbch = cs->readisac(cs, ICC_RBCH); 589 rbch = cs->readisac(cs, ICC_RBCH);
590 star = cs->readisac(cs, ICC_STAR); 590 star = cs->readisac(cs, ICC_STAR);
591 if (cs->debug) 591 if (cs->debug)
592 debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x", 592 debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x",
593 rbch, star); 593 rbch, star);
594 if (rbch & ICC_RBCH_XAC) { /* D-Channel Busy */ 594 if (rbch & ICC_RBCH_XAC) { /* D-Channel Busy */
@@ -622,8 +622,8 @@ initicc(struct IsdnCardState *cs)
622 cs->DC_Close = DC_Close_icc; 622 cs->DC_Close = DC_Close_icc;
623 cs->dc.icc.mon_tx = NULL; 623 cs->dc.icc.mon_tx = NULL;
624 cs->dc.icc.mon_rx = NULL; 624 cs->dc.icc.mon_rx = NULL;
625 cs->writeisac(cs, ICC_MASK, 0xff); 625 cs->writeisac(cs, ICC_MASK, 0xff);
626 cs->dc.icc.mocr = 0xaa; 626 cs->dc.icc.mocr = 0xaa;
627 if (test_bit(HW_IOM1, &cs->HW_Flags)) { 627 if (test_bit(HW_IOM1, &cs->HW_Flags)) {
628 /* IOM 1 Mode */ 628 /* IOM 1 Mode */
629 cs->writeisac(cs, ICC_ADF2, 0x0); 629 cs->writeisac(cs, ICC_ADF2, 0x0);
diff --git a/drivers/isdn/hisax/icc.h b/drivers/isdn/hisax/icc.h
index e7f593967e43..f367df5d3669 100644
--- a/drivers/isdn/hisax/icc.h
+++ b/drivers/isdn/hisax/icc.h
@@ -4,12 +4,12 @@
4 * 4 *
5 * Author Matt Henderson & Guy Ellis 5 * Author Matt Henderson & Guy Ellis
6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au 6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 * 1999.7.14 Initial implementation of routines for Siemens ISDN 11 * 1999.7.14 Initial implementation of routines for Siemens ISDN
12 * Communication Controller PEB 2070 based on the ISAC routines 12 * Communication Controller PEB 2070 based on the ISAC routines
13 * written by Karsten Keil. 13 * written by Karsten Keil.
14 */ 14 */
15 15
diff --git a/drivers/isdn/hisax/ipac.h b/drivers/isdn/hisax/ipac.h
index f92a04a92826..4f937f02ee34 100644
--- a/drivers/isdn/hisax/ipac.h
+++ b/drivers/isdn/hisax/ipac.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
diff --git a/drivers/isdn/hisax/ipacx.c b/drivers/isdn/hisax/ipacx.c
index 690840444184..74feb5c83067 100644
--- a/drivers/isdn/hisax/ipacx.c
+++ b/drivers/isdn/hisax/ipacx.c
@@ -1,10 +1,10 @@
1/* 1/*
2 * 2 *
3 * IPACX specific routines 3 * IPACX specific routines
4 * 4 *
5 * Author Joerg Petersohn 5 * Author Joerg Petersohn
6 * Derived from hisax_isac.c, isac.c, hscx.c and others 6 * Derived from hisax_isac.c, isac.c, hscx.c and others
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -24,7 +24,7 @@
24#define D_FIFO_SIZE 32 24#define D_FIFO_SIZE 32
25 25
26 26
27// ipacx interrupt mask values 27// ipacx interrupt mask values
28#define _MASK_IMASK 0x2E // global mask 28#define _MASK_IMASK 0x2E // global mask
29#define _MASKB_IMASK 0x0B 29#define _MASKB_IMASK 0x0B
30#define _MASKD_IMASK 0x03 // all on 30#define _MASKD_IMASK 0x03 // all on
@@ -55,33 +55,33 @@ static void clear_pending_ints(struct IsdnCardState *cs);
55//---------------------------------------------------------- 55//----------------------------------------------------------
56// Issue Layer 1 command to chip 56// Issue Layer 1 command to chip
57//---------------------------------------------------------- 57//----------------------------------------------------------
58static void 58static void
59ph_command(struct IsdnCardState *cs, unsigned int command) 59ph_command(struct IsdnCardState *cs, unsigned int command)
60{ 60{
61 if (cs->debug &L1_DEB_ISAC) 61 if (cs->debug & L1_DEB_ISAC)
62 debugl1(cs, "ph_command (%#x) in (%#x)", command, 62 debugl1(cs, "ph_command (%#x) in (%#x)", command,
63 cs->dc.isac.ph_state); 63 cs->dc.isac.ph_state);
64//################################### 64//###################################
65// printk(KERN_INFO "ph_command (%#x)\n", command); 65// printk(KERN_INFO "ph_command (%#x)\n", command);
66//################################### 66//###################################
67 cs->writeisac(cs, IPACX_CIX0, (command << 4) | 0x0E); 67 cs->writeisac(cs, IPACX_CIX0, (command << 4) | 0x0E);
68} 68}
69 69
70//---------------------------------------------------------- 70//----------------------------------------------------------
71// Transceiver interrupt handler 71// Transceiver interrupt handler
72//---------------------------------------------------------- 72//----------------------------------------------------------
73static inline void 73static inline void
74cic_int(struct IsdnCardState *cs) 74cic_int(struct IsdnCardState *cs)
75{ 75{
76 u_char event; 76 u_char event;
77 77
78 event = cs->readisac(cs, IPACX_CIR0) >> 4; 78 event = cs->readisac(cs, IPACX_CIR0) >> 4;
79 if (cs->debug &L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event); 79 if (cs->debug & L1_DEB_ISAC) debugl1(cs, "cic_int(event=%#x)", event);
80//######################################### 80//#########################################
81// printk(KERN_INFO "cic_int(%x)\n", event); 81// printk(KERN_INFO "cic_int(%x)\n", event);
82//######################################### 82//#########################################
83 cs->dc.isac.ph_state = event; 83 cs->dc.isac.ph_state = event;
84 schedule_event(cs, D_L1STATECHANGE); 84 schedule_event(cs, D_L1STATECHANGE);
85} 85}
86 86
87//========================================================== 87//==========================================================
@@ -99,99 +99,99 @@ dch_l2l1(struct PStack *st, int pr, void *arg)
99 u_char cda1_cr; 99 u_char cda1_cr;
100 100
101 switch (pr) { 101 switch (pr) {
102 case (PH_DATA |REQUEST): 102 case (PH_DATA | REQUEST):
103 if (cs->debug &DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len); 103 if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
104 if (cs->debug &DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0); 104 if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
105 if (cs->tx_skb) { 105 if (cs->tx_skb) {
106 skb_queue_tail(&cs->sq, skb); 106 skb_queue_tail(&cs->sq, skb);
107#ifdef L2FRAME_DEBUG
108 if (cs->debug &L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA Queued", 0);
109#endif
110 } else {
111 cs->tx_skb = skb;
112 cs->tx_cnt = 0;
113#ifdef L2FRAME_DEBUG 107#ifdef L2FRAME_DEBUG
114 if (cs->debug &L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA", 0); 108 if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA Queued", 0);
115#endif 109#endif
116 dch_fill_fifo(cs); 110 } else {
117 }
118 break;
119
120 case (PH_PULL |INDICATION):
121 if (cs->tx_skb) {
122 if (cs->debug & L1_DEB_WARN)
123 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
124 skb_queue_tail(&cs->sq, skb);
125 break;
126 }
127 if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
128 if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
129 cs->tx_skb = skb; 111 cs->tx_skb = skb;
130 cs->tx_cnt = 0; 112 cs->tx_cnt = 0;
131#ifdef L2FRAME_DEBUG 113#ifdef L2FRAME_DEBUG
132 if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 114 if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA", 0);
133#endif 115#endif
134 dch_fill_fifo(cs); 116 dch_fill_fifo(cs);
117 }
118 break;
119
120 case (PH_PULL | INDICATION):
121 if (cs->tx_skb) {
122 if (cs->debug & L1_DEB_WARN)
123 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
124 skb_queue_tail(&cs->sq, skb);
135 break; 125 break;
136 126 }
137 case (PH_PULL | REQUEST): 127 if (cs->debug & DEB_DLOG_HEX) LogFrame(cs, skb->data, skb->len);
128 if (cs->debug & DEB_DLOG_VERBOSE) dlogframe(cs, skb, 0);
129 cs->tx_skb = skb;
130 cs->tx_cnt = 0;
138#ifdef L2FRAME_DEBUG 131#ifdef L2FRAME_DEBUG
139 if (cs->debug & L1_DEB_LAPD) debugl1(cs, "-> PH_REQUEST_PULL"); 132 if (cs->debug & L1_DEB_LAPD) Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
140#endif 133#endif
141 if (!cs->tx_skb) { 134 dch_fill_fifo(cs);
142 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 135 break;
143 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
144 } else
145 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
146 break;
147
148 case (HW_RESET | REQUEST):
149 case (HW_ENABLE | REQUEST):
150 if ((cs->dc.isac.ph_state == IPACX_IND_RES) ||
151 (cs->dc.isac.ph_state == IPACX_IND_DR) ||
152 (cs->dc.isac.ph_state == IPACX_IND_DC))
153 ph_command(cs, IPACX_CMD_TIM);
154 else
155 ph_command(cs, IPACX_CMD_RES);
156 break;
157
158 case (HW_INFO3 | REQUEST):
159 ph_command(cs, IPACX_CMD_AR8);
160 break;
161
162 case (HW_TESTLOOP | REQUEST):
163 cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
164 cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
165 cda1_cr = cs->readisac(cs, IPACX_CDA1_CR);
166 (void) cs->readisac(cs, IPACX_CDA2_CR);
167 if ((long)arg &1) { // loop B1
168 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x0a);
169 }
170 else { // B1 off
171 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x0a);
172 }
173 if ((long)arg &2) { // loop B2
174 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr |0x14);
175 }
176 else { // B2 off
177 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr &~0x14);
178 }
179 break;
180 136
181 case (HW_DEACTIVATE | RESPONSE): 137 case (PH_PULL | REQUEST):
182 skb_queue_purge(&cs->rq); 138#ifdef L2FRAME_DEBUG
183 skb_queue_purge(&cs->sq); 139 if (cs->debug & L1_DEB_LAPD) debugl1(cs, "-> PH_REQUEST_PULL");
184 if (cs->tx_skb) { 140#endif
185 dev_kfree_skb_any(cs->tx_skb); 141 if (!cs->tx_skb) {
186 cs->tx_skb = NULL; 142 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
187 } 143 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
188 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 144 } else
189 del_timer(&cs->dbusytimer); 145 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
190 break; 146 break;
147
148 case (HW_RESET | REQUEST):
149 case (HW_ENABLE | REQUEST):
150 if ((cs->dc.isac.ph_state == IPACX_IND_RES) ||
151 (cs->dc.isac.ph_state == IPACX_IND_DR) ||
152 (cs->dc.isac.ph_state == IPACX_IND_DC))
153 ph_command(cs, IPACX_CMD_TIM);
154 else
155 ph_command(cs, IPACX_CMD_RES);
156 break;
157
158 case (HW_INFO3 | REQUEST):
159 ph_command(cs, IPACX_CMD_AR8);
160 break;
161
162 case (HW_TESTLOOP | REQUEST):
163 cs->writeisac(cs, IPACX_CDA_TSDP10, 0x80); // Timeslot 0 is B1
164 cs->writeisac(cs, IPACX_CDA_TSDP11, 0x81); // Timeslot 0 is B1
165 cda1_cr = cs->readisac(cs, IPACX_CDA1_CR);
166 (void) cs->readisac(cs, IPACX_CDA2_CR);
167 if ((long)arg & 1) { // loop B1
168 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr | 0x0a);
169 }
170 else { // B1 off
171 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr & ~0x0a);
172 }
173 if ((long)arg & 2) { // loop B2
174 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr | 0x14);
175 }
176 else { // B2 off
177 cs->writeisac(cs, IPACX_CDA1_CR, cda1_cr & ~0x14);
178 }
179 break;
180
181 case (HW_DEACTIVATE | RESPONSE):
182 skb_queue_purge(&cs->rq);
183 skb_queue_purge(&cs->sq);
184 if (cs->tx_skb) {
185 dev_kfree_skb_any(cs->tx_skb);
186 cs->tx_skb = NULL;
187 }
188 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
189 del_timer(&cs->dbusytimer);
190 break;
191 191
192 default: 192 default:
193 if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_l2l1 unknown %04x", pr); 193 if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_l2l1 unknown %04x", pr);
194 break; 194 break;
195 } 195 }
196} 196}
197 197
@@ -206,11 +206,11 @@ dbusy_timer_handler(struct IsdnCardState *cs)
206 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 206 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
207 rbchd = cs->readisac(cs, IPACX_RBCHD); 207 rbchd = cs->readisac(cs, IPACX_RBCHD);
208 stard = cs->readisac(cs, IPACX_STARD); 208 stard = cs->readisac(cs, IPACX_STARD);
209 if (cs->debug) 209 if (cs->debug)
210 debugl1(cs, "D-Channel Busy RBCHD %02x STARD %02x", rbchd, stard); 210 debugl1(cs, "D-Channel Busy RBCHD %02x STARD %02x", rbchd, stard);
211 if (!(stard &0x40)) { // D-Channel Busy 211 if (!(stard & 0x40)) { // D-Channel Busy
212 set_bit(FLG_L1_DBUSY, &cs->HW_Flags); 212 set_bit(FLG_L1_DBUSY, &cs->HW_Flags);
213 for (st = cs->stlist; st; st = st->next) { 213 for (st = cs->stlist; st; st = st->next) {
214 st->l1.l1l2(st, PH_PAUSE | INDICATION, NULL); // flow control on 214 st->l1.l1l2(st, PH_PAUSE | INDICATION, NULL); // flow control on
215 } 215 }
216 } else { 216 } else {
@@ -232,30 +232,30 @@ dbusy_timer_handler(struct IsdnCardState *cs)
232//---------------------------------------------------------- 232//----------------------------------------------------------
233// Fill buffer from receive FIFO 233// Fill buffer from receive FIFO
234//---------------------------------------------------------- 234//----------------------------------------------------------
235static void 235static void
236dch_empty_fifo(struct IsdnCardState *cs, int count) 236dch_empty_fifo(struct IsdnCardState *cs, int count)
237{ 237{
238 u_char *ptr; 238 u_char *ptr;
239 239
240 if ((cs->debug &L1_DEB_ISAC) && !(cs->debug &L1_DEB_ISAC_FIFO)) 240 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
241 debugl1(cs, "dch_empty_fifo()"); 241 debugl1(cs, "dch_empty_fifo()");
242 242
243 // message too large, remove 243 // message too large, remove
244 if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) { 244 if ((cs->rcvidx + count) >= MAX_DFRAME_LEN_L1) {
245 if (cs->debug &L1_DEB_WARN) 245 if (cs->debug & L1_DEB_WARN)
246 debugl1(cs, "dch_empty_fifo() incoming message too large"); 246 debugl1(cs, "dch_empty_fifo() incoming message too large");
247 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC 247 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
248 cs->rcvidx = 0; 248 cs->rcvidx = 0;
249 return; 249 return;
250 } 250 }
251 251
252 ptr = cs->rcvbuf + cs->rcvidx; 252 ptr = cs->rcvbuf + cs->rcvidx;
253 cs->rcvidx += count; 253 cs->rcvidx += count;
254 254
255 cs->readisacfifo(cs, ptr, count); 255 cs->readisacfifo(cs, ptr, count);
256 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC 256 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
257 257
258 if (cs->debug &L1_DEB_ISAC_FIFO) { 258 if (cs->debug & L1_DEB_ISAC_FIFO) {
259 char *t = cs->dlog; 259 char *t = cs->dlog;
260 260
261 t += sprintf(t, "dch_empty_fifo() cnt %d", count); 261 t += sprintf(t, "dch_empty_fifo() cnt %d", count);
@@ -267,15 +267,15 @@ dch_empty_fifo(struct IsdnCardState *cs, int count)
267//---------------------------------------------------------- 267//----------------------------------------------------------
268// Fill transmit FIFO 268// Fill transmit FIFO
269//---------------------------------------------------------- 269//----------------------------------------------------------
270static void 270static void
271dch_fill_fifo(struct IsdnCardState *cs) 271dch_fill_fifo(struct IsdnCardState *cs)
272{ 272{
273 int count; 273 int count;
274 u_char cmd, *ptr; 274 u_char cmd, *ptr;
275 275
276 if ((cs->debug &L1_DEB_ISAC) && !(cs->debug &L1_DEB_ISAC_FIFO)) 276 if ((cs->debug & L1_DEB_ISAC) && !(cs->debug & L1_DEB_ISAC_FIFO))
277 debugl1(cs, "dch_fill_fifo()"); 277 debugl1(cs, "dch_fill_fifo()");
278 278
279 if (!cs->tx_skb) return; 279 if (!cs->tx_skb) return;
280 count = cs->tx_skb->len; 280 count = cs->tx_skb->len;
281 if (count <= 0) return; 281 if (count <= 0) return;
@@ -286,14 +286,14 @@ dch_fill_fifo(struct IsdnCardState *cs)
286 } else { 286 } else {
287 cmd = 0x0A; // XTF | XME 287 cmd = 0x0A; // XTF | XME
288 } 288 }
289 289
290 ptr = cs->tx_skb->data; 290 ptr = cs->tx_skb->data;
291 skb_pull(cs->tx_skb, count); 291 skb_pull(cs->tx_skb, count);
292 cs->tx_cnt += count; 292 cs->tx_cnt += count;
293 cs->writeisacfifo(cs, ptr, count); 293 cs->writeisacfifo(cs, ptr, count);
294 cs->writeisac(cs, IPACX_CMDRD, cmd); 294 cs->writeisac(cs, IPACX_CMDRD, cmd);
295 295
296 // set timeout for transmission contol 296 // set timeout for transmission contol
297 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 297 if (test_and_set_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
298 debugl1(cs, "dch_fill_fifo dbusytimer running"); 298 debugl1(cs, "dch_fill_fifo dbusytimer running");
299 del_timer(&cs->dbusytimer); 299 del_timer(&cs->dbusytimer);
@@ -301,8 +301,8 @@ dch_fill_fifo(struct IsdnCardState *cs)
301 init_timer(&cs->dbusytimer); 301 init_timer(&cs->dbusytimer);
302 cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000); 302 cs->dbusytimer.expires = jiffies + ((DBUSY_TIMER_VALUE * HZ)/1000);
303 add_timer(&cs->dbusytimer); 303 add_timer(&cs->dbusytimer);
304 304
305 if (cs->debug &L1_DEB_ISAC_FIFO) { 305 if (cs->debug & L1_DEB_ISAC_FIFO) {
306 char *t = cs->dlog; 306 char *t = cs->dlog;
307 307
308 t += sprintf(t, "dch_fill_fifo() cnt %d", count); 308 t += sprintf(t, "dch_fill_fifo() cnt %d", count);
@@ -314,7 +314,7 @@ dch_fill_fifo(struct IsdnCardState *cs)
314//---------------------------------------------------------- 314//----------------------------------------------------------
315// D channel interrupt handler 315// D channel interrupt handler
316//---------------------------------------------------------- 316//----------------------------------------------------------
317static inline void 317static inline void
318dch_int(struct IsdnCardState *cs) 318dch_int(struct IsdnCardState *cs)
319{ 319{
320 struct sk_buff *skb; 320 struct sk_buff *skb;
@@ -322,31 +322,31 @@ dch_int(struct IsdnCardState *cs)
322 int count; 322 int count;
323 323
324 istad = cs->readisac(cs, IPACX_ISTAD); 324 istad = cs->readisac(cs, IPACX_ISTAD);
325//############################################## 325//##############################################
326// printk(KERN_WARNING "dch_int(istad=%02x)\n", istad); 326// printk(KERN_WARNING "dch_int(istad=%02x)\n", istad);
327//############################################## 327//##############################################
328 328
329 if (istad &0x80) { // RME 329 if (istad & 0x80) { // RME
330 rstad = cs->readisac(cs, IPACX_RSTAD); 330 rstad = cs->readisac(cs, IPACX_RSTAD);
331 if ((rstad &0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB) 331 if ((rstad & 0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
332 if (!(rstad &0x80)) 332 if (!(rstad & 0x80))
333 if (cs->debug &L1_DEB_WARN) 333 if (cs->debug & L1_DEB_WARN)
334 debugl1(cs, "dch_int(): invalid frame"); 334 debugl1(cs, "dch_int(): invalid frame");
335 if ((rstad &0x40)) 335 if ((rstad & 0x40))
336 if (cs->debug &L1_DEB_WARN) 336 if (cs->debug & L1_DEB_WARN)
337 debugl1(cs, "dch_int(): RDO"); 337 debugl1(cs, "dch_int(): RDO");
338 if (!(rstad &0x20)) 338 if (!(rstad & 0x20))
339 if (cs->debug &L1_DEB_WARN) 339 if (cs->debug & L1_DEB_WARN)
340 debugl1(cs, "dch_int(): CRC error"); 340 debugl1(cs, "dch_int(): CRC error");
341 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC 341 cs->writeisac(cs, IPACX_CMDRD, 0x80); // RMC
342 } else { // received frame ok 342 } else { // received frame ok
343 count = cs->readisac(cs, IPACX_RBCLD); 343 count = cs->readisac(cs, IPACX_RBCLD);
344 if (count) count--; // RSTAB is last byte 344 if (count) count--; // RSTAB is last byte
345 count &= D_FIFO_SIZE-1; 345 count &= D_FIFO_SIZE - 1;
346 if (count == 0) count = D_FIFO_SIZE; 346 if (count == 0) count = D_FIFO_SIZE;
347 dch_empty_fifo(cs, count); 347 dch_empty_fifo(cs, count);
348 if ((count = cs->rcvidx) > 0) { 348 if ((count = cs->rcvidx) > 0) {
349 cs->rcvidx = 0; 349 cs->rcvidx = 0;
350 if (!(skb = dev_alloc_skb(count))) 350 if (!(skb = dev_alloc_skb(count)))
351 printk(KERN_WARNING "HiSax dch_int(): receive out of memory\n"); 351 printk(KERN_WARNING "HiSax dch_int(): receive out of memory\n");
352 else { 352 else {
@@ -354,57 +354,57 @@ dch_int(struct IsdnCardState *cs)
354 skb_queue_tail(&cs->rq, skb); 354 skb_queue_tail(&cs->rq, skb);
355 } 355 }
356 } 356 }
357 } 357 }
358 cs->rcvidx = 0; 358 cs->rcvidx = 0;
359 schedule_event(cs, D_RCVBUFREADY); 359 schedule_event(cs, D_RCVBUFREADY);
360 } 360 }
361 361
362 if (istad &0x40) { // RPF 362 if (istad & 0x40) { // RPF
363 dch_empty_fifo(cs, D_FIFO_SIZE); 363 dch_empty_fifo(cs, D_FIFO_SIZE);
364 } 364 }
365 365
366 if (istad &0x20) { // RFO 366 if (istad & 0x20) { // RFO
367 if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_int(): RFO"); 367 if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_int(): RFO");
368 cs->writeisac(cs, IPACX_CMDRD, 0x40); //RRES 368 cs->writeisac(cs, IPACX_CMDRD, 0x40); //RRES
369 } 369 }
370 370
371 if (istad &0x10) { // XPR 371 if (istad & 0x10) { // XPR
372 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 372 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
373 del_timer(&cs->dbusytimer); 373 del_timer(&cs->dbusytimer);
374 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 374 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
375 schedule_event(cs, D_CLEARBUSY); 375 schedule_event(cs, D_CLEARBUSY);
376 if (cs->tx_skb) { 376 if (cs->tx_skb) {
377 if (cs->tx_skb->len) { 377 if (cs->tx_skb->len) {
378 dch_fill_fifo(cs); 378 dch_fill_fifo(cs);
379 goto afterXPR; 379 goto afterXPR;
380 } 380 }
381 else { 381 else {
382 dev_kfree_skb_irq(cs->tx_skb); 382 dev_kfree_skb_irq(cs->tx_skb);
383 cs->tx_skb = NULL; 383 cs->tx_skb = NULL;
384 cs->tx_cnt = 0; 384 cs->tx_cnt = 0;
385 } 385 }
386 } 386 }
387 if ((cs->tx_skb = skb_dequeue(&cs->sq))) { 387 if ((cs->tx_skb = skb_dequeue(&cs->sq))) {
388 cs->tx_cnt = 0; 388 cs->tx_cnt = 0;
389 dch_fill_fifo(cs); 389 dch_fill_fifo(cs);
390 } 390 }
391 else { 391 else {
392 schedule_event(cs, D_XMTBUFREADY); 392 schedule_event(cs, D_XMTBUFREADY);
393 } 393 }
394 } 394 }
395 afterXPR: 395afterXPR:
396 396
397 if (istad &0x0C) { // XDU or XMR 397 if (istad & 0x0C) { // XDU or XMR
398 if (cs->debug &L1_DEB_WARN) debugl1(cs, "dch_int(): XDU"); 398 if (cs->debug & L1_DEB_WARN) debugl1(cs, "dch_int(): XDU");
399 if (cs->tx_skb) { 399 if (cs->tx_skb) {
400 skb_push(cs->tx_skb, cs->tx_cnt); // retransmit 400 skb_push(cs->tx_skb, cs->tx_cnt); // retransmit
401 cs->tx_cnt = 0; 401 cs->tx_cnt = 0;
402 dch_fill_fifo(cs); 402 dch_fill_fifo(cs);
403 } else { 403 } else {
404 printk(KERN_WARNING "HiSax: ISAC XDU no skb\n"); 404 printk(KERN_WARNING "HiSax: ISAC XDU no skb\n");
405 debugl1(cs, "ISAC XDU no skb"); 405 debugl1(cs, "ISAC XDU no skb");
406 } 406 }
407 } 407 }
408} 408}
409 409
410//---------------------------------------------------------- 410//----------------------------------------------------------
@@ -423,15 +423,15 @@ dch_init(struct IsdnCardState *cs)
423 printk(KERN_INFO "HiSax: IPACX ISDN driver v0.1.0\n"); 423 printk(KERN_INFO "HiSax: IPACX ISDN driver v0.1.0\n");
424 424
425 cs->setstack_d = dch_setstack; 425 cs->setstack_d = dch_setstack;
426 426
427 cs->dbusytimer.function = (void *) dbusy_timer_handler; 427 cs->dbusytimer.function = (void *) dbusy_timer_handler;
428 cs->dbusytimer.data = (long) cs; 428 cs->dbusytimer.data = (long) cs;
429 init_timer(&cs->dbusytimer); 429 init_timer(&cs->dbusytimer);
430 430
431 cs->writeisac(cs, IPACX_TR_CONF0, 0x00); // clear LDD 431 cs->writeisac(cs, IPACX_TR_CONF0, 0x00); // clear LDD
432 cs->writeisac(cs, IPACX_TR_CONF2, 0x00); // enable transmitter 432 cs->writeisac(cs, IPACX_TR_CONF2, 0x00); // enable transmitter
433 cs->writeisac(cs, IPACX_MODED, 0xC9); // transparent mode 0, RAC, stop/go 433 cs->writeisac(cs, IPACX_MODED, 0xC9); // transparent mode 0, RAC, stop/go
434 cs->writeisac(cs, IPACX_MON_CR, 0x00); // disable monitor channel 434 cs->writeisac(cs, IPACX_MON_CR, 0x00); // disable monitor channel
435} 435}
436 436
437 437
@@ -450,55 +450,55 @@ bch_l2l1(struct PStack *st, int pr, void *arg)
450 u_long flags; 450 u_long flags;
451 451
452 switch (pr) { 452 switch (pr) {
453 case (PH_DATA | REQUEST): 453 case (PH_DATA | REQUEST):
454 spin_lock_irqsave(&bcs->cs->lock, flags); 454 spin_lock_irqsave(&bcs->cs->lock, flags);
455 if (bcs->tx_skb) { 455 if (bcs->tx_skb) {
456 skb_queue_tail(&bcs->squeue, skb); 456 skb_queue_tail(&bcs->squeue, skb);
457 } else { 457 } else {
458 bcs->tx_skb = skb; 458 bcs->tx_skb = skb;
459 set_bit(BC_FLG_BUSY, &bcs->Flag); 459 set_bit(BC_FLG_BUSY, &bcs->Flag);
460 bcs->hw.hscx.count = 0; 460 bcs->hw.hscx.count = 0;
461 bch_fill_fifo(bcs); 461 bch_fill_fifo(bcs);
462 } 462 }
463 spin_unlock_irqrestore(&bcs->cs->lock, flags); 463 spin_unlock_irqrestore(&bcs->cs->lock, flags);
464 break; 464 break;
465 case (PH_PULL | INDICATION): 465 case (PH_PULL | INDICATION):
466 spin_lock_irqsave(&bcs->cs->lock, flags); 466 spin_lock_irqsave(&bcs->cs->lock, flags);
467 if (bcs->tx_skb) { 467 if (bcs->tx_skb) {
468 printk(KERN_WARNING "HiSax bch_l2l1(): this shouldn't happen\n"); 468 printk(KERN_WARNING "HiSax bch_l2l1(): this shouldn't happen\n");
469 } else { 469 } else {
470 set_bit(BC_FLG_BUSY, &bcs->Flag); 470 set_bit(BC_FLG_BUSY, &bcs->Flag);
471 bcs->tx_skb = skb; 471 bcs->tx_skb = skb;
472 bcs->hw.hscx.count = 0; 472 bcs->hw.hscx.count = 0;
473 bch_fill_fifo(bcs); 473 bch_fill_fifo(bcs);
474 } 474 }
475 spin_unlock_irqrestore(&bcs->cs->lock, flags); 475 spin_unlock_irqrestore(&bcs->cs->lock, flags);
476 break; 476 break;
477 case (PH_PULL | REQUEST): 477 case (PH_PULL | REQUEST):
478 if (!bcs->tx_skb) { 478 if (!bcs->tx_skb) {
479 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 479 clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
480 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 480 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
481 } else 481 } else
482 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 482 set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
483 break; 483 break;
484 case (PH_ACTIVATE | REQUEST): 484 case (PH_ACTIVATE | REQUEST):
485 spin_lock_irqsave(&bcs->cs->lock, flags); 485 spin_lock_irqsave(&bcs->cs->lock, flags);
486 set_bit(BC_FLG_ACTIV, &bcs->Flag); 486 set_bit(BC_FLG_ACTIV, &bcs->Flag);
487 bch_mode(bcs, st->l1.mode, st->l1.bc); 487 bch_mode(bcs, st->l1.mode, st->l1.bc);
488 spin_unlock_irqrestore(&bcs->cs->lock, flags); 488 spin_unlock_irqrestore(&bcs->cs->lock, flags);
489 l1_msg_b(st, pr, arg); 489 l1_msg_b(st, pr, arg);
490 break; 490 break;
491 case (PH_DEACTIVATE | REQUEST): 491 case (PH_DEACTIVATE | REQUEST):
492 l1_msg_b(st, pr, arg); 492 l1_msg_b(st, pr, arg);
493 break; 493 break;
494 case (PH_DEACTIVATE | CONFIRM): 494 case (PH_DEACTIVATE | CONFIRM):
495 spin_lock_irqsave(&bcs->cs->lock, flags); 495 spin_lock_irqsave(&bcs->cs->lock, flags);
496 clear_bit(BC_FLG_ACTIV, &bcs->Flag); 496 clear_bit(BC_FLG_ACTIV, &bcs->Flag);
497 clear_bit(BC_FLG_BUSY, &bcs->Flag); 497 clear_bit(BC_FLG_BUSY, &bcs->Flag);
498 bch_mode(bcs, 0, st->l1.bc); 498 bch_mode(bcs, 0, st->l1.bc);
499 spin_unlock_irqrestore(&bcs->cs->lock, flags); 499 spin_unlock_irqrestore(&bcs->cs->lock, flags);
500 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 500 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
501 break; 501 break;
502 } 502 }
503} 503}
504 504
@@ -513,28 +513,28 @@ bch_empty_fifo(struct BCState *bcs, int count)
513 int cnt; 513 int cnt;
514 514
515 cs = bcs->cs; 515 cs = bcs->cs;
516 hscx = bcs->hw.hscx.hscx; 516 hscx = bcs->hw.hscx.hscx;
517 if ((cs->debug &L1_DEB_HSCX) && !(cs->debug &L1_DEB_HSCX_FIFO)) 517 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
518 debugl1(cs, "bch_empty_fifo()"); 518 debugl1(cs, "bch_empty_fifo()");
519 519
520 // message too large, remove 520 // message too large, remove
521 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) { 521 if (bcs->hw.hscx.rcvidx + count > HSCX_BUFMAX) {
522 if (cs->debug &L1_DEB_WARN) 522 if (cs->debug & L1_DEB_WARN)
523 debugl1(cs, "bch_empty_fifo() incoming packet too large"); 523 debugl1(cs, "bch_empty_fifo() incoming packet too large");
524 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC 524 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
525 bcs->hw.hscx.rcvidx = 0; 525 bcs->hw.hscx.rcvidx = 0;
526 return; 526 return;
527 } 527 }
528 528
529 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; 529 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
530 cnt = count; 530 cnt = count;
531 while (cnt--) *ptr++ = cs->BC_Read_Reg(cs, hscx, IPACX_RFIFOB); 531 while (cnt--) *ptr++ = cs->BC_Read_Reg(cs, hscx, IPACX_RFIFOB);
532 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC 532 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
533 533
534 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx; 534 ptr = bcs->hw.hscx.rcvbuf + bcs->hw.hscx.rcvidx;
535 bcs->hw.hscx.rcvidx += count; 535 bcs->hw.hscx.rcvidx += count;
536 536
537 if (cs->debug &L1_DEB_HSCX_FIFO) { 537 if (cs->debug & L1_DEB_HSCX_FIFO) {
538 char *t = bcs->blog; 538 char *t = bcs->blog;
539 539
540 t += sprintf(t, "bch_empty_fifo() B-%d cnt %d", hscx, count); 540 t += sprintf(t, "bch_empty_fifo() B-%d cnt %d", hscx, count);
@@ -554,7 +554,7 @@ bch_fill_fifo(struct BCState *bcs)
554 u_char *ptr, *p, hscx; 554 u_char *ptr, *p, hscx;
555 555
556 cs = bcs->cs; 556 cs = bcs->cs;
557 if ((cs->debug &L1_DEB_HSCX) && !(cs->debug &L1_DEB_HSCX_FIFO)) 557 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
558 debugl1(cs, "bch_fill_fifo()"); 558 debugl1(cs, "bch_fill_fifo()");
559 559
560 if (!bcs->tx_skb) return; 560 if (!bcs->tx_skb) return;
@@ -567,17 +567,17 @@ bch_fill_fifo(struct BCState *bcs)
567 count = B_FIFO_SIZE; 567 count = B_FIFO_SIZE;
568 } else { 568 } else {
569 count = bcs->tx_skb->len; 569 count = bcs->tx_skb->len;
570 } 570 }
571 cnt = count; 571 cnt = count;
572 572
573 p = ptr = bcs->tx_skb->data; 573 p = ptr = bcs->tx_skb->data;
574 skb_pull(bcs->tx_skb, count); 574 skb_pull(bcs->tx_skb, count);
575 bcs->tx_cnt -= count; 575 bcs->tx_cnt -= count;
576 bcs->hw.hscx.count += count; 576 bcs->hw.hscx.count += count;
577 while (cnt--) cs->BC_Write_Reg(cs, hscx, IPACX_XFIFOB, *p++); 577 while (cnt--) cs->BC_Write_Reg(cs, hscx, IPACX_XFIFOB, *p++);
578 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, (more ? 0x08 : 0x0a)); 578 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, (more ? 0x08 : 0x0a));
579 579
580 if (cs->debug &L1_DEB_HSCX_FIFO) { 580 if (cs->debug & L1_DEB_HSCX_FIFO) {
581 char *t = bcs->blog; 581 char *t = bcs->blog;
582 582
583 t += sprintf(t, "chb_fill_fifo() B-%d cnt %d", hscx, count); 583 t += sprintf(t, "chb_fill_fifo() B-%d cnt %d", hscx, count);
@@ -600,31 +600,31 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
600 600
601 bcs = cs->bcs + hscx; 601 bcs = cs->bcs + hscx;
602 istab = cs->BC_Read_Reg(cs, hscx, IPACX_ISTAB); 602 istab = cs->BC_Read_Reg(cs, hscx, IPACX_ISTAB);
603//############################################## 603//##############################################
604// printk(KERN_WARNING "bch_int(istab=%02x)\n", istab); 604// printk(KERN_WARNING "bch_int(istab=%02x)\n", istab);
605//############################################## 605//##############################################
606 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) return; 606 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) return;
607 607
608 if (istab &0x80) { // RME 608 if (istab & 0x80) { // RME
609 rstab = cs->BC_Read_Reg(cs, hscx, IPACX_RSTAB); 609 rstab = cs->BC_Read_Reg(cs, hscx, IPACX_RSTAB);
610 if ((rstab &0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB) 610 if ((rstab & 0xf0) != 0xa0) { // !(VFR && !RDO && CRC && !RAB)
611 if (!(rstab &0x80)) 611 if (!(rstab & 0x80))
612 if (cs->debug &L1_DEB_WARN) 612 if (cs->debug & L1_DEB_WARN)
613 debugl1(cs, "bch_int() B-%d: invalid frame", hscx); 613 debugl1(cs, "bch_int() B-%d: invalid frame", hscx);
614 if ((rstab &0x40) && (bcs->mode != L1_MODE_NULL)) 614 if ((rstab & 0x40) && (bcs->mode != L1_MODE_NULL))
615 if (cs->debug &L1_DEB_WARN) 615 if (cs->debug & L1_DEB_WARN)
616 debugl1(cs, "bch_int() B-%d: RDO mode=%d", hscx, bcs->mode); 616 debugl1(cs, "bch_int() B-%d: RDO mode=%d", hscx, bcs->mode);
617 if (!(rstab &0x20)) 617 if (!(rstab & 0x20))
618 if (cs->debug &L1_DEB_WARN) 618 if (cs->debug & L1_DEB_WARN)
619 debugl1(cs, "bch_int() B-%d: CRC error", hscx); 619 debugl1(cs, "bch_int() B-%d: CRC error", hscx);
620 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC 620 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x80); // RMC
621 } 621 }
622 else { // received frame ok 622 else { // received frame ok
623 count = cs->BC_Read_Reg(cs, hscx, IPACX_RBCLB) &(B_FIFO_SIZE-1); 623 count = cs->BC_Read_Reg(cs, hscx, IPACX_RBCLB) & (B_FIFO_SIZE - 1);
624 if (count == 0) count = B_FIFO_SIZE; 624 if (count == 0) count = B_FIFO_SIZE;
625 bch_empty_fifo(bcs, count); 625 bch_empty_fifo(bcs, count);
626 if ((count = bcs->hw.hscx.rcvidx - 1) > 0) { 626 if ((count = bcs->hw.hscx.rcvidx - 1) > 0) {
627 if (cs->debug &L1_DEB_HSCX_FIFO) 627 if (cs->debug & L1_DEB_HSCX_FIFO)
628 debugl1(cs, "bch_int Frame %d", count); 628 debugl1(cs, "bch_int Frame %d", count);
629 if (!(skb = dev_alloc_skb(count))) 629 if (!(skb = dev_alloc_skb(count)))
630 printk(KERN_WARNING "HiSax bch_int(): receive frame out of memory\n"); 630 printk(KERN_WARNING "HiSax bch_int(): receive frame out of memory\n");
@@ -637,8 +637,8 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
637 bcs->hw.hscx.rcvidx = 0; 637 bcs->hw.hscx.rcvidx = 0;
638 schedule_event(bcs, B_RCVBUFREADY); 638 schedule_event(bcs, B_RCVBUFREADY);
639 } 639 }
640 640
641 if (istab &0x40) { // RPF 641 if (istab & 0x40) { // RPF
642 bch_empty_fifo(bcs, B_FIFO_SIZE); 642 bch_empty_fifo(bcs, B_FIFO_SIZE);
643 643
644 if (bcs->mode == L1_MODE_TRANS) { // queue every chunk 644 if (bcs->mode == L1_MODE_TRANS) { // queue every chunk
@@ -653,21 +653,21 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
653 schedule_event(bcs, B_RCVBUFREADY); 653 schedule_event(bcs, B_RCVBUFREADY);
654 } 654 }
655 } 655 }
656 656
657 if (istab &0x20) { // RFO 657 if (istab & 0x20) { // RFO
658 if (cs->debug &L1_DEB_WARN) 658 if (cs->debug & L1_DEB_WARN)
659 debugl1(cs, "bch_int() B-%d: RFO error", hscx); 659 debugl1(cs, "bch_int() B-%d: RFO error", hscx);
660 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x40); // RRES 660 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x40); // RRES
661 } 661 }
662 662
663 if (istab &0x10) { // XPR 663 if (istab & 0x10) { // XPR
664 if (bcs->tx_skb) { 664 if (bcs->tx_skb) {
665 if (bcs->tx_skb->len) { 665 if (bcs->tx_skb->len) {
666 bch_fill_fifo(bcs); 666 bch_fill_fifo(bcs);
667 goto afterXPR; 667 goto afterXPR;
668 } else { 668 } else {
669 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 669 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
670 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 670 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
671 u_long flags; 671 u_long flags;
672 spin_lock_irqsave(&bcs->aclock, flags); 672 spin_lock_irqsave(&bcs->aclock, flags);
673 bcs->ackcnt += bcs->hw.hscx.count; 673 bcs->ackcnt += bcs->hw.hscx.count;
@@ -678,7 +678,7 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
678 dev_kfree_skb_irq(bcs->tx_skb); 678 dev_kfree_skb_irq(bcs->tx_skb);
679 bcs->hw.hscx.count = 0; 679 bcs->hw.hscx.count = 0;
680 bcs->tx_skb = NULL; 680 bcs->tx_skb = NULL;
681 } 681 }
682 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) { 682 if ((bcs->tx_skb = skb_dequeue(&bcs->squeue))) {
683 bcs->hw.hscx.count = 0; 683 bcs->hw.hscx.count = 0;
684 set_bit(BC_FLG_BUSY, &bcs->Flag); 684 set_bit(BC_FLG_BUSY, &bcs->Flag);
@@ -688,22 +688,22 @@ bch_int(struct IsdnCardState *cs, u_char hscx)
688 schedule_event(bcs, B_XMTBUFREADY); 688 schedule_event(bcs, B_XMTBUFREADY);
689 } 689 }
690 } 690 }
691 afterXPR: 691afterXPR:
692 692
693 if (istab &0x04) { // XDU 693 if (istab & 0x04) { // XDU
694 if (bcs->mode == L1_MODE_TRANS) { 694 if (bcs->mode == L1_MODE_TRANS) {
695 bch_fill_fifo(bcs); 695 bch_fill_fifo(bcs);
696 } 696 }
697 else { 697 else {
698 if (bcs->tx_skb) { // restart transmitting the whole frame 698 if (bcs->tx_skb) { // restart transmitting the whole frame
699 skb_push(bcs->tx_skb, bcs->hw.hscx.count); 699 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
700 bcs->tx_cnt += bcs->hw.hscx.count; 700 bcs->tx_cnt += bcs->hw.hscx.count;
701 bcs->hw.hscx.count = 0; 701 bcs->hw.hscx.count = 0;
702 } 702 }
703 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x01); // XRES 703 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x01); // XRES
704 if (cs->debug &L1_DEB_WARN) 704 if (cs->debug & L1_DEB_WARN)
705 debugl1(cs, "bch_int() B-%d XDU error", hscx); 705 debugl1(cs, "bch_int() B-%d XDU error", hscx);
706 } 706 }
707 } 707 }
708} 708}
709 709
@@ -715,43 +715,43 @@ bch_mode(struct BCState *bcs, int mode, int bc)
715 struct IsdnCardState *cs = bcs->cs; 715 struct IsdnCardState *cs = bcs->cs;
716 int hscx = bcs->hw.hscx.hscx; 716 int hscx = bcs->hw.hscx.hscx;
717 717
718 bc = bc ? 1 : 0; // in case bc is greater than 1 718 bc = bc ? 1 : 0; // in case bc is greater than 1
719 if (cs->debug & L1_DEB_HSCX) 719 if (cs->debug & L1_DEB_HSCX)
720 debugl1(cs, "mode_bch() switch B-%d mode %d chan %d", hscx, mode, bc); 720 debugl1(cs, "mode_bch() switch B-%d mode %d chan %d", hscx, mode, bc);
721 bcs->mode = mode; 721 bcs->mode = mode;
722 bcs->channel = bc; 722 bcs->channel = bc;
723 723
724 // map controller to according timeslot 724 // map controller to according timeslot
725 if (!hscx) 725 if (!hscx)
726 { 726 {
727 cs->writeisac(cs, IPACX_BCHA_TSDP_BC1, 0x80 | bc); 727 cs->writeisac(cs, IPACX_BCHA_TSDP_BC1, 0x80 | bc);
728 cs->writeisac(cs, IPACX_BCHA_CR, 0x88); 728 cs->writeisac(cs, IPACX_BCHA_CR, 0x88);
729 } 729 }
730 else 730 else
731 { 731 {
732 cs->writeisac(cs, IPACX_BCHB_TSDP_BC1, 0x80 | bc); 732 cs->writeisac(cs, IPACX_BCHB_TSDP_BC1, 0x80 | bc);
733 cs->writeisac(cs, IPACX_BCHB_CR, 0x88); 733 cs->writeisac(cs, IPACX_BCHB_CR, 0x88);
734 } 734 }
735 735
736 switch (mode) { 736 switch (mode) {
737 case (L1_MODE_NULL): 737 case (L1_MODE_NULL):
738 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC0); // rec off 738 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC0); // rec off
739 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x30); // std adj. 739 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x30); // std adj.
740 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, 0xFF); // ints off 740 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, 0xFF); // ints off
741 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments 741 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
742 break; 742 break;
743 case (L1_MODE_TRANS): 743 case (L1_MODE_TRANS):
744 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0x88); // ext transp mode 744 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0x88); // ext transp mode
745 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x00); // xxx00000 745 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x00); // xxx00000
746 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments 746 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
747 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK); 747 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
748 break; 748 break;
749 case (L1_MODE_HDLC): 749 case (L1_MODE_HDLC):
750 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC8); // transp mode 0 750 cs->BC_Write_Reg(cs, hscx, IPACX_MODEB, 0xC8); // transp mode 0
751 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x01); // idle=hdlc flags crc enabled 751 cs->BC_Write_Reg(cs, hscx, IPACX_EXMB, 0x01); // idle=hdlc flags crc enabled
752 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments 752 cs->BC_Write_Reg(cs, hscx, IPACX_CMDRB, 0x41); // validate adjustments
753 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK); 753 cs->BC_Write_Reg(cs, hscx, IPACX_MASKB, _MASKB_IMASK);
754 break; 754 break;
755 } 755 }
756} 756}
757 757
@@ -784,13 +784,13 @@ bch_open_state(struct IsdnCardState *cs, struct BCState *bcs)
784 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) { 784 if (!test_and_set_bit(BC_FLG_INIT, &bcs->Flag)) {
785 if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) { 785 if (!(bcs->hw.hscx.rcvbuf = kmalloc(HSCX_BUFMAX, GFP_ATOMIC))) {
786 printk(KERN_WARNING 786 printk(KERN_WARNING
787 "HiSax open_bchstate(): No memory for hscx.rcvbuf\n"); 787 "HiSax open_bchstate(): No memory for hscx.rcvbuf\n");
788 clear_bit(BC_FLG_INIT, &bcs->Flag); 788 clear_bit(BC_FLG_INIT, &bcs->Flag);
789 return (1); 789 return (1);
790 } 790 }
791 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { 791 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
792 printk(KERN_WARNING 792 printk(KERN_WARNING
793 "HiSax open_bchstate: No memory for bcs->blog\n"); 793 "HiSax open_bchstate: No memory for bcs->blog\n");
794 clear_bit(BC_FLG_INIT, &bcs->Flag); 794 clear_bit(BC_FLG_INIT, &bcs->Flag);
795 kfree(bcs->hw.hscx.rcvbuf); 795 kfree(bcs->hw.hscx.rcvbuf);
796 bcs->hw.hscx.rcvbuf = NULL; 796 bcs->hw.hscx.rcvbuf = NULL;
@@ -842,21 +842,21 @@ bch_init(struct IsdnCardState *cs, int hscx)
842//---------------------------------------------------------- 842//----------------------------------------------------------
843// Main interrupt handler 843// Main interrupt handler
844//---------------------------------------------------------- 844//----------------------------------------------------------
845void 845void
846interrupt_ipacx(struct IsdnCardState *cs) 846interrupt_ipacx(struct IsdnCardState *cs)
847{ 847{
848 u_char ista; 848 u_char ista;
849 849
850 while ((ista = cs->readisac(cs, IPACX_ISTA))) { 850 while ((ista = cs->readisac(cs, IPACX_ISTA))) {
851//################################################# 851//#################################################
852// printk(KERN_WARNING "interrupt_ipacx(ista=%02x)\n", ista); 852// printk(KERN_WARNING "interrupt_ipacx(ista=%02x)\n", ista);
853//################################################# 853//#################################################
854 if (ista &0x80) bch_int(cs, 0); // B channel interrupts 854 if (ista & 0x80) bch_int(cs, 0); // B channel interrupts
855 if (ista &0x40) bch_int(cs, 1); 855 if (ista & 0x40) bch_int(cs, 1);
856 856
857 if (ista &0x01) dch_int(cs); // D channel 857 if (ista & 0x01) dch_int(cs); // D channel
858 if (ista &0x10) cic_int(cs); // Layer 1 state 858 if (ista & 0x10) cic_int(cs); // Layer 1 state
859 } 859 }
860} 860}
861 861
862//---------------------------------------------------------- 862//----------------------------------------------------------
@@ -867,17 +867,17 @@ clear_pending_ints(struct IsdnCardState *cs)
867{ 867{
868 int ista; 868 int ista;
869 869
870 // all interrupts off 870 // all interrupts off
871 cs->writeisac(cs, IPACX_MASK, 0xff); 871 cs->writeisac(cs, IPACX_MASK, 0xff);
872 cs->writeisac(cs, IPACX_MASKD, 0xff); 872 cs->writeisac(cs, IPACX_MASKD, 0xff);
873 cs->BC_Write_Reg(cs, 0, IPACX_MASKB, 0xff); 873 cs->BC_Write_Reg(cs, 0, IPACX_MASKB, 0xff);
874 cs->BC_Write_Reg(cs, 1, IPACX_MASKB, 0xff); 874 cs->BC_Write_Reg(cs, 1, IPACX_MASKB, 0xff);
875 875
876 ista = cs->readisac(cs, IPACX_ISTA); 876 ista = cs->readisac(cs, IPACX_ISTA);
877 if (ista &0x80) cs->BC_Read_Reg(cs, 0, IPACX_ISTAB); 877 if (ista & 0x80) cs->BC_Read_Reg(cs, 0, IPACX_ISTAB);
878 if (ista &0x40) cs->BC_Read_Reg(cs, 1, IPACX_ISTAB); 878 if (ista & 0x40) cs->BC_Read_Reg(cs, 1, IPACX_ISTAB);
879 if (ista &0x10) cs->readisac(cs, IPACX_CIR0); 879 if (ista & 0x10) cs->readisac(cs, IPACX_CIR0);
880 if (ista &0x01) cs->readisac(cs, IPACX_ISTAD); 880 if (ista & 0x01) cs->readisac(cs, IPACX_ISTAD);
881} 881}
882 882
883//---------------------------------------------------------- 883//----------------------------------------------------------
@@ -887,23 +887,23 @@ clear_pending_ints(struct IsdnCardState *cs)
887void 887void
888init_ipacx(struct IsdnCardState *cs, int part) 888init_ipacx(struct IsdnCardState *cs, int part)
889{ 889{
890 if (part &1) { // initialise chip 890 if (part & 1) { // initialise chip
891//################################################## 891//##################################################
892// printk(KERN_INFO "init_ipacx(%x)\n", part); 892// printk(KERN_INFO "init_ipacx(%x)\n", part);
893//################################################## 893//##################################################
894 clear_pending_ints(cs); 894 clear_pending_ints(cs);
895 bch_init(cs, 0); 895 bch_init(cs, 0);
896 bch_init(cs, 1); 896 bch_init(cs, 1);
897 dch_init(cs); 897 dch_init(cs);
898 } 898 }
899 if (part &2) { // reenable all interrupts and start chip 899 if (part & 2) { // reenable all interrupts and start chip
900 cs->BC_Write_Reg(cs, 0, IPACX_MASKB, _MASKB_IMASK); 900 cs->BC_Write_Reg(cs, 0, IPACX_MASKB, _MASKB_IMASK);
901 cs->BC_Write_Reg(cs, 1, IPACX_MASKB, _MASKB_IMASK); 901 cs->BC_Write_Reg(cs, 1, IPACX_MASKB, _MASKB_IMASK);
902 cs->writeisac(cs, IPACX_MASKD, _MASKD_IMASK); 902 cs->writeisac(cs, IPACX_MASKD, _MASKD_IMASK);
903 cs->writeisac(cs, IPACX_MASK, _MASK_IMASK); // global mask register 903 cs->writeisac(cs, IPACX_MASK, _MASK_IMASK); // global mask register
904 904
905 // reset HDLC Transmitters/receivers 905 // reset HDLC Transmitters/receivers
906 cs->writeisac(cs, IPACX_CMDRD, 0x41); 906 cs->writeisac(cs, IPACX_CMDRD, 0x41);
907 cs->BC_Write_Reg(cs, 0, IPACX_CMDRB, 0x41); 907 cs->BC_Write_Reg(cs, 0, IPACX_CMDRB, 0x41);
908 cs->BC_Write_Reg(cs, 1, IPACX_CMDRB, 0x41); 908 cs->BC_Write_Reg(cs, 1, IPACX_CMDRB, 0x41);
909 ph_command(cs, IPACX_CMD_RES); 909 ph_command(cs, IPACX_CMD_RES);
@@ -911,4 +911,3 @@ init_ipacx(struct IsdnCardState *cs, int part)
911} 911}
912 912
913//----------------- end of file ----------------------- 913//----------------- end of file -----------------------
914
diff --git a/drivers/isdn/hisax/isac.c b/drivers/isdn/hisax/isac.c
index 2b66728136d5..bcd70a387307 100644
--- a/drivers/isdn/hisax/isac.c
+++ b/drivers/isdn/hisax/isac.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -49,34 +49,34 @@ static void
49isac_new_ph(struct IsdnCardState *cs) 49isac_new_ph(struct IsdnCardState *cs)
50{ 50{
51 switch (cs->dc.isac.ph_state) { 51 switch (cs->dc.isac.ph_state) {
52 case (ISAC_IND_RS): 52 case (ISAC_IND_RS):
53 case (ISAC_IND_EI): 53 case (ISAC_IND_EI):
54 ph_command(cs, ISAC_CMD_DUI); 54 ph_command(cs, ISAC_CMD_DUI);
55 l1_msg(cs, HW_RESET | INDICATION, NULL); 55 l1_msg(cs, HW_RESET | INDICATION, NULL);
56 break; 56 break;
57 case (ISAC_IND_DID): 57 case (ISAC_IND_DID):
58 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL); 58 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
59 break; 59 break;
60 case (ISAC_IND_DR): 60 case (ISAC_IND_DR):
61 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 61 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
62 break; 62 break;
63 case (ISAC_IND_PU): 63 case (ISAC_IND_PU):
64 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 64 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
65 break; 65 break;
66 case (ISAC_IND_RSY): 66 case (ISAC_IND_RSY):
67 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 67 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
68 break; 68 break;
69 case (ISAC_IND_ARD): 69 case (ISAC_IND_ARD):
70 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 70 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
71 break; 71 break;
72 case (ISAC_IND_AI8): 72 case (ISAC_IND_AI8):
73 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 73 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
74 break; 74 break;
75 case (ISAC_IND_AI10): 75 case (ISAC_IND_AI10):
76 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL); 76 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
77 break; 77 break;
78 default: 78 default:
79 break; 79 break;
80 } 80 }
81} 81}
82 82
@@ -86,7 +86,7 @@ isac_bh(struct work_struct *work)
86 struct IsdnCardState *cs = 86 struct IsdnCardState *cs =
87 container_of(work, struct IsdnCardState, tqueue); 87 container_of(work, struct IsdnCardState, tqueue);
88 struct PStack *stptr; 88 struct PStack *stptr;
89 89
90 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) { 90 if (test_and_clear_bit(D_CLEARBUSY, &cs->event)) {
91 if (cs->debug) 91 if (cs->debug)
92 debugl1(cs, "D-Channel Busy cleared"); 92 debugl1(cs, "D-Channel Busy cleared");
@@ -97,7 +97,7 @@ isac_bh(struct work_struct *work)
97 } 97 }
98 } 98 }
99 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event)) 99 if (test_and_clear_bit(D_L1STATECHANGE, &cs->event))
100 isac_new_ph(cs); 100 isac_new_ph(cs);
101 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event)) 101 if (test_and_clear_bit(D_RCVBUFREADY, &cs->event))
102 DChannel_proc_rcv(cs); 102 DChannel_proc_rcv(cs);
103 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) 103 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
@@ -257,11 +257,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
257 } else 257 } else
258 schedule_event(cs, D_XMTBUFREADY); 258 schedule_event(cs, D_XMTBUFREADY);
259 } 259 }
260 afterXPR: 260afterXPR:
261 if (val & 0x04) { /* CISQ */ 261 if (val & 0x04) { /* CISQ */
262 exval = cs->readisac(cs, ISAC_CIR0); 262 exval = cs->readisac(cs, ISAC_CIR0);
263 if (cs->debug & L1_DEB_ISAC) 263 if (cs->debug & L1_DEB_ISAC)
264 debugl1(cs, "ISAC CIR0 %02X", exval ); 264 debugl1(cs, "ISAC CIR0 %02X", exval);
265 if (exval & 2) { 265 if (exval & 2) {
266 cs->dc.isac.ph_state = (exval >> 2) & 0xf; 266 cs->dc.isac.ph_state = (exval >> 2) & 0xf;
267 if (cs->debug & L1_DEB_ISAC) 267 if (cs->debug & L1_DEB_ISAC)
@@ -271,7 +271,7 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
271 if (exval & 1) { 271 if (exval & 1) {
272 exval = cs->readisac(cs, ISAC_CIR1); 272 exval = cs->readisac(cs, ISAC_CIR1);
273 if (cs->debug & L1_DEB_ISAC) 273 if (cs->debug & L1_DEB_ISAC)
274 debugl1(cs, "ISAC CIR1 %02X", exval ); 274 debugl1(cs, "ISAC CIR1 %02X", exval);
275 } 275 }
276 } 276 }
277 if (val & 0x02) { /* SIN */ 277 if (val & 0x02) { /* SIN */
@@ -334,13 +334,13 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
334 } 334 }
335 cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR0); 335 cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR0);
336 if (cs->debug & L1_DEB_MONITOR) 336 if (cs->debug & L1_DEB_MONITOR)
337 debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]); 337 debugl1(cs, "ISAC MOR0 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp - 1]);
338 if (cs->dc.isac.mon_rxp == 1) { 338 if (cs->dc.isac.mon_rxp == 1) {
339 cs->dc.isac.mocr |= 0x04; 339 cs->dc.isac.mocr |= 0x04;
340 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 340 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
341 } 341 }
342 } 342 }
343 afterMONR0: 343 afterMONR0:
344 if (v1 & 0x80) { 344 if (v1 & 0x80) {
345 if (!cs->dc.isac.mon_rx) { 345 if (!cs->dc.isac.mon_rx) {
346 if (!(cs->dc.isac.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) { 346 if (!(cs->dc.isac.mon_rx = kmalloc(MAX_MON_FRAME, GFP_ATOMIC))) {
@@ -364,11 +364,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
364 } 364 }
365 cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR1); 365 cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp++] = cs->readisac(cs, ISAC_MOR1);
366 if (cs->debug & L1_DEB_MONITOR) 366 if (cs->debug & L1_DEB_MONITOR)
367 debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp -1]); 367 debugl1(cs, "ISAC MOR1 %02x", cs->dc.isac.mon_rx[cs->dc.isac.mon_rxp - 1]);
368 cs->dc.isac.mocr |= 0x40; 368 cs->dc.isac.mocr |= 0x40;
369 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 369 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
370 } 370 }
371 afterMONR1: 371 afterMONR1:
372 if (v1 & 0x04) { 372 if (v1 & 0x04) {
373 cs->dc.isac.mocr &= 0xf0; 373 cs->dc.isac.mocr &= 0xf0;
374 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 374 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
@@ -384,15 +384,15 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
384 schedule_event(cs, D_RX_MON1); 384 schedule_event(cs, D_RX_MON1);
385 } 385 }
386 if (v1 & 0x02) { 386 if (v1 & 0x02) {
387 if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc && 387 if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
388 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) && 388 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
389 !(v1 & 0x08))) { 389 !(v1 & 0x08))) {
390 cs->dc.isac.mocr &= 0xf0; 390 cs->dc.isac.mocr &= 0xf0;
391 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 391 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
392 cs->dc.isac.mocr |= 0x0a; 392 cs->dc.isac.mocr |= 0x0a;
393 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 393 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
394 if (cs->dc.isac.mon_txc && 394 if (cs->dc.isac.mon_txc &&
395 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) 395 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
396 schedule_event(cs, D_TX_MON0); 396 schedule_event(cs, D_TX_MON0);
397 goto AfterMOX0; 397 goto AfterMOX0;
398 } 398 }
@@ -401,21 +401,21 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
401 goto AfterMOX0; 401 goto AfterMOX0;
402 } 402 }
403 cs->writeisac(cs, ISAC_MOX0, 403 cs->writeisac(cs, ISAC_MOX0,
404 cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]); 404 cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
405 if (cs->debug & L1_DEB_MONITOR) 405 if (cs->debug & L1_DEB_MONITOR)
406 debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]); 406 debugl1(cs, "ISAC %02x -> MOX0", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp - 1]);
407 } 407 }
408 AfterMOX0: 408 AfterMOX0:
409 if (v1 & 0x20) { 409 if (v1 & 0x20) {
410 if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc && 410 if ((!cs->dc.isac.mon_tx) || (cs->dc.isac.mon_txc &&
411 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) && 411 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc) &&
412 !(v1 & 0x80))) { 412 !(v1 & 0x80))) {
413 cs->dc.isac.mocr &= 0x0f; 413 cs->dc.isac.mocr &= 0x0f;
414 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 414 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
415 cs->dc.isac.mocr |= 0xa0; 415 cs->dc.isac.mocr |= 0xa0;
416 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr); 416 cs->writeisac(cs, ISAC_MOCR, cs->dc.isac.mocr);
417 if (cs->dc.isac.mon_txc && 417 if (cs->dc.isac.mon_txc &&
418 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc)) 418 (cs->dc.isac.mon_txp >= cs->dc.isac.mon_txc))
419 schedule_event(cs, D_TX_MON1); 419 schedule_event(cs, D_TX_MON1);
420 goto AfterMOX1; 420 goto AfterMOX1;
421 } 421 }
@@ -424,11 +424,11 @@ isac_interrupt(struct IsdnCardState *cs, u_char val)
424 goto AfterMOX1; 424 goto AfterMOX1;
425 } 425 }
426 cs->writeisac(cs, ISAC_MOX1, 426 cs->writeisac(cs, ISAC_MOX1,
427 cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]); 427 cs->dc.isac.mon_tx[cs->dc.isac.mon_txp++]);
428 if (cs->debug & L1_DEB_MONITOR) 428 if (cs->debug & L1_DEB_MONITOR)
429 debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp -1]); 429 debugl1(cs, "ISAC %02x -> MOX1", cs->dc.isac.mon_tx[cs->dc.isac.mon_txp - 1]);
430 } 430 }
431 AfterMOX1:; 431 AfterMOX1:;
432#endif 432#endif
433 } 433 }
434 } 434 }
@@ -443,123 +443,123 @@ ISAC_l1hw(struct PStack *st, int pr, void *arg)
443 int val; 443 int val;
444 444
445 switch (pr) { 445 switch (pr) {
446 case (PH_DATA |REQUEST): 446 case (PH_DATA | REQUEST):
447 if (cs->debug & DEB_DLOG_HEX) 447 if (cs->debug & DEB_DLOG_HEX)
448 LogFrame(cs, skb->data, skb->len); 448 LogFrame(cs, skb->data, skb->len);
449 if (cs->debug & DEB_DLOG_VERBOSE) 449 if (cs->debug & DEB_DLOG_VERBOSE)
450 dlogframe(cs, skb, 0); 450 dlogframe(cs, skb, 0);
451 spin_lock_irqsave(&cs->lock, flags); 451 spin_lock_irqsave(&cs->lock, flags);
452 if (cs->tx_skb) { 452 if (cs->tx_skb) {
453 skb_queue_tail(&cs->sq, skb); 453 skb_queue_tail(&cs->sq, skb);
454#ifdef L2FRAME_DEBUG /* psa */ 454#ifdef L2FRAME_DEBUG /* psa */
455 if (cs->debug & L1_DEB_LAPD) 455 if (cs->debug & L1_DEB_LAPD)
456 Logl2Frame(cs, skb, "PH_DATA Queued", 0); 456 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
457#endif 457#endif
458 } else { 458 } else {
459 cs->tx_skb = skb; 459 cs->tx_skb = skb;
460 cs->tx_cnt = 0; 460 cs->tx_cnt = 0;
461#ifdef L2FRAME_DEBUG /* psa */ 461#ifdef L2FRAME_DEBUG /* psa */
462 if (cs->debug & L1_DEB_LAPD) 462 if (cs->debug & L1_DEB_LAPD)
463 Logl2Frame(cs, skb, "PH_DATA", 0); 463 Logl2Frame(cs, skb, "PH_DATA", 0);
464#endif 464#endif
465 isac_fill_fifo(cs); 465 isac_fill_fifo(cs);
466 } 466 }
467 spin_unlock_irqrestore(&cs->lock, flags); 467 spin_unlock_irqrestore(&cs->lock, flags);
468 break; 468 break;
469 case (PH_PULL |INDICATION): 469 case (PH_PULL | INDICATION):
470 spin_lock_irqsave(&cs->lock, flags); 470 spin_lock_irqsave(&cs->lock, flags);
471 if (cs->tx_skb) { 471 if (cs->tx_skb) {
472 if (cs->debug & L1_DEB_WARN) 472 if (cs->debug & L1_DEB_WARN)
473 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen"); 473 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
474 skb_queue_tail(&cs->sq, skb); 474 skb_queue_tail(&cs->sq, skb);
475 } else { 475 } else {
476 if (cs->debug & DEB_DLOG_HEX) 476 if (cs->debug & DEB_DLOG_HEX)
477 LogFrame(cs, skb->data, skb->len); 477 LogFrame(cs, skb->data, skb->len);
478 if (cs->debug & DEB_DLOG_VERBOSE) 478 if (cs->debug & DEB_DLOG_VERBOSE)
479 dlogframe(cs, skb, 0); 479 dlogframe(cs, skb, 0);
480 cs->tx_skb = skb; 480 cs->tx_skb = skb;
481 cs->tx_cnt = 0; 481 cs->tx_cnt = 0;
482#ifdef L2FRAME_DEBUG /* psa */ 482#ifdef L2FRAME_DEBUG /* psa */
483 if (cs->debug & L1_DEB_LAPD) 483 if (cs->debug & L1_DEB_LAPD)
484 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 484 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
485#endif 485#endif
486 isac_fill_fifo(cs); 486 isac_fill_fifo(cs);
487 } 487 }
488 spin_unlock_irqrestore(&cs->lock, flags); 488 spin_unlock_irqrestore(&cs->lock, flags);
489 break; 489 break;
490 case (PH_PULL | REQUEST): 490 case (PH_PULL | REQUEST):
491#ifdef L2FRAME_DEBUG /* psa */ 491#ifdef L2FRAME_DEBUG /* psa */
492 if (cs->debug & L1_DEB_LAPD) 492 if (cs->debug & L1_DEB_LAPD)
493 debugl1(cs, "-> PH_REQUEST_PULL"); 493 debugl1(cs, "-> PH_REQUEST_PULL");
494#endif 494#endif
495 if (!cs->tx_skb) { 495 if (!cs->tx_skb) {
496 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 496 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
497 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 497 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
498 } else 498 } else
499 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 499 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
500 break; 500 break;
501 case (HW_RESET | REQUEST): 501 case (HW_RESET | REQUEST):
502 spin_lock_irqsave(&cs->lock, flags); 502 spin_lock_irqsave(&cs->lock, flags);
503 if ((cs->dc.isac.ph_state == ISAC_IND_EI) || 503 if ((cs->dc.isac.ph_state == ISAC_IND_EI) ||
504 (cs->dc.isac.ph_state == ISAC_IND_DR) || 504 (cs->dc.isac.ph_state == ISAC_IND_DR) ||
505 (cs->dc.isac.ph_state == ISAC_IND_RS)) 505 (cs->dc.isac.ph_state == ISAC_IND_RS))
506 ph_command(cs, ISAC_CMD_TIM);
507 else
508 ph_command(cs, ISAC_CMD_RS);
509 spin_unlock_irqrestore(&cs->lock, flags);
510 break;
511 case (HW_ENABLE | REQUEST):
512 spin_lock_irqsave(&cs->lock, flags);
513 ph_command(cs, ISAC_CMD_TIM); 506 ph_command(cs, ISAC_CMD_TIM);
514 spin_unlock_irqrestore(&cs->lock, flags); 507 else
515 break; 508 ph_command(cs, ISAC_CMD_RS);
516 case (HW_INFO3 | REQUEST): 509 spin_unlock_irqrestore(&cs->lock, flags);
517 spin_lock_irqsave(&cs->lock, flags); 510 break;
518 ph_command(cs, ISAC_CMD_AR8); 511 case (HW_ENABLE | REQUEST):
519 spin_unlock_irqrestore(&cs->lock, flags); 512 spin_lock_irqsave(&cs->lock, flags);
520 break; 513 ph_command(cs, ISAC_CMD_TIM);
521 case (HW_TESTLOOP | REQUEST): 514 spin_unlock_irqrestore(&cs->lock, flags);
522 spin_lock_irqsave(&cs->lock, flags); 515 break;
523 val = 0; 516 case (HW_INFO3 | REQUEST):
524 if (1 & (long) arg) 517 spin_lock_irqsave(&cs->lock, flags);
525 val |= 0x0c; 518 ph_command(cs, ISAC_CMD_AR8);
526 if (2 & (long) arg) 519 spin_unlock_irqrestore(&cs->lock, flags);
527 val |= 0x3; 520 break;
528 if (test_bit(HW_IOM1, &cs->HW_Flags)) { 521 case (HW_TESTLOOP | REQUEST):
529 /* IOM 1 Mode */ 522 spin_lock_irqsave(&cs->lock, flags);
530 if (!val) { 523 val = 0;
531 cs->writeisac(cs, ISAC_SPCR, 0xa); 524 if (1 & (long) arg)
532 cs->writeisac(cs, ISAC_ADF1, 0x2); 525 val |= 0x0c;
533 } else { 526 if (2 & (long) arg)
534 cs->writeisac(cs, ISAC_SPCR, val); 527 val |= 0x3;
535 cs->writeisac(cs, ISAC_ADF1, 0xa); 528 if (test_bit(HW_IOM1, &cs->HW_Flags)) {
536 } 529 /* IOM 1 Mode */
530 if (!val) {
531 cs->writeisac(cs, ISAC_SPCR, 0xa);
532 cs->writeisac(cs, ISAC_ADF1, 0x2);
537 } else { 533 } else {
538 /* IOM 2 Mode */
539 cs->writeisac(cs, ISAC_SPCR, val); 534 cs->writeisac(cs, ISAC_SPCR, val);
540 if (val) 535 cs->writeisac(cs, ISAC_ADF1, 0xa);
541 cs->writeisac(cs, ISAC_ADF1, 0x8);
542 else
543 cs->writeisac(cs, ISAC_ADF1, 0x0);
544 } 536 }
545 spin_unlock_irqrestore(&cs->lock, flags); 537 } else {
546 break; 538 /* IOM 2 Mode */
547 case (HW_DEACTIVATE | RESPONSE): 539 cs->writeisac(cs, ISAC_SPCR, val);
548 skb_queue_purge(&cs->rq); 540 if (val)
549 skb_queue_purge(&cs->sq); 541 cs->writeisac(cs, ISAC_ADF1, 0x8);
550 if (cs->tx_skb) { 542 else
551 dev_kfree_skb_any(cs->tx_skb); 543 cs->writeisac(cs, ISAC_ADF1, 0x0);
552 cs->tx_skb = NULL; 544 }
553 } 545 spin_unlock_irqrestore(&cs->lock, flags);
554 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 546 break;
555 del_timer(&cs->dbusytimer); 547 case (HW_DEACTIVATE | RESPONSE):
556 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 548 skb_queue_purge(&cs->rq);
557 schedule_event(cs, D_CLEARBUSY); 549 skb_queue_purge(&cs->sq);
558 break; 550 if (cs->tx_skb) {
559 default: 551 dev_kfree_skb_any(cs->tx_skb);
560 if (cs->debug & L1_DEB_WARN) 552 cs->tx_skb = NULL;
561 debugl1(cs, "isac_l1hw unknown %04x", pr); 553 }
562 break; 554 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
555 del_timer(&cs->dbusytimer);
556 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
557 schedule_event(cs, D_CLEARBUSY);
558 break;
559 default:
560 if (cs->debug & L1_DEB_WARN)
561 debugl1(cs, "isac_l1hw unknown %04x", pr);
562 break;
563 } 563 }
564} 564}
565 565
@@ -587,7 +587,7 @@ dbusy_timer_handler(struct IsdnCardState *cs)
587 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) { 587 if (test_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) {
588 rbch = cs->readisac(cs, ISAC_RBCH); 588 rbch = cs->readisac(cs, ISAC_RBCH);
589 star = cs->readisac(cs, ISAC_STAR); 589 star = cs->readisac(cs, ISAC_STAR);
590 if (cs->debug) 590 if (cs->debug)
591 debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x", 591 debugl1(cs, "D-Channel Busy RBCH %02x STAR %02x",
592 rbch, star); 592 rbch, star);
593 if (rbch & ISAC_RBCH_XAC) { /* D-Channel Busy */ 593 if (rbch & ISAC_RBCH_XAC) { /* D-Channel Busy */
@@ -620,8 +620,8 @@ void initisac(struct IsdnCardState *cs)
620 cs->DC_Close = DC_Close_isac; 620 cs->DC_Close = DC_Close_isac;
621 cs->dc.isac.mon_tx = NULL; 621 cs->dc.isac.mon_tx = NULL;
622 cs->dc.isac.mon_rx = NULL; 622 cs->dc.isac.mon_rx = NULL;
623 cs->writeisac(cs, ISAC_MASK, 0xff); 623 cs->writeisac(cs, ISAC_MASK, 0xff);
624 cs->dc.isac.mocr = 0xaa; 624 cs->dc.isac.mocr = 0xaa;
625 if (test_bit(HW_IOM1, &cs->HW_Flags)) { 625 if (test_bit(HW_IOM1, &cs->HW_Flags)) {
626 /* IOM 1 Mode */ 626 /* IOM 1 Mode */
627 cs->writeisac(cs, ISAC_ADF2, 0x0); 627 cs->writeisac(cs, ISAC_ADF2, 0x0);
diff --git a/drivers/isdn/hisax/isac.h b/drivers/isdn/hisax/isac.h
index 8f8331e44866..04f16b91b822 100644
--- a/drivers/isdn/hisax/isac.h
+++ b/drivers/isdn/hisax/isac.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
diff --git a/drivers/isdn/hisax/isar.c b/drivers/isdn/hisax/isar.c
index d4cce337add2..ff5e139f4850 100644
--- a/drivers/isdn/hisax/isar.c
+++ b/drivers/isdn/hisax/isar.c
@@ -22,11 +22,11 @@
22#define ETX 0x03 22#define ETX 0x03
23 23
24#define FAXMODCNT 13 24#define FAXMODCNT 13
25static const u_char faxmodulation[] = {3,24,48,72,73,74,96,97,98,121,122,145,146}; 25static const u_char faxmodulation[] = {3, 24, 48, 72, 73, 74, 96, 97, 98, 121, 122, 145, 146};
26static u_int modmask = 0x1fff; 26static u_int modmask = 0x1fff;
27static int frm_extra_delay = 2; 27static int frm_extra_delay = 2;
28static int para_TOA = 6; 28static int para_TOA = 6;
29static const u_char *FC1_CMD[] = {"FAE", "FTS", "FRS", "FTM", "FRM", "FTH", "FRH", "CTRL" }; 29static const u_char *FC1_CMD[] = {"FAE", "FTS", "FRS", "FTM", "FRM", "FTH", "FRH", "CTRL"};
30 30
31static void isar_setup(struct IsdnCardState *cs); 31static void isar_setup(struct IsdnCardState *cs);
32static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para); 32static void isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para);
@@ -42,7 +42,7 @@ waitforHIA(struct IsdnCardState *cs, int timeout)
42 } 42 }
43 if (!timeout) 43 if (!timeout)
44 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n"); 44 printk(KERN_WARNING "HiSax: ISAR waitforHIA timeout\n");
45 return(timeout); 45 return (timeout);
46} 46}
47 47
48 48
@@ -51,9 +51,9 @@ sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
51 u_char *msg) 51 u_char *msg)
52{ 52{
53 int i; 53 int i;
54 54
55 if (!waitforHIA(cs, 4000)) 55 if (!waitforHIA(cs, 4000))
56 return(0); 56 return (0);
57#if DUMP_MBOXFRAME 57#if DUMP_MBOXFRAME
58 if (cs->debug & L1_DEB_HSCX) 58 if (cs->debug & L1_DEB_HSCX)
59 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len); 59 debugl1(cs, "sendmsg(%02x,%02x,%d)", his, creg, len);
@@ -63,17 +63,17 @@ sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
63 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0); 63 cs->BC_Write_Reg(cs, 0, ISAR_WADR, 0);
64 if (msg && len) { 64 if (msg && len) {
65 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]); 65 cs->BC_Write_Reg(cs, 1, ISAR_MBOX, msg[0]);
66 for (i=1; i<len; i++) 66 for (i = 1; i < len; i++)
67 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]); 67 cs->BC_Write_Reg(cs, 2, ISAR_MBOX, msg[i]);
68#if DUMP_MBOXFRAME>1 68#if DUMP_MBOXFRAME > 1
69 if (cs->debug & L1_DEB_HSCX_FIFO) { 69 if (cs->debug & L1_DEB_HSCX_FIFO) {
70 char tmp[256], *t; 70 char tmp[256], *t;
71 71
72 i = len; 72 i = len;
73 while (i>0) { 73 while (i > 0) {
74 t = tmp; 74 t = tmp;
75 t += sprintf(t, "sendmbox cnt %d", len); 75 t += sprintf(t, "sendmbox cnt %d", len);
76 QuickHex(t, &msg[len-i], (i>64) ? 64:i); 76 QuickHex(t, &msg[len-i], (i > 64) ? 64 : i);
77 debugl1(cs, tmp); 77 debugl1(cs, tmp);
78 i -= 64; 78 i -= 64;
79 } 79 }
@@ -82,7 +82,7 @@ sendmsg(struct IsdnCardState *cs, u_char his, u_char creg, u_char len,
82 } 82 }
83 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his); 83 cs->BC_Write_Reg(cs, 1, ISAR_HIS, his);
84 waitforHIA(cs, 10000); 84 waitforHIA(cs, 10000);
85 return(1); 85 return (1);
86} 86}
87 87
88/* Call only with IRQ disabled !!! */ 88/* Call only with IRQ disabled !!! */
@@ -94,17 +94,17 @@ rcv_mbox(struct IsdnCardState *cs, struct isar_reg *ireg, u_char *msg)
94 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0); 94 cs->BC_Write_Reg(cs, 1, ISAR_RADR, 0);
95 if (msg && ireg->clsb) { 95 if (msg && ireg->clsb) {
96 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX); 96 msg[0] = cs->BC_Read_Reg(cs, 1, ISAR_MBOX);
97 for (i=1; i < ireg->clsb; i++) 97 for (i = 1; i < ireg->clsb; i++)
98 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX); 98 msg[i] = cs->BC_Read_Reg(cs, 2, ISAR_MBOX);
99#if DUMP_MBOXFRAME>1 99#if DUMP_MBOXFRAME > 1
100 if (cs->debug & L1_DEB_HSCX_FIFO) { 100 if (cs->debug & L1_DEB_HSCX_FIFO) {
101 char tmp[256], *t; 101 char tmp[256], *t;
102 102
103 i = ireg->clsb; 103 i = ireg->clsb;
104 while (i>0) { 104 while (i > 0) {
105 t = tmp; 105 t = tmp;
106 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb); 106 t += sprintf(t, "rcv_mbox cnt %d", ireg->clsb);
107 QuickHex(t, &msg[ireg->clsb-i], (i>64) ? 64:i); 107 QuickHex(t, &msg[ireg->clsb - i], (i > 64) ? 64 : i);
108 debugl1(cs, tmp); 108 debugl1(cs, tmp);
109 i -= 64; 109 i -= 64;
110 } 110 }
@@ -130,23 +130,23 @@ get_irq_infos(struct IsdnCardState *cs, struct isar_reg *ireg)
130 130
131static int 131static int
132waitrecmsg(struct IsdnCardState *cs, u_char *len, 132waitrecmsg(struct IsdnCardState *cs, u_char *len,
133 u_char *msg, int maxdelay) 133 u_char *msg, int maxdelay)
134{ 134{
135 int timeout = 0; 135 int timeout = 0;
136 struct isar_reg *ir = cs->bcs[0].hw.isar.reg; 136 struct isar_reg *ir = cs->bcs[0].hw.isar.reg;
137 137
138 138
139 while((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) && 139 while ((!(cs->BC_Read_Reg(cs, 0, ISAR_IRQBIT) & ISAR_IRQSTA)) &&
140 (timeout++ < maxdelay)) 140 (timeout++ < maxdelay))
141 udelay(1); 141 udelay(1);
142 if (timeout > maxdelay) { 142 if (timeout > maxdelay) {
143 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n"); 143 printk(KERN_WARNING"isar recmsg IRQSTA timeout\n");
144 return(0); 144 return (0);
145 } 145 }
146 get_irq_infos(cs, ir); 146 get_irq_infos(cs, ir);
147 rcv_mbox(cs, ir, msg); 147 rcv_mbox(cs, ir, msg);
148 *len = ir->clsb; 148 *len = ir->clsb;
149 return(1); 149 return (1);
150} 150}
151 151
152int 152int
@@ -167,11 +167,11 @@ ISARVersion(struct IsdnCardState *cs, char *s)
167 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO); 167 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
168 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg)) { 168 if (!sendmsg(cs, ISAR_HIS_VNR, 0, 3, msg)) {
169 spin_unlock_irqrestore(&cs->lock, flags); 169 spin_unlock_irqrestore(&cs->lock, flags);
170 return(-1); 170 return (-1);
171 } 171 }
172 if (!waitrecmsg(cs, &len, tmp, 100000)) { 172 if (!waitrecmsg(cs, &len, tmp, 100000)) {
173 spin_unlock_irqrestore(&cs->lock, flags); 173 spin_unlock_irqrestore(&cs->lock, flags);
174 return(-2); 174 return (-2);
175 } 175 }
176 cs->debug = debug; 176 cs->debug = debug;
177 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) { 177 if (cs->bcs[0].hw.isar.reg->iis == ISAR_IIS_VNR) {
@@ -183,7 +183,7 @@ ISARVersion(struct IsdnCardState *cs, char *s)
183 } else 183 } else
184 ver = -4; 184 ver = -4;
185 spin_unlock_irqrestore(&cs->lock, flags); 185 spin_unlock_irqrestore(&cs->lock, flags);
186 return(ver); 186 return (ver);
187} 187}
188 188
189static int 189static int
@@ -196,25 +196,25 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
196 u_char *msg, *tmpmsg, *mp, tmp[64]; 196 u_char *msg, *tmpmsg, *mp, tmp[64];
197 u_long flags; 197 u_long flags;
198 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg; 198 struct isar_reg *ireg = cs->bcs[0].hw.isar.reg;
199 199
200 struct {u_short sadr; 200 struct {u_short sadr;
201 u_short len; 201 u_short len;
202 u_short d_key; 202 u_short d_key;
203 } blk_head; 203 } blk_head;
204 204
205#define BLK_HEAD_SIZE 6 205#define BLK_HEAD_SIZE 6
206 if (1 != (ret = ISARVersion(cs, "Testing"))) { 206 if (1 != (ret = ISARVersion(cs, "Testing"))) {
207 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret); 207 printk(KERN_ERR"isar_load_firmware wrong isar version %d\n", ret);
208 return(1); 208 return (1);
209 } 209 }
210 debug = cs->debug; 210 debug = cs->debug;
211#if DBG_LOADFIRM<2 211#if DBG_LOADFIRM < 2
212 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO); 212 cs->debug &= ~(L1_DEB_HSCX | L1_DEB_HSCX_FIFO);
213#endif 213#endif
214 214
215 cfu_ret = copy_from_user(&size, p, sizeof(int)); 215 cfu_ret = copy_from_user(&size, p, sizeof(int));
216 if (cfu_ret) { 216 if (cfu_ret) {
217 printk(KERN_ERR"isar_load_firmware copy_from_user ret %d\n", cfu_ret); 217 printk(KERN_ERR "isar_load_firmware copy_from_user ret %d\n", cfu_ret);
218 return -EFAULT; 218 return -EFAULT;
219 } 219 }
220 p += sizeof(int); 220 p += sizeof(int);
@@ -241,40 +241,40 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
241 goto reterror; 241 goto reterror;
242 } 242 }
243#ifdef __BIG_ENDIAN 243#ifdef __BIG_ENDIAN
244 sadr = (blk_head.sadr & 0xff)*256 + blk_head.sadr/256; 244 sadr = (blk_head.sadr & 0xff) * 256 + blk_head.sadr / 256;
245 blk_head.sadr = sadr; 245 blk_head.sadr = sadr;
246 sadr = (blk_head.len & 0xff)*256 + blk_head.len/256; 246 sadr = (blk_head.len & 0xff) * 256 + blk_head.len / 256;
247 blk_head.len = sadr; 247 blk_head.len = sadr;
248 sadr = (blk_head.d_key & 0xff)*256 + blk_head.d_key/256; 248 sadr = (blk_head.d_key & 0xff) * 256 + blk_head.d_key / 256;
249 blk_head.d_key = sadr; 249 blk_head.d_key = sadr;
250#endif /* __BIG_ENDIAN */ 250#endif /* __BIG_ENDIAN */
251 cnt += BLK_HEAD_SIZE; 251 cnt += BLK_HEAD_SIZE;
252 p += BLK_HEAD_SIZE; 252 p += BLK_HEAD_SIZE;
253 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n", 253 printk(KERN_DEBUG"isar firmware block (%#x,%5d,%#x)\n",
254 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff); 254 blk_head.sadr, blk_head.len, blk_head.d_key & 0xff);
255 sadr = blk_head.sadr; 255 sadr = blk_head.sadr;
256 left = blk_head.len; 256 left = blk_head.len;
257 spin_lock_irqsave(&cs->lock, flags); 257 spin_lock_irqsave(&cs->lock, flags);
258 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) { 258 if (!sendmsg(cs, ISAR_HIS_DKEY, blk_head.d_key & 0xff, 0, NULL)) {
259 printk(KERN_ERR"isar sendmsg dkey failed\n"); 259 printk(KERN_ERR"isar sendmsg dkey failed\n");
260 ret = 1;goto reterr_unlock; 260 ret = 1; goto reterr_unlock;
261 } 261 }
262 if (!waitrecmsg(cs, &len, tmp, 100000)) { 262 if (!waitrecmsg(cs, &len, tmp, 100000)) {
263 printk(KERN_ERR"isar waitrecmsg dkey failed\n"); 263 printk(KERN_ERR"isar waitrecmsg dkey failed\n");
264 ret = 1;goto reterr_unlock; 264 ret = 1; goto reterr_unlock;
265 } 265 }
266 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) { 266 if ((ireg->iis != ISAR_IIS_DKEY) || ireg->cmsb || len) {
267 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n", 267 printk(KERN_ERR"isar wrong dkey response (%x,%x,%x)\n",
268 ireg->iis, ireg->cmsb, len); 268 ireg->iis, ireg->cmsb, len);
269 ret = 1;goto reterr_unlock; 269 ret = 1; goto reterr_unlock;
270 } 270 }
271 spin_unlock_irqrestore(&cs->lock, flags); 271 spin_unlock_irqrestore(&cs->lock, flags);
272 while (left>0) { 272 while (left > 0) {
273 if (left > 126) 273 if (left > 126)
274 noc = 126; 274 noc = 126;
275 else 275 else
276 noc = left; 276 noc = left;
277 nom = 2*noc; 277 nom = 2 * noc;
278 mp = msg; 278 mp = msg;
279 *mp++ = sadr / 256; 279 *mp++ = sadr / 256;
280 *mp++ = sadr % 256; 280 *mp++ = sadr % 256;
@@ -290,10 +290,10 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
290 sp = (u_short *)tmpmsg; 290 sp = (u_short *)tmpmsg;
291#if DBG_LOADFIRM 291#if DBG_LOADFIRM
292 printk(KERN_DEBUG"isar: load %3d words at %04x left %d\n", 292 printk(KERN_DEBUG"isar: load %3d words at %04x left %d\n",
293 noc, sadr, left); 293 noc, sadr, left);
294#endif 294#endif
295 sadr += noc; 295 sadr += noc;
296 while(noc) { 296 while (noc) {
297#ifdef __BIG_ENDIAN 297#ifdef __BIG_ENDIAN
298 *mp++ = *sp % 256; 298 *mp++ = *sp % 256;
299 *mp++ = *sp / 256; 299 *mp++ = *sp / 256;
@@ -307,21 +307,21 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
307 spin_lock_irqsave(&cs->lock, flags); 307 spin_lock_irqsave(&cs->lock, flags);
308 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) { 308 if (!sendmsg(cs, ISAR_HIS_FIRM, 0, nom, msg)) {
309 printk(KERN_ERR"isar sendmsg prog failed\n"); 309 printk(KERN_ERR"isar sendmsg prog failed\n");
310 ret = 1;goto reterr_unlock; 310 ret = 1; goto reterr_unlock;
311 } 311 }
312 if (!waitrecmsg(cs, &len, tmp, 100000)) { 312 if (!waitrecmsg(cs, &len, tmp, 100000)) {
313 printk(KERN_ERR"isar waitrecmsg prog failed\n"); 313 printk(KERN_ERR"isar waitrecmsg prog failed\n");
314 ret = 1;goto reterr_unlock; 314 ret = 1; goto reterr_unlock;
315 } 315 }
316 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) { 316 if ((ireg->iis != ISAR_IIS_FIRM) || ireg->cmsb || len) {
317 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n", 317 printk(KERN_ERR"isar wrong prog response (%x,%x,%x)\n",
318 ireg->iis, ireg->cmsb, len); 318 ireg->iis, ireg->cmsb, len);
319 ret = 1;goto reterr_unlock; 319 ret = 1; goto reterr_unlock;
320 } 320 }
321 spin_unlock_irqrestore(&cs->lock, flags); 321 spin_unlock_irqrestore(&cs->lock, flags);
322 } 322 }
323 printk(KERN_DEBUG"isar firmware block %5d words loaded\n", 323 printk(KERN_DEBUG"isar firmware block %5d words loaded\n",
324 blk_head.len); 324 blk_head.len);
325 } 325 }
326 /* 10ms delay */ 326 /* 10ms delay */
327 cnt = 10; 327 cnt = 10;
@@ -333,16 +333,16 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
333 spin_lock_irqsave(&cs->lock, flags); 333 spin_lock_irqsave(&cs->lock, flags);
334 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) { 334 if (!sendmsg(cs, ISAR_HIS_STDSP, 0, 2, msg)) {
335 printk(KERN_ERR"isar sendmsg start dsp failed\n"); 335 printk(KERN_ERR"isar sendmsg start dsp failed\n");
336 ret = 1;goto reterr_unlock; 336 ret = 1; goto reterr_unlock;
337 } 337 }
338 if (!waitrecmsg(cs, &len, tmp, 100000)) { 338 if (!waitrecmsg(cs, &len, tmp, 100000)) {
339 printk(KERN_ERR"isar waitrecmsg start dsp failed\n"); 339 printk(KERN_ERR"isar waitrecmsg start dsp failed\n");
340 ret = 1;goto reterr_unlock; 340 ret = 1; goto reterr_unlock;
341 } 341 }
342 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) { 342 if ((ireg->iis != ISAR_IIS_STDSP) || ireg->cmsb || len) {
343 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n", 343 printk(KERN_ERR"isar wrong start dsp response (%x,%x,%x)\n",
344 ireg->iis, ireg->cmsb, len); 344 ireg->iis, ireg->cmsb, len);
345 ret = 1;goto reterr_unlock; 345 ret = 1; goto reterr_unlock;
346 } else 346 } else
347 printk(KERN_DEBUG"isar start dsp success\n"); 347 printk(KERN_DEBUG"isar start dsp success\n");
348 /* NORMAL mode entered */ 348 /* NORMAL mode entered */
@@ -356,10 +356,10 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
356 } 356 }
357 if (!cnt) { 357 if (!cnt) {
358 printk(KERN_ERR"isar no general status event received\n"); 358 printk(KERN_ERR"isar no general status event received\n");
359 ret = 1;goto reterror; 359 ret = 1; goto reterror;
360 } else { 360 } else {
361 printk(KERN_DEBUG"isar general status event %x\n", 361 printk(KERN_DEBUG"isar general status event %x\n",
362 ireg->bstat); 362 ireg->bstat);
363 } 363 }
364 /* 10ms delay */ 364 /* 10ms delay */
365 cnt = 10; 365 cnt = 10;
@@ -369,7 +369,7 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
369 ireg->iis = 0; 369 ireg->iis = 0;
370 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) { 370 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_STST, 0, NULL)) {
371 printk(KERN_ERR"isar sendmsg self tst failed\n"); 371 printk(KERN_ERR"isar sendmsg self tst failed\n");
372 ret = 1;goto reterr_unlock; 372 ret = 1; goto reterr_unlock;
373 } 373 }
374 cnt = 10000; /* max 100 ms */ 374 cnt = 10000; /* max 100 ms */
375 spin_unlock_irqrestore(&cs->lock, flags); 375 spin_unlock_irqrestore(&cs->lock, flags);
@@ -380,21 +380,21 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
380 udelay(1000); 380 udelay(1000);
381 if (!cnt) { 381 if (!cnt) {
382 printk(KERN_ERR"isar no self tst response\n"); 382 printk(KERN_ERR"isar no self tst response\n");
383 ret = 1;goto reterror; 383 ret = 1; goto reterror;
384 } 384 }
385 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1) 385 if ((ireg->cmsb == ISAR_CTRL_STST) && (ireg->clsb == 1)
386 && (ireg->par[0] == 0)) { 386 && (ireg->par[0] == 0)) {
387 printk(KERN_DEBUG"isar selftest OK\n"); 387 printk(KERN_DEBUG"isar selftest OK\n");
388 } else { 388 } else {
389 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n", 389 printk(KERN_DEBUG"isar selftest not OK %x/%x/%x\n",
390 ireg->cmsb, ireg->clsb, ireg->par[0]); 390 ireg->cmsb, ireg->clsb, ireg->par[0]);
391 ret = 1;goto reterror; 391 ret = 1; goto reterror;
392 } 392 }
393 spin_lock_irqsave(&cs->lock, flags); 393 spin_lock_irqsave(&cs->lock, flags);
394 ireg->iis = 0; 394 ireg->iis = 0;
395 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) { 395 if (!sendmsg(cs, ISAR_HIS_DIAG, ISAR_CTRL_SWVER, 0, NULL)) {
396 printk(KERN_ERR"isar RQST SVN failed\n"); 396 printk(KERN_ERR"isar RQST SVN failed\n");
397 ret = 1;goto reterr_unlock; 397 ret = 1; goto reterr_unlock;
398 } 398 }
399 spin_unlock_irqrestore(&cs->lock, flags); 399 spin_unlock_irqrestore(&cs->lock, flags);
400 cnt = 30000; /* max 300 ms */ 400 cnt = 30000; /* max 300 ms */
@@ -405,15 +405,15 @@ isar_load_firmware(struct IsdnCardState *cs, u_char __user *buf)
405 udelay(1000); 405 udelay(1000);
406 if (!cnt) { 406 if (!cnt) {
407 printk(KERN_ERR"isar no SVN response\n"); 407 printk(KERN_ERR"isar no SVN response\n");
408 ret = 1;goto reterror; 408 ret = 1; goto reterror;
409 } else { 409 } else {
410 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1)) 410 if ((ireg->cmsb == ISAR_CTRL_SWVER) && (ireg->clsb == 1))
411 printk(KERN_DEBUG"isar software version %#x\n", 411 printk(KERN_DEBUG"isar software version %#x\n",
412 ireg->par[0]); 412 ireg->par[0]);
413 else { 413 else {
414 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n", 414 printk(KERN_ERR"isar wrong swver response (%x,%x) cnt(%d)\n",
415 ireg->cmsb, ireg->clsb, cnt); 415 ireg->cmsb, ireg->clsb, cnt);
416 ret = 1;goto reterror; 416 ret = 1; goto reterror;
417 } 417 }
418 } 418 }
419 spin_lock_irqsave(&cs->lock, flags); 419 spin_lock_irqsave(&cs->lock, flags);
@@ -430,7 +430,7 @@ reterror:
430 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0); 430 cs->BC_Write_Reg(cs, 0, ISAR_IRQBIT, 0);
431 kfree(msg); 431 kfree(msg);
432 kfree(tmpmsg); 432 kfree(tmpmsg);
433 return(ret); 433 return (ret);
434} 434}
435 435
436#define B_LL_NOCARRIER 8 436#define B_LL_NOCARRIER 8
@@ -454,9 +454,9 @@ isar_bh(struct work_struct *work)
454static void 454static void
455send_DLE_ETX(struct BCState *bcs) 455send_DLE_ETX(struct BCState *bcs)
456{ 456{
457 u_char dleetx[2] = {DLE,ETX}; 457 u_char dleetx[2] = {DLE, ETX};
458 struct sk_buff *skb; 458 struct sk_buff *skb;
459 459
460 if ((skb = dev_alloc_skb(2))) { 460 if ((skb = dev_alloc_skb(2))) {
461 memcpy(skb_put(skb, 2), dleetx, 2); 461 memcpy(skb_put(skb, 2), dleetx, 2);
462 skb_queue_tail(&bcs->rqueue, skb); 462 skb_queue_tail(&bcs->rqueue, skb);
@@ -486,14 +486,14 @@ insert_dle(unsigned char *dest, unsigned char *src, int count) {
486 *dest++ = DLE; 486 *dest++ = DLE;
487 } 487 }
488} 488}
489 489
490static void 490static void
491isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs) 491isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
492{ 492{
493 u_char *ptr; 493 u_char *ptr;
494 struct sk_buff *skb; 494 struct sk_buff *skb;
495 struct isar_reg *ireg = bcs->hw.isar.reg; 495 struct isar_reg *ireg = bcs->hw.isar.reg;
496 496
497 if (!ireg->clsb) { 497 if (!ireg->clsb) {
498 debugl1(cs, "isar zero len frame"); 498 debugl1(cs, "isar zero len frame");
499 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 499 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
@@ -504,7 +504,7 @@ isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
504 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x", 504 debugl1(cs, "isar mode 0 spurious IIS_RDATA %x/%x/%x",
505 ireg->iis, ireg->cmsb, ireg->clsb); 505 ireg->iis, ireg->cmsb, ireg->clsb);
506 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n", 506 printk(KERN_WARNING"isar mode 0 spurious IIS_RDATA %x/%x/%x\n",
507 ireg->iis, ireg->cmsb, ireg->clsb); 507 ireg->iis, ireg->cmsb, ireg->clsb);
508 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 508 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
509 break; 509 break;
510 case L1_MODE_TRANS: 510 case L1_MODE_TRANS:
@@ -547,11 +547,11 @@ isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
547 if (cs->debug & L1_DEB_WARN) 547 if (cs->debug & L1_DEB_WARN)
548 debugl1(cs, "isar frame to short %d", 548 debugl1(cs, "isar frame to short %d",
549 bcs->hw.isar.rcvidx); 549 bcs->hw.isar.rcvidx);
550 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx-2))) { 550 } else if (!(skb = dev_alloc_skb(bcs->hw.isar.rcvidx - 2))) {
551 printk(KERN_WARNING "ISAR: receive out of memory\n"); 551 printk(KERN_WARNING "ISAR: receive out of memory\n");
552 } else { 552 } else {
553 memcpy(skb_put(skb, bcs->hw.isar.rcvidx-2), 553 memcpy(skb_put(skb, bcs->hw.isar.rcvidx - 2),
554 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx-2); 554 bcs->hw.isar.rcvbuf, bcs->hw.isar.rcvidx - 2);
555 skb_queue_tail(&bcs->rqueue, skb); 555 skb_queue_tail(&bcs->rqueue, skb);
556 schedule_event(bcs, B_RCVBUFREADY); 556 schedule_event(bcs, B_RCVBUFREADY);
557 } 557 }
@@ -576,7 +576,7 @@ isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
576 ireg->clsb, bcs->hw.isar.rcvidx); 576 ireg->clsb, bcs->hw.isar.rcvidx);
577 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) { 577 if ((skb = dev_alloc_skb(bcs->hw.isar.rcvidx))) {
578 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx), 578 insert_dle((u_char *)skb_put(skb, bcs->hw.isar.rcvidx),
579 bcs->hw.isar.rcvbuf, ireg->clsb); 579 bcs->hw.isar.rcvbuf, ireg->clsb);
580 skb_queue_tail(&bcs->rqueue, skb); 580 skb_queue_tail(&bcs->rqueue, skb);
581 schedule_event(bcs, B_RCVBUFREADY); 581 schedule_event(bcs, B_RCVBUFREADY);
582 if (ireg->cmsb & SART_NMD) { /* ABORT */ 582 if (ireg->cmsb & SART_NMD) { /* ABORT */
@@ -630,13 +630,13 @@ isar_rcv_frame(struct IsdnCardState *cs, struct BCState *bcs)
630 debugl1(cs, "isar frame to short %d", 630 debugl1(cs, "isar frame to short %d",
631 bcs->hw.isar.rcvidx); 631 bcs->hw.isar.rcvidx);
632 printk(KERN_WARNING "ISAR: frame to short %d\n", 632 printk(KERN_WARNING "ISAR: frame to short %d\n",
633 bcs->hw.isar.rcvidx); 633 bcs->hw.isar.rcvidx);
634 } else if (!(skb = dev_alloc_skb(len))) { 634 } else if (!(skb = dev_alloc_skb(len))) {
635 printk(KERN_WARNING "ISAR: receive out of memory\n"); 635 printk(KERN_WARNING "ISAR: receive out of memory\n");
636 } else { 636 } else {
637 insert_dle((u_char *)skb_put(skb, len), 637 insert_dle((u_char *)skb_put(skb, len),
638 bcs->hw.isar.rcvbuf, 638 bcs->hw.isar.rcvbuf,
639 bcs->hw.isar.rcvidx); 639 bcs->hw.isar.rcvidx);
640 skb_queue_tail(&bcs->rqueue, skb); 640 skb_queue_tail(&bcs->rqueue, skb);
641 schedule_event(bcs, B_RCVBUFREADY); 641 schedule_event(bcs, B_RCVBUFREADY);
642 send_DLE_ETX(bcs); 642 send_DLE_ETX(bcs);
@@ -680,8 +680,8 @@ isar_fill_fifo(struct BCState *bcs)
680 return; 680 return;
681 if (bcs->tx_skb->len <= 0) 681 if (bcs->tx_skb->len <= 0)
682 return; 682 return;
683 if (!(bcs->hw.isar.reg->bstat & 683 if (!(bcs->hw.isar.reg->bstat &
684 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2))) 684 (bcs->hw.isar.dpath == 1 ? BSTAT_RDM1 : BSTAT_RDM2)))
685 return; 685 return;
686 if (bcs->tx_skb->len > bcs->hw.isar.mml) { 686 if (bcs->tx_skb->len > bcs->hw.isar.mml) {
687 msb = 0; 687 msb = 0;
@@ -694,51 +694,51 @@ isar_fill_fifo(struct BCState *bcs)
694 if (!bcs->hw.isar.txcnt) { 694 if (!bcs->hw.isar.txcnt) {
695 msb |= HDLC_FST; 695 msb |= HDLC_FST;
696 if ((bcs->mode == L1_MODE_FAX) && 696 if ((bcs->mode == L1_MODE_FAX) &&
697 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) { 697 (bcs->hw.isar.cmd == PCTRL_CMD_FTH)) {
698 if (bcs->tx_skb->len > 1) { 698 if (bcs->tx_skb->len > 1) {
699 if ((ptr[0]== 0xff) && (ptr[1] == 0x13)) 699 if ((ptr[0] == 0xff) && (ptr[1] == 0x13))
700 /* last frame */ 700 /* last frame */
701 test_and_set_bit(BC_FLG_LASTDATA, 701 test_and_set_bit(BC_FLG_LASTDATA,
702 &bcs->Flag); 702 &bcs->Flag);
703 } 703 }
704 } 704 }
705 } 705 }
706 skb_pull(bcs->tx_skb, count); 706 skb_pull(bcs->tx_skb, count);
707 bcs->tx_cnt -= count; 707 bcs->tx_cnt -= count;
708 bcs->hw.isar.txcnt += count; 708 bcs->hw.isar.txcnt += count;
709 switch (bcs->mode) { 709 switch (bcs->mode) {
710 case L1_MODE_NULL: 710 case L1_MODE_NULL:
711 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n"); 711 printk(KERN_ERR"isar_fill_fifo wrong mode 0\n");
712 break; 712 break;
713 case L1_MODE_TRANS: 713 case L1_MODE_TRANS:
714 case L1_MODE_V32: 714 case L1_MODE_V32:
715 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 715 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
716 0, count, ptr); 716 0, count, ptr);
717 break; 717 break;
718 case L1_MODE_HDLC: 718 case L1_MODE_HDLC:
719 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
720 msb, count, ptr);
721 break;
722 case L1_MODE_FAX:
723 if (bcs->hw.isar.state != STFAX_ACTIV) {
724 if (cs->debug & L1_DEB_WARN)
725 debugl1(cs, "isar_fill_fifo: not ACTIV");
726 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
719 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 727 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
720 msb, count, ptr); 728 msb, count, ptr);
721 break; 729 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) {
722 case L1_MODE_FAX: 730 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA,
723 if (bcs->hw.isar.state != STFAX_ACTIV) { 731 0, count, ptr);
724 if (cs->debug & L1_DEB_WARN) 732 } else {
725 debugl1(cs, "isar_fill_fifo: not ACTIV"); 733 if (cs->debug & L1_DEB_WARN)
726 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) { 734 debugl1(cs, "isar_fill_fifo: not FTH/FTM");
727 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 735 }
728 msb, count, ptr); 736 break;
729 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FTM) { 737 default:
730 sendmsg(cs, SET_DPS(bcs->hw.isar.dpath) | ISAR_HIS_SDATA, 738 if (cs->debug)
731 0, count, ptr); 739 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode);
732 } else { 740 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode);
733 if (cs->debug & L1_DEB_WARN) 741 break;
734 debugl1(cs, "isar_fill_fifo: not FTH/FTM");
735 }
736 break;
737 default:
738 if (cs->debug)
739 debugl1(cs, "isar_fill_fifo mode(%x) error", bcs->mode);
740 printk(KERN_ERR"isar_fill_fifo mode(%x) error\n", bcs->mode);
741 break;
742 } 742 }
743} 743}
744 744
@@ -746,12 +746,12 @@ static inline
746struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath) 746struct BCState *sel_bcs_isar(struct IsdnCardState *cs, u_char dpath)
747{ 747{
748 if ((!dpath) || (dpath == 3)) 748 if ((!dpath) || (dpath == 3))
749 return(NULL); 749 return (NULL);
750 if (cs->bcs[0].hw.isar.dpath == dpath) 750 if (cs->bcs[0].hw.isar.dpath == dpath)
751 return(&cs->bcs[0]); 751 return (&cs->bcs[0]);
752 if (cs->bcs[1].hw.isar.dpath == dpath) 752 if (cs->bcs[1].hw.isar.dpath == dpath)
753 return(&cs->bcs[1]); 753 return (&cs->bcs[1]);
754 return(NULL); 754 return (NULL);
755} 755}
756 756
757static void 757static void
@@ -762,8 +762,8 @@ send_frames(struct BCState *bcs)
762 isar_fill_fifo(bcs); 762 isar_fill_fifo(bcs);
763 return; 763 return;
764 } else { 764 } else {
765 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 765 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
766 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 766 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
767 u_long flags; 767 u_long flags;
768 spin_lock_irqsave(&bcs->aclock, flags); 768 spin_lock_irqsave(&bcs->aclock, flags);
769 bcs->ackcnt += bcs->hw.isar.txcnt; 769 bcs->ackcnt += bcs->hw.isar.txcnt;
@@ -783,7 +783,7 @@ send_frames(struct BCState *bcs)
783 } 783 }
784 } 784 }
785 dev_kfree_skb_any(bcs->tx_skb); 785 dev_kfree_skb_any(bcs->tx_skb);
786 bcs->hw.isar.txcnt = 0; 786 bcs->hw.isar.txcnt = 0;
787 bcs->tx_skb = NULL; 787 bcs->tx_skb = NULL;
788 } 788 }
789 } 789 }
@@ -813,7 +813,7 @@ static inline void
813check_send(struct IsdnCardState *cs, u_char rdm) 813check_send(struct IsdnCardState *cs, u_char rdm)
814{ 814{
815 struct BCState *bcs; 815 struct BCState *bcs;
816 816
817 if (rdm & BSTAT_RDM1) { 817 if (rdm & BSTAT_RDM1) {
818 if ((bcs = sel_bcs_isar(cs, 1))) { 818 if ((bcs = sel_bcs_isar(cs, 1))) {
819 if (bcs->mode) { 819 if (bcs->mode) {
@@ -828,16 +828,16 @@ check_send(struct IsdnCardState *cs, u_char rdm)
828 } 828 }
829 } 829 }
830 } 830 }
831 831
832} 832}
833 833
834static const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200", 834static const char *dmril[] = {"NO SPEED", "1200/75", "NODEF2", "75/1200",
835 "NODEF4", "300", "600", "1200", "2400", 835 "NODEF4", "300", "600", "1200", "2400",
836 "4800", "7200", "9600nt", "9600t", "12000", 836 "4800", "7200", "9600nt", "9600t", "12000",
837 "14400", "WRONG"}; 837 "14400", "WRONG"};
838static const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21", 838static const char *dmrim[] = {"NO MOD", "NO DEF", "V32/V32b", "V22", "V21",
839 "Bell103", "V23", "Bell202", "V17", "V29", 839 "Bell103", "V23", "Bell202", "V17", "V29",
840 "V27ter"}; 840 "V27ter"};
841 841
842static void 842static void
843isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) { 843isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) {
@@ -846,48 +846,48 @@ isar_pump_status_rsp(struct BCState *bcs, struct isar_reg *ireg) {
846 u_char rim; 846 u_char rim;
847 847
848 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags)) 848 if (!test_and_clear_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags))
849 return; 849 return;
850 if (ril > 14) { 850 if (ril > 14) {
851 if (cs->debug & L1_DEB_WARN) 851 if (cs->debug & L1_DEB_WARN)
852 debugl1(cs, "wrong pstrsp ril=%d",ril); 852 debugl1(cs, "wrong pstrsp ril=%d", ril);
853 ril = 15; 853 ril = 15;
854 } 854 }
855 switch(ireg->par[1]) { 855 switch (ireg->par[1]) {
856 case 0: 856 case 0:
857 rim = 0; 857 rim = 0;
858 break; 858 break;
859 case 0x20: 859 case 0x20:
860 rim = 2; 860 rim = 2;
861 break; 861 break;
862 case 0x40: 862 case 0x40:
863 rim = 3; 863 rim = 3;
864 break; 864 break;
865 case 0x41: 865 case 0x41:
866 rim = 4; 866 rim = 4;
867 break; 867 break;
868 case 0x51: 868 case 0x51:
869 rim = 5; 869 rim = 5;
870 break; 870 break;
871 case 0x61: 871 case 0x61:
872 rim = 6; 872 rim = 6;
873 break; 873 break;
874 case 0x71: 874 case 0x71:
875 rim = 7; 875 rim = 7;
876 break; 876 break;
877 case 0x82: 877 case 0x82:
878 rim = 8; 878 rim = 8;
879 break; 879 break;
880 case 0x92: 880 case 0x92:
881 rim = 9; 881 rim = 9;
882 break; 882 break;
883 case 0xa2: 883 case 0xa2:
884 rim = 10; 884 rim = 10;
885 break; 885 break;
886 default: 886 default:
887 rim = 1; 887 rim = 1;
888 break; 888 break;
889 } 889 }
890 sprintf(bcs->hw.isar.conmsg,"%s %s", dmril[ril], dmrim[rim]); 890 sprintf(bcs->hw.isar.conmsg, "%s %s", dmril[ril], dmrim[rim]);
891 bcs->conmsg = bcs->hw.isar.conmsg; 891 bcs->conmsg = bcs->hw.isar.conmsg;
892 if (cs->debug & L1_DEB_HSCX) 892 if (cs->debug & L1_DEB_HSCX)
893 debugl1(cs, "pump strsp %s", bcs->conmsg); 893 debugl1(cs, "pump strsp %s", bcs->conmsg);
@@ -898,77 +898,77 @@ isar_pump_statev_modem(struct BCState *bcs, u_char devt) {
898 struct IsdnCardState *cs = bcs->cs; 898 struct IsdnCardState *cs = bcs->cs;
899 u_char dps = SET_DPS(bcs->hw.isar.dpath); 899 u_char dps = SET_DPS(bcs->hw.isar.dpath);
900 900
901 switch(devt) { 901 switch (devt) {
902 case PSEV_10MS_TIMER: 902 case PSEV_10MS_TIMER:
903 if (cs->debug & L1_DEB_HSCX) 903 if (cs->debug & L1_DEB_HSCX)
904 debugl1(cs, "pump stev TIMER"); 904 debugl1(cs, "pump stev TIMER");
905 break; 905 break;
906 case PSEV_CON_ON: 906 case PSEV_CON_ON:
907 if (cs->debug & L1_DEB_HSCX) 907 if (cs->debug & L1_DEB_HSCX)
908 debugl1(cs, "pump stev CONNECT"); 908 debugl1(cs, "pump stev CONNECT");
909 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL); 909 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
910 break; 910 break;
911 case PSEV_CON_OFF: 911 case PSEV_CON_OFF:
912 if (cs->debug & L1_DEB_HSCX) 912 if (cs->debug & L1_DEB_HSCX)
913 debugl1(cs, "pump stev NO CONNECT"); 913 debugl1(cs, "pump stev NO CONNECT");
914 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 914 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
915 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL); 915 l1_msg_b(bcs->st, PH_DEACTIVATE | REQUEST, NULL);
916 break; 916 break;
917 case PSEV_V24_OFF: 917 case PSEV_V24_OFF:
918 if (cs->debug & L1_DEB_HSCX) 918 if (cs->debug & L1_DEB_HSCX)
919 debugl1(cs, "pump stev V24 OFF"); 919 debugl1(cs, "pump stev V24 OFF");
920 break; 920 break;
921 case PSEV_CTS_ON: 921 case PSEV_CTS_ON:
922 if (cs->debug & L1_DEB_HSCX) 922 if (cs->debug & L1_DEB_HSCX)
923 debugl1(cs, "pump stev CTS ON"); 923 debugl1(cs, "pump stev CTS ON");
924 break; 924 break;
925 case PSEV_CTS_OFF: 925 case PSEV_CTS_OFF:
926 if (cs->debug & L1_DEB_HSCX) 926 if (cs->debug & L1_DEB_HSCX)
927 debugl1(cs, "pump stev CTS OFF"); 927 debugl1(cs, "pump stev CTS OFF");
928 break; 928 break;
929 case PSEV_DCD_ON: 929 case PSEV_DCD_ON:
930 if (cs->debug & L1_DEB_HSCX) 930 if (cs->debug & L1_DEB_HSCX)
931 debugl1(cs, "pump stev CARRIER ON"); 931 debugl1(cs, "pump stev CARRIER ON");
932 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags); 932 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
933 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 933 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
934 break; 934 break;
935 case PSEV_DCD_OFF: 935 case PSEV_DCD_OFF:
936 if (cs->debug & L1_DEB_HSCX) 936 if (cs->debug & L1_DEB_HSCX)
937 debugl1(cs, "pump stev CARRIER OFF"); 937 debugl1(cs, "pump stev CARRIER OFF");
938 break; 938 break;
939 case PSEV_DSR_ON: 939 case PSEV_DSR_ON:
940 if (cs->debug & L1_DEB_HSCX) 940 if (cs->debug & L1_DEB_HSCX)
941 debugl1(cs, "pump stev DSR ON"); 941 debugl1(cs, "pump stev DSR ON");
942 break; 942 break;
943 case PSEV_DSR_OFF: 943 case PSEV_DSR_OFF:
944 if (cs->debug & L1_DEB_HSCX) 944 if (cs->debug & L1_DEB_HSCX)
945 debugl1(cs, "pump stev DSR_OFF"); 945 debugl1(cs, "pump stev DSR_OFF");
946 break; 946 break;
947 case PSEV_REM_RET: 947 case PSEV_REM_RET:
948 if (cs->debug & L1_DEB_HSCX) 948 if (cs->debug & L1_DEB_HSCX)
949 debugl1(cs, "pump stev REMOTE RETRAIN"); 949 debugl1(cs, "pump stev REMOTE RETRAIN");
950 break; 950 break;
951 case PSEV_REM_REN: 951 case PSEV_REM_REN:
952 if (cs->debug & L1_DEB_HSCX) 952 if (cs->debug & L1_DEB_HSCX)
953 debugl1(cs, "pump stev REMOTE RENEGOTIATE"); 953 debugl1(cs, "pump stev REMOTE RENEGOTIATE");
954 break; 954 break;
955 case PSEV_GSTN_CLR: 955 case PSEV_GSTN_CLR:
956 if (cs->debug & L1_DEB_HSCX) 956 if (cs->debug & L1_DEB_HSCX)
957 debugl1(cs, "pump stev GSTN CLEAR"); 957 debugl1(cs, "pump stev GSTN CLEAR");
958 break; 958 break;
959 default: 959 default:
960 if (cs->debug & L1_DEB_HSCX) 960 if (cs->debug & L1_DEB_HSCX)
961 debugl1(cs, "unknown pump stev %x", devt); 961 debugl1(cs, "unknown pump stev %x", devt);
962 break; 962 break;
963 } 963 }
964} 964}
965 965
966static void 966static void
967ll_deliver_faxstat(struct BCState *bcs, u_char status) 967ll_deliver_faxstat(struct BCState *bcs, u_char status)
968{ 968{
969 isdn_ctrl ic; 969 isdn_ctrl ic;
970 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata; 970 struct Channel *chanp = (struct Channel *) bcs->st->lli.userdata;
971 971
972 if (bcs->cs->debug & L1_DEB_HSCX) 972 if (bcs->cs->debug & L1_DEB_HSCX)
973 debugl1(bcs->cs, "HL->LL FAXIND %x", status); 973 debugl1(bcs->cs, "HL->LL FAXIND %x", status);
974 ic.driver = bcs->cs->myid; 974 ic.driver = bcs->cs->myid;
@@ -984,153 +984,120 @@ isar_pump_statev_fax(struct BCState *bcs, u_char devt) {
984 u_char dps = SET_DPS(bcs->hw.isar.dpath); 984 u_char dps = SET_DPS(bcs->hw.isar.dpath);
985 u_char p1; 985 u_char p1;
986 986
987 switch(devt) { 987 switch (devt) {
988 case PSEV_10MS_TIMER: 988 case PSEV_10MS_TIMER:
989 if (cs->debug & L1_DEB_HSCX)
990 debugl1(cs, "pump stev TIMER");
991 break;
992 case PSEV_RSP_READY:
993 if (cs->debug & L1_DEB_HSCX)
994 debugl1(cs, "pump stev RSP_READY");
995 bcs->hw.isar.state = STFAX_READY;
996 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL);
997 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
998 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3);
999 } else {
1000 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3);
1001 }
1002 break;
1003 case PSEV_LINE_TX_H:
1004 if (bcs->hw.isar.state == STFAX_LINE) {
989 if (cs->debug & L1_DEB_HSCX) 1005 if (cs->debug & L1_DEB_HSCX)
990 debugl1(cs, "pump stev TIMER"); 1006 debugl1(cs, "pump stev LINE_TX_H");
991 break; 1007 bcs->hw.isar.state = STFAX_CONT;
992 case PSEV_RSP_READY: 1008 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1009 } else {
1010 if (cs->debug & L1_DEB_WARN)
1011 debugl1(cs, "pump stev LINE_TX_H wrong st %x",
1012 bcs->hw.isar.state);
1013 }
1014 break;
1015 case PSEV_LINE_RX_H:
1016 if (bcs->hw.isar.state == STFAX_LINE) {
993 if (cs->debug & L1_DEB_HSCX) 1017 if (cs->debug & L1_DEB_HSCX)
994 debugl1(cs, "pump stev RSP_READY"); 1018 debugl1(cs, "pump stev LINE_RX_H");
995 bcs->hw.isar.state = STFAX_READY; 1019 bcs->hw.isar.state = STFAX_CONT;
996 l1_msg_b(bcs->st, PH_ACTIVATE | REQUEST, NULL); 1020 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
997 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 1021 } else {
998 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FRH, 3); 1022 if (cs->debug & L1_DEB_WARN)
999 } else { 1023 debugl1(cs, "pump stev LINE_RX_H wrong st %x",
1000 isar_pump_cmd(bcs, ISDN_FAX_CLASS1_FTH, 3); 1024 bcs->hw.isar.state);
1001 } 1025 }
1002 break; 1026 break;
1003 case PSEV_LINE_TX_H: 1027 case PSEV_LINE_TX_B:
1004 if (bcs->hw.isar.state == STFAX_LINE) { 1028 if (bcs->hw.isar.state == STFAX_LINE) {
1005 if (cs->debug & L1_DEB_HSCX)
1006 debugl1(cs, "pump stev LINE_TX_H");
1007 bcs->hw.isar.state = STFAX_CONT;
1008 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1009 } else {
1010 if (cs->debug & L1_DEB_WARN)
1011 debugl1(cs, "pump stev LINE_TX_H wrong st %x",
1012 bcs->hw.isar.state);
1013 }
1014 break;
1015 case PSEV_LINE_RX_H:
1016 if (bcs->hw.isar.state == STFAX_LINE) {
1017 if (cs->debug & L1_DEB_HSCX)
1018 debugl1(cs, "pump stev LINE_RX_H");
1019 bcs->hw.isar.state = STFAX_CONT;
1020 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1021 } else {
1022 if (cs->debug & L1_DEB_WARN)
1023 debugl1(cs, "pump stev LINE_RX_H wrong st %x",
1024 bcs->hw.isar.state);
1025 }
1026 break;
1027 case PSEV_LINE_TX_B:
1028 if (bcs->hw.isar.state == STFAX_LINE) {
1029 if (cs->debug & L1_DEB_HSCX)
1030 debugl1(cs, "pump stev LINE_TX_B");
1031 bcs->hw.isar.state = STFAX_CONT;
1032 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1033 } else {
1034 if (cs->debug & L1_DEB_WARN)
1035 debugl1(cs, "pump stev LINE_TX_B wrong st %x",
1036 bcs->hw.isar.state);
1037 }
1038 break;
1039 case PSEV_LINE_RX_B:
1040 if (bcs->hw.isar.state == STFAX_LINE) {
1041 if (cs->debug & L1_DEB_HSCX)
1042 debugl1(cs, "pump stev LINE_RX_B");
1043 bcs->hw.isar.state = STFAX_CONT;
1044 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1045 } else {
1046 if (cs->debug & L1_DEB_WARN)
1047 debugl1(cs, "pump stev LINE_RX_B wrong st %x",
1048 bcs->hw.isar.state);
1049 }
1050 break;
1051 case PSEV_RSP_CONN:
1052 if (bcs->hw.isar.state == STFAX_CONT) {
1053 if (cs->debug & L1_DEB_HSCX)
1054 debugl1(cs, "pump stev RSP_CONN");
1055 bcs->hw.isar.state = STFAX_ACTIV;
1056 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
1057 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1058 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
1059 /* 1s Flags before data */
1060 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag))
1061 del_timer(&bcs->hw.isar.ftimer);
1062 /* 1000 ms */
1063 bcs->hw.isar.ftimer.expires =
1064 jiffies + ((1000 * HZ)/1000);
1065 test_and_set_bit(BC_FLG_LL_CONN,
1066 &bcs->Flag);
1067 add_timer(&bcs->hw.isar.ftimer);
1068 } else {
1069 schedule_event(bcs, B_LL_CONNECT);
1070 }
1071 } else {
1072 if (cs->debug & L1_DEB_WARN)
1073 debugl1(cs, "pump stev RSP_CONN wrong st %x",
1074 bcs->hw.isar.state);
1075 }
1076 break;
1077 case PSEV_FLAGS_DET:
1078 if (cs->debug & L1_DEB_HSCX) 1029 if (cs->debug & L1_DEB_HSCX)
1079 debugl1(cs, "pump stev FLAGS_DET"); 1030 debugl1(cs, "pump stev LINE_TX_B");
1080 break; 1031 bcs->hw.isar.state = STFAX_CONT;
1081 case PSEV_RSP_DISC: 1032 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1033 } else {
1034 if (cs->debug & L1_DEB_WARN)
1035 debugl1(cs, "pump stev LINE_TX_B wrong st %x",
1036 bcs->hw.isar.state);
1037 }
1038 break;
1039 case PSEV_LINE_RX_B:
1040 if (bcs->hw.isar.state == STFAX_LINE) {
1082 if (cs->debug & L1_DEB_HSCX) 1041 if (cs->debug & L1_DEB_HSCX)
1083 debugl1(cs, "pump stev RSP_DISC"); 1042 debugl1(cs, "pump stev LINE_RX_B");
1084 if (bcs->hw.isar.state == STFAX_ESCAPE) { 1043 bcs->hw.isar.state = STFAX_CONT;
1085 p1 = 5; 1044 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_CONT, 0, NULL);
1086 switch(bcs->hw.isar.newcmd) { 1045 } else {
1087 case 0: 1046 if (cs->debug & L1_DEB_WARN)
1088 bcs->hw.isar.state = STFAX_READY; 1047 debugl1(cs, "pump stev LINE_RX_B wrong st %x",
1089 break; 1048 bcs->hw.isar.state);
1090 case PCTRL_CMD_FTM: 1049 }
1091 p1 = 2; 1050 break;
1092 case PCTRL_CMD_FTH: 1051 case PSEV_RSP_CONN:
1093 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1052 if (bcs->hw.isar.state == STFAX_CONT) {
1094 PCTRL_CMD_SILON, 1, &p1); 1053 if (cs->debug & L1_DEB_HSCX)
1095 bcs->hw.isar.state = STFAX_SILDET; 1054 debugl1(cs, "pump stev RSP_CONN");
1096 break; 1055 bcs->hw.isar.state = STFAX_ACTIV;
1097 case PCTRL_CMD_FRM: 1056 test_and_set_bit(ISAR_RATE_REQ, &bcs->hw.isar.reg->Flags);
1098 if (frm_extra_delay) 1057 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
1099 mdelay(frm_extra_delay); 1058 if (bcs->hw.isar.cmd == PCTRL_CMD_FTH) {
1100 case PCTRL_CMD_FRH: 1059 /* 1s Flags before data */
1101 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod; 1060 if (test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag))
1102 bcs->hw.isar.newmod = 0; 1061 del_timer(&bcs->hw.isar.ftimer);
1103 bcs->hw.isar.cmd = bcs->hw.isar.newcmd; 1062 /* 1000 ms */
1104 bcs->hw.isar.newcmd = 0; 1063 bcs->hw.isar.ftimer.expires =
1105 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, 1064 jiffies + ((1000 * HZ) / 1000);
1106 bcs->hw.isar.cmd, 1, &p1); 1065 test_and_set_bit(BC_FLG_LL_CONN,
1107 bcs->hw.isar.state = STFAX_LINE; 1066 &bcs->Flag);
1108 bcs->hw.isar.try_mod = 3; 1067 add_timer(&bcs->hw.isar.ftimer);
1109 break;
1110 default:
1111 if (cs->debug & L1_DEB_HSCX)
1112 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd);
1113 break;
1114 }
1115 } else if (bcs->hw.isar.state == STFAX_ACTIV) {
1116 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) {
1117 schedule_event(bcs, B_LL_OK);
1118 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
1119 send_DLE_ETX(bcs);
1120 schedule_event(bcs, B_LL_NOCARRIER);
1121 } else {
1122 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1123 }
1124 bcs->hw.isar.state = STFAX_READY;
1125 } else { 1068 } else {
1126 bcs->hw.isar.state = STFAX_READY; 1069 schedule_event(bcs, B_LL_CONNECT);
1127 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1128 } 1070 }
1129 break; 1071 } else {
1130 case PSEV_RSP_SILDET: 1072 if (cs->debug & L1_DEB_WARN)
1131 if (cs->debug & L1_DEB_HSCX) 1073 debugl1(cs, "pump stev RSP_CONN wrong st %x",
1132 debugl1(cs, "pump stev RSP_SILDET"); 1074 bcs->hw.isar.state);
1133 if (bcs->hw.isar.state == STFAX_SILDET) { 1075 }
1076 break;
1077 case PSEV_FLAGS_DET:
1078 if (cs->debug & L1_DEB_HSCX)
1079 debugl1(cs, "pump stev FLAGS_DET");
1080 break;
1081 case PSEV_RSP_DISC:
1082 if (cs->debug & L1_DEB_HSCX)
1083 debugl1(cs, "pump stev RSP_DISC");
1084 if (bcs->hw.isar.state == STFAX_ESCAPE) {
1085 p1 = 5;
1086 switch (bcs->hw.isar.newcmd) {
1087 case 0:
1088 bcs->hw.isar.state = STFAX_READY;
1089 break;
1090 case PCTRL_CMD_FTM:
1091 p1 = 2;
1092 case PCTRL_CMD_FTH:
1093 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1094 PCTRL_CMD_SILON, 1, &p1);
1095 bcs->hw.isar.state = STFAX_SILDET;
1096 break;
1097 case PCTRL_CMD_FRM:
1098 if (frm_extra_delay)
1099 mdelay(frm_extra_delay);
1100 case PCTRL_CMD_FRH:
1134 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod; 1101 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1135 bcs->hw.isar.newmod = 0; 1102 bcs->hw.isar.newmod = 0;
1136 bcs->hw.isar.cmd = bcs->hw.isar.newcmd; 1103 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
@@ -1139,32 +1106,65 @@ isar_pump_statev_fax(struct BCState *bcs, u_char devt) {
1139 bcs->hw.isar.cmd, 1, &p1); 1106 bcs->hw.isar.cmd, 1, &p1);
1140 bcs->hw.isar.state = STFAX_LINE; 1107 bcs->hw.isar.state = STFAX_LINE;
1141 bcs->hw.isar.try_mod = 3; 1108 bcs->hw.isar.try_mod = 3;
1142 } 1109 break;
1143 break; 1110 default:
1144 case PSEV_RSP_SILOFF:
1145 if (cs->debug & L1_DEB_HSCX)
1146 debugl1(cs, "pump stev RSP_SILOFF");
1147 break;
1148 case PSEV_RSP_FCERR:
1149 if (bcs->hw.isar.state == STFAX_LINE) {
1150 if (cs->debug & L1_DEB_HSCX) 1111 if (cs->debug & L1_DEB_HSCX)
1151 debugl1(cs, "pump stev RSP_FCERR try %d", 1112 debugl1(cs, "RSP_DISC unknown newcmd %x", bcs->hw.isar.newcmd);
1152 bcs->hw.isar.try_mod); 1113 break;
1153 if (bcs->hw.isar.try_mod--) {
1154 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1155 bcs->hw.isar.cmd, 1,
1156 &bcs->hw.isar.mod);
1157 break;
1158 }
1159 } 1114 }
1160 if (cs->debug & L1_DEB_HSCX) 1115 } else if (bcs->hw.isar.state == STFAX_ACTIV) {
1161 debugl1(cs, "pump stev RSP_FCERR"); 1116 if (test_and_clear_bit(BC_FLG_LL_OK, &bcs->Flag)) {
1162 bcs->hw.isar.state = STFAX_ESCAPE; 1117 schedule_event(bcs, B_LL_OK);
1163 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL); 1118 } else if (bcs->hw.isar.cmd == PCTRL_CMD_FRM) {
1119 send_DLE_ETX(bcs);
1120 schedule_event(bcs, B_LL_NOCARRIER);
1121 } else {
1122 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1123 }
1124 bcs->hw.isar.state = STFAX_READY;
1125 } else {
1126 bcs->hw.isar.state = STFAX_READY;
1164 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR); 1127 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1165 break; 1128 }
1166 default: 1129 break;
1167 break; 1130 case PSEV_RSP_SILDET:
1131 if (cs->debug & L1_DEB_HSCX)
1132 debugl1(cs, "pump stev RSP_SILDET");
1133 if (bcs->hw.isar.state == STFAX_SILDET) {
1134 p1 = bcs->hw.isar.mod = bcs->hw.isar.newmod;
1135 bcs->hw.isar.newmod = 0;
1136 bcs->hw.isar.cmd = bcs->hw.isar.newcmd;
1137 bcs->hw.isar.newcmd = 0;
1138 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1139 bcs->hw.isar.cmd, 1, &p1);
1140 bcs->hw.isar.state = STFAX_LINE;
1141 bcs->hw.isar.try_mod = 3;
1142 }
1143 break;
1144 case PSEV_RSP_SILOFF:
1145 if (cs->debug & L1_DEB_HSCX)
1146 debugl1(cs, "pump stev RSP_SILOFF");
1147 break;
1148 case PSEV_RSP_FCERR:
1149 if (bcs->hw.isar.state == STFAX_LINE) {
1150 if (cs->debug & L1_DEB_HSCX)
1151 debugl1(cs, "pump stev RSP_FCERR try %d",
1152 bcs->hw.isar.try_mod);
1153 if (bcs->hw.isar.try_mod--) {
1154 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL,
1155 bcs->hw.isar.cmd, 1,
1156 &bcs->hw.isar.mod);
1157 break;
1158 }
1159 }
1160 if (cs->debug & L1_DEB_HSCX)
1161 debugl1(cs, "pump stev RSP_FCERR");
1162 bcs->hw.isar.state = STFAX_ESCAPE;
1163 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, PCTRL_CMD_ESC, 0, NULL);
1164 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_FCERROR);
1165 break;
1166 default:
1167 break;
1168 } 1168 }
1169} 1169}
1170 1170
@@ -1178,91 +1178,91 @@ isar_int_main(struct IsdnCardState *cs)
1178 1178
1179 get_irq_infos(cs, ireg); 1179 get_irq_infos(cs, ireg);
1180 switch (ireg->iis & ISAR_IIS_MSCMSD) { 1180 switch (ireg->iis & ISAR_IIS_MSCMSD) {
1181 case ISAR_IIS_RDATA: 1181 case ISAR_IIS_RDATA:
1182 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1182 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1183 isar_rcv_frame(cs, bcs); 1183 isar_rcv_frame(cs, bcs);
1184 } else { 1184 } else {
1185 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x", 1185 debugl1(cs, "isar spurious IIS_RDATA %x/%x/%x",
1186 ireg->iis, ireg->cmsb, ireg->clsb); 1186 ireg->iis, ireg->cmsb, ireg->clsb);
1187 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1188 }
1189 break;
1190 case ISAR_IIS_GSTEV:
1191 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1187 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1192 ireg->bstat |= ireg->cmsb; 1188 }
1193 check_send(cs, ireg->cmsb); 1189 break;
1194 break; 1190 case ISAR_IIS_GSTEV:
1195 case ISAR_IIS_BSTEV: 1191 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1192 ireg->bstat |= ireg->cmsb;
1193 check_send(cs, ireg->cmsb);
1194 break;
1195 case ISAR_IIS_BSTEV:
1196#ifdef ERROR_STATISTIC 1196#ifdef ERROR_STATISTIC
1197 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1197 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1198 if (ireg->cmsb == BSTEV_TBO) 1198 if (ireg->cmsb == BSTEV_TBO)
1199 bcs->err_tx++; 1199 bcs->err_tx++;
1200 if (ireg->cmsb == BSTEV_RBO) 1200 if (ireg->cmsb == BSTEV_RBO)
1201 bcs->err_rdo++; 1201 bcs->err_rdo++;
1202 } 1202 }
1203#endif 1203#endif
1204 if (cs->debug & L1_DEB_WARN) 1204 if (cs->debug & L1_DEB_WARN)
1205 debugl1(cs, "Buffer STEV dpath%d msb(%x)", 1205 debugl1(cs, "Buffer STEV dpath%d msb(%x)",
1206 ireg->iis>>6, ireg->cmsb); 1206 ireg->iis >> 6, ireg->cmsb);
1207 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1207 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1208 break; 1208 break;
1209 case ISAR_IIS_PSTEV: 1209 case ISAR_IIS_PSTEV:
1210 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) { 1210 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1211 rcv_mbox(cs, ireg, (u_char *)ireg->par); 1211 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1212 if (bcs->mode == L1_MODE_V32) { 1212 if (bcs->mode == L1_MODE_V32) {
1213 isar_pump_statev_modem(bcs, ireg->cmsb); 1213 isar_pump_statev_modem(bcs, ireg->cmsb);
1214 } else if (bcs->mode == L1_MODE_FAX) { 1214 } else if (bcs->mode == L1_MODE_FAX) {
1215 isar_pump_statev_fax(bcs, ireg->cmsb); 1215 isar_pump_statev_fax(bcs, ireg->cmsb);
1216 } else if (ireg->cmsb == PSEV_10MS_TIMER) { 1216 } else if (ireg->cmsb == PSEV_10MS_TIMER) {
1217 if (cs->debug & L1_DEB_HSCX) 1217 if (cs->debug & L1_DEB_HSCX)
1218 debugl1(cs, "pump stev TIMER"); 1218 debugl1(cs, "pump stev TIMER");
1219 } else {
1220 if (cs->debug & L1_DEB_WARN)
1221 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x",
1222 bcs->mode, ireg->cmsb);
1223 }
1224 } else {
1225 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x",
1226 ireg->iis, ireg->cmsb, ireg->clsb);
1227 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1228 }
1229 break;
1230 case ISAR_IIS_PSTRSP:
1231 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1232 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1233 isar_pump_status_rsp(bcs, ireg);
1234 } else { 1219 } else {
1235 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x", 1220 if (cs->debug & L1_DEB_WARN)
1236 ireg->iis, ireg->cmsb, ireg->clsb); 1221 debugl1(cs, "isar IIS_PSTEV pmode %d stat %x",
1237 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0); 1222 bcs->mode, ireg->cmsb);
1238 } 1223 }
1239 break; 1224 } else {
1240 case ISAR_IIS_DIAG: 1225 debugl1(cs, "isar spurious IIS_PSTEV %x/%x/%x",
1241 case ISAR_IIS_BSTRSP: 1226 ireg->iis, ireg->cmsb, ireg->clsb);
1242 case ISAR_IIS_IOM2RSP: 1227 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1228 }
1229 break;
1230 case ISAR_IIS_PSTRSP:
1231 if ((bcs = sel_bcs_isar(cs, ireg->iis >> 6))) {
1243 rcv_mbox(cs, ireg, (u_char *)ireg->par); 1232 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1244 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO)) 1233 isar_pump_status_rsp(bcs, ireg);
1245 == L1_DEB_HSCX) { 1234 } else {
1246 u_char *tp=debbuf; 1235 debugl1(cs, "isar spurious IIS_PSTRSP %x/%x/%x",
1247 1236 ireg->iis, ireg->cmsb, ireg->clsb);
1248 tp += sprintf(debbuf, "msg iis(%x) msb(%x)", 1237 cs->BC_Write_Reg(cs, 1, ISAR_IIA, 0);
1249 ireg->iis, ireg->cmsb); 1238 }
1250 QuickHex(tp, (u_char *)ireg->par, ireg->clsb); 1239 break;
1251 debugl1(cs, debbuf); 1240 case ISAR_IIS_DIAG:
1252 } 1241 case ISAR_IIS_BSTRSP:
1253 break; 1242 case ISAR_IIS_IOM2RSP:
1254 case ISAR_IIS_INVMSG: 1243 rcv_mbox(cs, ireg, (u_char *)ireg->par);
1255 rcv_mbox(cs, ireg, debbuf); 1244 if ((cs->debug & (L1_DEB_HSCX | L1_DEB_HSCX_FIFO))
1256 if (cs->debug & L1_DEB_WARN) 1245 == L1_DEB_HSCX) {
1257 debugl1(cs, "invalid msg his:%x", 1246 u_char *tp = debbuf;
1258 ireg->cmsb); 1247
1259 break; 1248 tp += sprintf(debbuf, "msg iis(%x) msb(%x)",
1260 default: 1249 ireg->iis, ireg->cmsb);
1261 rcv_mbox(cs, ireg, debbuf); 1250 QuickHex(tp, (u_char *)ireg->par, ireg->clsb);
1262 if (cs->debug & L1_DEB_WARN) 1251 debugl1(cs, debbuf);
1263 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)", 1252 }
1264 ireg->iis, ireg->cmsb, ireg->clsb); 1253 break;
1265 break; 1254 case ISAR_IIS_INVMSG:
1255 rcv_mbox(cs, ireg, debbuf);
1256 if (cs->debug & L1_DEB_WARN)
1257 debugl1(cs, "invalid msg his:%x",
1258 ireg->cmsb);
1259 break;
1260 default:
1261 rcv_mbox(cs, ireg, debbuf);
1262 if (cs->debug & L1_DEB_WARN)
1263 debugl1(cs, "unhandled msg iis(%x) ctrl(%x/%x)",
1264 ireg->iis, ireg->cmsb, ireg->clsb);
1265 break;
1266 } 1266 }
1267} 1267}
1268 1268
@@ -1287,42 +1287,42 @@ setup_pump(struct BCState *bcs) {
1287 u_char ctrl, param[6]; 1287 u_char ctrl, param[6];
1288 1288
1289 switch (bcs->mode) { 1289 switch (bcs->mode) {
1290 case L1_MODE_NULL: 1290 case L1_MODE_NULL:
1291 case L1_MODE_TRANS: 1291 case L1_MODE_TRANS:
1292 case L1_MODE_HDLC: 1292 case L1_MODE_HDLC:
1293 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL); 1293 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, PMOD_BYPASS, 0, NULL);
1294 break; 1294 break;
1295 case L1_MODE_V32: 1295 case L1_MODE_V32:
1296 ctrl = PMOD_DATAMODEM; 1296 ctrl = PMOD_DATAMODEM;
1297 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 1297 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1298 ctrl |= PCTRL_ORIG; 1298 ctrl |= PCTRL_ORIG;
1299 param[5] = PV32P6_CTN; 1299 param[5] = PV32P6_CTN;
1300 } else { 1300 } else {
1301 param[5] = PV32P6_ATN; 1301 param[5] = PV32P6_ATN;
1302 } 1302 }
1303 param[0] = para_TOA; /* 6 db */ 1303 param[0] = para_TOA; /* 6 db */
1304 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B | 1304 param[1] = PV32P2_V23R | PV32P2_V22A | PV32P2_V22B |
1305 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL; 1305 PV32P2_V22C | PV32P2_V21 | PV32P2_BEL;
1306 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B; 1306 param[2] = PV32P3_AMOD | PV32P3_V32B | PV32P3_V23B;
1307 param[3] = PV32P4_UT144; 1307 param[3] = PV32P4_UT144;
1308 param[4] = PV32P5_UT144; 1308 param[4] = PV32P5_UT144;
1309 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param); 1309 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 6, param);
1310 break; 1310 break;
1311 case L1_MODE_FAX: 1311 case L1_MODE_FAX:
1312 ctrl = PMOD_FAX; 1312 ctrl = PMOD_FAX;
1313 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) { 1313 if (test_bit(BC_FLG_ORIG, &bcs->Flag)) {
1314 ctrl |= PCTRL_ORIG; 1314 ctrl |= PCTRL_ORIG;
1315 param[1] = PFAXP2_CTN; 1315 param[1] = PFAXP2_CTN;
1316 } else { 1316 } else {
1317 param[1] = PFAXP2_ATN; 1317 param[1] = PFAXP2_ATN;
1318 } 1318 }
1319 param[0] = para_TOA; /* 6 db */ 1319 param[0] = para_TOA; /* 6 db */
1320 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param); 1320 sendmsg(cs, dps | ISAR_HIS_PUMPCFG, ctrl, 2, param);
1321 bcs->hw.isar.state = STFAX_NULL; 1321 bcs->hw.isar.state = STFAX_NULL;
1322 bcs->hw.isar.newcmd = 0; 1322 bcs->hw.isar.newcmd = 0;
1323 bcs->hw.isar.newmod = 0; 1323 bcs->hw.isar.newmod = 0;
1324 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag); 1324 test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag);
1325 break; 1325 break;
1326 } 1326 }
1327 udelay(1000); 1327 udelay(1000);
1328 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL); 1328 sendmsg(cs, dps | ISAR_HIS_PSTREQ, 0, 0, NULL);
@@ -1334,31 +1334,31 @@ setup_sart(struct BCState *bcs) {
1334 struct IsdnCardState *cs = bcs->cs; 1334 struct IsdnCardState *cs = bcs->cs;
1335 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1335 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1336 u_char ctrl, param[2]; 1336 u_char ctrl, param[2];
1337 1337
1338 switch (bcs->mode) { 1338 switch (bcs->mode) {
1339 case L1_MODE_NULL: 1339 case L1_MODE_NULL:
1340 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0, 1340 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_DISABLE, 0,
1341 NULL); 1341 NULL);
1342 break; 1342 break;
1343 case L1_MODE_TRANS: 1343 case L1_MODE_TRANS:
1344 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2, 1344 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_BINARY, 2,
1345 "\0\0"); 1345 "\0\0");
1346 break; 1346 break;
1347 case L1_MODE_HDLC: 1347 case L1_MODE_HDLC:
1348 param[0] = 0; 1348 param[0] = 0;
1349 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1, 1349 sendmsg(cs, dps | ISAR_HIS_SARTCFG, SMODE_HDLC, 1,
1350 param); 1350 param);
1351 break; 1351 break;
1352 case L1_MODE_V32: 1352 case L1_MODE_V32:
1353 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH; 1353 ctrl = SMODE_V14 | SCTRL_HDMC_BOTH;
1354 param[0] = S_P1_CHS_8; 1354 param[0] = S_P1_CHS_8;
1355 param[1] = S_P2_BFT_DEF; 1355 param[1] = S_P2_BFT_DEF;
1356 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2, 1356 sendmsg(cs, dps | ISAR_HIS_SARTCFG, ctrl, 2,
1357 param); 1357 param);
1358 break; 1358 break;
1359 case L1_MODE_FAX: 1359 case L1_MODE_FAX:
1360 /* SART must not configured with FAX */ 1360 /* SART must not configured with FAX */
1361 break; 1361 break;
1362 } 1362 }
1363 udelay(1000); 1363 udelay(1000);
1364 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL); 1364 sendmsg(cs, dps | ISAR_HIS_BSTREQ, 0, 0, NULL);
@@ -1369,23 +1369,23 @@ static void
1369setup_iom2(struct BCState *bcs) { 1369setup_iom2(struct BCState *bcs) {
1370 struct IsdnCardState *cs = bcs->cs; 1370 struct IsdnCardState *cs = bcs->cs;
1371 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1371 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1372 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD,0,0,0,0}; 1372 u_char cmsb = IOM_CTRL_ENA, msg[5] = {IOM_P1_TXD, 0, 0, 0, 0};
1373 1373
1374 if (bcs->channel) 1374 if (bcs->channel)
1375 msg[1] = msg[3] = 1; 1375 msg[1] = msg[3] = 1;
1376 switch (bcs->mode) { 1376 switch (bcs->mode) {
1377 case L1_MODE_NULL: 1377 case L1_MODE_NULL:
1378 cmsb = 0; 1378 cmsb = 0;
1379 /* dummy slot */ 1379 /* dummy slot */
1380 msg[1] = msg[3] = bcs->hw.isar.dpath + 2; 1380 msg[1] = msg[3] = bcs->hw.isar.dpath + 2;
1381 break; 1381 break;
1382 case L1_MODE_TRANS: 1382 case L1_MODE_TRANS:
1383 case L1_MODE_HDLC: 1383 case L1_MODE_HDLC:
1384 break; 1384 break;
1385 case L1_MODE_V32: 1385 case L1_MODE_V32:
1386 case L1_MODE_FAX: 1386 case L1_MODE_FAX:
1387 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV; 1387 cmsb |= IOM_CTRL_ALAW | IOM_CTRL_RCV;
1388 break; 1388 break;
1389 } 1389 }
1390 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg); 1390 sendmsg(cs, dps | ISAR_HIS_IOM2CFG, cmsb, 5, msg);
1391 udelay(1000); 1391 udelay(1000);
@@ -1399,40 +1399,40 @@ modeisar(struct BCState *bcs, int mode, int bc)
1399 struct IsdnCardState *cs = bcs->cs; 1399 struct IsdnCardState *cs = bcs->cs;
1400 1400
1401 /* Here we are selecting the best datapath for requested mode */ 1401 /* Here we are selecting the best datapath for requested mode */
1402 if(bcs->mode == L1_MODE_NULL) { /* New Setup */ 1402 if (bcs->mode == L1_MODE_NULL) { /* New Setup */
1403 bcs->channel = bc; 1403 bcs->channel = bc;
1404 switch (mode) { 1404 switch (mode) {
1405 case L1_MODE_NULL: /* init */ 1405 case L1_MODE_NULL: /* init */
1406 if (!bcs->hw.isar.dpath) 1406 if (!bcs->hw.isar.dpath)
1407 /* no init for dpath 0 */ 1407 /* no init for dpath 0 */
1408 return(0); 1408 return (0);
1409 break; 1409 break;
1410 case L1_MODE_TRANS: 1410 case L1_MODE_TRANS:
1411 case L1_MODE_HDLC: 1411 case L1_MODE_HDLC:
1412 /* best is datapath 2 */ 1412 /* best is datapath 2 */
1413 if (!test_and_set_bit(ISAR_DP2_USE, 1413 if (!test_and_set_bit(ISAR_DP2_USE,
1414 &bcs->hw.isar.reg->Flags)) 1414 &bcs->hw.isar.reg->Flags))
1415 bcs->hw.isar.dpath = 2; 1415 bcs->hw.isar.dpath = 2;
1416 else if (!test_and_set_bit(ISAR_DP1_USE, 1416 else if (!test_and_set_bit(ISAR_DP1_USE,
1417 &bcs->hw.isar.reg->Flags)) 1417 &bcs->hw.isar.reg->Flags))
1418 bcs->hw.isar.dpath = 1; 1418 bcs->hw.isar.dpath = 1;
1419 else { 1419 else {
1420 printk(KERN_WARNING"isar modeisar both pathes in use\n"); 1420 printk(KERN_WARNING"isar modeisar both pathes in use\n");
1421 return(1); 1421 return (1);
1422 } 1422 }
1423 break; 1423 break;
1424 case L1_MODE_V32: 1424 case L1_MODE_V32:
1425 case L1_MODE_FAX: 1425 case L1_MODE_FAX:
1426 /* only datapath 1 */ 1426 /* only datapath 1 */
1427 if (!test_and_set_bit(ISAR_DP1_USE, 1427 if (!test_and_set_bit(ISAR_DP1_USE,
1428 &bcs->hw.isar.reg->Flags)) 1428 &bcs->hw.isar.reg->Flags))
1429 bcs->hw.isar.dpath = 1; 1429 bcs->hw.isar.dpath = 1;
1430 else { 1430 else {
1431 printk(KERN_WARNING"isar modeisar analog functions only with DP1\n"); 1431 printk(KERN_WARNING"isar modeisar analog functions only with DP1\n");
1432 debugl1(cs, "isar modeisar analog functions only with DP1"); 1432 debugl1(cs, "isar modeisar analog functions only with DP1");
1433 return(1); 1433 return (1);
1434 } 1434 }
1435 break; 1435 break;
1436 } 1436 }
1437 } 1437 }
1438 if (cs->debug & L1_DEB_HSCX) 1438 if (cs->debug & L1_DEB_HSCX)
@@ -1450,118 +1450,118 @@ modeisar(struct BCState *bcs, int mode, int bc)
1450 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags); 1450 test_and_clear_bit(ISAR_DP2_USE, &bcs->hw.isar.reg->Flags);
1451 bcs->hw.isar.dpath = 0; 1451 bcs->hw.isar.dpath = 0;
1452 } 1452 }
1453 return(0); 1453 return (0);
1454} 1454}
1455 1455
1456static void 1456static void
1457isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para) 1457isar_pump_cmd(struct BCState *bcs, u_char cmd, u_char para)
1458{ 1458{
1459 struct IsdnCardState *cs = bcs->cs; 1459 struct IsdnCardState *cs = bcs->cs;
1460 u_char dps = SET_DPS(bcs->hw.isar.dpath); 1460 u_char dps = SET_DPS(bcs->hw.isar.dpath);
1461 u_char ctrl = 0, nom = 0, p1 = 0; 1461 u_char ctrl = 0, nom = 0, p1 = 0;
1462 1462
1463 switch(cmd) { 1463 switch (cmd) {
1464 case ISDN_FAX_CLASS1_FTM: 1464 case ISDN_FAX_CLASS1_FTM:
1465 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag); 1465 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1466 if (bcs->hw.isar.state == STFAX_READY) { 1466 if (bcs->hw.isar.state == STFAX_READY) {
1467 p1 = para; 1467 p1 = para;
1468 ctrl = PCTRL_CMD_FTM; 1468 ctrl = PCTRL_CMD_FTM;
1469 nom = 1; 1469 nom = 1;
1470 bcs->hw.isar.state = STFAX_LINE; 1470 bcs->hw.isar.state = STFAX_LINE;
1471 bcs->hw.isar.cmd = ctrl; 1471 bcs->hw.isar.cmd = ctrl;
1472 bcs->hw.isar.mod = para; 1472 bcs->hw.isar.mod = para;
1473 bcs->hw.isar.newmod = 0; 1473 bcs->hw.isar.newmod = 0;
1474 bcs->hw.isar.newcmd = 0; 1474 bcs->hw.isar.newcmd = 0;
1475 bcs->hw.isar.try_mod = 3; 1475 bcs->hw.isar.try_mod = 3;
1476 } else if ((bcs->hw.isar.state == STFAX_ACTIV) && 1476 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1477 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) && 1477 (bcs->hw.isar.cmd == PCTRL_CMD_FTM) &&
1478 (bcs->hw.isar.mod == para)) { 1478 (bcs->hw.isar.mod == para)) {
1479 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT); 1479 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1480 } else { 1480 } else {
1481 bcs->hw.isar.newmod = para; 1481 bcs->hw.isar.newmod = para;
1482 bcs->hw.isar.newcmd = PCTRL_CMD_FTM; 1482 bcs->hw.isar.newcmd = PCTRL_CMD_FTM;
1483 nom = 0;
1484 ctrl = PCTRL_CMD_ESC;
1485 bcs->hw.isar.state = STFAX_ESCAPE;
1486 }
1487 break;
1488 case ISDN_FAX_CLASS1_FTH:
1489 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1490 if (bcs->hw.isar.state == STFAX_READY) {
1491 p1 = para;
1492 ctrl = PCTRL_CMD_FTH;
1493 nom = 1;
1494 bcs->hw.isar.state = STFAX_LINE;
1495 bcs->hw.isar.cmd = ctrl;
1496 bcs->hw.isar.mod = para;
1497 bcs->hw.isar.newmod = 0;
1498 bcs->hw.isar.newcmd = 0;
1499 bcs->hw.isar.try_mod = 3;
1500 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1501 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) &&
1502 (bcs->hw.isar.mod == para)) {
1503 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1504 } else {
1505 bcs->hw.isar.newmod = para;
1506 bcs->hw.isar.newcmd = PCTRL_CMD_FTH;
1507 nom = 0;
1508 ctrl = PCTRL_CMD_ESC;
1509 bcs->hw.isar.state = STFAX_ESCAPE;
1510 }
1511 break;
1512 case ISDN_FAX_CLASS1_FRM:
1513 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1514 if (bcs->hw.isar.state == STFAX_READY) {
1515 p1 = para;
1516 ctrl = PCTRL_CMD_FRM;
1517 nom = 1;
1518 bcs->hw.isar.state = STFAX_LINE;
1519 bcs->hw.isar.cmd = ctrl;
1520 bcs->hw.isar.mod = para;
1521 bcs->hw.isar.newmod = 0;
1522 bcs->hw.isar.newcmd = 0;
1523 bcs->hw.isar.try_mod = 3;
1524 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1525 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) &&
1526 (bcs->hw.isar.mod == para)) {
1527 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1528 } else {
1529 bcs->hw.isar.newmod = para;
1530 bcs->hw.isar.newcmd = PCTRL_CMD_FRM;
1531 nom = 0;
1532 ctrl = PCTRL_CMD_ESC;
1533 bcs->hw.isar.state = STFAX_ESCAPE;
1534 }
1535 break;
1536 case ISDN_FAX_CLASS1_FRH:
1537 test_and_set_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1538 if (bcs->hw.isar.state == STFAX_READY) {
1539 p1 = para;
1540 ctrl = PCTRL_CMD_FRH;
1541 nom = 1;
1542 bcs->hw.isar.state = STFAX_LINE;
1543 bcs->hw.isar.cmd = ctrl;
1544 bcs->hw.isar.mod = para;
1545 bcs->hw.isar.newmod = 0;
1546 bcs->hw.isar.newcmd = 0;
1547 bcs->hw.isar.try_mod = 3;
1548 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1549 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) &&
1550 (bcs->hw.isar.mod == para)) {
1551 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1552 } else {
1553 bcs->hw.isar.newmod = para;
1554 bcs->hw.isar.newcmd = PCTRL_CMD_FRH;
1555 nom = 0;
1556 ctrl = PCTRL_CMD_ESC;
1557 bcs->hw.isar.state = STFAX_ESCAPE;
1558 }
1559 break;
1560 case ISDN_FAXPUMP_HALT:
1561 bcs->hw.isar.state = STFAX_NULL;
1562 nom = 0; 1483 nom = 0;
1563 ctrl = PCTRL_CMD_HALT; 1484 ctrl = PCTRL_CMD_ESC;
1564 break; 1485 bcs->hw.isar.state = STFAX_ESCAPE;
1486 }
1487 break;
1488 case ISDN_FAX_CLASS1_FTH:
1489 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1490 if (bcs->hw.isar.state == STFAX_READY) {
1491 p1 = para;
1492 ctrl = PCTRL_CMD_FTH;
1493 nom = 1;
1494 bcs->hw.isar.state = STFAX_LINE;
1495 bcs->hw.isar.cmd = ctrl;
1496 bcs->hw.isar.mod = para;
1497 bcs->hw.isar.newmod = 0;
1498 bcs->hw.isar.newcmd = 0;
1499 bcs->hw.isar.try_mod = 3;
1500 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1501 (bcs->hw.isar.cmd == PCTRL_CMD_FTH) &&
1502 (bcs->hw.isar.mod == para)) {
1503 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1504 } else {
1505 bcs->hw.isar.newmod = para;
1506 bcs->hw.isar.newcmd = PCTRL_CMD_FTH;
1507 nom = 0;
1508 ctrl = PCTRL_CMD_ESC;
1509 bcs->hw.isar.state = STFAX_ESCAPE;
1510 }
1511 break;
1512 case ISDN_FAX_CLASS1_FRM:
1513 test_and_clear_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1514 if (bcs->hw.isar.state == STFAX_READY) {
1515 p1 = para;
1516 ctrl = PCTRL_CMD_FRM;
1517 nom = 1;
1518 bcs->hw.isar.state = STFAX_LINE;
1519 bcs->hw.isar.cmd = ctrl;
1520 bcs->hw.isar.mod = para;
1521 bcs->hw.isar.newmod = 0;
1522 bcs->hw.isar.newcmd = 0;
1523 bcs->hw.isar.try_mod = 3;
1524 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1525 (bcs->hw.isar.cmd == PCTRL_CMD_FRM) &&
1526 (bcs->hw.isar.mod == para)) {
1527 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1528 } else {
1529 bcs->hw.isar.newmod = para;
1530 bcs->hw.isar.newcmd = PCTRL_CMD_FRM;
1531 nom = 0;
1532 ctrl = PCTRL_CMD_ESC;
1533 bcs->hw.isar.state = STFAX_ESCAPE;
1534 }
1535 break;
1536 case ISDN_FAX_CLASS1_FRH:
1537 test_and_set_bit(BC_FLG_FRH_WAIT, &bcs->Flag);
1538 if (bcs->hw.isar.state == STFAX_READY) {
1539 p1 = para;
1540 ctrl = PCTRL_CMD_FRH;
1541 nom = 1;
1542 bcs->hw.isar.state = STFAX_LINE;
1543 bcs->hw.isar.cmd = ctrl;
1544 bcs->hw.isar.mod = para;
1545 bcs->hw.isar.newmod = 0;
1546 bcs->hw.isar.newcmd = 0;
1547 bcs->hw.isar.try_mod = 3;
1548 } else if ((bcs->hw.isar.state == STFAX_ACTIV) &&
1549 (bcs->hw.isar.cmd == PCTRL_CMD_FRH) &&
1550 (bcs->hw.isar.mod == para)) {
1551 ll_deliver_faxstat(bcs, ISDN_FAX_CLASS1_CONNECT);
1552 } else {
1553 bcs->hw.isar.newmod = para;
1554 bcs->hw.isar.newcmd = PCTRL_CMD_FRH;
1555 nom = 0;
1556 ctrl = PCTRL_CMD_ESC;
1557 bcs->hw.isar.state = STFAX_ESCAPE;
1558 }
1559 break;
1560 case ISDN_FAXPUMP_HALT:
1561 bcs->hw.isar.state = STFAX_NULL;
1562 nom = 0;
1563 ctrl = PCTRL_CMD_HALT;
1564 break;
1565 } 1565 }
1566 if (ctrl) 1566 if (ctrl)
1567 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1); 1567 sendmsg(cs, dps | ISAR_HIS_PUMPCTRL, ctrl, nom, &p1);
@@ -1572,10 +1572,10 @@ isar_setup(struct IsdnCardState *cs)
1572{ 1572{
1573 u_char msg; 1573 u_char msg;
1574 int i; 1574 int i;
1575 1575
1576 /* Dpath 1, 2 */ 1576 /* Dpath 1, 2 */
1577 msg = 61; 1577 msg = 61;
1578 for (i=0; i<2; i++) { 1578 for (i = 0; i < 2; i++) {
1579 /* Buffer Config */ 1579 /* Buffer Config */
1580 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) | 1580 sendmsg(cs, (i ? ISAR_HIS_DPS2 : ISAR_HIS_DPS1) |
1581 ISAR_HIS_P12CFG, 4, 1, &msg); 1581 ISAR_HIS_P12CFG, 4, 1, &msg);
@@ -1596,93 +1596,93 @@ isar_l2l1(struct PStack *st, int pr, void *arg)
1596 u_long flags; 1596 u_long flags;
1597 1597
1598 switch (pr) { 1598 switch (pr) {
1599 case (PH_DATA | REQUEST): 1599 case (PH_DATA | REQUEST):
1600 spin_lock_irqsave(&bcs->cs->lock, flags); 1600 spin_lock_irqsave(&bcs->cs->lock, flags);
1601 if (bcs->tx_skb) { 1601 if (bcs->tx_skb) {
1602 skb_queue_tail(&bcs->squeue, skb); 1602 skb_queue_tail(&bcs->squeue, skb);
1603 } else { 1603 } else {
1604 bcs->tx_skb = skb; 1604 bcs->tx_skb = skb;
1605 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag); 1605 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1606 if (bcs->cs->debug & L1_DEB_HSCX) 1606 if (bcs->cs->debug & L1_DEB_HSCX)
1607 debugl1(bcs->cs, "DRQ set BC_FLG_BUSY"); 1607 debugl1(bcs->cs, "DRQ set BC_FLG_BUSY");
1608 bcs->hw.isar.txcnt = 0; 1608 bcs->hw.isar.txcnt = 0;
1609 bcs->cs->BC_Send_Data(bcs); 1609 bcs->cs->BC_Send_Data(bcs);
1610 } 1610 }
1611 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1612 break;
1613 case (PH_PULL | INDICATION):
1614 spin_lock_irqsave(&bcs->cs->lock, flags);
1615 if (bcs->tx_skb) {
1616 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n");
1617 } else {
1618 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1619 if (bcs->cs->debug & L1_DEB_HSCX)
1620 debugl1(bcs->cs, "PUI set BC_FLG_BUSY");
1621 bcs->tx_skb = skb;
1622 bcs->hw.isar.txcnt = 0;
1623 bcs->cs->BC_Send_Data(bcs);
1624 }
1625 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1626 break;
1627 case (PH_PULL | REQUEST):
1628 if (!bcs->tx_skb) {
1629 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1630 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1631 } else
1632 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1633 break;
1634 case (PH_ACTIVATE | REQUEST):
1635 spin_lock_irqsave(&bcs->cs->lock, flags);
1636 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
1637 bcs->hw.isar.conmsg[0] = 0;
1638 if (test_bit(FLG_ORIG, &st->l2.flag))
1639 test_and_set_bit(BC_FLG_ORIG, &bcs->Flag);
1640 else
1641 test_and_clear_bit(BC_FLG_ORIG, &bcs->Flag);
1642 switch (st->l1.mode) {
1643 case L1_MODE_TRANS:
1644 case L1_MODE_HDLC:
1645 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1611 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1646 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1647 if (ret)
1648 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1649 else
1650 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg);
1612 break; 1651 break;
1613 case (PH_PULL | INDICATION): 1652 case L1_MODE_V32:
1614 spin_lock_irqsave(&bcs->cs->lock, flags); 1653 case L1_MODE_FAX:
1615 if (bcs->tx_skb) { 1654 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1616 printk(KERN_WARNING "isar_l2l1: this shouldn't happen\n");
1617 } else {
1618 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
1619 if (bcs->cs->debug & L1_DEB_HSCX)
1620 debugl1(bcs->cs, "PUI set BC_FLG_BUSY");
1621 bcs->tx_skb = skb;
1622 bcs->hw.isar.txcnt = 0;
1623 bcs->cs->BC_Send_Data(bcs);
1624 }
1625 spin_unlock_irqrestore(&bcs->cs->lock, flags); 1655 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1656 if (ret)
1657 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1626 break; 1658 break;
1627 case (PH_PULL | REQUEST): 1659 default:
1628 if (!bcs->tx_skb) { 1660 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1629 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1630 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
1631 } else
1632 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
1633 break;
1634 case (PH_ACTIVATE | REQUEST):
1635 spin_lock_irqsave(&bcs->cs->lock, flags);
1636 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
1637 bcs->hw.isar.conmsg[0] = 0;
1638 if (test_bit(FLG_ORIG, &st->l2.flag))
1639 test_and_set_bit(BC_FLG_ORIG, &bcs->Flag);
1640 else
1641 test_and_clear_bit(BC_FLG_ORIG, &bcs->Flag);
1642 switch(st->l1.mode) {
1643 case L1_MODE_TRANS:
1644 case L1_MODE_HDLC:
1645 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1646 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1647 if (ret)
1648 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1649 else
1650 l1_msg_b(st, PH_ACTIVATE | REQUEST, arg);
1651 break;
1652 case L1_MODE_V32:
1653 case L1_MODE_FAX:
1654 ret = modeisar(bcs, st->l1.mode, st->l1.bc);
1655 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1656 if (ret)
1657 l1_msg_b(st, PH_DEACTIVATE | REQUEST, arg);
1658 break;
1659 default:
1660 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1661 break;
1662 }
1663 break; 1661 break;
1664 case (PH_DEACTIVATE | REQUEST): 1662 }
1665 l1_msg_b(st, pr, arg); 1663 break;
1664 case (PH_DEACTIVATE | REQUEST):
1665 l1_msg_b(st, pr, arg);
1666 break;
1667 case (PH_DEACTIVATE | CONFIRM):
1668 spin_lock_irqsave(&bcs->cs->lock, flags);
1669 switch (st->l1.mode) {
1670 case L1_MODE_TRANS:
1671 case L1_MODE_HDLC:
1672 case L1_MODE_V32:
1666 break; 1673 break;
1667 case (PH_DEACTIVATE | CONFIRM): 1674 case L1_MODE_FAX:
1668 spin_lock_irqsave(&bcs->cs->lock, flags); 1675 isar_pump_cmd(bcs, ISDN_FAXPUMP_HALT, 0);
1669 switch(st->l1.mode) {
1670 case L1_MODE_TRANS:
1671 case L1_MODE_HDLC:
1672 case L1_MODE_V32:
1673 break;
1674 case L1_MODE_FAX:
1675 isar_pump_cmd(bcs, ISDN_FAXPUMP_HALT, 0);
1676 break;
1677 }
1678 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
1679 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1680 if (bcs->cs->debug & L1_DEB_HSCX)
1681 debugl1(bcs->cs, "PDAC clear BC_FLG_BUSY");
1682 modeisar(bcs, 0, st->l1.bc);
1683 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1684 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1685 break; 1676 break;
1677 }
1678 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
1679 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
1680 if (bcs->cs->debug & L1_DEB_HSCX)
1681 debugl1(bcs->cs, "PDAC clear BC_FLG_BUSY");
1682 modeisar(bcs, 0, st->l1.bc);
1683 spin_unlock_irqrestore(&bcs->cs->lock, flags);
1684 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
1685 break;
1686 } 1686 }
1687} 1687}
1688 1688
@@ -1751,149 +1751,149 @@ isar_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
1751 if (cs->debug & L1_DEB_HSCX) 1751 if (cs->debug & L1_DEB_HSCX)
1752 debugl1(cs, "isar_auxcmd cmd/ch %x/%ld", ic->command, ic->arg); 1752 debugl1(cs, "isar_auxcmd cmd/ch %x/%ld", ic->command, ic->arg);
1753 switch (ic->command) { 1753 switch (ic->command) {
1754 case (ISDN_CMD_FAXCMD): 1754 case (ISDN_CMD_FAXCMD):
1755 bcs = cs->channel[ic->arg].bcs; 1755 bcs = cs->channel[ic->arg].bcs;
1756 if (cs->debug & L1_DEB_HSCX) 1756 if (cs->debug & L1_DEB_HSCX)
1757 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d", 1757 debugl1(cs, "isar_auxcmd cmd/subcmd %d/%d",
1758 ic->parm.aux.cmd, ic->parm.aux.subcmd); 1758 ic->parm.aux.cmd, ic->parm.aux.subcmd);
1759 switch(ic->parm.aux.cmd) { 1759 switch (ic->parm.aux.cmd) {
1760 case ISDN_FAX_CLASS1_CTRL: 1760 case ISDN_FAX_CLASS1_CTRL:
1761 if (ic->parm.aux.subcmd == ETX) 1761 if (ic->parm.aux.subcmd == ETX)
1762 test_and_set_bit(BC_FLG_DLEETX, 1762 test_and_set_bit(BC_FLG_DLEETX,
1763 &bcs->Flag); 1763 &bcs->Flag);
1764 break; 1764 break;
1765 case ISDN_FAX_CLASS1_FTS: 1765 case ISDN_FAX_CLASS1_FTS:
1766 if (ic->parm.aux.subcmd == AT_QUERY) { 1766 if (ic->parm.aux.subcmd == AT_QUERY) {
1767 ic->command = ISDN_STAT_FAXIND;
1768 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1769 cs->iif.statcallb(ic);
1770 return (0);
1771 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1772 strcpy(ic->parm.aux.para, "0-255");
1773 ic->command = ISDN_STAT_FAXIND;
1774 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1775 cs->iif.statcallb(ic);
1776 return (0);
1777 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1778 if (cs->debug & L1_DEB_HSCX)
1779 debugl1(cs, "isar_auxcmd %s=%d",
1780 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1781 if (bcs->hw.isar.state == STFAX_READY) {
1782 if (!ic->parm.aux.para[0]) {
1767 ic->command = ISDN_STAT_FAXIND; 1783 ic->command = ISDN_STAT_FAXIND;
1768 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK; 1784 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1769 cs->iif.statcallb(ic); 1785 cs->iif.statcallb(ic);
1770 return(0); 1786 return (0);
1771 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1772 strcpy(ic->parm.aux.para, "0-255");
1773 ic->command = ISDN_STAT_FAXIND;
1774 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1775 cs->iif.statcallb(ic);
1776 return(0);
1777 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1778 if (cs->debug & L1_DEB_HSCX)
1779 debugl1(cs, "isar_auxcmd %s=%d",
1780 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1781 if (bcs->hw.isar.state == STFAX_READY) {
1782 if (! ic->parm.aux.para[0]) {
1783 ic->command = ISDN_STAT_FAXIND;
1784 ic->parm.aux.cmd = ISDN_FAX_CLASS1_OK;
1785 cs->iif.statcallb(ic);
1786 return(0);
1787 }
1788 if (! test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) {
1789 /* n*10 ms */
1790 bcs->hw.isar.ftimer.expires =
1791 jiffies + ((ic->parm.aux.para[0] * 10 * HZ)/1000);
1792 test_and_set_bit(BC_FLG_FTI_FTS, &bcs->Flag);
1793 add_timer(&bcs->hw.isar.ftimer);
1794 return(0);
1795 } else {
1796 if (cs->debug)
1797 debugl1(cs, "isar FTS=%d and FTI busy",
1798 ic->parm.aux.para[0]);
1799 }
1800 } else {
1801 if (cs->debug)
1802 debugl1(cs, "isar FTS=%d and isar.state not ready(%x)",
1803 ic->parm.aux.para[0],bcs->hw.isar.state);
1804 }
1805 ic->command = ISDN_STAT_FAXIND;
1806 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1807 cs->iif.statcallb(ic);
1808 } 1787 }
1809 break; 1788 if (!test_and_set_bit(BC_FLG_FTI_RUN, &bcs->Flag)) {
1810 case ISDN_FAX_CLASS1_FRM: 1789 /* n*10 ms */
1811 case ISDN_FAX_CLASS1_FRH: 1790 bcs->hw.isar.ftimer.expires =
1812 case ISDN_FAX_CLASS1_FTM: 1791 jiffies + ((ic->parm.aux.para[0] * 10 * HZ) / 1000);
1813 case ISDN_FAX_CLASS1_FTH: 1792 test_and_set_bit(BC_FLG_FTI_FTS, &bcs->Flag);
1814 if (ic->parm.aux.subcmd == AT_QUERY) { 1793 add_timer(&bcs->hw.isar.ftimer);
1815 sprintf(ic->parm.aux.para, 1794 return (0);
1816 "%d", bcs->hw.isar.mod); 1795 } else {
1817 ic->command = ISDN_STAT_FAXIND; 1796 if (cs->debug)
1818 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY; 1797 debugl1(cs, "isar FTS=%d and FTI busy",
1819 cs->iif.statcallb(ic);
1820 return(0);
1821 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1822 char *p = ic->parm.aux.para;
1823 for(i=0;i<FAXMODCNT;i++)
1824 if ((1<<i) & modmask)
1825 p += sprintf(p, "%d,", faxmodulation[i]);
1826 p--;
1827 *p=0;
1828 ic->command = ISDN_STAT_FAXIND;
1829 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1830 cs->iif.statcallb(ic);
1831 return(0);
1832 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1833 if (cs->debug & L1_DEB_HSCX)
1834 debugl1(cs, "isar_auxcmd %s=%d",
1835 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1836 for(i=0;i<FAXMODCNT;i++)
1837 if (faxmodulation[i]==ic->parm.aux.para[0])
1838 break;
1839 if ((i < FAXMODCNT) && ((1<<i) & modmask) &&
1840 test_bit(BC_FLG_INIT, &bcs->Flag)) {
1841 isar_pump_cmd(bcs,
1842 ic->parm.aux.cmd,
1843 ic->parm.aux.para[0]); 1798 ic->parm.aux.para[0]);
1844 return(0);
1845 }
1846 } 1799 }
1847 /* wrong modulation or not activ */ 1800 } else {
1848 /* fall through */ 1801 if (cs->debug)
1849 default: 1802 debugl1(cs, "isar FTS=%d and isar.state not ready(%x)",
1850 ic->command = ISDN_STAT_FAXIND; 1803 ic->parm.aux.para[0], bcs->hw.isar.state);
1851 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR; 1804 }
1852 cs->iif.statcallb(ic); 1805 ic->command = ISDN_STAT_FAXIND;
1806 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1807 cs->iif.statcallb(ic);
1853 } 1808 }
1854 break; 1809 break;
1855 case (ISDN_CMD_IOCTL): 1810 case ISDN_FAX_CLASS1_FRM:
1856 switch (ic->arg) { 1811 case ISDN_FAX_CLASS1_FRH:
1857 case 9: /* load firmware */ 1812 case ISDN_FAX_CLASS1_FTM:
1858 features = ISDN_FEATURE_L2_MODEM | 1813 case ISDN_FAX_CLASS1_FTH:
1859 ISDN_FEATURE_L2_FAX | 1814 if (ic->parm.aux.subcmd == AT_QUERY) {
1860 ISDN_FEATURE_L3_FCLASS1; 1815 sprintf(ic->parm.aux.para,
1861 memcpy(&adr, ic->parm.num, sizeof(ulong)); 1816 "%d", bcs->hw.isar.mod);
1862 if (isar_load_firmware(cs, (u_char __user *)adr)) 1817 ic->command = ISDN_STAT_FAXIND;
1863 return(1); 1818 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1864 else 1819 cs->iif.statcallb(ic);
1865 ll_run(cs, features); 1820 return (0);
1866 break; 1821 } else if (ic->parm.aux.subcmd == AT_EQ_QUERY) {
1867 case 20: 1822 char *p = ic->parm.aux.para;
1868 features = *(unsigned int *) ic->parm.num; 1823 for (i = 0; i < FAXMODCNT; i++)
1869 printk(KERN_DEBUG "HiSax: max modulation old(%04x) new(%04x)\n", 1824 if ((1 << i) & modmask)
1870 modmask, features); 1825 p += sprintf(p, "%d,", faxmodulation[i]);
1871 modmask = features; 1826 p--;
1872 break; 1827 *p = 0;
1873 case 21: 1828 ic->command = ISDN_STAT_FAXIND;
1874 features = *(unsigned int *) ic->parm.num; 1829 ic->parm.aux.cmd = ISDN_FAX_CLASS1_QUERY;
1875 printk(KERN_DEBUG "HiSax: FRM extra delay old(%d) new(%d) ms\n", 1830 cs->iif.statcallb(ic);
1876 frm_extra_delay, features); 1831 return (0);
1877 if (features >= 0) 1832 } else if (ic->parm.aux.subcmd == AT_EQ_VALUE) {
1878 frm_extra_delay = features; 1833 if (cs->debug & L1_DEB_HSCX)
1879 break; 1834 debugl1(cs, "isar_auxcmd %s=%d",
1880 case 22: 1835 FC1_CMD[ic->parm.aux.cmd], ic->parm.aux.para[0]);
1881 features = *(unsigned int *) ic->parm.num; 1836 for (i = 0; i < FAXMODCNT; i++)
1882 printk(KERN_DEBUG "HiSax: TOA old(%d) new(%d) db\n", 1837 if (faxmodulation[i] == ic->parm.aux.para[0])
1883 para_TOA, features); 1838 break;
1884 if (features >= 0 && features < 32) 1839 if ((i < FAXMODCNT) && ((1 << i) & modmask) &&
1885 para_TOA = features; 1840 test_bit(BC_FLG_INIT, &bcs->Flag)) {
1886 break; 1841 isar_pump_cmd(bcs,
1887 default: 1842 ic->parm.aux.cmd,
1888 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n", 1843 ic->parm.aux.para[0]);
1889 (int) ic->arg); 1844 return (0);
1890 return(-EINVAL); 1845 }
1891 } 1846 }
1847 /* wrong modulation or not activ */
1848 /* fall through */
1849 default:
1850 ic->command = ISDN_STAT_FAXIND;
1851 ic->parm.aux.cmd = ISDN_FAX_CLASS1_ERROR;
1852 cs->iif.statcallb(ic);
1853 }
1854 break;
1855 case (ISDN_CMD_IOCTL):
1856 switch (ic->arg) {
1857 case 9: /* load firmware */
1858 features = ISDN_FEATURE_L2_MODEM |
1859 ISDN_FEATURE_L2_FAX |
1860 ISDN_FEATURE_L3_FCLASS1;
1861 memcpy(&adr, ic->parm.num, sizeof(ulong));
1862 if (isar_load_firmware(cs, (u_char __user *)adr))
1863 return (1);
1864 else
1865 ll_run(cs, features);
1866 break;
1867 case 20:
1868 features = *(unsigned int *) ic->parm.num;
1869 printk(KERN_DEBUG "HiSax: max modulation old(%04x) new(%04x)\n",
1870 modmask, features);
1871 modmask = features;
1872 break;
1873 case 21:
1874 features = *(unsigned int *) ic->parm.num;
1875 printk(KERN_DEBUG "HiSax: FRM extra delay old(%d) new(%d) ms\n",
1876 frm_extra_delay, features);
1877 if (features >= 0)
1878 frm_extra_delay = features;
1879 break;
1880 case 22:
1881 features = *(unsigned int *) ic->parm.num;
1882 printk(KERN_DEBUG "HiSax: TOA old(%d) new(%d) db\n",
1883 para_TOA, features);
1884 if (features >= 0 && features < 32)
1885 para_TOA = features;
1892 break; 1886 break;
1893 default: 1887 default:
1894 return(-EINVAL); 1888 printk(KERN_DEBUG "HiSax: invalid ioctl %d\n",
1889 (int) ic->arg);
1890 return (-EINVAL);
1891 }
1892 break;
1893 default:
1894 return (-EINVAL);
1895 } 1895 }
1896 return(0); 1896 return (0);
1897} 1897}
1898 1898
1899void initisar(struct IsdnCardState *cs) 1899void initisar(struct IsdnCardState *cs)
diff --git a/drivers/isdn/hisax/isar.h b/drivers/isdn/hisax/isar.h
index bf7676586392..0f4d101faf37 100644
--- a/drivers/isdn/hisax/isar.h
+++ b/drivers/isdn/hisax/isar.h
@@ -4,12 +4,12 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13#define ISAR_IRQMSK 0x04 13#define ISAR_IRQMSK 0x04
14#define ISAR_IRQSTA 0x04 14#define ISAR_IRQSTA 0x04
15#define ISAR_IRQBIT 0x75 15#define ISAR_IRQBIT 0x75
@@ -21,7 +21,7 @@
21#define ISAR_HIA 0x50 21#define ISAR_HIA 0x50
22#define ISAR_MBOX 0x4c 22#define ISAR_MBOX 0x4c
23#define ISAR_WADR 0x4a 23#define ISAR_WADR 0x4a
24#define ISAR_RADR 0x48 24#define ISAR_RADR 0x48
25 25
26#define ISAR_HIS_VNR 0x14 26#define ISAR_HIS_VNR 0x14
27#define ISAR_HIS_DKEY 0x02 27#define ISAR_HIS_DKEY 0x02
@@ -32,9 +32,9 @@
32#define ISAR_HIS_TIMERIRQ 0x25 32#define ISAR_HIS_TIMERIRQ 0x25
33#define ISAR_HIS_P0CFG 0x3c 33#define ISAR_HIS_P0CFG 0x3c
34#define ISAR_HIS_P12CFG 0x24 34#define ISAR_HIS_P12CFG 0x24
35#define ISAR_HIS_SARTCFG 0x25 35#define ISAR_HIS_SARTCFG 0x25
36#define ISAR_HIS_PUMPCFG 0x26 36#define ISAR_HIS_PUMPCFG 0x26
37#define ISAR_HIS_PUMPCTRL 0x2a 37#define ISAR_HIS_PUMPCTRL 0x2a
38#define ISAR_HIS_IOM2CFG 0x27 38#define ISAR_HIS_IOM2CFG 0x27
39#define ISAR_HIS_IOM2REQ 0x07 39#define ISAR_HIS_IOM2REQ 0x07
40#define ISAR_HIS_IOM2CTRL 0x2b 40#define ISAR_HIS_IOM2CTRL 0x2b
@@ -43,7 +43,7 @@
43#define ISAR_HIS_SDATA 0x20 43#define ISAR_HIS_SDATA 0x20
44#define ISAR_HIS_DPS1 0x40 44#define ISAR_HIS_DPS1 0x40
45#define ISAR_HIS_DPS2 0x80 45#define ISAR_HIS_DPS2 0x80
46#define SET_DPS(x) ((x<<6) & 0xc0) 46#define SET_DPS(x) ((x << 6) & 0xc0)
47 47
48#define ISAR_CMD_TIMERIRQ_OFF 0x20 48#define ISAR_CMD_TIMERIRQ_OFF 0x20
49#define ISAR_CMD_TIMERIRQ_ON 0x21 49#define ISAR_CMD_TIMERIRQ_ON 0x21
diff --git a/drivers/isdn/hisax/isdnl1.c b/drivers/isdn/hisax/isdnl1.c
index d5eeacf565d6..800095781bfb 100644
--- a/drivers/isdn/hisax/isdnl1.c
+++ b/drivers/isdn/hisax/isdnl1.c
@@ -5,7 +5,7 @@
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * based on the teles driver from Jan den Ouden 6 * based on the teles driver from Jan den Ouden
7 * Copyright by Karsten Keil <keil@isdn4linux.de> 7 * Copyright by Karsten Keil <keil@isdn4linux.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -40,7 +40,7 @@ enum {
40 ST_L1_F8, 40 ST_L1_F8,
41}; 41};
42 42
43#define L1S_STATE_COUNT (ST_L1_F8+1) 43#define L1S_STATE_COUNT (ST_L1_F8 + 1)
44 44
45static char *strL1SState[] = 45static char *strL1SState[] =
46{ 46{
@@ -65,7 +65,7 @@ enum {
65 ST_L1_TRANS, 65 ST_L1_TRANS,
66}; 66};
67 67
68#define L1U_STATE_COUNT (ST_L1_TRANS+1) 68#define L1U_STATE_COUNT (ST_L1_TRANS + 1)
69 69
70static char *strL1UState[] = 70static char *strL1UState[] =
71{ 71{
@@ -83,7 +83,7 @@ enum {
83 ST_L1_ACTIV, 83 ST_L1_ACTIV,
84}; 84};
85 85
86#define L1B_STATE_COUNT (ST_L1_ACTIV+1) 86#define L1B_STATE_COUNT (ST_L1_ACTIV + 1)
87 87
88static char *strL1BState[] = 88static char *strL1BState[] =
89{ 89{
@@ -100,7 +100,7 @@ enum {
100 EV_DEACT_CNF, 100 EV_DEACT_CNF,
101 EV_DEACT_IND, 101 EV_DEACT_IND,
102 EV_POWER_UP, 102 EV_POWER_UP,
103 EV_RSYNC_IND, 103 EV_RSYNC_IND,
104 EV_INFO2_IND, 104 EV_INFO2_IND,
105 EV_INFO4_IND, 105 EV_INFO4_IND,
106 EV_TIMER_DEACT, 106 EV_TIMER_DEACT,
@@ -118,7 +118,7 @@ static char *strL1Event[] =
118 "EV_DEACT_CNF", 118 "EV_DEACT_CNF",
119 "EV_DEACT_IND", 119 "EV_DEACT_IND",
120 "EV_POWER_UP", 120 "EV_POWER_UP",
121 "EV_RSYNC_IND", 121 "EV_RSYNC_IND",
122 "EV_INFO2_IND", 122 "EV_INFO2_IND",
123 "EV_INFO4_IND", 123 "EV_INFO4_IND",
124 "EV_TIMER_DEACT", 124 "EV_TIMER_DEACT",
@@ -131,7 +131,7 @@ debugl1(struct IsdnCardState *cs, char *fmt, ...)
131{ 131{
132 va_list args; 132 va_list args;
133 char tmp[8]; 133 char tmp[8];
134 134
135 va_start(args, fmt); 135 va_start(args, fmt);
136 sprintf(tmp, "Card%d ", cs->cardnr + 1); 136 sprintf(tmp, "Card%d ", cs->cardnr + 1);
137 VHiSax_putstatus(cs, tmp, fmt, args); 137 VHiSax_putstatus(cs, tmp, fmt, args);
@@ -145,7 +145,7 @@ l1m_debug(struct FsmInst *fi, char *fmt, ...)
145 struct PStack *st = fi->userdata; 145 struct PStack *st = fi->userdata;
146 struct IsdnCardState *cs = st->l1.hardware; 146 struct IsdnCardState *cs = st->l1.hardware;
147 char tmp[8]; 147 char tmp[8];
148 148
149 va_start(args, fmt); 149 va_start(args, fmt);
150 sprintf(tmp, "Card%d ", cs->cardnr + 1); 150 sprintf(tmp, "Card%d ", cs->cardnr + 1);
151 VHiSax_putstatus(cs, tmp, fmt, args); 151 VHiSax_putstatus(cs, tmp, fmt, args);
@@ -209,19 +209,19 @@ DChannel_proc_rcv(struct IsdnCardState *cs)
209 209
210 if (stptr) 210 if (stptr)
211 if (test_bit(FLG_L1_ACTTIMER, &stptr->l1.Flags)) 211 if (test_bit(FLG_L1_ACTTIMER, &stptr->l1.Flags))
212 FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL); 212 FsmEvent(&stptr->l1.l1m, EV_TIMER_ACT, NULL);
213 while ((skb = skb_dequeue(&cs->rq))) { 213 while ((skb = skb_dequeue(&cs->rq))) {
214#ifdef L2FRAME_DEBUG /* psa */ 214#ifdef L2FRAME_DEBUG /* psa */
215 if (cs->debug & L1_DEB_LAPD) 215 if (cs->debug & L1_DEB_LAPD)
216 Logl2Frame(cs, skb, "PH_DATA", 1); 216 Logl2Frame(cs, skb, "PH_DATA", 1);
217#endif 217#endif
218 stptr = cs->stlist; 218 stptr = cs->stlist;
219 if (skb->len<3) { 219 if (skb->len < 3) {
220 debugl1(cs, "D-channel frame too short(%d)",skb->len); 220 debugl1(cs, "D-channel frame too short(%d)", skb->len);
221 dev_kfree_skb(skb); 221 dev_kfree_skb(skb);
222 return; 222 return;
223 } 223 }
224 if ((skb->data[0] & 1) || !(skb->data[1] &1)) { 224 if ((skb->data[0] & 1) || !(skb->data[1] & 1)) {
225 debugl1(cs, "D-channel frame wrong EA0/EA1"); 225 debugl1(cs, "D-channel frame wrong EA0/EA1");
226 dev_kfree_skb(skb); 226 dev_kfree_skb(skb);
227 return; 227 return;
@@ -378,60 +378,60 @@ static char *
378l2cmd(u_char cmd) 378l2cmd(u_char cmd)
379{ 379{
380 switch (cmd & ~0x10) { 380 switch (cmd & ~0x10) {
381 case 1: 381 case 1:
382 return "RR"; 382 return "RR";
383 case 5: 383 case 5:
384 return "RNR"; 384 return "RNR";
385 case 9: 385 case 9:
386 return "REJ"; 386 return "REJ";
387 case 0x6f: 387 case 0x6f:
388 return "SABME"; 388 return "SABME";
389 case 0x0f: 389 case 0x0f:
390 return "DM"; 390 return "DM";
391 case 3: 391 case 3:
392 return "UI"; 392 return "UI";
393 case 0x43: 393 case 0x43:
394 return "DISC"; 394 return "DISC";
395 case 0x63: 395 case 0x63:
396 return "UA"; 396 return "UA";
397 case 0x87: 397 case 0x87:
398 return "FRMR"; 398 return "FRMR";
399 case 0xaf: 399 case 0xaf:
400 return "XID"; 400 return "XID";
401 default: 401 default:
402 if (!(cmd & 1)) 402 if (!(cmd & 1))
403 return "I"; 403 return "I";
404 else 404 else
405 return "invalid command"; 405 return "invalid command";
406 } 406 }
407} 407}
408 408
409static char tmpdeb[32]; 409static char tmpdeb[32];
410 410
411static char * 411static char *
412l2frames(u_char * ptr) 412l2frames(u_char *ptr)
413{ 413{
414 switch (ptr[2] & ~0x10) { 414 switch (ptr[2] & ~0x10) {
415 case 1: 415 case 1:
416 case 5: 416 case 5:
417 case 9: 417 case 9:
418 sprintf(tmpdeb, "%s[%d](nr %d)", l2cmd(ptr[2]), ptr[3] & 1, ptr[3] >> 1); 418 sprintf(tmpdeb, "%s[%d](nr %d)", l2cmd(ptr[2]), ptr[3] & 1, ptr[3] >> 1);
419 break; 419 break;
420 case 0x6f: 420 case 0x6f:
421 case 0x0f: 421 case 0x0f:
422 case 3: 422 case 3:
423 case 0x43: 423 case 0x43:
424 case 0x63: 424 case 0x63:
425 case 0x87: 425 case 0x87:
426 case 0xaf: 426 case 0xaf:
427 sprintf(tmpdeb, "%s[%d]", l2cmd(ptr[2]), (ptr[2] & 0x10) >> 4); 427 sprintf(tmpdeb, "%s[%d]", l2cmd(ptr[2]), (ptr[2] & 0x10) >> 4);
428 break;
429 default:
430 if (!(ptr[2] & 1)) {
431 sprintf(tmpdeb, "I[%d](ns %d, nr %d)", ptr[3] & 1, ptr[2] >> 1, ptr[3] >> 1);
428 break; 432 break;
429 default: 433 } else
430 if (!(ptr[2] & 1)) { 434 return "invalid command";
431 sprintf(tmpdeb, "I[%d](ns %d, nr %d)", ptr[3] & 1, ptr[2] >> 1, ptr[3] >> 1);
432 break;
433 } else
434 return "invalid command";
435 } 435 }
436 436
437 437
@@ -547,24 +547,24 @@ l1_timer3(struct FsmInst *fi, int event, void *arg)
547{ 547{
548 struct PStack *st = fi->userdata; 548 struct PStack *st = fi->userdata;
549 549
550 test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags); 550 test_and_clear_bit(FLG_L1_T3RUN, &st->l1.Flags);
551 if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags)) 551 if (test_and_clear_bit(FLG_L1_ACTIVATING, &st->l1.Flags))
552 L1deactivated(st->l1.hardware); 552 L1deactivated(st->l1.hardware);
553 553
554#ifdef HISAX_UINTERFACE 554#ifdef HISAX_UINTERFACE
555 if (!test_bit(FLG_L1_UINT, &st->l1.Flags)) 555 if (!test_bit(FLG_L1_UINT, &st->l1.Flags))
556#endif 556#endif
557 if (st->l1.l1m.state != ST_L1_F6) { 557 if (st->l1.l1m.state != ST_L1_F6) {
558 FsmChangeState(fi, ST_L1_F3); 558 FsmChangeState(fi, ST_L1_F3);
559 st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL); 559 st->l1.l1hw(st, HW_ENABLE | REQUEST, NULL);
560 } 560 }
561} 561}
562 562
563static void 563static void
564l1_timer_act(struct FsmInst *fi, int event, void *arg) 564l1_timer_act(struct FsmInst *fi, int event, void *arg)
565{ 565{
566 struct PStack *st = fi->userdata; 566 struct PStack *st = fi->userdata;
567 567
568 test_and_clear_bit(FLG_L1_ACTTIMER, &st->l1.Flags); 568 test_and_clear_bit(FLG_L1_ACTTIMER, &st->l1.Flags);
569 test_and_set_bit(FLG_L1_ACTIVATED, &st->l1.Flags); 569 test_and_set_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
570 L1activated(st->l1.hardware); 570 L1activated(st->l1.hardware);
@@ -574,7 +574,7 @@ static void
574l1_timer_deact(struct FsmInst *fi, int event, void *arg) 574l1_timer_deact(struct FsmInst *fi, int event, void *arg)
575{ 575{
576 struct PStack *st = fi->userdata; 576 struct PStack *st = fi->userdata;
577 577
578 test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags); 578 test_and_clear_bit(FLG_L1_DEACTTIMER, &st->l1.Flags);
579 test_and_clear_bit(FLG_L1_ACTIVATED, &st->l1.Flags); 579 test_and_clear_bit(FLG_L1_ACTIVATED, &st->l1.Flags);
580 L1deactivated(st->l1.hardware); 580 L1deactivated(st->l1.hardware);
@@ -585,7 +585,7 @@ static void
585l1_activate_s(struct FsmInst *fi, int event, void *arg) 585l1_activate_s(struct FsmInst *fi, int event, void *arg)
586{ 586{
587 struct PStack *st = fi->userdata; 587 struct PStack *st = fi->userdata;
588 588
589 st->l1.l1hw(st, HW_RESET | REQUEST, NULL); 589 st->l1.l1hw(st, HW_RESET | REQUEST, NULL);
590} 590}
591 591
@@ -679,7 +679,7 @@ static void
679l1_activate_u(struct FsmInst *fi, int event, void *arg) 679l1_activate_u(struct FsmInst *fi, int event, void *arg)
680{ 680{
681 struct PStack *st = fi->userdata; 681 struct PStack *st = fi->userdata;
682 682
683 st->l1.l1hw(st, HW_INFO1 | REQUEST, NULL); 683 st->l1.l1hw(st, HW_INFO1 | REQUEST, NULL);
684} 684}
685 685
@@ -751,7 +751,7 @@ static struct FsmNode L1BFnList[] __initdata =
751 {ST_L1_WAIT_DEACT, EV_TIMER_DEACT, l1b_timer_deact}, 751 {ST_L1_WAIT_DEACT, EV_TIMER_DEACT, l1b_timer_deact},
752}; 752};
753 753
754int __init 754int __init
755Isdnl1New(void) 755Isdnl1New(void)
756{ 756{
757 int retval; 757 int retval;
@@ -803,35 +803,35 @@ dch_l2l1(struct PStack *st, int pr, void *arg)
803 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware; 803 struct IsdnCardState *cs = (struct IsdnCardState *) st->l1.hardware;
804 804
805 switch (pr) { 805 switch (pr) {
806 case (PH_DATA | REQUEST): 806 case (PH_DATA | REQUEST):
807 case (PH_PULL | REQUEST): 807 case (PH_PULL | REQUEST):
808 case (PH_PULL |INDICATION): 808 case (PH_PULL | INDICATION):
809 st->l1.l1hw(st, pr, arg); 809 st->l1.l1hw(st, pr, arg);
810 break; 810 break;
811 case (PH_ACTIVATE | REQUEST): 811 case (PH_ACTIVATE | REQUEST):
812 if (cs->debug) 812 if (cs->debug)
813 debugl1(cs, "PH_ACTIVATE_REQ %s", 813 debugl1(cs, "PH_ACTIVATE_REQ %s",
814 st->l1.l1m.fsm->strState[st->l1.l1m.state]); 814 st->l1.l1m.fsm->strState[st->l1.l1m.state]);
815 if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags)) 815 if (test_bit(FLG_L1_ACTIVATED, &st->l1.Flags))
816 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL); 816 st->l1.l1l2(st, PH_ACTIVATE | CONFIRM, NULL);
817 else { 817 else {
818 test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags); 818 test_and_set_bit(FLG_L1_ACTIVATING, &st->l1.Flags);
819 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg); 819 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, arg);
820 } 820 }
821 break; 821 break;
822 case (PH_TESTLOOP | REQUEST): 822 case (PH_TESTLOOP | REQUEST):
823 if (1 & (long) arg) 823 if (1 & (long) arg)
824 debugl1(cs, "PH_TEST_LOOP B1"); 824 debugl1(cs, "PH_TEST_LOOP B1");
825 if (2 & (long) arg) 825 if (2 & (long) arg)
826 debugl1(cs, "PH_TEST_LOOP B2"); 826 debugl1(cs, "PH_TEST_LOOP B2");
827 if (!(3 & (long) arg)) 827 if (!(3 & (long) arg))
828 debugl1(cs, "PH_TEST_LOOP DISABLED"); 828 debugl1(cs, "PH_TEST_LOOP DISABLED");
829 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg); 829 st->l1.l1hw(st, HW_TESTLOOP | REQUEST, arg);
830 break; 830 break;
831 default: 831 default:
832 if (cs->debug) 832 if (cs->debug)
833 debugl1(cs, "dch_l2l1 msg %04X unhandled", pr); 833 debugl1(cs, "dch_l2l1 msg %04X unhandled", pr);
834 break; 834 break;
835 } 835 }
836} 836}
837 837
@@ -840,35 +840,35 @@ l1_msg(struct IsdnCardState *cs, int pr, void *arg) {
840 struct PStack *st; 840 struct PStack *st;
841 841
842 st = cs->stlist; 842 st = cs->stlist;
843 843
844 while (st) { 844 while (st) {
845 switch(pr) { 845 switch (pr) {
846 case (HW_RESET | INDICATION): 846 case (HW_RESET | INDICATION):
847 FsmEvent(&st->l1.l1m, EV_RESET_IND, arg); 847 FsmEvent(&st->l1.l1m, EV_RESET_IND, arg);
848 break; 848 break;
849 case (HW_DEACTIVATE | CONFIRM): 849 case (HW_DEACTIVATE | CONFIRM):
850 FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg); 850 FsmEvent(&st->l1.l1m, EV_DEACT_CNF, arg);
851 break; 851 break;
852 case (HW_DEACTIVATE | INDICATION): 852 case (HW_DEACTIVATE | INDICATION):
853 FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg); 853 FsmEvent(&st->l1.l1m, EV_DEACT_IND, arg);
854 break; 854 break;
855 case (HW_POWERUP | CONFIRM): 855 case (HW_POWERUP | CONFIRM):
856 FsmEvent(&st->l1.l1m, EV_POWER_UP, arg); 856 FsmEvent(&st->l1.l1m, EV_POWER_UP, arg);
857 break; 857 break;
858 case (HW_RSYNC | INDICATION): 858 case (HW_RSYNC | INDICATION):
859 FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg); 859 FsmEvent(&st->l1.l1m, EV_RSYNC_IND, arg);
860 break; 860 break;
861 case (HW_INFO2 | INDICATION): 861 case (HW_INFO2 | INDICATION):
862 FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg); 862 FsmEvent(&st->l1.l1m, EV_INFO2_IND, arg);
863 break; 863 break;
864 case (HW_INFO4_P8 | INDICATION): 864 case (HW_INFO4_P8 | INDICATION):
865 case (HW_INFO4_P10 | INDICATION): 865 case (HW_INFO4_P10 | INDICATION):
866 FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg); 866 FsmEvent(&st->l1.l1m, EV_INFO4_IND, arg);
867 break; 867 break;
868 default: 868 default:
869 if (cs->debug) 869 if (cs->debug)
870 debugl1(cs, "l1msg %04X unhandled", pr); 870 debugl1(cs, "l1msg %04X unhandled", pr);
871 break; 871 break;
872 } 872 }
873 st = st->next; 873 st = st->next;
874 } 874 }
@@ -876,13 +876,13 @@ l1_msg(struct IsdnCardState *cs, int pr, void *arg) {
876 876
877void 877void
878l1_msg_b(struct PStack *st, int pr, void *arg) { 878l1_msg_b(struct PStack *st, int pr, void *arg) {
879 switch(pr) { 879 switch (pr) {
880 case (PH_ACTIVATE | REQUEST): 880 case (PH_ACTIVATE | REQUEST):
881 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL); 881 FsmEvent(&st->l1.l1m, EV_PH_ACTIVATE, NULL);
882 break; 882 break;
883 case (PH_DEACTIVATE | REQUEST): 883 case (PH_DEACTIVATE | REQUEST):
884 FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL); 884 FsmEvent(&st->l1.l1m, EV_PH_DEACTIVATE, NULL);
885 break; 885 break;
886 } 886 }
887} 887}
888 888
diff --git a/drivers/isdn/hisax/isdnl2.c b/drivers/isdn/hisax/isdnl2.c
index cfff0c41d298..18accb0a79cc 100644
--- a/drivers/isdn/hisax/isdnl2.c
+++ b/drivers/isdn/hisax/isdnl2.c
@@ -3,7 +3,7 @@
3 * Author Karsten Keil 3 * Author Karsten Keil
4 * based on the teles driver from Jan den Ouden 4 * based on the teles driver from Jan den Ouden
5 * Copyright by Karsten Keil <keil@isdn4linux.de> 5 * Copyright by Karsten Keil <keil@isdn4linux.de>
6 * 6 *
7 * This software may be used and distributed according to the terms 7 * This software may be used and distributed according to the terms
8 * of the GNU General Public License, incorporated herein by reference. 8 * of the GNU General Public License, incorporated herein by reference.
9 * 9 *
@@ -37,7 +37,7 @@ enum {
37 ST_L2_8, 37 ST_L2_8,
38}; 38};
39 39
40#define L2_STATE_COUNT (ST_L2_8+1) 40#define L2_STATE_COUNT (ST_L2_8 + 1)
41 41
42static char *strL2State[] = 42static char *strL2State[] =
43{ 43{
@@ -76,7 +76,7 @@ enum {
76 EV_L2_FRAME_ERROR, 76 EV_L2_FRAME_ERROR,
77}; 77};
78 78
79#define L2_EVENT_COUNT (EV_L2_FRAME_ERROR+1) 79#define L2_EVENT_COUNT (EV_L2_FRAME_ERROR + 1)
80 80
81static char *strL2Event[] = 81static char *strL2Event[] =
82{ 82{
@@ -155,7 +155,7 @@ ReleaseWin(struct Layer2 *l2)
155{ 155{
156 int cnt; 156 int cnt;
157 157
158 if((cnt = freewin1(l2))) 158 if ((cnt = freewin1(l2)))
159 printk(KERN_WARNING "isdl2 freed %d skbuffs in release\n", cnt); 159 printk(KERN_WARNING "isdl2 freed %d skbuffs in release\n", cnt);
160} 160}
161 161
@@ -164,7 +164,7 @@ cansend(struct PStack *st)
164{ 164{
165 unsigned int p1; 165 unsigned int p1;
166 166
167 if(test_bit(FLG_MOD128, &st->l2.flag)) 167 if (test_bit(FLG_MOD128, &st->l2.flag))
168 p1 = (st->l2.vs - st->l2.va) % 128; 168 p1 = (st->l2.vs - st->l2.va) % 128;
169 else 169 else
170 p1 = (st->l2.vs - st->l2.va) % 8; 170 p1 = (st->l2.vs - st->l2.va) % 8;
@@ -194,7 +194,7 @@ l2addrsize(struct Layer2 *l2)
194} 194}
195 195
196static int 196static int
197sethdraddr(struct Layer2 *l2, u_char * header, int rsp) 197sethdraddr(struct Layer2 *l2, u_char *header, int rsp)
198{ 198{
199 u_char *ptr = header; 199 u_char *ptr = header;
200 int crbit = rsp; 200 int crbit = rsp;
@@ -226,41 +226,41 @@ enqueue_super(struct PStack *st,
226#define enqueue_ui(a, b) enqueue_super(a, b) 226#define enqueue_ui(a, b) enqueue_super(a, b)
227 227
228static inline int 228static inline int
229IsUI(u_char * data) 229IsUI(u_char *data)
230{ 230{
231 return ((data[0] & 0xef) == UI); 231 return ((data[0] & 0xef) == UI);
232} 232}
233 233
234static inline int 234static inline int
235IsUA(u_char * data) 235IsUA(u_char *data)
236{ 236{
237 return ((data[0] & 0xef) == UA); 237 return ((data[0] & 0xef) == UA);
238} 238}
239 239
240static inline int 240static inline int
241IsDM(u_char * data) 241IsDM(u_char *data)
242{ 242{
243 return ((data[0] & 0xef) == DM); 243 return ((data[0] & 0xef) == DM);
244} 244}
245 245
246static inline int 246static inline int
247IsDISC(u_char * data) 247IsDISC(u_char *data)
248{ 248{
249 return ((data[0] & 0xef) == DISC); 249 return ((data[0] & 0xef) == DISC);
250} 250}
251 251
252static inline int 252static inline int
253IsSFrame(u_char * data, struct PStack *st) 253IsSFrame(u_char *data, struct PStack *st)
254{ 254{
255 register u_char d = *data; 255 register u_char d = *data;
256 256
257 if (!test_bit(FLG_MOD128, &st->l2.flag)) 257 if (!test_bit(FLG_MOD128, &st->l2.flag))
258 d &= 0xf; 258 d &= 0xf;
259 return(((d & 0xf3) == 1) && ((d & 0x0c) != 0x0c)); 259 return (((d & 0xf3) == 1) && ((d & 0x0c) != 0x0c));
260} 260}
261 261
262static inline int 262static inline int
263IsSABME(u_char * data, struct PStack *st) 263IsSABME(u_char *data, struct PStack *st)
264{ 264{
265 u_char d = data[0] & ~0x10; 265 u_char d = data[0] & ~0x10;
266 266
@@ -268,19 +268,19 @@ IsSABME(u_char * data, struct PStack *st)
268} 268}
269 269
270static inline int 270static inline int
271IsREJ(u_char * data, struct PStack *st) 271IsREJ(u_char *data, struct PStack *st)
272{ 272{
273 return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == REJ : (data[0] & 0xf) == REJ); 273 return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == REJ : (data[0] & 0xf) == REJ);
274} 274}
275 275
276static inline int 276static inline int
277IsFRMR(u_char * data) 277IsFRMR(u_char *data)
278{ 278{
279 return ((data[0] & 0xef) == FRMR); 279 return ((data[0] & 0xef) == FRMR);
280} 280}
281 281
282static inline int 282static inline int
283IsRNR(u_char * data, struct PStack *st) 283IsRNR(u_char *data, struct PStack *st)
284{ 284{
285 return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == RNR : (data[0] & 0xf) == RNR); 285 return (test_bit(FLG_MOD128, &st->l2.flag) ? data[0] == RNR : (data[0] & 0xf) == RNR);
286} 286}
@@ -368,14 +368,14 @@ FRMR_error(struct PStack *st, struct sk_buff *skb)
368 return 'N'; 368 return 'N';
369 else 369 else
370 l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x %2x %2x", 370 l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x %2x %2x",
371 datap[0], datap[1], datap[2], 371 datap[0], datap[1], datap[2],
372 datap[3], datap[4]); 372 datap[3], datap[4]);
373 } else { 373 } else {
374 if (skb->len < headers + 3) 374 if (skb->len < headers + 3)
375 return 'N'; 375 return 'N';
376 else 376 else
377 l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x", 377 l2m_debug(&st->l2.l2m, "FRMR information %2x %2x %2x",
378 datap[0], datap[1], datap[2]); 378 datap[0], datap[1], datap[2]);
379 } 379 }
380 380
381 return 0; 381 return 0;
@@ -384,9 +384,9 @@ FRMR_error(struct PStack *st, struct sk_buff *skb)
384static unsigned int 384static unsigned int
385legalnr(struct PStack *st, unsigned int nr) 385legalnr(struct PStack *st, unsigned int nr)
386{ 386{
387 struct Layer2 *l2 = &st->l2; 387 struct Layer2 *l2 = &st->l2;
388 388
389 if(test_bit(FLG_MOD128, &l2->flag)) 389 if (test_bit(FLG_MOD128, &l2->flag))
390 return ((nr - l2->va) % 128) <= ((l2->vs - l2->va) % 128); 390 return ((nr - l2->va) % 128) <= ((l2->vs - l2->va) % 128);
391 else 391 else
392 return ((nr - l2->va) % 8) <= ((l2->vs - l2->va) % 8); 392 return ((nr - l2->va) % 8) <= ((l2->vs - l2->va) % 8);
@@ -402,7 +402,7 @@ setva(struct PStack *st, unsigned int nr)
402 spin_lock_irqsave(&l2->lock, flags); 402 spin_lock_irqsave(&l2->lock, flags);
403 while (l2->va != nr) { 403 while (l2->va != nr) {
404 (l2->va)++; 404 (l2->va)++;
405 if(test_bit(FLG_MOD128, &l2->flag)) 405 if (test_bit(FLG_MOD128, &l2->flag))
406 l2->va %= 128; 406 l2->va %= 128;
407 else 407 else
408 l2->va %= 8; 408 l2->va %= 8;
@@ -413,7 +413,7 @@ setva(struct PStack *st, unsigned int nr)
413 l2->windowar[l2->sow] = NULL; 413 l2->windowar[l2->sow] = NULL;
414 l2->sow = (l2->sow + 1) % l2->window; 414 l2->sow = (l2->sow + 1) % l2->window;
415 spin_unlock_irqrestore(&l2->lock, flags); 415 spin_unlock_irqrestore(&l2->lock, flags);
416 if (test_bit(FLG_LLI_L2WAKEUP, &st->lli.flag) && (len >=0)) 416 if (test_bit(FLG_LLI_L2WAKEUP, &st->lli.flag) && (len >= 0))
417 lli_writewakeup(st, len); 417 lli_writewakeup(st, len);
418 spin_lock_irqsave(&l2->lock, flags); 418 spin_lock_irqsave(&l2->lock, flags);
419 } 419 }
@@ -438,7 +438,7 @@ send_uframe(struct PStack *st, u_char cmd, u_char cr)
438} 438}
439 439
440static inline u_char 440static inline u_char
441get_PollFlag(struct PStack * st, struct sk_buff * skb) 441get_PollFlag(struct PStack *st, struct sk_buff *skb)
442{ 442{
443 return (skb->data[l2addrsize(&(st->l2))] & 0x10); 443 return (skb->data[l2addrsize(&(st->l2))] & 0x10);
444} 444}
@@ -470,29 +470,29 @@ restart_t200(struct PStack *st, int i)
470static inline void 470static inline void
471stop_t200(struct PStack *st, int i) 471stop_t200(struct PStack *st, int i)
472{ 472{
473 if(test_and_clear_bit(FLG_T200_RUN, &st->l2.flag)) 473 if (test_and_clear_bit(FLG_T200_RUN, &st->l2.flag))
474 FsmDelTimer(&st->l2.t200, i); 474 FsmDelTimer(&st->l2.t200, i);
475} 475}
476 476
477static inline void 477static inline void
478st5_dl_release_l2l3(struct PStack *st) 478st5_dl_release_l2l3(struct PStack *st)
479{ 479{
480 int pr; 480 int pr;
481 481
482 if(test_and_clear_bit(FLG_PEND_REL, &st->l2.flag)) 482 if (test_and_clear_bit(FLG_PEND_REL, &st->l2.flag))
483 pr = DL_RELEASE | CONFIRM; 483 pr = DL_RELEASE | CONFIRM;
484 else 484 else
485 pr = DL_RELEASE | INDICATION; 485 pr = DL_RELEASE | INDICATION;
486 486
487 st->l2.l2l3(st, pr, NULL); 487 st->l2.l2l3(st, pr, NULL);
488} 488}
489 489
490static inline void 490static inline void
491lapb_dl_release_l2l3(struct PStack *st, int f) 491lapb_dl_release_l2l3(struct PStack *st, int f)
492{ 492{
493 if (test_bit(FLG_LAPB, &st->l2.flag)) 493 if (test_bit(FLG_LAPB, &st->l2.flag))
494 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL); 494 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
495 st->l2.l2l3(st, DL_RELEASE | f, NULL); 495 st->l2.l2l3(st, DL_RELEASE | f, NULL);
496} 496}
497 497
498static void 498static void
@@ -557,7 +557,7 @@ l2_st8_mdl_error_dm(struct FsmInst *fi, int event, void *arg)
557static void 557static void
558l2_go_st3(struct FsmInst *fi, int event, void *arg) 558l2_go_st3(struct FsmInst *fi, int event, void *arg)
559{ 559{
560 FsmChangeState(fi, ST_L2_3); 560 FsmChangeState(fi, ST_L2_3);
561} 561}
562 562
563static void 563static void
@@ -565,7 +565,7 @@ l2_mdl_assign(struct FsmInst *fi, int event, void *arg)
565{ 565{
566 struct PStack *st = fi->userdata; 566 struct PStack *st = fi->userdata;
567 567
568 FsmChangeState(fi, ST_L2_3); 568 FsmChangeState(fi, ST_L2_3);
569 st->l2.l2tei(st, MDL_ASSIGN | INDICATION, NULL); 569 st->l2.l2tei(st, MDL_ASSIGN | INDICATION, NULL);
570} 570}
571 571
@@ -755,7 +755,7 @@ l2_restart_multi(struct FsmInst *fi, int event, void *arg)
755 if (est) 755 if (est)
756 st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL); 756 st->l2.l2l3(st, DL_ESTABLISH | INDICATION, NULL);
757 757
758 if ((ST_L2_7==state) || (ST_L2_8 == state)) 758 if ((ST_L2_7 == state) || (ST_L2_8 == state))
759 if (!skb_queue_empty(&st->l2.i_queue) && cansend(st)) 759 if (!skb_queue_empty(&st->l2.i_queue) && cansend(st))
760 st->l2.l2l1(st, PH_PULL | REQUEST, NULL); 760 st->l2.l2l1(st, PH_PULL | REQUEST, NULL);
761} 761}
@@ -782,7 +782,7 @@ l2_connected(struct FsmInst *fi, int event, void *arg)
782{ 782{
783 struct PStack *st = fi->userdata; 783 struct PStack *st = fi->userdata;
784 struct sk_buff *skb = arg; 784 struct sk_buff *skb = arg;
785 int pr=-1; 785 int pr = -1;
786 786
787 if (!get_PollFlag(st, skb)) { 787 if (!get_PollFlag(st, skb)) {
788 l2_mdl_error_ua(fi, event, arg); 788 l2_mdl_error_ua(fi, event, arg);
@@ -853,7 +853,7 @@ l2_st5_dm_release(struct FsmInst *fi, int event, void *arg)
853 853
854 if (get_PollFlagFree(st, skb)) { 854 if (get_PollFlagFree(st, skb)) {
855 stop_t200(st, 7); 855 stop_t200(st, 7);
856 if (!test_bit(FLG_L3_INIT, &st->l2.flag)) 856 if (!test_bit(FLG_L3_INIT, &st->l2.flag))
857 skb_queue_purge(&st->l2.i_queue); 857 skb_queue_purge(&st->l2.i_queue);
858 if (test_bit(FLG_LAPB, &st->l2.flag)) 858 if (test_bit(FLG_LAPB, &st->l2.flag))
859 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL); 859 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
@@ -941,7 +941,7 @@ invoke_retransmission(struct PStack *st, unsigned int nr)
941 if (l2->vs != nr) { 941 if (l2->vs != nr) {
942 while (l2->vs != nr) { 942 while (l2->vs != nr) {
943 (l2->vs)--; 943 (l2->vs)--;
944 if(test_bit(FLG_MOD128, &l2->flag)) { 944 if (test_bit(FLG_MOD128, &l2->flag)) {
945 l2->vs %= 128; 945 l2->vs %= 128;
946 p1 = (l2->vs - l2->va) % 128; 946 p1 = (l2->vs - l2->va) % 128;
947 } else { 947 } else {
@@ -1013,7 +1013,7 @@ l2_st7_got_super(struct FsmInst *fi, int event, void *arg)
1013 EV_L2_T203, NULL, 7); 1013 EV_L2_T203, NULL, 7);
1014 } else if ((l2->va != nr) || (typ == RNR)) { 1014 } else if ((l2->va != nr) || (typ == RNR)) {
1015 setva(st, nr); 1015 setva(st, nr);
1016 if(typ != RR) FsmDelTimer(&st->l2.t203, 9); 1016 if (typ != RR) FsmDelTimer(&st->l2.t203, 9);
1017 restart_t200(st, 12); 1017 restart_t200(st, 12);
1018 } 1018 }
1019 if (!skb_queue_empty(&st->l2.i_queue) && (typ == RR)) 1019 if (!skb_queue_empty(&st->l2.i_queue) && (typ == RR))
@@ -1080,10 +1080,10 @@ l2_got_iframe(struct FsmInst *fi, int event, void *arg)
1080 } 1080 }
1081 if (test_bit(FLG_OWN_BUSY, &l2->flag)) { 1081 if (test_bit(FLG_OWN_BUSY, &l2->flag)) {
1082 dev_kfree_skb(skb); 1082 dev_kfree_skb(skb);
1083 if(PollFlag) enquiry_response(st); 1083 if (PollFlag) enquiry_response(st);
1084 } else if (l2->vr == ns) { 1084 } else if (l2->vr == ns) {
1085 (l2->vr)++; 1085 (l2->vr)++;
1086 if(test_bit(FLG_MOD128, &l2->flag)) 1086 if (test_bit(FLG_MOD128, &l2->flag))
1087 l2->vr %= 128; 1087 l2->vr %= 128;
1088 else 1088 else
1089 l2->vr %= 8; 1089 l2->vr %= 8;
@@ -1150,7 +1150,7 @@ l2_st5_tout_200(struct FsmInst *fi, int event, void *arg)
1150 struct PStack *st = fi->userdata; 1150 struct PStack *st = fi->userdata;
1151 1151
1152 if (test_bit(FLG_LAPD, &st->l2.flag) && 1152 if (test_bit(FLG_LAPD, &st->l2.flag) &&
1153 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) { 1153 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
1154 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9); 1154 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
1155 } else if (st->l2.rc == st->l2.N200) { 1155 } else if (st->l2.rc == st->l2.N200) {
1156 FsmChangeState(fi, ST_L2_4); 1156 FsmChangeState(fi, ST_L2_4);
@@ -1174,7 +1174,7 @@ l2_st6_tout_200(struct FsmInst *fi, int event, void *arg)
1174 struct PStack *st = fi->userdata; 1174 struct PStack *st = fi->userdata;
1175 1175
1176 if (test_bit(FLG_LAPD, &st->l2.flag) && 1176 if (test_bit(FLG_LAPD, &st->l2.flag) &&
1177 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) { 1177 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
1178 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9); 1178 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
1179 } else if (st->l2.rc == st->l2.N200) { 1179 } else if (st->l2.rc == st->l2.N200) {
1180 FsmChangeState(fi, ST_L2_4); 1180 FsmChangeState(fi, ST_L2_4);
@@ -1195,7 +1195,7 @@ l2_st7_tout_200(struct FsmInst *fi, int event, void *arg)
1195 struct PStack *st = fi->userdata; 1195 struct PStack *st = fi->userdata;
1196 1196
1197 if (test_bit(FLG_LAPD, &st->l2.flag) && 1197 if (test_bit(FLG_LAPD, &st->l2.flag) &&
1198 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) { 1198 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
1199 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9); 1199 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
1200 return; 1200 return;
1201 } 1201 }
@@ -1213,7 +1213,7 @@ l2_st8_tout_200(struct FsmInst *fi, int event, void *arg)
1213 struct PStack *st = fi->userdata; 1213 struct PStack *st = fi->userdata;
1214 1214
1215 if (test_bit(FLG_LAPD, &st->l2.flag) && 1215 if (test_bit(FLG_LAPD, &st->l2.flag) &&
1216 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) { 1216 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
1217 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9); 1217 FsmAddTimer(&st->l2.t200, st->l2.T200, EV_L2_T200, NULL, 9);
1218 return; 1218 return;
1219 } 1219 }
@@ -1234,7 +1234,7 @@ l2_st7_tout_203(struct FsmInst *fi, int event, void *arg)
1234 struct PStack *st = fi->userdata; 1234 struct PStack *st = fi->userdata;
1235 1235
1236 if (test_bit(FLG_LAPD, &st->l2.flag) && 1236 if (test_bit(FLG_LAPD, &st->l2.flag) &&
1237 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) { 1237 test_bit(FLG_DCHAN_BUSY, &st->l2.flag)) {
1238 FsmAddTimer(&st->l2.t203, st->l2.T203, EV_L2_T203, NULL, 9); 1238 FsmAddTimer(&st->l2.t203, st->l2.T203, EV_L2_T203, NULL, 9);
1239 return; 1239 return;
1240 } 1240 }
@@ -1272,7 +1272,7 @@ l2_pull_iqueue(struct FsmInst *fi, int event, void *arg)
1272 } 1272 }
1273 } 1273 }
1274 spin_lock_irqsave(&l2->lock, flags); 1274 spin_lock_irqsave(&l2->lock, flags);
1275 if(test_bit(FLG_MOD128, &l2->flag)) 1275 if (test_bit(FLG_MOD128, &l2->flag))
1276 p1 = (l2->vs - l2->va) % 128; 1276 p1 = (l2->vs - l2->va) % 128;
1277 else 1277 else
1278 p1 = (l2->vs - l2->va) % 8; 1278 p1 = (l2->vs - l2->va) % 8;
@@ -1445,7 +1445,7 @@ static void
1445l2_st14_persistent_da(struct FsmInst *fi, int event, void *arg) 1445l2_st14_persistent_da(struct FsmInst *fi, int event, void *arg)
1446{ 1446{
1447 struct PStack *st = fi->userdata; 1447 struct PStack *st = fi->userdata;
1448 1448
1449 skb_queue_purge(&st->l2.i_queue); 1449 skb_queue_purge(&st->l2.i_queue);
1450 skb_queue_purge(&st->l2.ui_queue); 1450 skb_queue_purge(&st->l2.ui_queue);
1451 if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag)) 1451 if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag))
@@ -1495,7 +1495,7 @@ l2_set_own_busy(struct FsmInst *fi, int event, void *arg)
1495{ 1495{
1496 struct PStack *st = fi->userdata; 1496 struct PStack *st = fi->userdata;
1497 1497
1498 if(!test_and_set_bit(FLG_OWN_BUSY, &st->l2.flag)) { 1498 if (!test_and_set_bit(FLG_OWN_BUSY, &st->l2.flag)) {
1499 enquiry_cr(st, RNR, RSP, 0); 1499 enquiry_cr(st, RNR, RSP, 0);
1500 test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag); 1500 test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag);
1501 } 1501 }
@@ -1506,7 +1506,7 @@ l2_clear_own_busy(struct FsmInst *fi, int event, void *arg)
1506{ 1506{
1507 struct PStack *st = fi->userdata; 1507 struct PStack *st = fi->userdata;
1508 1508
1509 if(!test_and_clear_bit(FLG_OWN_BUSY, &st->l2.flag)) { 1509 if (!test_and_clear_bit(FLG_OWN_BUSY, &st->l2.flag)) {
1510 enquiry_cr(st, RR, RSP, 0); 1510 enquiry_cr(st, RR, RSP, 0);
1511 test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag); 1511 test_and_clear_bit(FLG_ACK_PEND, &st->l2.flag);
1512 } 1512 }
@@ -1631,76 +1631,76 @@ isdnl2_l1l2(struct PStack *st, int pr, void *arg)
1631 int c = 0; 1631 int c = 0;
1632 1632
1633 switch (pr) { 1633 switch (pr) {
1634 case (PH_DATA | INDICATION): 1634 case (PH_DATA | INDICATION):
1635 datap = skb->data; 1635 datap = skb->data;
1636 len = l2addrsize(&st->l2); 1636 len = l2addrsize(&st->l2);
1637 if (skb->len > len) 1637 if (skb->len > len)
1638 datap += len; 1638 datap += len;
1639 else { 1639 else {
1640 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'N'); 1640 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'N');
1641 dev_kfree_skb(skb); 1641 dev_kfree_skb(skb);
1642 return; 1642 return;
1643 } 1643 }
1644 if (!(*datap & 1)) { /* I-Frame */ 1644 if (!(*datap & 1)) { /* I-Frame */
1645 if(!(c = iframe_error(st, skb))) 1645 if (!(c = iframe_error(st, skb)))
1646 ret = FsmEvent(&st->l2.l2m, EV_L2_I, skb); 1646 ret = FsmEvent(&st->l2.l2m, EV_L2_I, skb);
1647 } else if (IsSFrame(datap, st)) { /* S-Frame */ 1647 } else if (IsSFrame(datap, st)) { /* S-Frame */
1648 if(!(c = super_error(st, skb))) 1648 if (!(c = super_error(st, skb)))
1649 ret = FsmEvent(&st->l2.l2m, EV_L2_SUPER, skb); 1649 ret = FsmEvent(&st->l2.l2m, EV_L2_SUPER, skb);
1650 } else if (IsUI(datap)) { 1650 } else if (IsUI(datap)) {
1651 if(!(c = UI_error(st, skb))) 1651 if (!(c = UI_error(st, skb)))
1652 ret = FsmEvent(&st->l2.l2m, EV_L2_UI, skb); 1652 ret = FsmEvent(&st->l2.l2m, EV_L2_UI, skb);
1653 } else if (IsSABME(datap, st)) { 1653 } else if (IsSABME(datap, st)) {
1654 if(!(c = unnum_error(st, skb, CMD))) 1654 if (!(c = unnum_error(st, skb, CMD)))
1655 ret = FsmEvent(&st->l2.l2m, EV_L2_SABME, skb); 1655 ret = FsmEvent(&st->l2.l2m, EV_L2_SABME, skb);
1656 } else if (IsUA(datap)) { 1656 } else if (IsUA(datap)) {
1657 if(!(c = unnum_error(st, skb, RSP))) 1657 if (!(c = unnum_error(st, skb, RSP)))
1658 ret = FsmEvent(&st->l2.l2m, EV_L2_UA, skb); 1658 ret = FsmEvent(&st->l2.l2m, EV_L2_UA, skb);
1659 } else if (IsDISC(datap)) { 1659 } else if (IsDISC(datap)) {
1660 if(!(c = unnum_error(st, skb, CMD))) 1660 if (!(c = unnum_error(st, skb, CMD)))
1661 ret = FsmEvent(&st->l2.l2m, EV_L2_DISC, skb); 1661 ret = FsmEvent(&st->l2.l2m, EV_L2_DISC, skb);
1662 } else if (IsDM(datap)) { 1662 } else if (IsDM(datap)) {
1663 if(!(c = unnum_error(st, skb, RSP))) 1663 if (!(c = unnum_error(st, skb, RSP)))
1664 ret = FsmEvent(&st->l2.l2m, EV_L2_DM, skb); 1664 ret = FsmEvent(&st->l2.l2m, EV_L2_DM, skb);
1665 } else if (IsFRMR(datap)) { 1665 } else if (IsFRMR(datap)) {
1666 if(!(c = FRMR_error(st,skb))) 1666 if (!(c = FRMR_error(st, skb)))
1667 ret = FsmEvent(&st->l2.l2m, EV_L2_FRMR, skb); 1667 ret = FsmEvent(&st->l2.l2m, EV_L2_FRMR, skb);
1668 } else { 1668 } else {
1669 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'L'); 1669 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *) 'L');
1670 dev_kfree_skb(skb); 1670 dev_kfree_skb(skb);
1671 ret = 0; 1671 ret = 0;
1672 } 1672 }
1673 if(c) { 1673 if (c) {
1674 dev_kfree_skb(skb); 1674 dev_kfree_skb(skb);
1675 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *)(long)c); 1675 FsmEvent(&st->l2.l2m, EV_L2_FRAME_ERROR, (void *)(long)c);
1676 ret = 0; 1676 ret = 0;
1677 } 1677 }
1678 if (ret) 1678 if (ret)
1679 dev_kfree_skb(skb); 1679 dev_kfree_skb(skb);
1680 break; 1680 break;
1681 case (PH_PULL | CONFIRM): 1681 case (PH_PULL | CONFIRM):
1682 FsmEvent(&st->l2.l2m, EV_L2_ACK_PULL, arg); 1682 FsmEvent(&st->l2.l2m, EV_L2_ACK_PULL, arg);
1683 break; 1683 break;
1684 case (PH_PAUSE | INDICATION): 1684 case (PH_PAUSE | INDICATION):
1685 test_and_set_bit(FLG_DCHAN_BUSY, &st->l2.flag); 1685 test_and_set_bit(FLG_DCHAN_BUSY, &st->l2.flag);
1686 break; 1686 break;
1687 case (PH_PAUSE | CONFIRM): 1687 case (PH_PAUSE | CONFIRM):
1688 test_and_clear_bit(FLG_DCHAN_BUSY, &st->l2.flag); 1688 test_and_clear_bit(FLG_DCHAN_BUSY, &st->l2.flag);
1689 break; 1689 break;
1690 case (PH_ACTIVATE | CONFIRM): 1690 case (PH_ACTIVATE | CONFIRM):
1691 case (PH_ACTIVATE | INDICATION): 1691 case (PH_ACTIVATE | INDICATION):
1692 test_and_set_bit(FLG_L1_ACTIV, &st->l2.flag); 1692 test_and_set_bit(FLG_L1_ACTIV, &st->l2.flag);
1693 if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag)) 1693 if (test_and_clear_bit(FLG_ESTAB_PEND, &st->l2.flag))
1694 FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg); 1694 FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
1695 break; 1695 break;
1696 case (PH_DEACTIVATE | INDICATION): 1696 case (PH_DEACTIVATE | INDICATION):
1697 case (PH_DEACTIVATE | CONFIRM): 1697 case (PH_DEACTIVATE | CONFIRM):
1698 test_and_clear_bit(FLG_L1_ACTIV, &st->l2.flag); 1698 test_and_clear_bit(FLG_L1_ACTIV, &st->l2.flag);
1699 FsmEvent(&st->l2.l2m, EV_L1_DEACTIVATE, arg); 1699 FsmEvent(&st->l2.l2m, EV_L1_DEACTIVATE, arg);
1700 break; 1700 break;
1701 default: 1701 default:
1702 l2m_debug(&st->l2.l2m, "l2 unknown pr %04x", pr); 1702 l2m_debug(&st->l2.l2m, "l2 unknown pr %04x", pr);
1703 break; 1703 break;
1704 } 1704 }
1705} 1705}
1706 1706
@@ -1708,45 +1708,45 @@ static void
1708isdnl2_l3l2(struct PStack *st, int pr, void *arg) 1708isdnl2_l3l2(struct PStack *st, int pr, void *arg)
1709{ 1709{
1710 switch (pr) { 1710 switch (pr) {
1711 case (DL_DATA | REQUEST): 1711 case (DL_DATA | REQUEST):
1712 if (FsmEvent(&st->l2.l2m, EV_L2_DL_DATA, arg)) { 1712 if (FsmEvent(&st->l2.l2m, EV_L2_DL_DATA, arg)) {
1713 dev_kfree_skb((struct sk_buff *) arg); 1713 dev_kfree_skb((struct sk_buff *) arg);
1714 } 1714 }
1715 break; 1715 break;
1716 case (DL_UNIT_DATA | REQUEST): 1716 case (DL_UNIT_DATA | REQUEST):
1717 if (FsmEvent(&st->l2.l2m, EV_L2_DL_UNIT_DATA, arg)) { 1717 if (FsmEvent(&st->l2.l2m, EV_L2_DL_UNIT_DATA, arg)) {
1718 dev_kfree_skb((struct sk_buff *) arg); 1718 dev_kfree_skb((struct sk_buff *) arg);
1719 } 1719 }
1720 break; 1720 break;
1721 case (DL_ESTABLISH | REQUEST): 1721 case (DL_ESTABLISH | REQUEST):
1722 if (test_bit(FLG_L1_ACTIV, &st->l2.flag)) { 1722 if (test_bit(FLG_L1_ACTIV, &st->l2.flag)) {
1723 if (test_bit(FLG_LAPD, &st->l2.flag) || 1723 if (test_bit(FLG_LAPD, &st->l2.flag) ||
1724 test_bit(FLG_ORIG, &st->l2.flag)) { 1724 test_bit(FLG_ORIG, &st->l2.flag)) {
1725 FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg); 1725 FsmEvent(&st->l2.l2m, EV_L2_DL_ESTABLISH_REQ, arg);
1726 }
1727 } else {
1728 if (test_bit(FLG_LAPD, &st->l2.flag) ||
1729 test_bit(FLG_ORIG, &st->l2.flag)) {
1730 test_and_set_bit(FLG_ESTAB_PEND, &st->l2.flag);
1731 }
1732 st->l2.l2l1(st, PH_ACTIVATE, NULL);
1733 } 1726 }
1734 break; 1727 } else {
1735 case (DL_RELEASE | REQUEST): 1728 if (test_bit(FLG_LAPD, &st->l2.flag) ||
1736 if (test_bit(FLG_LAPB, &st->l2.flag)) { 1729 test_bit(FLG_ORIG, &st->l2.flag)) {
1737 st->l2.l2l1(st, PH_DEACTIVATE, NULL); 1730 test_and_set_bit(FLG_ESTAB_PEND, &st->l2.flag);
1738 } 1731 }
1739 FsmEvent(&st->l2.l2m, EV_L2_DL_RELEASE_REQ, arg); 1732 st->l2.l2l1(st, PH_ACTIVATE, NULL);
1740 break; 1733 }
1741 case (MDL_ASSIGN | REQUEST): 1734 break;
1742 FsmEvent(&st->l2.l2m, EV_L2_MDL_ASSIGN, arg); 1735 case (DL_RELEASE | REQUEST):
1743 break; 1736 if (test_bit(FLG_LAPB, &st->l2.flag)) {
1744 case (MDL_REMOVE | REQUEST): 1737 st->l2.l2l1(st, PH_DEACTIVATE, NULL);
1745 FsmEvent(&st->l2.l2m, EV_L2_MDL_REMOVE, arg); 1738 }
1746 break; 1739 FsmEvent(&st->l2.l2m, EV_L2_DL_RELEASE_REQ, arg);
1747 case (MDL_ERROR | RESPONSE): 1740 break;
1748 FsmEvent(&st->l2.l2m, EV_L2_MDL_ERROR, arg); 1741 case (MDL_ASSIGN | REQUEST):
1749 break; 1742 FsmEvent(&st->l2.l2m, EV_L2_MDL_ASSIGN, arg);
1743 break;
1744 case (MDL_REMOVE | REQUEST):
1745 FsmEvent(&st->l2.l2m, EV_L2_MDL_REMOVE, arg);
1746 break;
1747 case (MDL_ERROR | RESPONSE):
1748 FsmEvent(&st->l2.l2m, EV_L2_MDL_ERROR, arg);
1749 break;
1750 } 1750 }
1751} 1751}
1752 1752
@@ -1787,7 +1787,7 @@ setstack_isdnl2(struct PStack *st, char *debug_id)
1787 if (test_bit(FLG_LAPB, &st->l2.flag)) 1787 if (test_bit(FLG_LAPB, &st->l2.flag))
1788 st->l2.l2m.state = ST_L2_4; 1788 st->l2.l2m.state = ST_L2_4;
1789 else 1789 else
1790 st->l2.l2m.state = ST_L2_1; 1790 st->l2.l2m.state = ST_L2_1;
1791 st->l2.l2m.debug = 0; 1791 st->l2.l2m.debug = 0;
1792 st->l2.l2m.userdata = st; 1792 st->l2.l2m.userdata = st;
1793 st->l2.l2m.userint = 0; 1793 st->l2.l2m.userint = 0;
@@ -1802,16 +1802,16 @@ static void
1802transl2_l3l2(struct PStack *st, int pr, void *arg) 1802transl2_l3l2(struct PStack *st, int pr, void *arg)
1803{ 1803{
1804 switch (pr) { 1804 switch (pr) {
1805 case (DL_DATA | REQUEST): 1805 case (DL_DATA | REQUEST):
1806 case (DL_UNIT_DATA | REQUEST): 1806 case (DL_UNIT_DATA | REQUEST):
1807 st->l2.l2l1(st, PH_DATA | REQUEST, arg); 1807 st->l2.l2l1(st, PH_DATA | REQUEST, arg);
1808 break; 1808 break;
1809 case (DL_ESTABLISH | REQUEST): 1809 case (DL_ESTABLISH | REQUEST):
1810 st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL); 1810 st->l2.l2l1(st, PH_ACTIVATE | REQUEST, NULL);
1811 break; 1811 break;
1812 case (DL_RELEASE | REQUEST): 1812 case (DL_RELEASE | REQUEST):
1813 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL); 1813 st->l2.l2l1(st, PH_DEACTIVATE | REQUEST, NULL);
1814 break; 1814 break;
1815 } 1815 }
1816} 1816}
1817 1817
diff --git a/drivers/isdn/hisax/isdnl2.h b/drivers/isdn/hisax/isdnl2.h
index 0cdab1b73fac..7e447fb8ed1d 100644
--- a/drivers/isdn/hisax/isdnl2.h
+++ b/drivers/isdn/hisax/isdnl2.h
@@ -23,4 +23,3 @@
23#define RSP 1 23#define RSP 1
24 24
25#define LC_FLUSH_WAIT 1 25#define LC_FLUSH_WAIT 1
26
diff --git a/drivers/isdn/hisax/isdnl3.c b/drivers/isdn/hisax/isdnl3.c
index 1c24e4457b6f..45b03840f716 100644
--- a/drivers/isdn/hisax/isdnl3.c
+++ b/drivers/isdn/hisax/isdnl3.c
@@ -3,7 +3,7 @@
3 * Author Karsten Keil 3 * Author Karsten Keil
4 * based on the teles driver from Jan den Ouden 4 * based on the teles driver from Jan den Ouden
5 * Copyright by Karsten Keil <keil@isdn4linux.de> 5 * Copyright by Karsten Keil <keil@isdn4linux.de>
6 * 6 *
7 * This software may be used and distributed according to the terms 7 * This software may be used and distributed according to the terms
8 * of the GNU General Public License, incorporated herein by reference. 8 * of the GNU General Public License, incorporated herein by reference.
9 * 9 *
@@ -27,12 +27,12 @@ static struct Fsm l3fsm;
27enum { 27enum {
28 ST_L3_LC_REL, 28 ST_L3_LC_REL,
29 ST_L3_LC_ESTAB_WAIT, 29 ST_L3_LC_ESTAB_WAIT,
30 ST_L3_LC_REL_DELAY, 30 ST_L3_LC_REL_DELAY,
31 ST_L3_LC_REL_WAIT, 31 ST_L3_LC_REL_WAIT,
32 ST_L3_LC_ESTAB, 32 ST_L3_LC_ESTAB,
33}; 33};
34 34
35#define L3_STATE_COUNT (ST_L3_LC_ESTAB+1) 35#define L3_STATE_COUNT (ST_L3_LC_ESTAB + 1)
36 36
37static char *strL3State[] = 37static char *strL3State[] =
38{ 38{
@@ -53,7 +53,7 @@ enum {
53 EV_TIMEOUT, 53 EV_TIMEOUT,
54}; 54};
55 55
56#define L3_EVENT_COUNT (EV_TIMEOUT+1) 56#define L3_EVENT_COUNT (EV_TIMEOUT + 1)
57 57
58static char *strL3Event[] = 58static char *strL3Event[] =
59{ 59{
@@ -67,7 +67,7 @@ static char *strL3Event[] =
67}; 67};
68 68
69static __printf(2, 3) void 69static __printf(2, 3) void
70l3m_debug(struct FsmInst *fi, char *fmt, ...) 70 l3m_debug(struct FsmInst *fi, char *fmt, ...)
71{ 71{
72 va_list args; 72 va_list args;
73 struct PStack *st = fi->userdata; 73 struct PStack *st = fi->userdata;
@@ -78,7 +78,7 @@ l3m_debug(struct FsmInst *fi, char *fmt, ...)
78} 78}
79 79
80u_char * 80u_char *
81findie(u_char * p, int size, u_char ie, int wanted_set) 81findie(u_char *p, int size, u_char ie, int wanted_set)
82{ 82{
83 int l, codeset, maincodeset; 83 int l, codeset, maincodeset;
84 u_char *pend = p + size; 84 u_char *pend = p + size;
@@ -102,14 +102,14 @@ findie(u_char * p, int size, u_char ie, int wanted_set)
102 else { 102 else {
103 if (codeset == wanted_set) { 103 if (codeset == wanted_set) {
104 if (*p == ie) 104 if (*p == ie)
105 { /* improved length check (Werner Cornelius) */ 105 { /* improved length check (Werner Cornelius) */
106 if ((pend - p) < 2) 106 if ((pend - p) < 2)
107 return(NULL); 107 return (NULL);
108 if (*(p+1) > (pend - (p+2))) 108 if (*(p + 1) > (pend - (p + 2)))
109 return(NULL); 109 return (NULL);
110 return (p); 110 return (p);
111 } 111 }
112 112
113 if (*p > ie) 113 if (*p > ie)
114 return (NULL); 114 return (NULL);
115 } 115 }
@@ -123,16 +123,16 @@ findie(u_char * p, int size, u_char ie, int wanted_set)
123} 123}
124 124
125int 125int
126getcallref(u_char * p) 126getcallref(u_char *p)
127{ 127{
128 int l, cr = 0; 128 int l, cr = 0;
129 129
130 p++; /* prot discr */ 130 p++; /* prot discr */
131 if (*p & 0xfe) /* wrong callref BRI only 1 octet*/ 131 if (*p & 0xfe) /* wrong callref BRI only 1 octet*/
132 return(-2); 132 return (-2);
133 l = 0xf & *p++; /* callref length */ 133 l = 0xf & *p++; /* callref length */
134 if (!l) /* dummy CallRef */ 134 if (!l) /* dummy CallRef */
135 return(-1); 135 return (-1);
136 cr = *p++; 136 cr = *p++;
137 return (cr); 137 return (cr);
138} 138}
@@ -153,7 +153,7 @@ void
153newl3state(struct l3_process *pc, int state) 153newl3state(struct l3_process *pc, int state)
154{ 154{
155 if (pc->debug & L3_DEB_STATE) 155 if (pc->debug & L3_DEB_STATE)
156 l3_debug(pc->st, "newstate cr %d %d --> %d", 156 l3_debug(pc->st, "newstate cr %d %d --> %d",
157 pc->callref & 0x7F, 157 pc->callref & 0x7F,
158 pc->state, state); 158 pc->state, state);
159 pc->state = state; 159 pc->state = state;
@@ -228,8 +228,8 @@ no_l3_proto(struct PStack *st, int pr, void *arg)
228static int 228static int
229no_l3_proto_spec(struct PStack *st, isdn_ctrl *ic) 229no_l3_proto_spec(struct PStack *st, isdn_ctrl *ic)
230{ 230{
231 printk(KERN_WARNING "HiSax: no specific protocol handler for proto %lu\n",ic->arg & 0xFF); 231 printk(KERN_WARNING "HiSax: no specific protocol handler for proto %lu\n", ic->arg & 0xFF);
232 return(-1); 232 return (-1);
233} 233}
234 234
235struct l3_process 235struct l3_process
@@ -287,7 +287,7 @@ release_l3_process(struct l3_process *p)
287 if (pp) 287 if (pp)
288 pp->next = np->next; 288 pp->next = np->next;
289 else if (!(p->st->l3.proc = np->next) && 289 else if (!(p->st->l3.proc = np->next) &&
290 !test_bit(FLG_PTP, &p->st->l2.flag)) { 290 !test_bit(FLG_PTP, &p->st->l2.flag)) {
291 if (p->debug) 291 if (p->debug)
292 l3_debug(p->st, "release_l3_process: last process"); 292 l3_debug(p->st, "release_l3_process: last process");
293 if (skb_queue_empty(&p->st->l3.squeue)) { 293 if (skb_queue_empty(&p->st->l3.squeue)) {
@@ -301,7 +301,7 @@ release_l3_process(struct l3_process *p)
301 if (p->debug) 301 if (p->debug)
302 l3_debug(p->st, "release_l3_process: not release link"); 302 l3_debug(p->st, "release_l3_process: not release link");
303 } 303 }
304 } 304 }
305 kfree(p); 305 kfree(p);
306 return; 306 return;
307 } 307 }
@@ -340,42 +340,42 @@ setstack_l3dc(struct PStack *st, struct Channel *chanp)
340 st->l3.l3m.userdata = st; 340 st->l3.l3m.userdata = st;
341 st->l3.l3m.userint = 0; 341 st->l3.l3m.userint = 0;
342 st->l3.l3m.printdebug = l3m_debug; 342 st->l3.l3m.printdebug = l3m_debug;
343 FsmInitTimer(&st->l3.l3m, &st->l3.l3m_timer); 343 FsmInitTimer(&st->l3.l3m, &st->l3.l3m_timer);
344 strcpy(st->l3.debug_id, "L3DC "); 344 strcpy(st->l3.debug_id, "L3DC ");
345 st->lli.l4l3_proto = no_l3_proto_spec; 345 st->lli.l4l3_proto = no_l3_proto_spec;
346 346
347#ifdef CONFIG_HISAX_EURO 347#ifdef CONFIG_HISAX_EURO
348 if (st->protocol == ISDN_PTYPE_EURO) { 348 if (st->protocol == ISDN_PTYPE_EURO) {
349 setstack_dss1(st); 349 setstack_dss1(st);
350 } else 350 } else
351#endif 351#endif
352#ifdef CONFIG_HISAX_NI1 352#ifdef CONFIG_HISAX_NI1
353 if (st->protocol == ISDN_PTYPE_NI1) { 353 if (st->protocol == ISDN_PTYPE_NI1) {
354 setstack_ni1(st); 354 setstack_ni1(st);
355 } else 355 } else
356#endif 356#endif
357#ifdef CONFIG_HISAX_1TR6 357#ifdef CONFIG_HISAX_1TR6
358 if (st->protocol == ISDN_PTYPE_1TR6) { 358 if (st->protocol == ISDN_PTYPE_1TR6) {
359 setstack_1tr6(st); 359 setstack_1tr6(st);
360 } else 360 } else
361#endif 361#endif
362 if (st->protocol == ISDN_PTYPE_LEASED) { 362 if (st->protocol == ISDN_PTYPE_LEASED) {
363 st->lli.l4l3 = no_l3_proto; 363 st->lli.l4l3 = no_l3_proto;
364 st->l2.l2l3 = no_l3_proto; 364 st->l2.l2l3 = no_l3_proto;
365 st->l3.l3ml3 = no_l3_proto; 365 st->l3.l3ml3 = no_l3_proto;
366 printk(KERN_INFO "HiSax: Leased line mode\n"); 366 printk(KERN_INFO "HiSax: Leased line mode\n");
367 } else { 367 } else {
368 st->lli.l4l3 = no_l3_proto; 368 st->lli.l4l3 = no_l3_proto;
369 st->l2.l2l3 = no_l3_proto; 369 st->l2.l2l3 = no_l3_proto;
370 st->l3.l3ml3 = no_l3_proto; 370 st->l3.l3ml3 = no_l3_proto;
371 sprintf(tmp, "protocol %s not supported", 371 sprintf(tmp, "protocol %s not supported",
372 (st->protocol == ISDN_PTYPE_1TR6) ? "1tr6" : 372 (st->protocol == ISDN_PTYPE_1TR6) ? "1tr6" :
373 (st->protocol == ISDN_PTYPE_EURO) ? "euro" : 373 (st->protocol == ISDN_PTYPE_EURO) ? "euro" :
374 (st->protocol == ISDN_PTYPE_NI1) ? "ni1" : 374 (st->protocol == ISDN_PTYPE_NI1) ? "ni1" :
375 "unknown"); 375 "unknown");
376 printk(KERN_WARNING "HiSax: %s\n", tmp); 376 printk(KERN_WARNING "HiSax: %s\n", tmp);
377 st->protocol = -1; 377 st->protocol = -1;
378 } 378 }
379} 379}
380 380
381static void 381static void
@@ -469,22 +469,22 @@ lc_connected(struct FsmInst *fi, int event, void *arg)
469static void 469static void
470lc_start_delay(struct FsmInst *fi, int event, void *arg) 470lc_start_delay(struct FsmInst *fi, int event, void *arg)
471{ 471{
472 struct PStack *st = fi->userdata; 472 struct PStack *st = fi->userdata;
473 473
474 FsmChangeState(fi, ST_L3_LC_REL_DELAY); 474 FsmChangeState(fi, ST_L3_LC_REL_DELAY);
475 FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50); 475 FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
476} 476}
477 477
478static void 478static void
479lc_start_delay_check(struct FsmInst *fi, int event, void *arg) 479lc_start_delay_check(struct FsmInst *fi, int event, void *arg)
480/* 20/09/00 - GE timer not user for NI-1 as layer 2 should stay up */ 480/* 20/09/00 - GE timer not user for NI-1 as layer 2 should stay up */
481{ 481{
482 struct PStack *st = fi->userdata; 482 struct PStack *st = fi->userdata;
483 483
484 FsmChangeState(fi, ST_L3_LC_REL_DELAY); 484 FsmChangeState(fi, ST_L3_LC_REL_DELAY);
485 /* 19/09/00 - GE timer not user for NI-1 */ 485 /* 19/09/00 - GE timer not user for NI-1 */
486 if (st->protocol != ISDN_PTYPE_NI1) 486 if (st->protocol != ISDN_PTYPE_NI1)
487 FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50); 487 FsmAddTimer(&st->l3.l3m_timer, DREL_TIMER_VALUE, EV_TIMEOUT, NULL, 50);
488} 488}
489 489
490static void 490static void
@@ -536,9 +536,9 @@ static struct FsmNode L3FnList[] __initdata =
536 {ST_L3_LC_ESTAB_WAIT, EV_RELEASE_IND, lc_release_ind}, 536 {ST_L3_LC_ESTAB_WAIT, EV_RELEASE_IND, lc_release_ind},
537 {ST_L3_LC_ESTAB, EV_RELEASE_IND, lc_release_ind}, 537 {ST_L3_LC_ESTAB, EV_RELEASE_IND, lc_release_ind},
538 {ST_L3_LC_ESTAB, EV_RELEASE_REQ, lc_start_delay_check}, 538 {ST_L3_LC_ESTAB, EV_RELEASE_REQ, lc_start_delay_check},
539 {ST_L3_LC_REL_DELAY, EV_RELEASE_IND, lc_release_ind}, 539 {ST_L3_LC_REL_DELAY, EV_RELEASE_IND, lc_release_ind},
540 {ST_L3_LC_REL_DELAY, EV_ESTABLISH_REQ, lc_connected}, 540 {ST_L3_LC_REL_DELAY, EV_ESTABLISH_REQ, lc_connected},
541 {ST_L3_LC_REL_DELAY, EV_TIMEOUT, lc_release_req}, 541 {ST_L3_LC_REL_DELAY, EV_TIMEOUT, lc_release_req},
542 {ST_L3_LC_REL_WAIT, EV_RELEASE_CNF, lc_release_cnf}, 542 {ST_L3_LC_REL_WAIT, EV_RELEASE_CNF, lc_release_cnf},
543 {ST_L3_LC_REL_WAIT, EV_ESTABLISH_REQ, lc_activate}, 543 {ST_L3_LC_REL_WAIT, EV_ESTABLISH_REQ, lc_activate},
544}; 544};
@@ -548,34 +548,34 @@ void
548l3_msg(struct PStack *st, int pr, void *arg) 548l3_msg(struct PStack *st, int pr, void *arg)
549{ 549{
550 switch (pr) { 550 switch (pr) {
551 case (DL_DATA | REQUEST): 551 case (DL_DATA | REQUEST):
552 if (st->l3.l3m.state == ST_L3_LC_ESTAB) { 552 if (st->l3.l3m.state == ST_L3_LC_ESTAB) {
553 st->l3.l3l2(st, pr, arg); 553 st->l3.l3l2(st, pr, arg);
554 } else { 554 } else {
555 struct sk_buff *skb = arg; 555 struct sk_buff *skb = arg;
556 556
557 skb_queue_tail(&st->l3.squeue, skb); 557 skb_queue_tail(&st->l3.squeue, skb);
558 FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
559 }
560 break;
561 case (DL_ESTABLISH | REQUEST):
562 FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL); 558 FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
563 break; 559 }
564 case (DL_ESTABLISH | CONFIRM): 560 break;
565 FsmEvent(&st->l3.l3m, EV_ESTABLISH_CNF, NULL); 561 case (DL_ESTABLISH | REQUEST):
566 break; 562 FsmEvent(&st->l3.l3m, EV_ESTABLISH_REQ, NULL);
567 case (DL_ESTABLISH | INDICATION): 563 break;
568 FsmEvent(&st->l3.l3m, EV_ESTABLISH_IND, NULL); 564 case (DL_ESTABLISH | CONFIRM):
569 break; 565 FsmEvent(&st->l3.l3m, EV_ESTABLISH_CNF, NULL);
570 case (DL_RELEASE | INDICATION): 566 break;
571 FsmEvent(&st->l3.l3m, EV_RELEASE_IND, NULL); 567 case (DL_ESTABLISH | INDICATION):
572 break; 568 FsmEvent(&st->l3.l3m, EV_ESTABLISH_IND, NULL);
573 case (DL_RELEASE | CONFIRM): 569 break;
574 FsmEvent(&st->l3.l3m, EV_RELEASE_CNF, NULL); 570 case (DL_RELEASE | INDICATION):
575 break; 571 FsmEvent(&st->l3.l3m, EV_RELEASE_IND, NULL);
576 case (DL_RELEASE | REQUEST): 572 break;
577 FsmEvent(&st->l3.l3m, EV_RELEASE_REQ, NULL); 573 case (DL_RELEASE | CONFIRM):
578 break; 574 FsmEvent(&st->l3.l3m, EV_RELEASE_CNF, NULL);
575 break;
576 case (DL_RELEASE | REQUEST):
577 FsmEvent(&st->l3.l3m, EV_RELEASE_REQ, NULL);
578 break;
579 } 579 }
580} 580}
581 581
diff --git a/drivers/isdn/hisax/isdnl3.h b/drivers/isdn/hisax/isdnl3.h
index 749498fe6c4b..0edc99d40dc2 100644
--- a/drivers/isdn/hisax/isdnl3.h
+++ b/drivers/isdn/hisax/isdnl3.h
@@ -5,7 +5,7 @@
5 * 5 *
6 */ 6 */
7 7
8#define SBIT(state) (1<<state) 8#define SBIT(state) (1 << state)
9#define ALL_STATES 0x03ffffff 9#define ALL_STATES 0x03ffffff
10 10
11#define PROTO_DIS_EURO 0x08 11#define PROTO_DIS_EURO 0x08
@@ -40,4 +40,3 @@ void l3_msg(struct PStack *st, int pr, void *arg);
40void setstack_dss1(struct PStack *st); 40void setstack_dss1(struct PStack *st);
41void setstack_ni1(struct PStack *st); 41void setstack_ni1(struct PStack *st);
42void setstack_1tr6(struct PStack *st); 42void setstack_1tr6(struct PStack *st);
43
diff --git a/drivers/isdn/hisax/isurf.c b/drivers/isdn/hisax/isurf.c
index ca4161798cdf..ea2717215296 100644
--- a/drivers/isdn/hisax/isurf.c
+++ b/drivers/isdn/hisax/isurf.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -19,7 +19,7 @@
19 19
20static const char *ISurf_revision = "$Revision: 1.12.2.4 $"; 20static const char *ISurf_revision = "$Revision: 1.12.2.4 $";
21 21
22#define byteout(addr,val) outb(val,addr) 22#define byteout(addr, val) outb(val, addr)
23#define bytein(addr) inb(addr) 23#define bytein(addr) inb(addr)
24 24
25#define ISURF_ISAR_RESET 1 25#define ISURF_ISAR_RESET 1
@@ -46,7 +46,7 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
46} 46}
47 47
48static void 48static void
49ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 49ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
50{ 50{
51 register int i; 51 register int i;
52 for (i = 0; i < size; i++) 52 for (i = 0; i < size; i++)
@@ -54,11 +54,11 @@ ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
54} 54}
55 55
56static void 56static void
57WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 57WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
58{ 58{
59 register int i; 59 register int i;
60 for (i = 0; i < size; i++){ 60 for (i = 0; i < size; i++) {
61 writeb(data[i], cs->hw.isurf.isac);mb(); 61 writeb(data[i], cs->hw.isurf.isac); mb();
62 } 62 }
63} 63}
64 64
@@ -67,17 +67,17 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
67 * mode = 1 access with IRQ off 67 * mode = 1 access with IRQ off
68 * mode = 2 access with IRQ off and using last offset 68 * mode = 2 access with IRQ off and using last offset
69 */ 69 */
70 70
71static u_char 71static u_char
72ReadISAR(struct IsdnCardState *cs, int mode, u_char offset) 72ReadISAR(struct IsdnCardState *cs, int mode, u_char offset)
73{ 73{
74 return(readb(cs->hw.isurf.isar + offset)); 74 return (readb(cs->hw.isurf.isar + offset));
75} 75}
76 76
77static void 77static void
78WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value) 78WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value)
79{ 79{
80 writeb(value, cs->hw.isurf.isar + offset);mb(); 80 writeb(value, cs->hw.isurf.isar + offset); mb();
81} 81}
82 82
83static irqreturn_t 83static irqreturn_t
@@ -90,11 +90,11 @@ isurf_interrupt(int intno, void *dev_id)
90 90
91 spin_lock_irqsave(&cs->lock, flags); 91 spin_lock_irqsave(&cs->lock, flags);
92 val = readb(cs->hw.isurf.isar + ISAR_IRQBIT); 92 val = readb(cs->hw.isurf.isar + ISAR_IRQBIT);
93 Start_ISAR: 93Start_ISAR:
94 if (val & ISAR_IRQSTA) 94 if (val & ISAR_IRQSTA)
95 isar_int_main(cs); 95 isar_int_main(cs);
96 val = readb(cs->hw.isurf.isac + ISAC_ISTA); 96 val = readb(cs->hw.isurf.isac + ISAC_ISTA);
97 Start_ISAC: 97Start_ISAC:
98 if (val) 98 if (val)
99 isac_interrupt(cs, val); 99 isac_interrupt(cs, val);
100 val = readb(cs->hw.isurf.isar + ISAR_IRQBIT); 100 val = readb(cs->hw.isurf.isar + ISAR_IRQBIT);
@@ -113,8 +113,8 @@ isurf_interrupt(int intno, void *dev_id)
113 printk(KERN_WARNING "ISurf IRQ LOOP\n"); 113 printk(KERN_WARNING "ISurf IRQ LOOP\n");
114 114
115 writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb(); 115 writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
116 writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK);mb(); 116 writeb(0xFF, cs->hw.isurf.isac + ISAC_MASK); mb();
117 writeb(0, cs->hw.isurf.isac + ISAC_MASK);mb(); 117 writeb(0, cs->hw.isurf.isac + ISAC_MASK); mb();
118 writeb(ISAR_IRQMSK, cs->hw.isurf.isar + ISAR_IRQBIT); mb(); 118 writeb(ISAR_IRQMSK, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
119 spin_unlock_irqrestore(&cs->lock, flags); 119 spin_unlock_irqrestore(&cs->lock, flags);
120 return IRQ_HANDLED; 120 return IRQ_HANDLED;
@@ -145,31 +145,31 @@ ISurf_card_msg(struct IsdnCardState *cs, int mt, void *arg)
145 u_long flags; 145 u_long flags;
146 146
147 switch (mt) { 147 switch (mt) {
148 case CARD_RESET: 148 case CARD_RESET:
149 spin_lock_irqsave(&cs->lock, flags); 149 spin_lock_irqsave(&cs->lock, flags);
150 reset_isurf(cs, ISURF_RESET); 150 reset_isurf(cs, ISURF_RESET);
151 spin_unlock_irqrestore(&cs->lock, flags); 151 spin_unlock_irqrestore(&cs->lock, flags);
152 return(0); 152 return (0);
153 case CARD_RELEASE: 153 case CARD_RELEASE:
154 release_io_isurf(cs); 154 release_io_isurf(cs);
155 return(0); 155 return (0);
156 case CARD_INIT: 156 case CARD_INIT:
157 spin_lock_irqsave(&cs->lock, flags); 157 spin_lock_irqsave(&cs->lock, flags);
158 reset_isurf(cs, ISURF_RESET); 158 reset_isurf(cs, ISURF_RESET);
159 clear_pending_isac_ints(cs); 159 clear_pending_isac_ints(cs);
160 writeb(0, cs->hw.isurf.isar+ISAR_IRQBIT);mb(); 160 writeb(0, cs->hw.isurf.isar + ISAR_IRQBIT); mb();
161 initisac(cs); 161 initisac(cs);
162 initisar(cs); 162 initisar(cs);
163 /* Reenable ISAC IRQ */ 163 /* Reenable ISAC IRQ */
164 cs->writeisac(cs, ISAC_MASK, 0); 164 cs->writeisac(cs, ISAC_MASK, 0);
165 /* RESET Receiver and Transmitter */ 165 /* RESET Receiver and Transmitter */
166 cs->writeisac(cs, ISAC_CMDR, 0x41); 166 cs->writeisac(cs, ISAC_CMDR, 0x41);
167 spin_unlock_irqrestore(&cs->lock, flags); 167 spin_unlock_irqrestore(&cs->lock, flags);
168 return(0); 168 return (0);
169 case CARD_TEST: 169 case CARD_TEST:
170 return(0); 170 return (0);
171 } 171 }
172 return(0); 172 return (0);
173} 173}
174 174
175static int 175static int
@@ -182,15 +182,15 @@ isurf_auxcmd(struct IsdnCardState *cs, isdn_ctrl *ic) {
182 spin_lock_irqsave(&cs->lock, flags); 182 spin_lock_irqsave(&cs->lock, flags);
183 if (!ret) { 183 if (!ret) {
184 reset_isurf(cs, ISURF_ISAR_EA | ISURF_ISAC_RESET | 184 reset_isurf(cs, ISURF_ISAR_EA | ISURF_ISAC_RESET |
185 ISURF_ARCOFI_RESET); 185 ISURF_ARCOFI_RESET);
186 initisac(cs); 186 initisac(cs);
187 cs->writeisac(cs, ISAC_MASK, 0); 187 cs->writeisac(cs, ISAC_MASK, 0);
188 cs->writeisac(cs, ISAC_CMDR, 0x41); 188 cs->writeisac(cs, ISAC_CMDR, 0x41);
189 } 189 }
190 spin_unlock_irqrestore(&cs->lock, flags); 190 spin_unlock_irqrestore(&cs->lock, flags);
191 return(ret); 191 return (ret);
192 } 192 }
193 return(isar_auxcmd(cs, ic)); 193 return (isar_auxcmd(cs, ic));
194} 194}
195 195
196#ifdef __ISAPNP__ 196#ifdef __ISAPNP__
@@ -206,9 +206,9 @@ setup_isurf(struct IsdnCard *card)
206 206
207 strcpy(tmp, ISurf_revision); 207 strcpy(tmp, ISurf_revision);
208 printk(KERN_INFO "HiSax: ISurf driver Rev. %s\n", HiSax_getrev(tmp)); 208 printk(KERN_INFO "HiSax: ISurf driver Rev. %s\n", HiSax_getrev(tmp));
209 209
210 if (cs->typ != ISDN_CTYPE_ISURF) 210 if (cs->typ != ISDN_CTYPE_ISURF)
211 return(0); 211 return (0);
212 if (card->para[1] && card->para[2]) { 212 if (card->para[1] && card->para[2]) {
213 cs->hw.isurf.reset = card->para[1]; 213 cs->hw.isurf.reset = card->para[1];
214 cs->hw.isurf.phymem = card->para[2]; 214 cs->hw.isurf.phymem = card->para[2];
@@ -221,11 +221,11 @@ setup_isurf(struct IsdnCard *card)
221 221
222 cs->subtyp = 0; 222 cs->subtyp = 0;
223 if ((pnp_c = pnp_find_card( 223 if ((pnp_c = pnp_find_card(
224 ISAPNP_VENDOR('S', 'I', 'E'), 224 ISAPNP_VENDOR('S', 'I', 'E'),
225 ISAPNP_FUNCTION(0x0010), pnp_c))) { 225 ISAPNP_FUNCTION(0x0010), pnp_c))) {
226 if (!(pnp_d = pnp_find_dev(pnp_c, 226 if (!(pnp_d = pnp_find_dev(pnp_c,
227 ISAPNP_VENDOR('S', 'I', 'E'), 227 ISAPNP_VENDOR('S', 'I', 'E'),
228 ISAPNP_FUNCTION(0x0010), pnp_d))) { 228 ISAPNP_FUNCTION(0x0010), pnp_d))) {
229 printk(KERN_ERR "ISurfPnP: PnP error card found, no device\n"); 229 printk(KERN_ERR "ISurfPnP: PnP error card found, no device\n");
230 return (0); 230 return (0);
231 } 231 }
@@ -236,17 +236,17 @@ setup_isurf(struct IsdnCard *card)
236 cs->irq = pnp_irq(pnp_d, 0); 236 cs->irq = pnp_irq(pnp_d, 0);
237 if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) { 237 if (!cs->irq || !cs->hw.isurf.reset || !cs->hw.isurf.phymem) {
238 printk(KERN_ERR "ISurfPnP:some resources are missing %d/%x/%lx\n", 238 printk(KERN_ERR "ISurfPnP:some resources are missing %d/%x/%lx\n",
239 cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem); 239 cs->irq, cs->hw.isurf.reset, cs->hw.isurf.phymem);
240 pnp_disable_dev(pnp_d); 240 pnp_disable_dev(pnp_d);
241 return(0); 241 return (0);
242 } 242 }
243 } else { 243 } else {
244 printk(KERN_INFO "ISurfPnP: no ISAPnP card found\n"); 244 printk(KERN_INFO "ISurfPnP: no ISAPnP card found\n");
245 return(0); 245 return (0);
246 } 246 }
247 } else { 247 } else {
248 printk(KERN_INFO "ISurfPnP: no ISAPnP bus found\n"); 248 printk(KERN_INFO "ISurfPnP: no ISAPnP bus found\n");
249 return(0); 249 return (0);
250 } 250 }
251#else 251#else
252 printk(KERN_WARNING "HiSax: Siemens I-Surf port/mem not set\n"); 252 printk(KERN_WARNING "HiSax: Siemens I-Surf port/mem not set\n");
@@ -255,15 +255,15 @@ setup_isurf(struct IsdnCard *card)
255 } 255 }
256 if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) { 256 if (!request_region(cs->hw.isurf.reset, 1, "isurf isdn")) {
257 printk(KERN_WARNING 257 printk(KERN_WARNING
258 "HiSax: Siemens I-Surf config port %x already in use\n", 258 "HiSax: Siemens I-Surf config port %x already in use\n",
259 cs->hw.isurf.reset); 259 cs->hw.isurf.reset);
260 return (0); 260 return (0);
261 } 261 }
262 if (!request_region(cs->hw.isurf.phymem, ISURF_IOMEM_SIZE, "isurf iomem")) { 262 if (!request_region(cs->hw.isurf.phymem, ISURF_IOMEM_SIZE, "isurf iomem")) {
263 printk(KERN_WARNING "HiSax: Siemens I-Surf memory region " 263 printk(KERN_WARNING "HiSax: Siemens I-Surf memory region "
264 "%lx-%lx already in use\n", 264 "%lx-%lx already in use\n",
265 cs->hw.isurf.phymem, 265 cs->hw.isurf.phymem,
266 cs->hw.isurf.phymem + ISURF_IOMEM_SIZE); 266 cs->hw.isurf.phymem + ISURF_IOMEM_SIZE);
267 release_region(cs->hw.isurf.reset, 1); 267 release_region(cs->hw.isurf.reset, 1);
268 return (0); 268 return (0);
269 } 269 }
@@ -293,7 +293,7 @@ setup_isurf(struct IsdnCard *card)
293 ver = ISARVersion(cs, "ISurf:"); 293 ver = ISARVersion(cs, "ISurf:");
294 if (ver < 0) { 294 if (ver < 0) {
295 printk(KERN_WARNING 295 printk(KERN_WARNING
296 "ISurf: wrong ISAR version (ret = %d)\n", ver); 296 "ISurf: wrong ISAR version (ret = %d)\n", ver);
297 release_io_isurf(cs); 297 release_io_isurf(cs);
298 return (0); 298 return (0);
299 } 299 }
diff --git a/drivers/isdn/hisax/ix1_micro.c b/drivers/isdn/hisax/ix1_micro.c
index a92bf0d2cab2..5f299f82b801 100644
--- a/drivers/isdn/hisax/ix1_micro.c
+++ b/drivers/isdn/hisax/ix1_micro.c
@@ -7,7 +7,7 @@
7 * Copyright by Klaus-Peter Nischke, ITK AG 7 * Copyright by Klaus-Peter Nischke, ITK AG
8 * <klaus@nischke.do.eunet.de> 8 * <klaus@nischke.do.eunet.de>
9 * by Karsten Keil <keil@isdn4linux.de> 9 * by Karsten Keil <keil@isdn4linux.de>
10 * 10 *
11 * This software may be used and distributed according to the terms 11 * This software may be used and distributed according to the terms
12 * of the GNU General Public License, incorporated herein by reference. 12 * of the GNU General Public License, incorporated herein by reference.
13 * 13 *
@@ -26,7 +26,7 @@
26 26
27static const char *ix1_revision = "$Revision: 2.12.2.4 $"; 27static const char *ix1_revision = "$Revision: 2.12.2.4 $";
28 28
29#define byteout(addr,val) outb(val,addr) 29#define byteout(addr, val) outb(val, addr)
30#define bytein(addr) inb(addr) 30#define bytein(addr) inb(addr)
31 31
32#define SPECIAL_PORT_OFFSET 3 32#define SPECIAL_PORT_OFFSET 3
@@ -49,7 +49,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
49} 49}
50 50
51static inline void 51static inline void
52readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 52readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
53{ 53{
54 byteout(ale, off); 54 byteout(ale, off);
55 insb(adr, data, size); 55 insb(adr, data, size);
@@ -64,7 +64,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
64} 64}
65 65
66static inline void 66static inline void
67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 67writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
68{ 68{
69 byteout(ale, off); 69 byteout(ale, off);
70 outsb(adr, data, size); 70 outsb(adr, data, size);
@@ -85,13 +85,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
85} 85}
86 86
87static void 87static void
88ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 88ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
89{ 89{
90 readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size); 90 readfifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
91} 91}
92 92
93static void 93static void
94WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 94WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
95{ 95{
96 writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size); 96 writefifo(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, 0, data, size);
97} 97}
@@ -110,16 +110,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
110 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value); 110 cs->hw.ix1.hscx, offset + (hscx ? 0x40 : 0), value);
111} 111}
112 112
113#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \ 113#define READHSCX(cs, nr, reg) readreg(cs->hw.ix1.hscx_ale, \
114 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0)) 114 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0))
115#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \ 115#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.ix1.hscx_ale, \
116 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data) 116 cs->hw.ix1.hscx, reg + (nr ? 0x40 : 0), data)
117 117
118#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \ 118#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.ix1.hscx_ale, \
119 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt) 119 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
120 120
121#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \ 121#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.ix1.hscx_ale, \
122 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt) 122 cs->hw.ix1.hscx, (nr ? 0x40 : 0), ptr, cnt)
123 123
124#include "hscx_irq.c" 124#include "hscx_irq.c"
125 125
@@ -132,11 +132,11 @@ ix1micro_interrupt(int intno, void *dev_id)
132 132
133 spin_lock_irqsave(&cs->lock, flags); 133 spin_lock_irqsave(&cs->lock, flags);
134 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); 134 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
135 Start_HSCX: 135Start_HSCX:
136 if (val) 136 if (val)
137 hscx_int_main(cs, val); 137 hscx_int_main(cs, val);
138 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA); 138 val = readreg(cs->hw.ix1.isac_ale, cs->hw.ix1.isac, ISAC_ISTA);
139 Start_ISAC: 139Start_ISAC:
140 if (val) 140 if (val)
141 isac_interrupt(cs, val); 141 isac_interrupt(cs, val);
142 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40); 142 val = readreg(cs->hw.ix1.hscx_ale, cs->hw.ix1.hscx, HSCX_ISTA + 0x40);
@@ -188,33 +188,33 @@ ix1_card_msg(struct IsdnCardState *cs, int mt, void *arg)
188 u_long flags; 188 u_long flags;
189 189
190 switch (mt) { 190 switch (mt) {
191 case CARD_RESET: 191 case CARD_RESET:
192 spin_lock_irqsave(&cs->lock, flags); 192 spin_lock_irqsave(&cs->lock, flags);
193 ix1_reset(cs); 193 ix1_reset(cs);
194 spin_unlock_irqrestore(&cs->lock, flags); 194 spin_unlock_irqrestore(&cs->lock, flags);
195 return(0); 195 return (0);
196 case CARD_RELEASE: 196 case CARD_RELEASE:
197 release_io_ix1micro(cs); 197 release_io_ix1micro(cs);
198 return(0); 198 return (0);
199 case CARD_INIT: 199 case CARD_INIT:
200 spin_lock_irqsave(&cs->lock, flags); 200 spin_lock_irqsave(&cs->lock, flags);
201 ix1_reset(cs); 201 ix1_reset(cs);
202 inithscxisac(cs, 3); 202 inithscxisac(cs, 3);
203 spin_unlock_irqrestore(&cs->lock, flags); 203 spin_unlock_irqrestore(&cs->lock, flags);
204 return(0); 204 return (0);
205 case CARD_TEST: 205 case CARD_TEST:
206 return(0); 206 return (0);
207 } 207 }
208 return(0); 208 return (0);
209} 209}
210 210
211#ifdef __ISAPNP__ 211#ifdef __ISAPNP__
212static struct isapnp_device_id itk_ids[] __devinitdata = { 212static struct isapnp_device_id itk_ids[] __devinitdata = {
213 { ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25), 213 { ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25),
214 ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25), 214 ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x25),
215 (unsigned long) "ITK micro 2" }, 215 (unsigned long) "ITK micro 2" },
216 { ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29), 216 { ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29),
217 ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29), 217 ISAPNP_VENDOR('I', 'T', 'K'), ISAPNP_FUNCTION(0x29),
218 (unsigned long) "ITK micro 2." }, 218 (unsigned long) "ITK micro 2." },
219 { 0, } 219 { 0, }
220}; 220};
@@ -238,30 +238,30 @@ setup_ix1micro(struct IsdnCard *card)
238#ifdef __ISAPNP__ 238#ifdef __ISAPNP__
239 if (!card->para[1] && isapnp_present()) { 239 if (!card->para[1] && isapnp_present()) {
240 struct pnp_dev *pnp_d; 240 struct pnp_dev *pnp_d;
241 while(ipid->card_vendor) { 241 while (ipid->card_vendor) {
242 if ((pnp_c = pnp_find_card(ipid->card_vendor, 242 if ((pnp_c = pnp_find_card(ipid->card_vendor,
243 ipid->card_device, pnp_c))) { 243 ipid->card_device, pnp_c))) {
244 pnp_d = NULL; 244 pnp_d = NULL;
245 if ((pnp_d = pnp_find_dev(pnp_c, 245 if ((pnp_d = pnp_find_dev(pnp_c,
246 ipid->vendor, ipid->function, pnp_d))) { 246 ipid->vendor, ipid->function, pnp_d))) {
247 int err; 247 int err;
248 248
249 printk(KERN_INFO "HiSax: %s detected\n", 249 printk(KERN_INFO "HiSax: %s detected\n",
250 (char *)ipid->driver_data); 250 (char *)ipid->driver_data);
251 pnp_disable_dev(pnp_d); 251 pnp_disable_dev(pnp_d);
252 err = pnp_activate_dev(pnp_d); 252 err = pnp_activate_dev(pnp_d);
253 if (err<0) { 253 if (err < 0) {
254 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 254 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
255 __func__, err); 255 __func__, err);
256 return(0); 256 return (0);
257 } 257 }
258 card->para[1] = pnp_port_start(pnp_d, 0); 258 card->para[1] = pnp_port_start(pnp_d, 0);
259 card->para[0] = pnp_irq(pnp_d, 0); 259 card->para[0] = pnp_irq(pnp_d, 0);
260 if (!card->para[0] || !card->para[1]) { 260 if (!card->para[0] || !card->para[1]) {
261 printk(KERN_ERR "ITK PnP:some resources are missing %ld/%lx\n", 261 printk(KERN_ERR "ITK PnP:some resources are missing %ld/%lx\n",
262 card->para[0], card->para[1]); 262 card->para[0], card->para[1]);
263 pnp_disable_dev(pnp_d); 263 pnp_disable_dev(pnp_d);
264 return(0); 264 return (0);
265 } 265 }
266 break; 266 break;
267 } else { 267 } else {
@@ -270,10 +270,10 @@ setup_ix1micro(struct IsdnCard *card)
270 } 270 }
271 ipid++; 271 ipid++;
272 pnp_c = NULL; 272 pnp_c = NULL;
273 } 273 }
274 if (!ipid->card_vendor) { 274 if (!ipid->card_vendor) {
275 printk(KERN_INFO "ITK PnP: no ISAPnP card found\n"); 275 printk(KERN_INFO "ITK PnP: no ISAPnP card found\n");
276 return(0); 276 return (0);
277 } 277 }
278 } 278 }
279#endif 279#endif
@@ -287,15 +287,15 @@ setup_ix1micro(struct IsdnCard *card)
287 if (cs->hw.ix1.cfg_reg) { 287 if (cs->hw.ix1.cfg_reg) {
288 if (!request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg")) { 288 if (!request_region(cs->hw.ix1.cfg_reg, 4, "ix1micro cfg")) {
289 printk(KERN_WARNING 289 printk(KERN_WARNING
290 "HiSax: ITK ix1-micro Rev.2 config port " 290 "HiSax: ITK ix1-micro Rev.2 config port "
291 "%x-%x already in use\n", 291 "%x-%x already in use\n",
292 cs->hw.ix1.cfg_reg, 292 cs->hw.ix1.cfg_reg,
293 cs->hw.ix1.cfg_reg + 4); 293 cs->hw.ix1.cfg_reg + 4);
294 return (0); 294 return (0);
295 } 295 }
296 } 296 }
297 printk(KERN_INFO "HiSax: ITK ix1-micro Rev.2 config irq:%d io:0x%X\n", 297 printk(KERN_INFO "HiSax: ITK ix1-micro Rev.2 config irq:%d io:0x%X\n",
298 cs->irq, cs->hw.ix1.cfg_reg); 298 cs->irq, cs->hw.ix1.cfg_reg);
299 setup_isac(cs); 299 setup_isac(cs);
300 cs->readisac = &ReadISAC; 300 cs->readisac = &ReadISAC;
301 cs->writeisac = &WriteISAC; 301 cs->writeisac = &WriteISAC;
@@ -309,7 +309,7 @@ setup_ix1micro(struct IsdnCard *card)
309 ISACVersion(cs, "ix1-Micro:"); 309 ISACVersion(cs, "ix1-Micro:");
310 if (HscxVersion(cs, "ix1-Micro:")) { 310 if (HscxVersion(cs, "ix1-Micro:")) {
311 printk(KERN_WARNING 311 printk(KERN_WARNING
312 "ix1-Micro: wrong HSCX versions check IO address\n"); 312 "ix1-Micro: wrong HSCX versions check IO address\n");
313 release_io_ix1micro(cs); 313 release_io_ix1micro(cs);
314 return (0); 314 return (0);
315 } 315 }
diff --git a/drivers/isdn/hisax/jade.c b/drivers/isdn/hisax/jade.c
index a06cea09158b..f946c58d8ab1 100644
--- a/drivers/isdn/hisax/jade.c
+++ b/drivers/isdn/hisax/jade.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -23,53 +23,53 @@
23int 23int
24JadeVersion(struct IsdnCardState *cs, char *s) 24JadeVersion(struct IsdnCardState *cs, char *s)
25{ 25{
26 int ver; 26 int ver;
27 int to = 50; 27 int to = 50;
28 cs->BC_Write_Reg(cs, -1, 0x50, 0x19); 28 cs->BC_Write_Reg(cs, -1, 0x50, 0x19);
29 while (to) { 29 while (to) {
30 udelay(1); 30 udelay(1);
31 ver = cs->BC_Read_Reg(cs, -1, 0x60);
32 to--;
33 if (ver)
34 break;
35 if (!to) {
36 printk(KERN_INFO "%s JADE version not obtainable\n", s);
37 return (0);
38 }
39 }
40 /* Wait for the JADE */
41 udelay(10);
42 /* Read version */
31 ver = cs->BC_Read_Reg(cs, -1, 0x60); 43 ver = cs->BC_Read_Reg(cs, -1, 0x60);
32 to--; 44 printk(KERN_INFO "%s JADE version: %d\n", s, ver);
33 if (ver) 45 return (1);
34 break;
35 if (!to) {
36 printk(KERN_INFO "%s JADE version not obtainable\n", s);
37 return (0);
38 }
39 }
40 /* Wait for the JADE */
41 udelay(10);
42 /* Read version */
43 ver = cs->BC_Read_Reg(cs, -1, 0x60);
44 printk(KERN_INFO "%s JADE version: %d\n", s, ver);
45 return (1);
46} 46}
47 47
48/* Write to indirect accessible jade register set */ 48/* Write to indirect accessible jade register set */
49static void 49static void
50jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value) 50jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value)
51{ 51{
52 int to = 50; 52 int to = 50;
53 u_char ret; 53 u_char ret;
54 54
55 /* Write the data */ 55 /* Write the data */
56 cs->BC_Write_Reg(cs, -1, COMM_JADE+1, value); 56 cs->BC_Write_Reg(cs, -1, COMM_JADE + 1, value);
57 /* Say JADE we wanna write indirect reg 'reg' */ 57 /* Say JADE we wanna write indirect reg 'reg' */
58 cs->BC_Write_Reg(cs, -1, COMM_JADE, reg); 58 cs->BC_Write_Reg(cs, -1, COMM_JADE, reg);
59 to = 50; 59 to = 50;
60 /* Wait for RDY goes high */ 60 /* Wait for RDY goes high */
61 while (to) { 61 while (to) {
62 udelay(1); 62 udelay(1);
63 ret = cs->BC_Read_Reg(cs, -1, COMM_JADE); 63 ret = cs->BC_Read_Reg(cs, -1, COMM_JADE);
64 to--; 64 to--;
65 if (ret & 1) 65 if (ret & 1)
66 /* Got acknowledge */ 66 /* Got acknowledge */
67 break; 67 break;
68 if (!to) { 68 if (!to) {
69 printk(KERN_INFO "Can not see ready bit from JADE DSP (reg=0x%X, value=0x%X)\n", reg, value); 69 printk(KERN_INFO "Can not see ready bit from JADE DSP (reg=0x%X, value=0x%X)\n", reg, value);
70 return; 70 return;
71 }
71 } 72 }
72 }
73} 73}
74 74
75 75
@@ -77,67 +77,67 @@ jade_write_indirect(struct IsdnCardState *cs, u_char reg, u_char value)
77static void 77static void
78modejade(struct BCState *bcs, int mode, int bc) 78modejade(struct BCState *bcs, int mode, int bc)
79{ 79{
80 struct IsdnCardState *cs = bcs->cs; 80 struct IsdnCardState *cs = bcs->cs;
81 int jade = bcs->hw.hscx.hscx; 81 int jade = bcs->hw.hscx.hscx;
82 82
83 if (cs->debug & L1_DEB_HSCX) { 83 if (cs->debug & L1_DEB_HSCX) {
84 char tmp[40]; 84 char tmp[40];
85 sprintf(tmp, "jade %c mode %d ichan %d", 85 sprintf(tmp, "jade %c mode %d ichan %d",
86 'A' + jade, mode, bc); 86 'A' + jade, mode, bc);
87 debugl1(cs, tmp); 87 debugl1(cs, tmp);
88 } 88 }
89 bcs->mode = mode; 89 bcs->mode = mode;
90 bcs->channel = bc; 90 bcs->channel = bc;
91
92 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO:0x00));
93 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU|jadeCCR0_ITF));
94 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00);
95 91
96 jade_write_indirect(cs, jade_HDLC1SERRXPATH, 0x08); 92 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (mode == L1_MODE_TRANS ? jadeMODE_TMO : 0x00));
97 jade_write_indirect(cs, jade_HDLC2SERRXPATH, 0x08); 93 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR0, (jadeCCR0_PU | jadeCCR0_ITF));
98 jade_write_indirect(cs, jade_HDLC1SERTXPATH, 0x00); 94 cs->BC_Write_Reg(cs, jade, jade_HDLC_CCR1, 0x00);
99 jade_write_indirect(cs, jade_HDLC2SERTXPATH, 0x00);
100 95
101 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07); 96 jade_write_indirect(cs, jade_HDLC1SERRXPATH, 0x08);
102 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07); 97 jade_write_indirect(cs, jade_HDLC2SERRXPATH, 0x08);
98 jade_write_indirect(cs, jade_HDLC1SERTXPATH, 0x00);
99 jade_write_indirect(cs, jade_HDLC2SERTXPATH, 0x00);
103 100
104 if (bc == 0) { 101 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCCR, 0x07);
105 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00); 102 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCCR, 0x07);
106 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00); 103
107 } else { 104 if (bc == 0) {
108 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04); 105 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x00);
109 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04); 106 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x00);
110 } 107 } else {
111 switch (mode) { 108 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAX, 0x04);
109 cs->BC_Write_Reg(cs, jade, jade_HDLC_TSAR, 0x04);
110 }
111 switch (mode) {
112 case (L1_MODE_NULL): 112 case (L1_MODE_NULL):
113 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, jadeMODE_TMO); 113 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, jadeMODE_TMO);
114 break; 114 break;
115 case (L1_MODE_TRANS): 115 case (L1_MODE_TRANS):
116 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO|jadeMODE_RAC|jadeMODE_XAC)); 116 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_TMO | jadeMODE_RAC | jadeMODE_XAC));
117 break; 117 break;
118 case (L1_MODE_HDLC): 118 case (L1_MODE_HDLC):
119 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC|jadeMODE_XAC)); 119 cs->BC_Write_Reg(cs, jade, jade_HDLC_MODE, (jadeMODE_RAC | jadeMODE_XAC));
120 break; 120 break;
121 } 121 }
122 if (mode) { 122 if (mode) {
123 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES|jadeRCMD_RMC)); 123 cs->BC_Write_Reg(cs, jade, jade_HDLC_RCMD, (jadeRCMD_RRES | jadeRCMD_RMC));
124 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES); 124 cs->BC_Write_Reg(cs, jade, jade_HDLC_XCMD, jadeXCMD_XRES);
125 /* Unmask ints */ 125 /* Unmask ints */
126 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8); 126 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0xF8);
127 } 127 }
128 else 128 else
129 /* Mask ints */ 129 /* Mask ints */
130 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00); 130 cs->BC_Write_Reg(cs, jade, jade_HDLC_IMR, 0x00);
131} 131}
132 132
133static void 133static void
134jade_l2l1(struct PStack *st, int pr, void *arg) 134jade_l2l1(struct PStack *st, int pr, void *arg)
135{ 135{
136 struct BCState *bcs = st->l1.bcs; 136 struct BCState *bcs = st->l1.bcs;
137 struct sk_buff *skb = arg; 137 struct sk_buff *skb = arg;
138 u_long flags; 138 u_long flags;
139 139
140 switch (pr) { 140 switch (pr) {
141 case (PH_DATA | REQUEST): 141 case (PH_DATA | REQUEST):
142 spin_lock_irqsave(&bcs->cs->lock, flags); 142 spin_lock_irqsave(&bcs->cs->lock, flags);
143 if (bcs->tx_skb) { 143 if (bcs->tx_skb) {
@@ -164,10 +164,10 @@ jade_l2l1(struct PStack *st, int pr, void *arg)
164 break; 164 break;
165 case (PH_PULL | REQUEST): 165 case (PH_PULL | REQUEST):
166 if (!bcs->tx_skb) { 166 if (!bcs->tx_skb) {
167 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 167 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
168 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 168 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
169 } else 169 } else
170 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 170 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
171 break; 171 break;
172 case (PH_ACTIVATE | REQUEST): 172 case (PH_ACTIVATE | REQUEST):
173 spin_lock_irqsave(&bcs->cs->lock, flags); 173 spin_lock_irqsave(&bcs->cs->lock, flags);
@@ -187,26 +187,26 @@ jade_l2l1(struct PStack *st, int pr, void *arg)
187 spin_unlock_irqrestore(&bcs->cs->lock, flags); 187 spin_unlock_irqrestore(&bcs->cs->lock, flags);
188 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 188 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
189 break; 189 break;
190 } 190 }
191} 191}
192 192
193static void 193static void
194close_jadestate(struct BCState *bcs) 194close_jadestate(struct BCState *bcs)
195{ 195{
196 modejade(bcs, 0, bcs->channel); 196 modejade(bcs, 0, bcs->channel);
197 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) { 197 if (test_and_clear_bit(BC_FLG_INIT, &bcs->Flag)) {
198 kfree(bcs->hw.hscx.rcvbuf); 198 kfree(bcs->hw.hscx.rcvbuf);
199 bcs->hw.hscx.rcvbuf = NULL; 199 bcs->hw.hscx.rcvbuf = NULL;
200 kfree(bcs->blog); 200 kfree(bcs->blog);
201 bcs->blog = NULL; 201 bcs->blog = NULL;
202 skb_queue_purge(&bcs->rqueue); 202 skb_queue_purge(&bcs->rqueue);
203 skb_queue_purge(&bcs->squeue); 203 skb_queue_purge(&bcs->squeue);
204 if (bcs->tx_skb) { 204 if (bcs->tx_skb) {
205 dev_kfree_skb_any(bcs->tx_skb); 205 dev_kfree_skb_any(bcs->tx_skb);
206 bcs->tx_skb = NULL; 206 bcs->tx_skb = NULL;
207 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 207 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
208 }
208 } 209 }
209 }
210} 210}
211 211
212static int 212static int
@@ -221,7 +221,7 @@ open_jadestate(struct IsdnCardState *cs, struct BCState *bcs)
221 } 221 }
222 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) { 222 if (!(bcs->blog = kmalloc(MAX_BLOG_SPACE, GFP_ATOMIC))) {
223 printk(KERN_WARNING 223 printk(KERN_WARNING
224 "HiSax: No memory for bcs->blog\n"); 224 "HiSax: No memory for bcs->blog\n");
225 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag); 225 test_and_clear_bit(BC_FLG_INIT, &bcs->Flag);
226 kfree(bcs->hw.hscx.rcvbuf); 226 kfree(bcs->hw.hscx.rcvbuf);
227 bcs->hw.hscx.rcvbuf = NULL; 227 bcs->hw.hscx.rcvbuf = NULL;
@@ -303,12 +303,11 @@ initjade(struct IsdnCardState *cs)
303 cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0x00); 303 cs->BC_Write_Reg(cs, 0, jade_HDLC_IMR, 0x00);
304 cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0x00); 304 cs->BC_Write_Reg(cs, 1, jade_HDLC_IMR, 0x00);
305 /* Setup host access to hdlc controller */ 305 /* Setup host access to hdlc controller */
306 jade_write_indirect(cs, jade_HDLCCNTRACCESS, (jadeINDIRECT_HAH1|jadeINDIRECT_HAH2)); 306 jade_write_indirect(cs, jade_HDLCCNTRACCESS, (jadeINDIRECT_HAH1 | jadeINDIRECT_HAH2));
307 /* Unmask HDLC int (don't forget DSP int later on)*/ 307 /* Unmask HDLC int (don't forget DSP int later on)*/
308 cs->BC_Write_Reg(cs, -1,jade_INT, (jadeINT_HDLC1|jadeINT_HDLC2)); 308 cs->BC_Write_Reg(cs, -1, jade_INT, (jadeINT_HDLC1 | jadeINT_HDLC2));
309 309
310 /* once again TRANSPARENT */ 310 /* once again TRANSPARENT */
311 modejade(cs->bcs, 0, 0); 311 modejade(cs->bcs, 0, 0);
312 modejade(cs->bcs + 1, 0, 0); 312 modejade(cs->bcs + 1, 0, 0);
313} 313}
314
diff --git a/drivers/isdn/hisax/jade.h b/drivers/isdn/hisax/jade.h
index 29055e1ee381..4b98096a5858 100644
--- a/drivers/isdn/hisax/jade.h
+++ b/drivers/isdn/hisax/jade.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -16,111 +16,111 @@
16 16
17/* Special registers for access to indirect accessible JADE regs */ 17/* Special registers for access to indirect accessible JADE regs */
18#define DIRECT_IO_JADE 0x0000 /* Jade direct io access area */ 18#define DIRECT_IO_JADE 0x0000 /* Jade direct io access area */
19#define COMM_JADE 0x0040 /* Jade communication area */ 19#define COMM_JADE 0x0040 /* Jade communication area */
20 20
21/********************************************************************/ 21/********************************************************************/
22/* JADE-HDLC registers */ 22/* JADE-HDLC registers */
23/********************************************************************/ 23/********************************************************************/
24#define jade_HDLC_RFIFO 0x00 /* R */ 24#define jade_HDLC_RFIFO 0x00 /* R */
25#define jade_HDLC_XFIFO 0x00 /* W */ 25#define jade_HDLC_XFIFO 0x00 /* W */
26 26
27#define jade_HDLC_STAR 0x20 /* R */ 27#define jade_HDLC_STAR 0x20 /* R */
28 #define jadeSTAR_XDOV 0x80 28#define jadeSTAR_XDOV 0x80
29 #define jadeSTAR_XFW 0x40 /* Does not work*/ 29#define jadeSTAR_XFW 0x40 /* Does not work*/
30 #define jadeSTAR_XCEC 0x20 30#define jadeSTAR_XCEC 0x20
31 #define jadeSTAR_RCEC 0x10 31#define jadeSTAR_RCEC 0x10
32 #define jadeSTAR_BSY 0x08 32#define jadeSTAR_BSY 0x08
33 #define jadeSTAR_RNA 0x04 33#define jadeSTAR_RNA 0x04
34 #define jadeSTAR_STR 0x02 34#define jadeSTAR_STR 0x02
35 #define jadeSTAR_STX 0x01 35#define jadeSTAR_STX 0x01
36 36
37#define jade_HDLC_XCMD 0x20 /* W */ 37#define jade_HDLC_XCMD 0x20 /* W */
38 #define jadeXCMD_XF 0x80 38#define jadeXCMD_XF 0x80
39 #define jadeXCMD_XME 0x40 39#define jadeXCMD_XME 0x40
40 #define jadeXCMD_XRES 0x20 40#define jadeXCMD_XRES 0x20
41 #define jadeXCMD_STX 0x01 41#define jadeXCMD_STX 0x01
42 42
43#define jade_HDLC_RSTA 0x21 /* R */ 43#define jade_HDLC_RSTA 0x21 /* R */
44 #define jadeRSTA_VFR 0x80 44#define jadeRSTA_VFR 0x80
45 #define jadeRSTA_RDO 0x40 45#define jadeRSTA_RDO 0x40
46 #define jadeRSTA_CRC 0x20 46#define jadeRSTA_CRC 0x20
47 #define jadeRSTA_RAB 0x10 47#define jadeRSTA_RAB 0x10
48 #define jadeRSTA_MASK 0xF0 48#define jadeRSTA_MASK 0xF0
49 49
50#define jade_HDLC_MODE 0x22 /* RW*/ 50#define jade_HDLC_MODE 0x22 /* RW*/
51 #define jadeMODE_TMO 0x80 51#define jadeMODE_TMO 0x80
52 #define jadeMODE_RAC 0x40 52#define jadeMODE_RAC 0x40
53 #define jadeMODE_XAC 0x20 53#define jadeMODE_XAC 0x20
54 #define jadeMODE_TLP 0x10 54#define jadeMODE_TLP 0x10
55 #define jadeMODE_ERFS 0x02 55#define jadeMODE_ERFS 0x02
56 #define jadeMODE_ETFS 0x01 56#define jadeMODE_ETFS 0x01
57 57
58#define jade_HDLC_RBCH 0x24 /* R */ 58#define jade_HDLC_RBCH 0x24 /* R */
59 59
60#define jade_HDLC_RBCL 0x25 /* R */ 60#define jade_HDLC_RBCL 0x25 /* R */
61#define jade_HDLC_RCMD 0x25 /* W */ 61#define jade_HDLC_RCMD 0x25 /* W */
62 #define jadeRCMD_RMC 0x80 62#define jadeRCMD_RMC 0x80
63 #define jadeRCMD_RRES 0x40 63#define jadeRCMD_RRES 0x40
64 #define jadeRCMD_RMD 0x20 64#define jadeRCMD_RMD 0x20
65 #define jadeRCMD_STR 0x02 65#define jadeRCMD_STR 0x02
66 66
67#define jade_HDLC_CCR0 0x26 /* RW*/ 67#define jade_HDLC_CCR0 0x26 /* RW*/
68 #define jadeCCR0_PU 0x80 68#define jadeCCR0_PU 0x80
69 #define jadeCCR0_ITF 0x40 69#define jadeCCR0_ITF 0x40
70 #define jadeCCR0_C32 0x20 70#define jadeCCR0_C32 0x20
71 #define jadeCCR0_CRL 0x10 71#define jadeCCR0_CRL 0x10
72 #define jadeCCR0_RCRC 0x08 72#define jadeCCR0_RCRC 0x08
73 #define jadeCCR0_XCRC 0x04 73#define jadeCCR0_XCRC 0x04
74 #define jadeCCR0_RMSB 0x02 74#define jadeCCR0_RMSB 0x02
75 #define jadeCCR0_XMSB 0x01 75#define jadeCCR0_XMSB 0x01
76 76
77#define jade_HDLC_CCR1 0x27 /* RW*/ 77#define jade_HDLC_CCR1 0x27 /* RW*/
78 #define jadeCCR1_RCS0 0x80 78#define jadeCCR1_RCS0 0x80
79 #define jadeCCR1_RCONT 0x40 79#define jadeCCR1_RCONT 0x40
80 #define jadeCCR1_RFDIS 0x20 80#define jadeCCR1_RFDIS 0x20
81 #define jadeCCR1_XCS0 0x10 81#define jadeCCR1_XCS0 0x10
82 #define jadeCCR1_XCONT 0x08 82#define jadeCCR1_XCONT 0x08
83 #define jadeCCR1_XFDIS 0x04 83#define jadeCCR1_XFDIS 0x04
84 84
85#define jade_HDLC_TSAR 0x28 /* RW*/ 85#define jade_HDLC_TSAR 0x28 /* RW*/
86#define jade_HDLC_TSAX 0x29 /* RW*/ 86#define jade_HDLC_TSAX 0x29 /* RW*/
87#define jade_HDLC_RCCR 0x2A /* RW*/ 87#define jade_HDLC_RCCR 0x2A /* RW*/
88#define jade_HDLC_XCCR 0x2B /* RW*/ 88#define jade_HDLC_XCCR 0x2B /* RW*/
89 89
90#define jade_HDLC_ISR 0x2C /* R */ 90#define jade_HDLC_ISR 0x2C /* R */
91#define jade_HDLC_IMR 0x2C /* W */ 91#define jade_HDLC_IMR 0x2C /* W */
92 #define jadeISR_RME 0x80 92#define jadeISR_RME 0x80
93 #define jadeISR_RPF 0x40 93#define jadeISR_RPF 0x40
94 #define jadeISR_RFO 0x20 94#define jadeISR_RFO 0x20
95 #define jadeISR_XPR 0x10 95#define jadeISR_XPR 0x10
96 #define jadeISR_XDU 0x08 96#define jadeISR_XDU 0x08
97 #define jadeISR_ALLS 0x04 97#define jadeISR_ALLS 0x04
98 98
99#define jade_INT 0x75 99#define jade_INT 0x75
100 #define jadeINT_HDLC1 0x02 100#define jadeINT_HDLC1 0x02
101 #define jadeINT_HDLC2 0x01 101#define jadeINT_HDLC2 0x01
102 #define jadeINT_DSP 0x04 102#define jadeINT_DSP 0x04
103#define jade_INTR 0x70 103#define jade_INTR 0x70
104 104
105/********************************************************************/ 105/********************************************************************/
106/* Indirect accessible JADE registers of common interest */ 106/* Indirect accessible JADE registers of common interest */
107/********************************************************************/ 107/********************************************************************/
108#define jade_CHIPVERSIONNR 0x00 /* Does not work*/ 108#define jade_CHIPVERSIONNR 0x00 /* Does not work*/
109 109
110#define jade_HDLCCNTRACCESS 0x10 110#define jade_HDLCCNTRACCESS 0x10
111 #define jadeINDIRECT_HAH1 0x02 111#define jadeINDIRECT_HAH1 0x02
112 #define jadeINDIRECT_HAH2 0x01 112#define jadeINDIRECT_HAH2 0x01
113 113
114#define jade_HDLC1SERRXPATH 0x1D 114#define jade_HDLC1SERRXPATH 0x1D
115#define jade_HDLC1SERTXPATH 0x1E 115#define jade_HDLC1SERTXPATH 0x1E
116#define jade_HDLC2SERRXPATH 0x1F 116#define jade_HDLC2SERRXPATH 0x1F
117#define jade_HDLC2SERTXPATH 0x20 117#define jade_HDLC2SERTXPATH 0x20
118 #define jadeINDIRECT_SLIN1 0x10 118#define jadeINDIRECT_SLIN1 0x10
119 #define jadeINDIRECT_SLIN0 0x08 119#define jadeINDIRECT_SLIN0 0x08
120 #define jadeINDIRECT_LMOD1 0x04 120#define jadeINDIRECT_LMOD1 0x04
121 #define jadeINDIRECT_LMOD0 0x02 121#define jadeINDIRECT_LMOD0 0x02
122 #define jadeINDIRECT_HHR 0x01 122#define jadeINDIRECT_HHR 0x01
123 #define jadeINDIRECT_HHX 0x01 123#define jadeINDIRECT_HHX 0x01
124 124
125#define jade_RXAUDIOCH1CFG 0x11 125#define jade_RXAUDIOCH1CFG 0x11
126#define jade_RXAUDIOCH2CFG 0x14 126#define jade_RXAUDIOCH2CFG 0x14
diff --git a/drivers/isdn/hisax/jade_irq.c b/drivers/isdn/hisax/jade_irq.c
index 1f201af15a0f..f521fc83dc76 100644
--- a/drivers/isdn/hisax/jade_irq.c
+++ b/drivers/isdn/hisax/jade_irq.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Roland Klabunde 5 * Author Roland Klabunde
6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de> 6 * Copyright by Roland Klabunde <R.Klabunde@Berkom.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -13,21 +13,21 @@
13static inline void 13static inline void
14waitforCEC(struct IsdnCardState *cs, int jade, int reg) 14waitforCEC(struct IsdnCardState *cs, int jade, int reg)
15{ 15{
16 int to = 50; 16 int to = 50;
17 int mask = (reg == jade_HDLC_XCMD ? jadeSTAR_XCEC : jadeSTAR_RCEC); 17 int mask = (reg == jade_HDLC_XCMD ? jadeSTAR_XCEC : jadeSTAR_RCEC);
18 while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) { 18 while ((READJADE(cs, jade, jade_HDLC_STAR) & mask) && to) {
19 udelay(1); 19 udelay(1);
20 to--; 20 to--;
21 } 21 }
22 if (!to) 22 if (!to)
23 printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n"); 23 printk(KERN_WARNING "HiSax: waitforCEC (jade) timeout\n");
24} 24}
25 25
26 26
27static inline void 27static inline void
28waitforXFW(struct IsdnCardState *cs, int jade) 28waitforXFW(struct IsdnCardState *cs, int jade)
29{ 29{
30 /* Does not work on older jade versions, don't care */ 30 /* Does not work on older jade versions, don't care */
31} 31}
32 32
33static inline void 33static inline void
@@ -98,7 +98,7 @@ jade_fill_fifo(struct BCState *bcs)
98 bcs->tx_cnt -= count; 98 bcs->tx_cnt -= count;
99 bcs->hw.hscx.count += count; 99 bcs->hw.hscx.count += count;
100 WRITEJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count); 100 WRITEJADEFIFO(cs, bcs->hw.hscx.hscx, ptr, count);
101 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, more ? jadeXCMD_XF : (jadeXCMD_XF|jadeXCMD_XME)); 101 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, more ? jadeXCMD_XF : (jadeXCMD_XF | jadeXCMD_XME));
102 if (cs->debug & L1_DEB_HSCX_FIFO) { 102 if (cs->debug & L1_DEB_HSCX_FIFO) {
103 char *t = bcs->blog; 103 char *t = bcs->blog;
104 104
@@ -119,7 +119,7 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
119 int fifo_size = 32; 119 int fifo_size = 32;
120 int count; 120 int count;
121 int i_jade = (int) jade; /* To satisfy the compiler */ 121 int i_jade = (int) jade; /* To satisfy the compiler */
122 122
123 if (!test_bit(BC_FLG_INIT, &bcs->Flag)) 123 if (!test_bit(BC_FLG_INIT, &bcs->Flag))
124 return; 124 return;
125 125
@@ -128,13 +128,13 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
128 if ((r & 0xf0) != 0xa0) { 128 if ((r & 0xf0) != 0xa0) {
129 if (!(r & 0x80)) 129 if (!(r & 0x80))
130 if (cs->debug & L1_DEB_WARN) 130 if (cs->debug & L1_DEB_WARN)
131 debugl1(cs, "JADE %s invalid frame", (jade ? "B":"A")); 131 debugl1(cs, "JADE %s invalid frame", (jade ? "B" : "A"));
132 if ((r & 0x40) && bcs->mode) 132 if ((r & 0x40) && bcs->mode)
133 if (cs->debug & L1_DEB_WARN) 133 if (cs->debug & L1_DEB_WARN)
134 debugl1(cs, "JADE %c RDO mode=%d", 'A'+jade, bcs->mode); 134 debugl1(cs, "JADE %c RDO mode=%d", 'A' + jade, bcs->mode);
135 if (!(r & 0x20)) 135 if (!(r & 0x20))
136 if (cs->debug & L1_DEB_WARN) 136 if (cs->debug & L1_DEB_WARN)
137 debugl1(cs, "JADE %c CRC error", 'A'+jade); 137 debugl1(cs, "JADE %c CRC error", 'A' + jade);
138 WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC); 138 WriteJADECMDR(cs, jade, jade_HDLC_RCMD, jadeRCMD_RMC);
139 } else { 139 } else {
140 count = READJADE(cs, i_jade, jade_HDLC_RBCL) & 0x1F; 140 count = READJADE(cs, i_jade, jade_HDLC_RBCL) & 0x1F;
@@ -145,7 +145,7 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
145 if (cs->debug & L1_DEB_HSCX_FIFO) 145 if (cs->debug & L1_DEB_HSCX_FIFO)
146 debugl1(cs, "HX Frame %d", count); 146 debugl1(cs, "HX Frame %d", count);
147 if (!(skb = dev_alloc_skb(count))) 147 if (!(skb = dev_alloc_skb(count)))
148 printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B":"A")); 148 printk(KERN_WARNING "JADE %s receive out of memory\n", (jade ? "B" : "A"));
149 else { 149 else {
150 memcpy(skb_put(skb, count), bcs->hw.hscx.rcvbuf, count); 150 memcpy(skb_put(skb, count), bcs->hw.hscx.rcvbuf, count);
151 skb_queue_tail(&bcs->rqueue, skb); 151 skb_queue_tail(&bcs->rqueue, skb);
@@ -175,8 +175,8 @@ jade_interrupt(struct IsdnCardState *cs, u_char val, u_char jade)
175 jade_fill_fifo(bcs); 175 jade_fill_fifo(bcs);
176 return; 176 return;
177 } else { 177 } else {
178 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 178 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
179 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 179 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
180 u_long flags; 180 u_long flags;
181 spin_lock_irqsave(&bcs->aclock, flags); 181 spin_lock_irqsave(&bcs->aclock, flags);
182 bcs->ackcnt += bcs->hw.hscx.count; 182 bcs->ackcnt += bcs->hw.hscx.count;
@@ -204,7 +204,7 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
204{ 204{
205 struct BCState *bcs; 205 struct BCState *bcs;
206 bcs = cs->bcs + jade; 206 bcs = cs->bcs + jade;
207 207
208 if (val & jadeISR_RFO) { 208 if (val & jadeISR_RFO) {
209 /* handled with RDO */ 209 /* handled with RDO */
210 val &= ~jadeISR_RFO; 210 val &= ~jadeISR_RFO;
@@ -216,21 +216,21 @@ jade_int_main(struct IsdnCardState *cs, u_char val, int jade)
216 jade_fill_fifo(bcs); 216 jade_fill_fifo(bcs);
217 else { 217 else {
218 /* Here we lost an TX interrupt, so 218 /* Here we lost an TX interrupt, so
219 * restart transmitting the whole frame. 219 * restart transmitting the whole frame.
220 */ 220 */
221 if (bcs->tx_skb) { 221 if (bcs->tx_skb) {
222 skb_push(bcs->tx_skb, bcs->hw.hscx.count); 222 skb_push(bcs->tx_skb, bcs->hw.hscx.count);
223 bcs->tx_cnt += bcs->hw.hscx.count; 223 bcs->tx_cnt += bcs->hw.hscx.count;
224 bcs->hw.hscx.count = 0; 224 bcs->hw.hscx.count = 0;
225 } 225 }
226 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, jadeXCMD_XRES); 226 WriteJADECMDR(cs, bcs->hw.hscx.hscx, jade_HDLC_XCMD, jadeXCMD_XRES);
227 if (cs->debug & L1_DEB_WARN) 227 if (cs->debug & L1_DEB_WARN)
228 debugl1(cs, "JADE %c EXIR %x Lost TX", 'A'+jade, val); 228 debugl1(cs, "JADE %c EXIR %x Lost TX", 'A' + jade, val);
229 } 229 }
230 } 230 }
231 if (val & (jadeISR_RME|jadeISR_RPF|jadeISR_XPR)) { 231 if (val & (jadeISR_RME | jadeISR_RPF | jadeISR_XPR)) {
232 if (cs->debug & L1_DEB_HSCX) 232 if (cs->debug & L1_DEB_HSCX)
233 debugl1(cs, "JADE %c interrupt %x", 'A'+jade, val); 233 debugl1(cs, "JADE %c interrupt %x", 'A' + jade, val);
234 jade_interrupt(cs, val, jade); 234 jade_interrupt(cs, val, jade);
235 } 235 }
236} 236}
diff --git a/drivers/isdn/hisax/l3_1tr6.c b/drivers/isdn/hisax/l3_1tr6.c
index ee4dae1382e0..4c1bca5caa1d 100644
--- a/drivers/isdn/hisax/l3_1tr6.c
+++ b/drivers/isdn/hisax/l3_1tr6.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -21,10 +21,10 @@
21extern char *HiSax_getrev(const char *revision); 21extern char *HiSax_getrev(const char *revision);
22static const char *l3_1tr6_revision = "$Revision: 2.15.2.3 $"; 22static const char *l3_1tr6_revision = "$Revision: 2.15.2.3 $";
23 23
24#define MsgHead(ptr, cref, mty, dis) \ 24#define MsgHead(ptr, cref, mty, dis) \
25 *ptr++ = dis; \ 25 *ptr++ = dis; \
26 *ptr++ = 0x1; \ 26 *ptr++ = 0x1; \
27 *ptr++ = cref ^ 0x80; \ 27 *ptr++ = cref ^ 0x80; \
28 *ptr++ = mty 28 *ptr++ = mty
29 29
30static void 30static void
@@ -83,23 +83,23 @@ l3_1tr6_setup_req(struct l3_process *pc, u_char pr, void *arg)
83 pc->para.spv = 0; 83 pc->para.spv = 0;
84 if (!isdigit(*teln)) { 84 if (!isdigit(*teln)) {
85 switch (0x5f & *teln) { 85 switch (0x5f & *teln) {
86 case 'S': 86 case 'S':
87 pc->para.spv = 1; 87 pc->para.spv = 1;
88 break; 88 break;
89 case 'C': 89 case 'C':
90 channel = 0x08; 90 channel = 0x08;
91 case 'P': 91 case 'P':
92 channel |= 0x80; 92 channel |= 0x80;
93 teln++; 93 teln++;
94 if (*teln == '1') 94 if (*teln == '1')
95 channel |= 0x01; 95 channel |= 0x01;
96 else 96 else
97 channel |= 0x02; 97 channel |= 0x02;
98 break; 98 break;
99 default: 99 default:
100 if (pc->st->l3.debug & L3_DEB_WARN) 100 if (pc->st->l3.debug & L3_DEB_WARN)
101 l3_debug(pc->st, "Wrong MSN Code"); 101 l3_debug(pc->st, "Wrong MSN Code");
102 break; 102 break;
103 } 103 }
104 teln++; 104 teln++;
105 } 105 }
@@ -176,7 +176,7 @@ l3_1tr6_setup(struct l3_process *pc, u_char pr, void *arg)
176 return; 176 return;
177 } 177 }
178 if ((pc->para.bchannel = p[2] & 0x3)) 178 if ((pc->para.bchannel = p[2] & 0x3))
179 bcfound++; 179 bcfound++;
180 } else { 180 } else {
181 l3_1tr6_error(pc, "missing setup chanID", skb); 181 l3_1tr6_error(pc, "missing setup chanID", skb);
182 return; 182 return;
@@ -525,15 +525,15 @@ l3_1tr6_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
525 cause = pc->para.cause; 525 cause = pc->para.cause;
526 /* Map DSS1 causes */ 526 /* Map DSS1 causes */
527 switch (cause & 0x7f) { 527 switch (cause & 0x7f) {
528 case 0x10: 528 case 0x10:
529 clen = 0; 529 clen = 0;
530 break; 530 break;
531 case 0x11: 531 case 0x11:
532 cause = CAUSE_UserBusy; 532 cause = CAUSE_UserBusy;
533 break; 533 break;
534 case 0x15: 534 case 0x15:
535 cause = CAUSE_CallRejected; 535 cause = CAUSE_CallRejected;
536 break; 536 break;
537 } 537 }
538 StopAllL3Timer(pc); 538 StopAllL3Timer(pc);
539 MsgHead(p, pc->callref, MT_N1_DISC, PROTO_DIS_N1); 539 MsgHead(p, pc->callref, MT_N1_DISC, PROTO_DIS_N1);
@@ -588,12 +588,12 @@ l3_1tr6_t305(struct l3_process *pc, u_char pr, void *arg)
588 cause = pc->para.cause; 588 cause = pc->para.cause;
589 /* Map DSS1 causes */ 589 /* Map DSS1 causes */
590 switch (cause & 0x7f) { 590 switch (cause & 0x7f) {
591 case 0x10: 591 case 0x10:
592 clen = 0; 592 clen = 0;
593 break; 593 break;
594 case 0x15: 594 case 0x15:
595 cause = CAUSE_CallRejected; 595 cause = CAUSE_CallRejected;
596 break; 596 break;
597 } 597 }
598 MsgHead(p, pc->callref, MT_N1_REL, PROTO_DIS_N1); 598 MsgHead(p, pc->callref, MT_N1_REL, PROTO_DIS_N1);
599 *p++ = WE0_cause; 599 *p++ = WE0_cause;
@@ -647,19 +647,19 @@ l3_1tr6_t308_2(struct l3_process *pc, u_char pr, void *arg)
647static void 647static void
648l3_1tr6_dl_reset(struct l3_process *pc, u_char pr, void *arg) 648l3_1tr6_dl_reset(struct l3_process *pc, u_char pr, void *arg)
649{ 649{
650 pc->para.cause = CAUSE_LocalProcErr; 650 pc->para.cause = CAUSE_LocalProcErr;
651 l3_1tr6_disconnect_req(pc, pr, NULL); 651 l3_1tr6_disconnect_req(pc, pr, NULL);
652 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc); 652 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc);
653} 653}
654 654
655static void 655static void
656l3_1tr6_dl_release(struct l3_process *pc, u_char pr, void *arg) 656l3_1tr6_dl_release(struct l3_process *pc, u_char pr, void *arg)
657{ 657{
658 newl3state(pc, 0); 658 newl3state(pc, 0);
659 pc->para.cause = 0x1b; /* Destination out of order */ 659 pc->para.cause = 0x1b; /* Destination out of order */
660 pc->para.loc = 0; 660 pc->para.loc = 0;
661 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc); 661 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc);
662 release_l3_process(pc); 662 release_l3_process(pc);
663} 663}
664 664
665/* *INDENT-OFF* */ 665/* *INDENT-OFF* */
@@ -667,9 +667,9 @@ static struct stateentry downstl[] =
667{ 667{
668 {SBIT(0), 668 {SBIT(0),
669 CC_SETUP | REQUEST, l3_1tr6_setup_req}, 669 CC_SETUP | REQUEST, l3_1tr6_setup_req},
670 {SBIT(1) | SBIT(2) | SBIT(3) | SBIT(4) | SBIT(6) | SBIT(7) | SBIT(8) | 670 {SBIT(1) | SBIT(2) | SBIT(3) | SBIT(4) | SBIT(6) | SBIT(7) | SBIT(8) |
671 SBIT(10), 671 SBIT(10),
672 CC_DISCONNECT | REQUEST, l3_1tr6_disconnect_req}, 672 CC_DISCONNECT | REQUEST, l3_1tr6_disconnect_req},
673 {SBIT(12), 673 {SBIT(12),
674 CC_RELEASE | REQUEST, l3_1tr6_release_req}, 674 CC_RELEASE | REQUEST, l3_1tr6_release_req},
675 {SBIT(6), 675 {SBIT(6),
@@ -732,12 +732,12 @@ static struct stateentry datastln1[] =
732 732
733static struct stateentry manstatelist[] = 733static struct stateentry manstatelist[] =
734{ 734{
735 {SBIT(2), 735 {SBIT(2),
736 DL_ESTABLISH | INDICATION, l3_1tr6_dl_reset}, 736 DL_ESTABLISH | INDICATION, l3_1tr6_dl_reset},
737 {ALL_STATES, 737 {ALL_STATES,
738 DL_RELEASE | INDICATION, l3_1tr6_dl_release}, 738 DL_RELEASE | INDICATION, l3_1tr6_dl_release},
739}; 739};
740 740
741/* *INDENT-ON* */ 741/* *INDENT-ON* */
742 742
743static void 743static void
@@ -749,16 +749,16 @@ up1tr6(struct PStack *st, int pr, void *arg)
749 char tmp[80]; 749 char tmp[80];
750 750
751 switch (pr) { 751 switch (pr) {
752 case (DL_DATA | INDICATION): 752 case (DL_DATA | INDICATION):
753 case (DL_UNIT_DATA | INDICATION): 753 case (DL_UNIT_DATA | INDICATION):
754 break; 754 break;
755 case (DL_ESTABLISH | CONFIRM): 755 case (DL_ESTABLISH | CONFIRM):
756 case (DL_ESTABLISH | INDICATION): 756 case (DL_ESTABLISH | INDICATION):
757 case (DL_RELEASE | INDICATION): 757 case (DL_RELEASE | INDICATION):
758 case (DL_RELEASE | CONFIRM): 758 case (DL_RELEASE | CONFIRM):
759 l3_msg(st, pr, arg); 759 l3_msg(st, pr, arg);
760 return; 760 return;
761 break; 761 break;
762 } 762 }
763 if (skb->len < 4) { 763 if (skb->len < 4) {
764 if (st->l3.debug & L3_DEB_PROTERR) { 764 if (st->l3.debug & L3_DEB_PROTERR) {
@@ -792,12 +792,12 @@ up1tr6(struct PStack *st, int pr, void *arg)
792 dev_kfree_skb(skb); 792 dev_kfree_skb(skb);
793 if (st->l3.debug & L3_DEB_STATE) { 793 if (st->l3.debug & L3_DEB_STATE) {
794 sprintf(tmp, "up1tr6%s N0 mt %x unhandled", 794 sprintf(tmp, "up1tr6%s N0 mt %x unhandled",
795 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", mt); 795 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", mt);
796 l3_debug(st, tmp); 796 l3_debug(st, tmp);
797 } 797 }
798 } else if (skb->data[0] == PROTO_DIS_N1) { 798 } else if (skb->data[0] == PROTO_DIS_N1) {
799 if (!(proc = getl3proc(st, cr))) { 799 if (!(proc = getl3proc(st, cr))) {
800 if (mt == MT_N1_SETUP) { 800 if (mt == MT_N1_SETUP) {
801 if (cr < 128) { 801 if (cr < 128) {
802 if (!(proc = new_l3_process(st, cr))) { 802 if (!(proc = new_l3_process(st, cr))) {
803 if (st->l3.debug & L3_DEB_PROTERR) { 803 if (st->l3.debug & L3_DEB_PROTERR) {
@@ -812,10 +812,10 @@ up1tr6(struct PStack *st, int pr, void *arg)
812 return; 812 return;
813 } 813 }
814 } else if ((mt == MT_N1_REL) || (mt == MT_N1_REL_ACK) || 814 } else if ((mt == MT_N1_REL) || (mt == MT_N1_REL_ACK) ||
815 (mt == MT_N1_CANC_ACK) || (mt == MT_N1_CANC_REJ) || 815 (mt == MT_N1_CANC_ACK) || (mt == MT_N1_CANC_REJ) ||
816 (mt == MT_N1_REG_ACK) || (mt == MT_N1_REG_REJ) || 816 (mt == MT_N1_REG_ACK) || (mt == MT_N1_REG_REJ) ||
817 (mt == MT_N1_SUSP_ACK) || (mt == MT_N1_RES_REJ) || 817 (mt == MT_N1_SUSP_ACK) || (mt == MT_N1_RES_REJ) ||
818 (mt == MT_N1_INFO)) { 818 (mt == MT_N1_INFO)) {
819 dev_kfree_skb(skb); 819 dev_kfree_skb(skb);
820 return; 820 return;
821 } else { 821 } else {
@@ -838,7 +838,7 @@ up1tr6(struct PStack *st, int pr, void *arg)
838 dev_kfree_skb(skb); 838 dev_kfree_skb(skb);
839 if (st->l3.debug & L3_DEB_STATE) { 839 if (st->l3.debug & L3_DEB_STATE) {
840 sprintf(tmp, "up1tr6%sstate %d mt %x unhandled", 840 sprintf(tmp, "up1tr6%sstate %d mt %x unhandled",
841 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 841 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
842 proc->state, mt); 842 proc->state, mt);
843 l3_debug(st, tmp); 843 l3_debug(st, tmp);
844 } 844 }
@@ -846,7 +846,7 @@ up1tr6(struct PStack *st, int pr, void *arg)
846 } else { 846 } else {
847 if (st->l3.debug & L3_DEB_STATE) { 847 if (st->l3.debug & L3_DEB_STATE) {
848 sprintf(tmp, "up1tr6%sstate %d mt %x", 848 sprintf(tmp, "up1tr6%sstate %d mt %x",
849 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 849 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
850 proc->state, mt); 850 proc->state, mt);
851 l3_debug(st, tmp); 851 l3_debug(st, tmp);
852 } 852 }
@@ -863,7 +863,7 @@ down1tr6(struct PStack *st, int pr, void *arg)
863 struct Channel *chan; 863 struct Channel *chan;
864 char tmp[80]; 864 char tmp[80];
865 865
866 if ((DL_ESTABLISH | REQUEST)== pr) { 866 if ((DL_ESTABLISH | REQUEST) == pr) {
867 l3_msg(st, pr, NULL); 867 l3_msg(st, pr, NULL);
868 return; 868 return;
869 } else if ((CC_SETUP | REQUEST) == pr) { 869 } else if ((CC_SETUP | REQUEST) == pr) {
@@ -905,31 +905,31 @@ down1tr6(struct PStack *st, int pr, void *arg)
905static void 905static void
906man1tr6(struct PStack *st, int pr, void *arg) 906man1tr6(struct PStack *st, int pr, void *arg)
907{ 907{
908 int i; 908 int i;
909 struct l3_process *proc = arg; 909 struct l3_process *proc = arg;
910 910
911 if (!proc) { 911 if (!proc) {
912 printk(KERN_ERR "HiSax man1tr6 without proc pr=%04x\n", pr); 912 printk(KERN_ERR "HiSax man1tr6 without proc pr=%04x\n", pr);
913 return; 913 return;
914 } 914 }
915 for (i = 0; i < ARRAY_SIZE(manstatelist); i++) 915 for (i = 0; i < ARRAY_SIZE(manstatelist); i++)
916 if ((pr == manstatelist[i].primitive) && 916 if ((pr == manstatelist[i].primitive) &&
917 ((1 << proc->state) & manstatelist[i].state)) 917 ((1 << proc->state) & manstatelist[i].state))
918 break; 918 break;
919 if (i == ARRAY_SIZE(manstatelist)) { 919 if (i == ARRAY_SIZE(manstatelist)) {
920 if (st->l3.debug & L3_DEB_STATE) { 920 if (st->l3.debug & L3_DEB_STATE) {
921 l3_debug(st, "cr %d man1tr6 state %d prim %d unhandled", 921 l3_debug(st, "cr %d man1tr6 state %d prim %d unhandled",
922 proc->callref & 0x7f, proc->state, pr); 922 proc->callref & 0x7f, proc->state, pr);
923 } 923 }
924 } else { 924 } else {
925 if (st->l3.debug & L3_DEB_STATE) { 925 if (st->l3.debug & L3_DEB_STATE) {
926 l3_debug(st, "cr %d man1tr6 state %d prim %d", 926 l3_debug(st, "cr %d man1tr6 state %d prim %d",
927 proc->callref & 0x7f, proc->state, pr); 927 proc->callref & 0x7f, proc->state, pr);
928 } 928 }
929 manstatelist[i].rout(proc, pr, arg); 929 manstatelist[i].rout(proc, pr, arg);
930 } 930 }
931} 931}
932 932
933void 933void
934setstack_1tr6(struct PStack *st) 934setstack_1tr6(struct PStack *st)
935{ 935{
diff --git a/drivers/isdn/hisax/l3dss1.c b/drivers/isdn/hisax/l3dss1.c
index 6a8acf65777d..cda700664e9c 100644
--- a/drivers/isdn/hisax/l3dss1.c
+++ b/drivers/isdn/hisax/l3dss1.c
@@ -7,7 +7,7 @@
7 * Author Karsten Keil 7 * Author Karsten Keil
8 * based on the teles driver from Jan den Ouden 8 * based on the teles driver from Jan den Ouden
9 * Copyright by Karsten Keil <keil@isdn4linux.de> 9 * Copyright by Karsten Keil <keil@isdn4linux.de>
10 * 10 *
11 * This software may be used and distributed according to the terms 11 * This software may be used and distributed according to the terms
12 * of the GNU General Public License, incorporated herein by reference. 12 * of the GNU General Public License, incorporated herein by reference.
13 * 13 *
@@ -30,14 +30,14 @@ static const char *dss1_revision = "$Revision: 2.32.2.3 $";
30 30
31#define EXT_BEARER_CAPS 1 31#define EXT_BEARER_CAPS 1
32 32
33#define MsgHead(ptr, cref, mty) \ 33#define MsgHead(ptr, cref, mty) \
34 *ptr++ = 0x8; \ 34 *ptr++ = 0x8; \
35 if (cref == -1) { \ 35 if (cref == -1) { \
36 *ptr++ = 0x0; \ 36 *ptr++ = 0x0; \
37 } else { \ 37 } else { \
38 *ptr++ = 0x1; \ 38 *ptr++ = 0x1; \
39 *ptr++ = cref^0x80; \ 39 *ptr++ = cref^0x80; \
40 } \ 40 } \
41 *ptr++ = mty 41 *ptr++ = mty
42 42
43 43
@@ -49,22 +49,22 @@ static unsigned char new_invoke_id(struct PStack *p)
49{ 49{
50 unsigned char retval; 50 unsigned char retval;
51 int i; 51 int i;
52 52
53 i = 32; /* maximum search depth */ 53 i = 32; /* maximum search depth */
54 54
55 retval = p->prot.dss1.last_invoke_id + 1; /* try new id */ 55 retval = p->prot.dss1.last_invoke_id + 1; /* try new id */
56 while ((i) && (p->prot.dss1.invoke_used[retval >> 3] == 0xFF)) { 56 while ((i) && (p->prot.dss1.invoke_used[retval >> 3] == 0xFF)) {
57 p->prot.dss1.last_invoke_id = (retval & 0xF8) + 8; 57 p->prot.dss1.last_invoke_id = (retval & 0xF8) + 8;
58 i--; 58 i--;
59 } 59 }
60 if (i) { 60 if (i) {
61 while (p->prot.dss1.invoke_used[retval >> 3] & (1 << (retval & 7))) 61 while (p->prot.dss1.invoke_used[retval >> 3] & (1 << (retval & 7)))
62 retval++; 62 retval++;
63 } else 63 } else
64 retval = 0; 64 retval = 0;
65 p->prot.dss1.last_invoke_id = retval; 65 p->prot.dss1.last_invoke_id = retval;
66 p->prot.dss1.invoke_used[retval >> 3] |= (1 << (retval & 7)); 66 p->prot.dss1.invoke_used[retval >> 3] |= (1 << (retval & 7));
67 return(retval); 67 return (retval);
68} /* new_invoke_id */ 68} /* new_invoke_id */
69 69
70/*************************/ 70/*************************/
@@ -73,10 +73,10 @@ static unsigned char new_invoke_id(struct PStack *p)
73static void free_invoke_id(struct PStack *p, unsigned char id) 73static void free_invoke_id(struct PStack *p, unsigned char id)
74{ 74{
75 75
76 if (!id) return; /* 0 = invalid value */ 76 if (!id) return; /* 0 = invalid value */
77 77
78 p->prot.dss1.invoke_used[id >> 3] &= ~(1 << (id & 7)); 78 p->prot.dss1.invoke_used[id >> 3] &= ~(1 << (id & 7));
79} /* free_invoke_id */ 79} /* free_invoke_id */
80 80
81 81
82/**********************************************************/ 82/**********************************************************/
@@ -86,26 +86,26 @@ static struct l3_process
86*dss1_new_l3_process(struct PStack *st, int cr) 86*dss1_new_l3_process(struct PStack *st, int cr)
87{ struct l3_process *proc; 87{ struct l3_process *proc;
88 88
89 if (!(proc = new_l3_process(st, cr))) 89 if (!(proc = new_l3_process(st, cr)))
90 return(NULL); 90 return (NULL);
91 91
92 proc->prot.dss1.invoke_id = 0; 92 proc->prot.dss1.invoke_id = 0;
93 proc->prot.dss1.remote_operation = 0; 93 proc->prot.dss1.remote_operation = 0;
94 proc->prot.dss1.uus1_data[0] = '\0'; 94 proc->prot.dss1.uus1_data[0] = '\0';
95 95
96 return(proc); 96 return (proc);
97} /* dss1_new_l3_process */ 97} /* dss1_new_l3_process */
98 98
99/************************************************/ 99/************************************************/
100/* free a l3 process and all dss1 specific data */ 100/* free a l3 process and all dss1 specific data */
101/************************************************/ 101/************************************************/
102static void 102static void
103dss1_release_l3_process(struct l3_process *p) 103dss1_release_l3_process(struct l3_process *p)
104{ 104{
105 free_invoke_id(p->st,p->prot.dss1.invoke_id); 105 free_invoke_id(p->st, p->prot.dss1.invoke_id);
106 release_l3_process(p); 106 release_l3_process(p);
107} /* dss1_release_l3_process */ 107} /* dss1_release_l3_process */
108 108
109/********************************************************/ 109/********************************************************/
110/* search a process with invoke id id and dummy callref */ 110/* search a process with invoke id id and dummy callref */
111/********************************************************/ 111/********************************************************/
@@ -113,120 +113,120 @@ static struct l3_process *
113l3dss1_search_dummy_proc(struct PStack *st, int id) 113l3dss1_search_dummy_proc(struct PStack *st, int id)
114{ struct l3_process *pc = st->l3.proc; /* start of processes */ 114{ struct l3_process *pc = st->l3.proc; /* start of processes */
115 115
116 if (!id) return(NULL); 116 if (!id) return (NULL);
117 117
118 while (pc) 118 while (pc)
119 { if ((pc->callref == -1) && (pc->prot.dss1.invoke_id == id)) 119 { if ((pc->callref == -1) && (pc->prot.dss1.invoke_id == id))
120 return(pc); 120 return (pc);
121 pc = pc->next; 121 pc = pc->next;
122 } 122 }
123 return(NULL); 123 return (NULL);
124} /* l3dss1_search_dummy_proc */ 124} /* l3dss1_search_dummy_proc */
125 125
126/*******************************************************************/ 126/*******************************************************************/
127/* called when a facility message with a dummy callref is received */ 127/* called when a facility message with a dummy callref is received */
128/* and a return result is delivered. id specifies the invoke id. */ 128/* and a return result is delivered. id specifies the invoke id. */
129/*******************************************************************/ 129/*******************************************************************/
130static void 130static void
131l3dss1_dummy_return_result(struct PStack *st, int id, u_char *p, u_char nlen) 131l3dss1_dummy_return_result(struct PStack *st, int id, u_char *p, u_char nlen)
132{ isdn_ctrl ic; 132{ isdn_ctrl ic;
133 struct IsdnCardState *cs; 133 struct IsdnCardState *cs;
134 struct l3_process *pc = NULL; 134 struct l3_process *pc = NULL;
135 135
136 if ((pc = l3dss1_search_dummy_proc(st, id))) 136 if ((pc = l3dss1_search_dummy_proc(st, id)))
137 { L3DelTimer(&pc->timer); /* remove timer */ 137 { L3DelTimer(&pc->timer); /* remove timer */
138 138
139 cs = pc->st->l1.hardware; 139 cs = pc->st->l1.hardware;
140 ic.driver = cs->myid; 140 ic.driver = cs->myid;
141 ic.command = ISDN_STAT_PROT; 141 ic.command = ISDN_STAT_PROT;
142 ic.arg = DSS1_STAT_INVOKE_RES; 142 ic.arg = DSS1_STAT_INVOKE_RES;
143 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id; 143 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id;
144 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id; 144 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id;
145 ic.parm.dss1_io.proc = pc->prot.dss1.proc; 145 ic.parm.dss1_io.proc = pc->prot.dss1.proc;
146 ic.parm.dss1_io.timeout= 0; 146 ic.parm.dss1_io.timeout = 0;
147 ic.parm.dss1_io.datalen = nlen; 147 ic.parm.dss1_io.datalen = nlen;
148 ic.parm.dss1_io.data = p; 148 ic.parm.dss1_io.data = p;
149 free_invoke_id(pc->st, pc->prot.dss1.invoke_id); 149 free_invoke_id(pc->st, pc->prot.dss1.invoke_id);
150 pc->prot.dss1.invoke_id = 0; /* reset id */ 150 pc->prot.dss1.invoke_id = 0; /* reset id */
151 151
152 cs->iif.statcallb(&ic); 152 cs->iif.statcallb(&ic);
153 dss1_release_l3_process(pc); 153 dss1_release_l3_process(pc);
154 } 154 }
155 else 155 else
156 l3_debug(st, "dummy return result id=0x%x result len=%d",id,nlen); 156 l3_debug(st, "dummy return result id=0x%x result len=%d", id, nlen);
157} /* l3dss1_dummy_return_result */ 157} /* l3dss1_dummy_return_result */
158 158
159/*******************************************************************/ 159/*******************************************************************/
160/* called when a facility message with a dummy callref is received */ 160/* called when a facility message with a dummy callref is received */
161/* and a return error is delivered. id specifies the invoke id. */ 161/* and a return error is delivered. id specifies the invoke id. */
162/*******************************************************************/ 162/*******************************************************************/
163static void 163static void
164l3dss1_dummy_error_return(struct PStack *st, int id, ulong error) 164l3dss1_dummy_error_return(struct PStack *st, int id, ulong error)
165{ isdn_ctrl ic; 165{ isdn_ctrl ic;
166 struct IsdnCardState *cs; 166 struct IsdnCardState *cs;
167 struct l3_process *pc = NULL; 167 struct l3_process *pc = NULL;
168 168
169 if ((pc = l3dss1_search_dummy_proc(st, id))) 169 if ((pc = l3dss1_search_dummy_proc(st, id)))
170 { L3DelTimer(&pc->timer); /* remove timer */ 170 { L3DelTimer(&pc->timer); /* remove timer */
171 171
172 cs = pc->st->l1.hardware; 172 cs = pc->st->l1.hardware;
173 ic.driver = cs->myid; 173 ic.driver = cs->myid;
174 ic.command = ISDN_STAT_PROT; 174 ic.command = ISDN_STAT_PROT;
175 ic.arg = DSS1_STAT_INVOKE_ERR; 175 ic.arg = DSS1_STAT_INVOKE_ERR;
176 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id; 176 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id;
177 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id; 177 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id;
178 ic.parm.dss1_io.proc = pc->prot.dss1.proc; 178 ic.parm.dss1_io.proc = pc->prot.dss1.proc;
179 ic.parm.dss1_io.timeout= error; 179 ic.parm.dss1_io.timeout = error;
180 ic.parm.dss1_io.datalen = 0; 180 ic.parm.dss1_io.datalen = 0;
181 ic.parm.dss1_io.data = NULL; 181 ic.parm.dss1_io.data = NULL;
182 free_invoke_id(pc->st, pc->prot.dss1.invoke_id); 182 free_invoke_id(pc->st, pc->prot.dss1.invoke_id);
183 pc->prot.dss1.invoke_id = 0; /* reset id */ 183 pc->prot.dss1.invoke_id = 0; /* reset id */
184 184
185 cs->iif.statcallb(&ic); 185 cs->iif.statcallb(&ic);
186 dss1_release_l3_process(pc); 186 dss1_release_l3_process(pc);
187 } 187 }
188 else 188 else
189 l3_debug(st, "dummy return error id=0x%x error=0x%lx",id,error); 189 l3_debug(st, "dummy return error id=0x%x error=0x%lx", id, error);
190} /* l3dss1_error_return */ 190} /* l3dss1_error_return */
191 191
192/*******************************************************************/ 192/*******************************************************************/
193/* called when a facility message with a dummy callref is received */ 193/* called when a facility message with a dummy callref is received */
194/* and a invoke is delivered. id specifies the invoke id. */ 194/* and a invoke is delivered. id specifies the invoke id. */
195/*******************************************************************/ 195/*******************************************************************/
196static void 196static void
197l3dss1_dummy_invoke(struct PStack *st, int cr, int id, 197l3dss1_dummy_invoke(struct PStack *st, int cr, int id,
198 int ident, u_char *p, u_char nlen) 198 int ident, u_char *p, u_char nlen)
199{ isdn_ctrl ic; 199{ isdn_ctrl ic;
200 struct IsdnCardState *cs; 200 struct IsdnCardState *cs;
201 201
202 l3_debug(st, "dummy invoke %s id=0x%x ident=0x%x datalen=%d", 202 l3_debug(st, "dummy invoke %s id=0x%x ident=0x%x datalen=%d",
203 (cr == -1) ? "local" : "broadcast",id,ident,nlen); 203 (cr == -1) ? "local" : "broadcast", id, ident, nlen);
204 if (cr >= -1) return; /* ignore local data */ 204 if (cr >= -1) return; /* ignore local data */
205 205
206 cs = st->l1.hardware; 206 cs = st->l1.hardware;
207 ic.driver = cs->myid; 207 ic.driver = cs->myid;
208 ic.command = ISDN_STAT_PROT; 208 ic.command = ISDN_STAT_PROT;
209 ic.arg = DSS1_STAT_INVOKE_BRD; 209 ic.arg = DSS1_STAT_INVOKE_BRD;
210 ic.parm.dss1_io.hl_id = id; 210 ic.parm.dss1_io.hl_id = id;
211 ic.parm.dss1_io.ll_id = 0; 211 ic.parm.dss1_io.ll_id = 0;
212 ic.parm.dss1_io.proc = ident; 212 ic.parm.dss1_io.proc = ident;
213 ic.parm.dss1_io.timeout= 0; 213 ic.parm.dss1_io.timeout = 0;
214 ic.parm.dss1_io.datalen = nlen; 214 ic.parm.dss1_io.datalen = nlen;
215 ic.parm.dss1_io.data = p; 215 ic.parm.dss1_io.data = p;
216 216
217 cs->iif.statcallb(&ic); 217 cs->iif.statcallb(&ic);
218} /* l3dss1_dummy_invoke */ 218} /* l3dss1_dummy_invoke */
219 219
220static void 220static void
221l3dss1_parse_facility(struct PStack *st, struct l3_process *pc, 221l3dss1_parse_facility(struct PStack *st, struct l3_process *pc,
222 int cr, u_char * p) 222 int cr, u_char *p)
223{ 223{
224 int qd_len = 0; 224 int qd_len = 0;
225 unsigned char nlen = 0, ilen, cp_tag; 225 unsigned char nlen = 0, ilen, cp_tag;
226 int ident, id; 226 int ident, id;
227 ulong err_ret; 227 ulong err_ret;
228 228
229 if (pc) 229 if (pc)
230 st = pc->st; /* valid Stack */ 230 st = pc->st; /* valid Stack */
231 else 231 else
232 if ((!st) || (cr >= 0)) return; /* neither pc nor st specified */ 232 if ((!st) || (cr >= 0)) return; /* neither pc nor st specified */
@@ -255,243 +255,243 @@ l3dss1_parse_facility(struct PStack *st, struct l3_process *pc,
255 l3_debug(st, "class and form != 0xA0"); 255 l3_debug(st, "class and form != 0xA0");
256 return; 256 return;
257 } 257 }
258
259 cp_tag = *p & 0x1F; /* remember tag value */
260 258
261 p++; 259 cp_tag = *p & 0x1F; /* remember tag value */
260
261 p++;
262 qd_len--; 262 qd_len--;
263 if (qd_len < 1) 263 if (qd_len < 1)
264 { l3_debug(st, "qd_len < 1"); 264 { l3_debug(st, "qd_len < 1");
265 return; 265 return;
266 } 266 }
267 if (*p & 0x80) 267 if (*p & 0x80)
268 { /* length format indefinite or limited */ 268 { /* length format indefinite or limited */
269 nlen = *p++ & 0x7F; /* number of len bytes or indefinite */ 269 nlen = *p++ & 0x7F; /* number of len bytes or indefinite */
270 if ((qd_len-- < ((!nlen) ? 3 : (1 + nlen))) || 270 if ((qd_len-- < ((!nlen) ? 3 : (1 + nlen))) ||
271 (nlen > 1)) 271 (nlen > 1))
272 { l3_debug(st, "length format error or not implemented"); 272 { l3_debug(st, "length format error or not implemented");
273 return; 273 return;
274 } 274 }
275 if (nlen == 1) 275 if (nlen == 1)
276 { nlen = *p++; /* complete length */ 276 { nlen = *p++; /* complete length */
277 qd_len--; 277 qd_len--;
278 } 278 }
279 else 279 else
280 { qd_len -= 2; /* trailing null bytes */ 280 { qd_len -= 2; /* trailing null bytes */
281 if ((*(p+qd_len)) || (*(p+qd_len+1))) 281 if ((*(p + qd_len)) || (*(p + qd_len + 1)))
282 { l3_debug(st,"length format indefinite error"); 282 { l3_debug(st, "length format indefinite error");
283 return; 283 return;
284 } 284 }
285 nlen = qd_len; 285 nlen = qd_len;
286 } 286 }
287 } 287 }
288 else 288 else
289 { nlen = *p++; 289 { nlen = *p++;
290 qd_len--; 290 qd_len--;
291 } 291 }
292 if (qd_len < nlen) 292 if (qd_len < nlen)
293 { l3_debug(st, "qd_len < nlen"); 293 { l3_debug(st, "qd_len < nlen");
294 return; 294 return;
295 } 295 }
296 qd_len -= nlen; 296 qd_len -= nlen;
297 297
298 if (nlen < 2) 298 if (nlen < 2)
299 { l3_debug(st, "nlen < 2"); 299 { l3_debug(st, "nlen < 2");
300 return; 300 return;
301 } 301 }
302 if (*p != 0x02) 302 if (*p != 0x02)
303 { /* invoke identifier tag */ 303 { /* invoke identifier tag */
304 l3_debug(st, "invoke identifier tag !=0x02"); 304 l3_debug(st, "invoke identifier tag !=0x02");
305 return; 305 return;
306 } 306 }
307 p++; 307 p++;
308 nlen--; 308 nlen--;
309 if (*p & 0x80) 309 if (*p & 0x80)
310 { /* length format */ 310 { /* length format */
311 l3_debug(st, "invoke id length format 2"); 311 l3_debug(st, "invoke id length format 2");
312 return; 312 return;
313 } 313 }
314 ilen = *p++; 314 ilen = *p++;
315 nlen--; 315 nlen--;
316 if (ilen > nlen || ilen == 0) 316 if (ilen > nlen || ilen == 0)
317 { l3_debug(st, "ilen > nlen || ilen == 0"); 317 { l3_debug(st, "ilen > nlen || ilen == 0");
318 return; 318 return;
319 } 319 }
320 nlen -= ilen; 320 nlen -= ilen;
321 id = 0; 321 id = 0;
322 while (ilen > 0) 322 while (ilen > 0)
323 { id = (id << 8) | (*p++ & 0xFF); /* invoke identifier */ 323 { id = (id << 8) | (*p++ & 0xFF); /* invoke identifier */
324 ilen--; 324 ilen--;
325 } 325 }
326 326
327 switch (cp_tag) { /* component tag */ 327 switch (cp_tag) { /* component tag */
328 case 1: /* invoke */ 328 case 1: /* invoke */
329 if (nlen < 2) { 329 if (nlen < 2) {
330 l3_debug(st, "nlen < 2 22"); 330 l3_debug(st, "nlen < 2 22");
331 return; 331 return;
332 } 332 }
333 if (*p != 0x02) { /* operation value */ 333 if (*p != 0x02) { /* operation value */
334 l3_debug(st, "operation value !=0x02"); 334 l3_debug(st, "operation value !=0x02");
335 return; 335 return;
336 } 336 }
337 p++; 337 p++;
338 nlen--; 338 nlen--;
339 ilen = *p++; 339 ilen = *p++;
340 nlen--; 340 nlen--;
341 if (ilen > nlen || ilen == 0) { 341 if (ilen > nlen || ilen == 0) {
342 l3_debug(st, "ilen > nlen || ilen == 0 22"); 342 l3_debug(st, "ilen > nlen || ilen == 0 22");
343 return; 343 return;
344 } 344 }
345 nlen -= ilen; 345 nlen -= ilen;
346 ident = 0; 346 ident = 0;
347 while (ilen > 0) { 347 while (ilen > 0) {
348 ident = (ident << 8) | (*p++ & 0xFF); 348 ident = (ident << 8) | (*p++ & 0xFF);
349 ilen--; 349 ilen--;
350 } 350 }
351 351
352 if (!pc) 352 if (!pc)
353 { l3dss1_dummy_invoke(st, cr, id, ident, p, nlen); 353 { l3dss1_dummy_invoke(st, cr, id, ident, p, nlen);
354 return; 354 return;
355 } 355 }
356#ifdef CONFIG_DE_AOC 356#ifdef CONFIG_DE_AOC
357 { 357 {
358 358
359#define FOO1(s,a,b) \ 359#define FOO1(s, a, b) \
360 while(nlen > 1) { \ 360 while (nlen > 1) { \
361 int ilen = p[1]; \ 361 int ilen = p[1]; \
362 if(nlen < ilen+2) { \ 362 if (nlen < ilen + 2) { \
363 l3_debug(st, "FOO1 nlen < ilen+2"); \ 363 l3_debug(st, "FOO1 nlen < ilen+2"); \
364 return; \ 364 return; \
365 } \ 365 } \
366 nlen -= ilen+2; \ 366 nlen -= ilen + 2; \
367 if((*p & 0xFF) == (a)) { \ 367 if ((*p & 0xFF) == (a)) { \
368 int nlen = ilen; \ 368 int nlen = ilen; \
369 p += 2; \ 369 p += 2; \
370 b; \ 370 b; \
371 } else { \ 371 } else { \
372 p += ilen+2; \ 372 p += ilen + 2; \
373 } \ 373 } \
374 } 374 }
375 375
376 switch (ident) { 376 switch (ident) {
377 case 0x22: /* during */ 377 case 0x22: /* during */
378 FOO1("1A", 0x30, FOO1("1C", 0xA1, FOO1("1D", 0x30, FOO1("1E", 0x02, ( { 378 FOO1("1A", 0x30, FOO1("1C", 0xA1, FOO1("1D", 0x30, FOO1("1E", 0x02, ( {
379 ident = 0; 379 ident = 0;
380 nlen = (nlen)?nlen:0; /* Make gcc happy */ 380 nlen = (nlen) ? nlen : 0; /* Make gcc happy */
381 while (ilen > 0) { 381 while (ilen > 0) {
382 ident = (ident << 8) | *p++; 382 ident = (ident << 8) | *p++;
383 ilen--; 383 ilen--;
384 } 384 }
385 if (ident > pc->para.chargeinfo) { 385 if (ident > pc->para.chargeinfo) {
386 pc->para.chargeinfo = ident; 386 pc->para.chargeinfo = ident;
387 st->l3.l3l4(st, CC_CHARGE | INDICATION, pc); 387 st->l3.l3l4(st, CC_CHARGE | INDICATION, pc);
388 } 388 }
389 if (st->l3.debug & L3_DEB_CHARGE) { 389 if (st->l3.debug & L3_DEB_CHARGE) {
390 if (*(p + 2) == 0) { 390 if (*(p + 2) == 0) {
391 l3_debug(st, "charging info during %d", pc->para.chargeinfo); 391 l3_debug(st, "charging info during %d", pc->para.chargeinfo);
392 } 392 }
393 else { 393 else {
394 l3_debug(st, "charging info final %d", pc->para.chargeinfo); 394 l3_debug(st, "charging info final %d", pc->para.chargeinfo);
395 } 395 }
396 } 396 }
397 }
398 )))))
399 break;
400 case 0x24: /* final */
401 FOO1("2A", 0x30, FOO1("2B", 0x30, FOO1("2C", 0xA1, FOO1("2D", 0x30, FOO1("2E", 0x02, ( {
402 ident = 0;
403 nlen = (nlen)?nlen:0; /* Make gcc happy */
404 while (ilen > 0) {
405 ident = (ident << 8) | *p++;
406 ilen--;
407 }
408 if (ident > pc->para.chargeinfo) {
409 pc->para.chargeinfo = ident;
410 st->l3.l3l4(st, CC_CHARGE | INDICATION, pc);
411 }
412 if (st->l3.debug & L3_DEB_CHARGE) {
413 l3_debug(st, "charging info final %d", pc->para.chargeinfo);
414 }
415 } 397 }
416 )))))) 398 )))))
417 break; 399 break;
418 default: 400 case 0x24: /* final */
419 l3_debug(st, "invoke break invalid ident %02x",ident); 401 FOO1("2A", 0x30, FOO1("2B", 0x30, FOO1("2C", 0xA1, FOO1("2D", 0x30, FOO1("2E", 0x02, ( {
420 break; 402 ident = 0;
421 } 403 nlen = (nlen) ? nlen : 0; /* Make gcc happy */
404 while (ilen > 0) {
405 ident = (ident << 8) | *p++;
406 ilen--;
407 }
408 if (ident > pc->para.chargeinfo) {
409 pc->para.chargeinfo = ident;
410 st->l3.l3l4(st, CC_CHARGE | INDICATION, pc);
411 }
412 if (st->l3.debug & L3_DEB_CHARGE) {
413 l3_debug(st, "charging info final %d", pc->para.chargeinfo);
414 }
415 }
416 ))))))
417 break;
418 default:
419 l3_debug(st, "invoke break invalid ident %02x", ident);
420 break;
421 }
422#undef FOO1 422#undef FOO1
423 423
424 } 424 }
425#else /* not CONFIG_DE_AOC */ 425#else /* not CONFIG_DE_AOC */
426 l3_debug(st, "invoke break"); 426 l3_debug(st, "invoke break");
427#endif /* not CONFIG_DE_AOC */ 427#endif /* not CONFIG_DE_AOC */
428 break; 428 break;
429 case 2: /* return result */ 429 case 2: /* return result */
430 /* if no process available handle separately */ 430 /* if no process available handle separately */
431 if (!pc) 431 if (!pc)
432 { if (cr == -1) 432 { if (cr == -1)
433 l3dss1_dummy_return_result(st, id, p, nlen); 433 l3dss1_dummy_return_result(st, id, p, nlen);
434 return; 434 return;
435 } 435 }
436 if ((pc->prot.dss1.invoke_id) && (pc->prot.dss1.invoke_id == id)) 436 if ((pc->prot.dss1.invoke_id) && (pc->prot.dss1.invoke_id == id))
437 { /* Diversion successful */ 437 { /* Diversion successful */
438 free_invoke_id(st,pc->prot.dss1.invoke_id); 438 free_invoke_id(st, pc->prot.dss1.invoke_id);
439 pc->prot.dss1.remote_result = 0; /* success */ 439 pc->prot.dss1.remote_result = 0; /* success */
440 pc->prot.dss1.invoke_id = 0; 440 pc->prot.dss1.invoke_id = 0;
441 pc->redir_result = pc->prot.dss1.remote_result; 441 pc->redir_result = pc->prot.dss1.remote_result;
442 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); } /* Diversion successful */ 442 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); } /* Diversion successful */
443 else 443 else
444 l3_debug(st,"return error unknown identifier"); 444 l3_debug(st, "return error unknown identifier");
445 break; 445 break;
446 case 3: /* return error */ 446 case 3: /* return error */
447 err_ret = 0; 447 err_ret = 0;
448 if (nlen < 2) 448 if (nlen < 2)
449 { l3_debug(st, "return error nlen < 2"); 449 { l3_debug(st, "return error nlen < 2");
450 return; 450 return;
451 } 451 }
452 if (*p != 0x02) 452 if (*p != 0x02)
453 { /* result tag */ 453 { /* result tag */
454 l3_debug(st, "invoke error tag !=0x02"); 454 l3_debug(st, "invoke error tag !=0x02");
455 return; 455 return;
456 } 456 }
457 p++; 457 p++;
458 nlen--; 458 nlen--;
459 if (*p > 4) 459 if (*p > 4)
460 { /* length format */ 460 { /* length format */
461 l3_debug(st, "invoke return errlen > 4 "); 461 l3_debug(st, "invoke return errlen > 4 ");
462 return; 462 return;
463 } 463 }
464 ilen = *p++; 464 ilen = *p++;
465 nlen--; 465 nlen--;
466 if (ilen > nlen || ilen == 0) 466 if (ilen > nlen || ilen == 0)
467 { l3_debug(st, "error return ilen > nlen || ilen == 0"); 467 { l3_debug(st, "error return ilen > nlen || ilen == 0");
468 return; 468 return;
469 } 469 }
470 nlen -= ilen; 470 nlen -= ilen;
471 while (ilen > 0) 471 while (ilen > 0)
472 { err_ret = (err_ret << 8) | (*p++ & 0xFF); /* error value */ 472 { err_ret = (err_ret << 8) | (*p++ & 0xFF); /* error value */
473 ilen--; 473 ilen--;
474 } 474 }
475 /* if no process available handle separately */ 475 /* if no process available handle separately */
476 if (!pc) 476 if (!pc)
477 { if (cr == -1) 477 { if (cr == -1)
478 l3dss1_dummy_error_return(st, id, err_ret); 478 l3dss1_dummy_error_return(st, id, err_ret);
479 return; 479 return;
480 } 480 }
481 if ((pc->prot.dss1.invoke_id) && (pc->prot.dss1.invoke_id == id)) 481 if ((pc->prot.dss1.invoke_id) && (pc->prot.dss1.invoke_id == id))
482 { /* Deflection error */ 482 { /* Deflection error */
483 free_invoke_id(st,pc->prot.dss1.invoke_id); 483 free_invoke_id(st, pc->prot.dss1.invoke_id);
484 pc->prot.dss1.remote_result = err_ret; /* result */ 484 pc->prot.dss1.remote_result = err_ret; /* result */
485 pc->prot.dss1.invoke_id = 0; 485 pc->prot.dss1.invoke_id = 0;
486 pc->redir_result = pc->prot.dss1.remote_result; 486 pc->redir_result = pc->prot.dss1.remote_result;
487 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); 487 st->l3.l3l4(st, CC_REDIR | INDICATION, pc);
488 } /* Deflection error */ 488 } /* Deflection error */
489 else 489 else
490 l3_debug(st,"return result unknown identifier"); 490 l3_debug(st, "return result unknown identifier");
491 break; 491 break;
492 default: 492 default:
493 l3_debug(st, "facility default break tag=0x%02x",cp_tag); 493 l3_debug(st, "facility default break tag=0x%02x", cp_tag);
494 break; 494 break;
495 } 495 }
496} 496}
497 497
@@ -568,21 +568,21 @@ l3dss1_msg_without_setup(struct l3_process *pc, u_char pr, void *arg)
568 struct sk_buff *skb; 568 struct sk_buff *skb;
569 569
570 switch (pc->para.cause) { 570 switch (pc->para.cause) {
571 case 81: /* invalid callreference */ 571 case 81: /* invalid callreference */
572 case 88: /* incomp destination */ 572 case 88: /* incomp destination */
573 case 96: /* mandory IE missing */ 573 case 96: /* mandory IE missing */
574 case 100: /* invalid IE contents */ 574 case 100: /* invalid IE contents */
575 case 101: /* incompatible Callstate */ 575 case 101: /* incompatible Callstate */
576 MsgHead(p, pc->callref, MT_RELEASE_COMPLETE); 576 MsgHead(p, pc->callref, MT_RELEASE_COMPLETE);
577 *p++ = IE_CAUSE; 577 *p++ = IE_CAUSE;
578 *p++ = 0x2; 578 *p++ = 0x2;
579 *p++ = 0x80; 579 *p++ = 0x80;
580 *p++ = pc->para.cause | 0x80; 580 *p++ = pc->para.cause | 0x80;
581 break; 581 break;
582 default: 582 default:
583 printk(KERN_ERR "HiSax l3dss1_msg_without_setup wrong cause %d\n", 583 printk(KERN_ERR "HiSax l3dss1_msg_without_setup wrong cause %d\n",
584 pc->para.cause); 584 pc->para.cause);
585 return; 585 return;
586 } 586 }
587 l = p - tmp; 587 l = p - tmp;
588 if (!(skb = l3_alloc_skb(l))) 588 if (!(skb = l3_alloc_skb(l)))
@@ -593,42 +593,42 @@ l3dss1_msg_without_setup(struct l3_process *pc, u_char pr, void *arg)
593} 593}
594 594
595static int ie_ALERTING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 595static int ie_ALERTING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
596 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_HLC, 596 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_HLC,
597 IE_USER_USER, -1}; 597 IE_USER_USER, -1};
598static int ie_CALL_PROCEEDING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 598static int ie_CALL_PROCEEDING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
599 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_HLC, -1}; 599 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_HLC, -1};
600static int ie_CONNECT[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 600static int ie_CONNECT[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
601 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_DATE, IE_SIGNAL, 601 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_DATE, IE_SIGNAL,
602 IE_CONNECT_PN, IE_CONNECT_SUB, IE_LLC, IE_HLC, IE_USER_USER, -1}; 602 IE_CONNECT_PN, IE_CONNECT_SUB, IE_LLC, IE_HLC, IE_USER_USER, -1};
603static int ie_CONNECT_ACKNOWLEDGE[] = {IE_CHANNEL_ID, IE_DISPLAY, IE_SIGNAL, -1}; 603static int ie_CONNECT_ACKNOWLEDGE[] = {IE_CHANNEL_ID, IE_DISPLAY, IE_SIGNAL, -1};
604static int ie_DISCONNECT[] = {IE_CAUSE | IE_MANDATORY, IE_FACILITY, 604static int ie_DISCONNECT[] = {IE_CAUSE | IE_MANDATORY, IE_FACILITY,
605 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1}; 605 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1};
606static int ie_INFORMATION[] = {IE_COMPLETE, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, 606static int ie_INFORMATION[] = {IE_COMPLETE, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL,
607 IE_CALLED_PN, -1}; 607 IE_CALLED_PN, -1};
608static int ie_NOTIFY[] = {IE_BEARER, IE_NOTIFY | IE_MANDATORY, IE_DISPLAY, -1}; 608static int ie_NOTIFY[] = {IE_BEARER, IE_NOTIFY | IE_MANDATORY, IE_DISPLAY, -1};
609static int ie_PROGRESS[] = {IE_BEARER, IE_CAUSE, IE_FACILITY, IE_PROGRESS | 609static int ie_PROGRESS[] = {IE_BEARER, IE_CAUSE, IE_FACILITY, IE_PROGRESS |
610 IE_MANDATORY, IE_DISPLAY, IE_HLC, IE_USER_USER, -1}; 610 IE_MANDATORY, IE_DISPLAY, IE_HLC, IE_USER_USER, -1};
611static int ie_RELEASE[] = {IE_CAUSE | IE_MANDATORY_1, IE_FACILITY, IE_DISPLAY, 611static int ie_RELEASE[] = {IE_CAUSE | IE_MANDATORY_1, IE_FACILITY, IE_DISPLAY,
612 IE_SIGNAL, IE_USER_USER, -1}; 612 IE_SIGNAL, IE_USER_USER, -1};
613/* a RELEASE_COMPLETE with errors don't require special actions 613/* a RELEASE_COMPLETE with errors don't require special actions
614static int ie_RELEASE_COMPLETE[] = {IE_CAUSE | IE_MANDATORY_1, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1}; 614 static int ie_RELEASE_COMPLETE[] = {IE_CAUSE | IE_MANDATORY_1, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1};
615*/ 615*/
616static int ie_RESUME_ACKNOWLEDGE[] = {IE_CHANNEL_ID| IE_MANDATORY, IE_FACILITY, 616static int ie_RESUME_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY,
617 IE_DISPLAY, -1}; 617 IE_DISPLAY, -1};
618static int ie_RESUME_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 618static int ie_RESUME_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
619static int ie_SETUP[] = {IE_COMPLETE, IE_BEARER | IE_MANDATORY, 619static int ie_SETUP[] = {IE_COMPLETE, IE_BEARER | IE_MANDATORY,
620 IE_CHANNEL_ID| IE_MANDATORY, IE_FACILITY, IE_PROGRESS, 620 IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY, IE_PROGRESS,
621 IE_NET_FAC, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, IE_CALLING_PN, 621 IE_NET_FAC, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, IE_CALLING_PN,
622 IE_CALLING_SUB, IE_CALLED_PN, IE_CALLED_SUB, IE_REDIR_NR, 622 IE_CALLING_SUB, IE_CALLED_PN, IE_CALLED_SUB, IE_REDIR_NR,
623 IE_LLC, IE_HLC, IE_USER_USER, -1}; 623 IE_LLC, IE_HLC, IE_USER_USER, -1};
624static int ie_SETUP_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY, 624static int ie_SETUP_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY,
625 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, -1}; 625 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, -1};
626static int ie_STATUS[] = {IE_CAUSE | IE_MANDATORY, IE_CALL_STATE | 626static int ie_STATUS[] = {IE_CAUSE | IE_MANDATORY, IE_CALL_STATE |
627 IE_MANDATORY, IE_DISPLAY, -1}; 627 IE_MANDATORY, IE_DISPLAY, -1};
628static int ie_STATUS_ENQUIRY[] = {IE_DISPLAY, -1}; 628static int ie_STATUS_ENQUIRY[] = {IE_DISPLAY, -1};
629static int ie_SUSPEND_ACKNOWLEDGE[] = {IE_DISPLAY, IE_FACILITY, -1}; 629static int ie_SUSPEND_ACKNOWLEDGE[] = {IE_DISPLAY, IE_FACILITY, -1};
630static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 630static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
631/* not used 631/* not used
632 * static int ie_CONGESTION_CONTROL[] = {IE_CONGESTION | IE_MANDATORY, 632 * static int ie_CONGESTION_CONTROL[] = {IE_CONGESTION | IE_MANDATORY,
633 * IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 633 * IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
634 * static int ie_USER_INFORMATION[] = {IE_MORE_DATA, IE_USER_USER | IE_MANDATORY, -1}; 634 * static int ie_USER_INFORMATION[] = {IE_MORE_DATA, IE_USER_USER | IE_MANDATORY, -1};
@@ -636,8 +636,8 @@ static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
636 * IE_MANDATORY, -1}; 636 * IE_MANDATORY, -1};
637 */ 637 */
638static int ie_FACILITY[] = {IE_FACILITY | IE_MANDATORY, IE_DISPLAY, -1}; 638static int ie_FACILITY[] = {IE_FACILITY | IE_MANDATORY, IE_DISPLAY, -1};
639static int comp_required[] = {1,2,3,5,6,7,9,10,11,14,15,-1}; 639static int comp_required[] = {1, 2, 3, 5, 6, 7, 9, 10, 11, 14, 15, -1};
640static int l3_valid_states[] = {0,1,2,3,4,6,7,8,9,10,11,12,15,17,19,25,-1}; 640static int l3_valid_states[] = {0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 15, 17, 19, 25, -1};
641 641
642struct ie_len { 642struct ie_len {
643 int ie; 643 int ie;
@@ -678,7 +678,7 @@ struct ie_len max_ie_len[] = {
678 {IE_LLC, 18}, 678 {IE_LLC, 18},
679 {IE_HLC, 5}, 679 {IE_HLC, 5},
680 {IE_USER_USER, 131}, 680 {IE_USER_USER, 131},
681 {-1,0}, 681 {-1, 0},
682}; 682};
683 683
684static int 684static int
@@ -686,10 +686,10 @@ getmax_ie_len(u_char ie) {
686 int i = 0; 686 int i = 0;
687 while (max_ie_len[i].ie != -1) { 687 while (max_ie_len[i].ie != -1) {
688 if (max_ie_len[i].ie == ie) 688 if (max_ie_len[i].ie == ie)
689 return(max_ie_len[i].len); 689 return (max_ie_len[i].len);
690 i++; 690 i++;
691 } 691 }
692 return(255); 692 return (255);
693} 693}
694 694
695static int 695static int
@@ -699,14 +699,14 @@ ie_in_set(struct l3_process *pc, u_char ie, int *checklist) {
699 while (*checklist != -1) { 699 while (*checklist != -1) {
700 if ((*checklist & 0xff) == ie) { 700 if ((*checklist & 0xff) == ie) {
701 if (ie & 0x80) 701 if (ie & 0x80)
702 return(-ret); 702 return (-ret);
703 else 703 else
704 return(ret); 704 return (ret);
705 } 705 }
706 ret++; 706 ret++;
707 checklist++; 707 checklist++;
708 } 708 }
709 return(0); 709 return (0);
710} 710}
711 711
712static int 712static int
@@ -720,7 +720,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
720 u_char codeset = 0; 720 u_char codeset = 0;
721 u_char old_codeset = 0; 721 u_char old_codeset = 0;
722 u_char codelock = 1; 722 u_char codelock = 1;
723 723
724 p = skb->data; 724 p = skb->data;
725 /* skip cr */ 725 /* skip cr */
726 p++; 726 p++;
@@ -738,7 +738,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
738 codelock = 1; 738 codelock = 1;
739 if (pc->debug & L3_DEB_CHECK) 739 if (pc->debug & L3_DEB_CHECK)
740 l3_debug(pc->st, "check IE shift%scodeset %d->%d", 740 l3_debug(pc->st, "check IE shift%scodeset %d->%d",
741 codelock ? " locking ": " ", old_codeset, codeset); 741 codelock ? " locking " : " ", old_codeset, codeset);
742 p++; 742 p++;
743 continue; 743 continue;
744 } 744 }
@@ -770,7 +770,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
770 if (!codelock) { 770 if (!codelock) {
771 if (pc->debug & L3_DEB_CHECK) 771 if (pc->debug & L3_DEB_CHECK)
772 l3_debug(pc->st, "check IE shift back codeset %d->%d", 772 l3_debug(pc->st, "check IE shift back codeset %d->%d",
773 codeset, old_codeset); 773 codeset, old_codeset);
774 codeset = old_codeset; 774 codeset = old_codeset;
775 codelock = 1; 775 codelock = 1;
776 } 776 }
@@ -778,17 +778,17 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
778 if (err_compr | err_ureg | err_len | err_seq) { 778 if (err_compr | err_ureg | err_len | err_seq) {
779 if (pc->debug & L3_DEB_CHECK) 779 if (pc->debug & L3_DEB_CHECK)
780 l3_debug(pc->st, "check IE MT(%x) %d/%d/%d/%d", 780 l3_debug(pc->st, "check IE MT(%x) %d/%d/%d/%d",
781 mt, err_compr, err_ureg, err_len, err_seq); 781 mt, err_compr, err_ureg, err_len, err_seq);
782 if (err_compr) 782 if (err_compr)
783 return(ERR_IE_COMPREHENSION); 783 return (ERR_IE_COMPREHENSION);
784 if (err_ureg) 784 if (err_ureg)
785 return(ERR_IE_UNRECOGNIZED); 785 return (ERR_IE_UNRECOGNIZED);
786 if (err_len) 786 if (err_len)
787 return(ERR_IE_LENGTH); 787 return (ERR_IE_LENGTH);
788 if (err_seq) 788 if (err_seq)
789 return(ERR_IE_SEQUENCE); 789 return (ERR_IE_SEQUENCE);
790 } 790 }
791 return(0); 791 return (0);
792} 792}
793 793
794/* verify if a message type exists and contain no IE error */ 794/* verify if a message type exists and contain no IE error */
@@ -796,42 +796,42 @@ static int
796l3dss1_check_messagetype_validity(struct l3_process *pc, int mt, void *arg) 796l3dss1_check_messagetype_validity(struct l3_process *pc, int mt, void *arg)
797{ 797{
798 switch (mt) { 798 switch (mt) {
799 case MT_ALERTING: 799 case MT_ALERTING:
800 case MT_CALL_PROCEEDING: 800 case MT_CALL_PROCEEDING:
801 case MT_CONNECT: 801 case MT_CONNECT:
802 case MT_CONNECT_ACKNOWLEDGE: 802 case MT_CONNECT_ACKNOWLEDGE:
803 case MT_DISCONNECT: 803 case MT_DISCONNECT:
804 case MT_INFORMATION: 804 case MT_INFORMATION:
805 case MT_FACILITY: 805 case MT_FACILITY:
806 case MT_NOTIFY: 806 case MT_NOTIFY:
807 case MT_PROGRESS: 807 case MT_PROGRESS:
808 case MT_RELEASE: 808 case MT_RELEASE:
809 case MT_RELEASE_COMPLETE: 809 case MT_RELEASE_COMPLETE:
810 case MT_SETUP: 810 case MT_SETUP:
811 case MT_SETUP_ACKNOWLEDGE: 811 case MT_SETUP_ACKNOWLEDGE:
812 case MT_RESUME_ACKNOWLEDGE: 812 case MT_RESUME_ACKNOWLEDGE:
813 case MT_RESUME_REJECT: 813 case MT_RESUME_REJECT:
814 case MT_SUSPEND_ACKNOWLEDGE: 814 case MT_SUSPEND_ACKNOWLEDGE:
815 case MT_SUSPEND_REJECT: 815 case MT_SUSPEND_REJECT:
816 case MT_USER_INFORMATION: 816 case MT_USER_INFORMATION:
817 case MT_RESTART: 817 case MT_RESTART:
818 case MT_RESTART_ACKNOWLEDGE: 818 case MT_RESTART_ACKNOWLEDGE:
819 case MT_CONGESTION_CONTROL: 819 case MT_CONGESTION_CONTROL:
820 case MT_STATUS: 820 case MT_STATUS:
821 case MT_STATUS_ENQUIRY: 821 case MT_STATUS_ENQUIRY:
822 if (pc->debug & L3_DEB_CHECK) 822 if (pc->debug & L3_DEB_CHECK)
823 l3_debug(pc->st, "l3dss1_check_messagetype_validity mt(%x) OK", mt); 823 l3_debug(pc->st, "l3dss1_check_messagetype_validity mt(%x) OK", mt);
824 break; 824 break;
825 case MT_RESUME: /* RESUME only in user->net */ 825 case MT_RESUME: /* RESUME only in user->net */
826 case MT_SUSPEND: /* SUSPEND only in user->net */ 826 case MT_SUSPEND: /* SUSPEND only in user->net */
827 default: 827 default:
828 if (pc->debug & (L3_DEB_CHECK | L3_DEB_WARN)) 828 if (pc->debug & (L3_DEB_CHECK | L3_DEB_WARN))
829 l3_debug(pc->st, "l3dss1_check_messagetype_validity mt(%x) fail", mt); 829 l3_debug(pc->st, "l3dss1_check_messagetype_validity mt(%x) fail", mt);
830 pc->para.cause = 97; 830 pc->para.cause = 97;
831 l3dss1_status_send(pc, 0, NULL); 831 l3dss1_status_send(pc, 0, NULL);
832 return(1); 832 return (1);
833 } 833 }
834 return(0); 834 return (0);
835} 835}
836 836
837static void 837static void
@@ -839,24 +839,24 @@ l3dss1_std_ie_err(struct l3_process *pc, int ret) {
839 839
840 if (pc->debug & L3_DEB_CHECK) 840 if (pc->debug & L3_DEB_CHECK)
841 l3_debug(pc->st, "check_infoelements ret %d", ret); 841 l3_debug(pc->st, "check_infoelements ret %d", ret);
842 switch(ret) { 842 switch (ret) {
843 case 0: 843 case 0:
844 break; 844 break;
845 case ERR_IE_COMPREHENSION: 845 case ERR_IE_COMPREHENSION:
846 pc->para.cause = 96; 846 pc->para.cause = 96;
847 l3dss1_status_send(pc, 0, NULL); 847 l3dss1_status_send(pc, 0, NULL);
848 break; 848 break;
849 case ERR_IE_UNRECOGNIZED: 849 case ERR_IE_UNRECOGNIZED:
850 pc->para.cause = 99; 850 pc->para.cause = 99;
851 l3dss1_status_send(pc, 0, NULL); 851 l3dss1_status_send(pc, 0, NULL);
852 break; 852 break;
853 case ERR_IE_LENGTH: 853 case ERR_IE_LENGTH:
854 pc->para.cause = 100; 854 pc->para.cause = 100;
855 l3dss1_status_send(pc, 0, NULL); 855 l3dss1_status_send(pc, 0, NULL);
856 break; 856 break;
857 case ERR_IE_SEQUENCE: 857 case ERR_IE_SEQUENCE:
858 default: 858 default:
859 break; 859 break;
860 } 860 }
861} 861}
862 862
@@ -878,14 +878,14 @@ l3dss1_get_channel_id(struct l3_process *pc, struct sk_buff *skb) {
878 l3_debug(pc->st, "wrong chid %x", *p); 878 l3_debug(pc->st, "wrong chid %x", *p);
879 return (-3); 879 return (-3);
880 } 880 }
881 return(*p & 0x3); 881 return (*p & 0x3);
882 } else 882 } else
883 return(-1); 883 return (-1);
884} 884}
885 885
886static int 886static int
887l3dss1_get_cause(struct l3_process *pc, struct sk_buff *skb) { 887l3dss1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
888 u_char l, i=0; 888 u_char l, i = 0;
889 u_char *p; 889 u_char *p;
890 890
891 p = skb->data; 891 p = skb->data;
@@ -894,13 +894,13 @@ l3dss1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
894 if ((p = findie(p, skb->len, IE_CAUSE, 0))) { 894 if ((p = findie(p, skb->len, IE_CAUSE, 0))) {
895 p++; 895 p++;
896 l = *p++; 896 l = *p++;
897 if (l>30) 897 if (l > 30)
898 return(1); 898 return (1);
899 if (l) { 899 if (l) {
900 pc->para.loc = *p++; 900 pc->para.loc = *p++;
901 l--; 901 l--;
902 } else { 902 } else {
903 return(2); 903 return (2);
904 } 904 }
905 if (l && !(pc->para.loc & 0x80)) { 905 if (l && !(pc->para.loc & 0x80)) {
906 l--; 906 l--;
@@ -910,36 +910,36 @@ l3dss1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
910 pc->para.cause = *p++; 910 pc->para.cause = *p++;
911 l--; 911 l--;
912 if (!(pc->para.cause & 0x80)) 912 if (!(pc->para.cause & 0x80))
913 return(3); 913 return (3);
914 } else 914 } else
915 return(4); 915 return (4);
916 while (l && (i<6)) { 916 while (l && (i < 6)) {
917 pc->para.diag[i++] = *p++; 917 pc->para.diag[i++] = *p++;
918 l--; 918 l--;
919 } 919 }
920 } else 920 } else
921 return(-1); 921 return (-1);
922 return(0); 922 return (0);
923} 923}
924 924
925static void 925static void
926l3dss1_msg_with_uus(struct l3_process *pc, u_char cmd) 926l3dss1_msg_with_uus(struct l3_process *pc, u_char cmd)
927{ 927{
928 struct sk_buff *skb; 928 struct sk_buff *skb;
929 u_char tmp[16+40]; 929 u_char tmp[16 + 40];
930 u_char *p = tmp; 930 u_char *p = tmp;
931 int l; 931 int l;
932 932
933 MsgHead(p, pc->callref, cmd); 933 MsgHead(p, pc->callref, cmd);
934 934
935 if (pc->prot.dss1.uus1_data[0]) 935 if (pc->prot.dss1.uus1_data[0])
936 { *p++ = IE_USER_USER; /* UUS info element */ 936 { *p++ = IE_USER_USER; /* UUS info element */
937 *p++ = strlen(pc->prot.dss1.uus1_data) + 1; 937 *p++ = strlen(pc->prot.dss1.uus1_data) + 1;
938 *p++ = 0x04; /* IA5 chars */ 938 *p++ = 0x04; /* IA5 chars */
939 strcpy(p,pc->prot.dss1.uus1_data); 939 strcpy(p, pc->prot.dss1.uus1_data);
940 p += strlen(pc->prot.dss1.uus1_data); 940 p += strlen(pc->prot.dss1.uus1_data);
941 pc->prot.dss1.uus1_data[0] = '\0'; 941 pc->prot.dss1.uus1_data[0] = '\0';
942 } 942 }
943 943
944 l = p - tmp; 944 l = p - tmp;
945 if (!(skb = l3_alloc_skb(l))) 945 if (!(skb = l3_alloc_skb(l)))
@@ -953,7 +953,7 @@ l3dss1_release_req(struct l3_process *pc, u_char pr, void *arg)
953{ 953{
954 StopAllL3Timer(pc); 954 StopAllL3Timer(pc);
955 newl3state(pc, 19); 955 newl3state(pc, 19);
956 if (!pc->prot.dss1.uus1_data[0]) 956 if (!pc->prot.dss1.uus1_data[0])
957 l3dss1_message(pc, MT_RELEASE); 957 l3dss1_message(pc, MT_RELEASE);
958 else 958 else
959 l3dss1_msg_with_uus(pc, MT_RELEASE); 959 l3dss1_msg_with_uus(pc, MT_RELEASE);
@@ -966,9 +966,9 @@ l3dss1_release_cmpl(struct l3_process *pc, u_char pr, void *arg)
966 struct sk_buff *skb = arg; 966 struct sk_buff *skb = arg;
967 int ret; 967 int ret;
968 968
969 if ((ret = l3dss1_get_cause(pc, skb))>0) { 969 if ((ret = l3dss1_get_cause(pc, skb)) > 0) {
970 if (pc->debug & L3_DEB_WARN) 970 if (pc->debug & L3_DEB_WARN)
971 l3_debug(pc->st, "RELCMPL get_cause ret(%d)",ret); 971 l3_debug(pc->st, "RELCMPL get_cause ret(%d)", ret);
972 } else if (ret < 0) 972 } else if (ret < 0)
973 pc->para.cause = NO_CAUSE; 973 pc->para.cause = NO_CAUSE;
974 StopAllL3Timer(pc); 974 StopAllL3Timer(pc);
@@ -980,7 +980,7 @@ l3dss1_release_cmpl(struct l3_process *pc, u_char pr, void *arg)
980#ifdef EXT_BEARER_CAPS 980#ifdef EXT_BEARER_CAPS
981 981
982static u_char * 982static u_char *
983EncodeASyncParams(u_char * p, u_char si2) 983EncodeASyncParams(u_char *p, u_char si2)
984{ // 7c 06 88 90 21 42 00 bb 984{ // 7c 06 88 90 21 42 00 bb
985 985
986 p[0] = 0; 986 p[0] = 0;
@@ -1008,38 +1008,38 @@ EncodeASyncParams(u_char * p, u_char si2)
1008 p[2] += 3; 1008 p[2] += 3;
1009 1009
1010 switch (si2 & 0x07) { 1010 switch (si2 & 0x07) {
1011 case 0: 1011 case 0:
1012 p[0] = 66; // 1200 bit/s 1012 p[0] = 66; // 1200 bit/s
1013 1013
1014 break; 1014 break;
1015 case 1: 1015 case 1:
1016 p[0] = 88; // 1200/75 bit/s 1016 p[0] = 88; // 1200/75 bit/s
1017 1017
1018 break; 1018 break;
1019 case 2: 1019 case 2:
1020 p[0] = 87; // 75/1200 bit/s 1020 p[0] = 87; // 75/1200 bit/s
1021 1021
1022 break; 1022 break;
1023 case 3: 1023 case 3:
1024 p[0] = 67; // 2400 bit/s 1024 p[0] = 67; // 2400 bit/s
1025 1025
1026 break; 1026 break;
1027 case 4: 1027 case 4:
1028 p[0] = 69; // 4800 bit/s 1028 p[0] = 69; // 4800 bit/s
1029 1029
1030 break; 1030 break;
1031 case 5: 1031 case 5:
1032 p[0] = 72; // 9600 bit/s 1032 p[0] = 72; // 9600 bit/s
1033 1033
1034 break; 1034 break;
1035 case 6: 1035 case 6:
1036 p[0] = 73; // 14400 bit/s 1036 p[0] = 73; // 14400 bit/s
1037 1037
1038 break; 1038 break;
1039 case 7: 1039 case 7:
1040 p[0] = 75; // 19200 bit/s 1040 p[0] = 75; // 19200 bit/s
1041 1041
1042 break; 1042 break;
1043 } 1043 }
1044 return p + 3; 1044 return p + 3;
1045} 1045}
@@ -1049,84 +1049,84 @@ EncodeSyncParams(u_char si2, u_char ai)
1049{ 1049{
1050 1050
1051 switch (si2) { 1051 switch (si2) {
1052 case 0: 1052 case 0:
1053 return ai + 2; // 1200 bit/s 1053 return ai + 2; // 1200 bit/s
1054 1054
1055 case 1: 1055 case 1:
1056 return ai + 24; // 1200/75 bit/s 1056 return ai + 24; // 1200/75 bit/s
1057 1057
1058 case 2: 1058 case 2:
1059 return ai + 23; // 75/1200 bit/s 1059 return ai + 23; // 75/1200 bit/s
1060 1060
1061 case 3: 1061 case 3:
1062 return ai + 3; // 2400 bit/s 1062 return ai + 3; // 2400 bit/s
1063 1063
1064 case 4: 1064 case 4:
1065 return ai + 5; // 4800 bit/s 1065 return ai + 5; // 4800 bit/s
1066 1066
1067 case 5: 1067 case 5:
1068 return ai + 8; // 9600 bit/s 1068 return ai + 8; // 9600 bit/s
1069 1069
1070 case 6: 1070 case 6:
1071 return ai + 9; // 14400 bit/s 1071 return ai + 9; // 14400 bit/s
1072 1072
1073 case 7: 1073 case 7:
1074 return ai + 11; // 19200 bit/s 1074 return ai + 11; // 19200 bit/s
1075 1075
1076 case 8: 1076 case 8:
1077 return ai + 14; // 48000 bit/s 1077 return ai + 14; // 48000 bit/s
1078 1078
1079 case 9: 1079 case 9:
1080 return ai + 15; // 56000 bit/s 1080 return ai + 15; // 56000 bit/s
1081 1081
1082 case 15: 1082 case 15:
1083 return ai + 40; // negotiate bit/s 1083 return ai + 40; // negotiate bit/s
1084 1084
1085 default: 1085 default:
1086 break; 1086 break;
1087 } 1087 }
1088 return ai; 1088 return ai;
1089} 1089}
1090 1090
1091 1091
1092static u_char 1092static u_char
1093DecodeASyncParams(u_char si2, u_char * p) 1093DecodeASyncParams(u_char si2, u_char *p)
1094{ 1094{
1095 u_char info; 1095 u_char info;
1096 1096
1097 switch (p[5]) { 1097 switch (p[5]) {
1098 case 66: // 1200 bit/s 1098 case 66: // 1200 bit/s
1099 1099
1100 break; // si2 don't change 1100 break; // si2 don't change
1101 1101
1102 case 88: // 1200/75 bit/s 1102 case 88: // 1200/75 bit/s
1103 1103
1104 si2 += 1; 1104 si2 += 1;
1105 break; 1105 break;
1106 case 87: // 75/1200 bit/s 1106 case 87: // 75/1200 bit/s
1107 1107
1108 si2 += 2; 1108 si2 += 2;
1109 break; 1109 break;
1110 case 67: // 2400 bit/s 1110 case 67: // 2400 bit/s
1111 1111
1112 si2 += 3; 1112 si2 += 3;
1113 break; 1113 break;
1114 case 69: // 4800 bit/s 1114 case 69: // 4800 bit/s
1115 1115
1116 si2 += 4; 1116 si2 += 4;
1117 break; 1117 break;
1118 case 72: // 9600 bit/s 1118 case 72: // 9600 bit/s
1119 1119
1120 si2 += 5; 1120 si2 += 5;
1121 break; 1121 break;
1122 case 73: // 14400 bit/s 1122 case 73: // 14400 bit/s
1123 1123
1124 si2 += 6; 1124 si2 += 6;
1125 break; 1125 break;
1126 case 75: // 19200 bit/s 1126 case 75: // 19200 bit/s
1127 1127
1128 si2 += 7; 1128 si2 += 7;
1129 break; 1129 break;
1130 } 1130 }
1131 1131
1132 info = p[7] & 0x7f; 1132 info = p[7] & 0x7f;
@@ -1151,39 +1151,39 @@ DecodeSyncParams(u_char si2, u_char info)
1151{ 1151{
1152 info &= 0x7f; 1152 info &= 0x7f;
1153 switch (info) { 1153 switch (info) {
1154 case 40: // bit/s negotiation failed ai := 165 not 175! 1154 case 40: // bit/s negotiation failed ai := 165 not 175!
1155 1155
1156 return si2 + 15; 1156 return si2 + 15;
1157 case 15: // 56000 bit/s failed, ai := 0 not 169 ! 1157 case 15: // 56000 bit/s failed, ai := 0 not 169 !
1158 1158
1159 return si2 + 9; 1159 return si2 + 9;
1160 case 14: // 48000 bit/s 1160 case 14: // 48000 bit/s
1161 1161
1162 return si2 + 8; 1162 return si2 + 8;
1163 case 11: // 19200 bit/s 1163 case 11: // 19200 bit/s
1164 1164
1165 return si2 + 7; 1165 return si2 + 7;
1166 case 9: // 14400 bit/s 1166 case 9: // 14400 bit/s
1167 1167
1168 return si2 + 6; 1168 return si2 + 6;
1169 case 8: // 9600 bit/s 1169 case 8: // 9600 bit/s
1170 1170
1171 return si2 + 5; 1171 return si2 + 5;
1172 case 5: // 4800 bit/s 1172 case 5: // 4800 bit/s
1173 1173
1174 return si2 + 4; 1174 return si2 + 4;
1175 case 3: // 2400 bit/s 1175 case 3: // 2400 bit/s
1176 1176
1177 return si2 + 3; 1177 return si2 + 3;
1178 case 23: // 75/1200 bit/s 1178 case 23: // 75/1200 bit/s
1179 1179
1180 return si2 + 2; 1180 return si2 + 2;
1181 case 24: // 1200/75 bit/s 1181 case 24: // 1200/75 bit/s
1182 1182
1183 return si2 + 1; 1183 return si2 + 1;
1184 default: // 1200 bit/s 1184 default: // 1200 bit/s
1185 1185
1186 return si2; 1186 return si2;
1187 } 1187 }
1188} 1188}
1189 1189
@@ -1194,20 +1194,20 @@ DecodeSI2(struct sk_buff *skb)
1194 1194
1195 if ((p = findie(skb->data, skb->len, 0x7c, 0))) { 1195 if ((p = findie(skb->data, skb->len, 0x7c, 0))) {
1196 switch (p[4] & 0x0f) { 1196 switch (p[4] & 0x0f) {
1197 case 0x01: 1197 case 0x01:
1198 if (p[1] == 0x04) // sync. Bitratenadaption 1198 if (p[1] == 0x04) // sync. Bitratenadaption
1199 1199
1200 return DecodeSyncParams(160, p[5]); // V.110/X.30 1200 return DecodeSyncParams(160, p[5]); // V.110/X.30
1201 1201
1202 else if (p[1] == 0x06) // async. Bitratenadaption 1202 else if (p[1] == 0x06) // async. Bitratenadaption
1203 1203
1204 return DecodeASyncParams(192, p); // V.110/X.30 1204 return DecodeASyncParams(192, p); // V.110/X.30
1205 1205
1206 break; 1206 break;
1207 case 0x08: // if (p[5] == 0x02) // sync. Bitratenadaption 1207 case 0x08: // if (p[5] == 0x02) // sync. Bitratenadaption
1208 if (p[1] > 3) 1208 if (p[1] > 3)
1209 return DecodeSyncParams(176, p[5]); // V.120 1209 return DecodeSyncParams(176, p[5]); // V.120
1210 break; 1210 break;
1211 } 1211 }
1212 } 1212 }
1213 return 0; 1213 return 0;
@@ -1225,7 +1225,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1225 u_char *p = tmp; 1225 u_char *p = tmp;
1226 u_char channel = 0; 1226 u_char channel = 0;
1227 1227
1228 u_char send_keypad; 1228 u_char send_keypad;
1229 u_char screen = 0x80; 1229 u_char screen = 0x80;
1230 u_char *teln; 1230 u_char *teln;
1231 u_char *msn; 1231 u_char *msn;
@@ -1237,7 +1237,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1237 1237
1238 teln = pc->para.setup.phone; 1238 teln = pc->para.setup.phone;
1239#ifndef CONFIG_HISAX_NO_KEYPAD 1239#ifndef CONFIG_HISAX_NO_KEYPAD
1240 send_keypad = (strchr(teln,'*') || strchr(teln,'#')) ? 1 : 0; 1240 send_keypad = (strchr(teln, '*') || strchr(teln, '#')) ? 1 : 0;
1241#else 1241#else
1242 send_keypad = 0; 1242 send_keypad = 0;
1243#endif 1243#endif
@@ -1272,7 +1272,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1272 while (*teln) 1272 while (*teln)
1273 *p++ = (*teln++) & 0x7F; 1273 *p++ = (*teln++) & 0x7F;
1274 } 1274 }
1275 1275
1276 /* 1276 /*
1277 * What about info2? Mapping to High-Layer-Compatibility? 1277 * What about info2? Mapping to High-Layer-Compatibility?
1278 */ 1278 */
@@ -1280,27 +1280,27 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1280 /* parse number for special things */ 1280 /* parse number for special things */
1281 if (!isdigit(*teln)) { 1281 if (!isdigit(*teln)) {
1282 switch (0x5f & *teln) { 1282 switch (0x5f & *teln) {
1283 case 'C': 1283 case 'C':
1284 channel = 0x08; 1284 channel = 0x08;
1285 case 'P': 1285 case 'P':
1286 channel |= 0x80; 1286 channel |= 0x80;
1287 teln++; 1287 teln++;
1288 if (*teln == '1') 1288 if (*teln == '1')
1289 channel |= 0x01; 1289 channel |= 0x01;
1290 else 1290 else
1291 channel |= 0x02; 1291 channel |= 0x02;
1292 break; 1292 break;
1293 case 'R': 1293 case 'R':
1294 screen = 0xA0; 1294 screen = 0xA0;
1295 break; 1295 break;
1296 case 'D': 1296 case 'D':
1297 screen = 0x80; 1297 screen = 0x80;
1298 break; 1298 break;
1299 1299
1300 default: 1300 default:
1301 if (pc->debug & L3_DEB_WARN) 1301 if (pc->debug & L3_DEB_WARN)
1302 l3_debug(pc->st, "Wrong MSN Code"); 1302 l3_debug(pc->st, "Wrong MSN Code");
1303 break; 1303 break;
1304 } 1304 }
1305 teln++; 1305 teln++;
1306 } 1306 }
@@ -1350,15 +1350,15 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1350 } else 1350 } else
1351 sp++; 1351 sp++;
1352 } 1352 }
1353 1353
1354 if (!send_keypad) { 1354 if (!send_keypad) {
1355 *p++ = IE_CALLED_PN; 1355 *p++ = IE_CALLED_PN;
1356 *p++ = strlen(teln) + 1; 1356 *p++ = strlen(teln) + 1;
1357 /* Classify as AnyPref. */ 1357 /* Classify as AnyPref. */
1358 *p++ = 0x81; /* Ext = '1'B, Type = '000'B, Plan = '0001'B. */ 1358 *p++ = 0x81; /* Ext = '1'B, Type = '000'B, Plan = '0001'B. */
1359 while (*teln) 1359 while (*teln)
1360 *p++ = *teln++ & 0x7f; 1360 *p++ = *teln++ & 0x7f;
1361 1361
1362 if (sub) { 1362 if (sub) {
1363 *sub++ = '.'; 1363 *sub++ = '.';
1364 *p++ = IE_CALLED_SUB; 1364 *p++ = IE_CALLED_SUB;
@@ -1368,7 +1368,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1368 while (*sub) 1368 while (*sub)
1369 *p++ = *sub++ & 0x7f; 1369 *p++ = *sub++ & 0x7f;
1370 } 1370 }
1371 } 1371 }
1372#ifdef EXT_BEARER_CAPS 1372#ifdef EXT_BEARER_CAPS
1373 if ((pc->para.setup.si2 >= 160) && (pc->para.setup.si2 <= 175)) { // sync. Bitratenadaption, V.110/X.30 1373 if ((pc->para.setup.si2 >= 160) && (pc->para.setup.si2 <= 175)) { // sync. Bitratenadaption, V.110/X.30
1374 1374
@@ -1397,7 +1397,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1397 p = EncodeASyncParams(p, pc->para.setup.si2 - 192); 1397 p = EncodeASyncParams(p, pc->para.setup.si2 - 192);
1398#ifndef CONFIG_HISAX_NO_LLC 1398#ifndef CONFIG_HISAX_NO_LLC
1399 } else { 1399 } else {
1400 switch (pc->para.setup.si1) { 1400 switch (pc->para.setup.si1) {
1401 case 1: /* Telephony */ 1401 case 1: /* Telephony */
1402 *p++ = IE_LLC; 1402 *p++ = IE_LLC;
1403 *p++ = 0x3; /* Length */ 1403 *p++ = 0x3; /* Length */
@@ -1413,7 +1413,7 @@ l3dss1_setup_req(struct l3_process *pc, u_char pr,
1413 *p++ = 0x88; /* Coding Std. CCITT, unrestr. dig. Inform. */ 1413 *p++ = 0x88; /* Coding Std. CCITT, unrestr. dig. Inform. */
1414 *p++ = 0x90; /* Circuit-Mode 64kbps */ 1414 *p++ = 0x90; /* Circuit-Mode 64kbps */
1415 break; 1415 break;
1416 } 1416 }
1417#endif 1417#endif
1418 } 1418 }
1419#endif 1419#endif
@@ -1521,7 +1521,7 @@ l3dss1_disconnect(struct l3_process *pc, u_char pr, void *arg)
1521 cause = 96; 1521 cause = 96;
1522 else if (ret > 0) 1522 else if (ret > 0)
1523 cause = 100; 1523 cause = 100;
1524 } 1524 }
1525 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) 1525 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0)))
1526 l3dss1_parse_facility(pc->st, pc, pc->callref, p); 1526 l3dss1_parse_facility(pc->st, pc, pc->callref, p);
1527 ret = check_infoelements(pc, skb, ie_DISCONNECT); 1527 ret = check_infoelements(pc, skb, ie_DISCONNECT);
@@ -1533,10 +1533,10 @@ l3dss1_disconnect(struct l3_process *pc, u_char pr, void *arg)
1533 newl3state(pc, 12); 1533 newl3state(pc, 12);
1534 if (cause) 1534 if (cause)
1535 newl3state(pc, 19); 1535 newl3state(pc, 19);
1536 if (11 != ret) 1536 if (11 != ret)
1537 pc->st->l3.l3l4(pc->st, CC_DISCONNECT | INDICATION, pc); 1537 pc->st->l3.l3l4(pc->st, CC_DISCONNECT | INDICATION, pc);
1538 else if (!cause) 1538 else if (!cause)
1539 l3dss1_release_req(pc, pr, NULL); 1539 l3dss1_release_req(pc, pr, NULL);
1540 if (cause) { 1540 if (cause) {
1541 l3dss1_message_cause(pc, MT_RELEASE, cause); 1541 l3dss1_message_cause(pc, MT_RELEASE, cause);
1542 L3AddTimer(&pc->timer, T308, CC_T308_1); 1542 L3AddTimer(&pc->timer, T308, CC_T308_1);
@@ -1602,56 +1602,56 @@ l3dss1_setup(struct l3_process *pc, u_char pr, void *arg)
1602 else { 1602 else {
1603 pc->para.setup.si2 = 0; 1603 pc->para.setup.si2 = 0;
1604 switch (p[2] & 0x7f) { 1604 switch (p[2] & 0x7f) {
1605 case 0x00: /* Speech */ 1605 case 0x00: /* Speech */
1606 case 0x10: /* 3.1 Khz audio */ 1606 case 0x10: /* 3.1 Khz audio */
1607 pc->para.setup.si1 = 1; 1607 pc->para.setup.si1 = 1;
1608 break; 1608 break;
1609 case 0x08: /* Unrestricted digital information */ 1609 case 0x08: /* Unrestricted digital information */
1610 pc->para.setup.si1 = 7; 1610 pc->para.setup.si1 = 7;
1611/* JIM, 05.11.97 I wanna set service indicator 2 */ 1611/* JIM, 05.11.97 I wanna set service indicator 2 */
1612#ifdef EXT_BEARER_CAPS 1612#ifdef EXT_BEARER_CAPS
1613 pc->para.setup.si2 = DecodeSI2(skb); 1613 pc->para.setup.si2 = DecodeSI2(skb);
1614#endif 1614#endif
1615 break; 1615 break;
1616 case 0x09: /* Restricted digital information */ 1616 case 0x09: /* Restricted digital information */
1617 pc->para.setup.si1 = 2; 1617 pc->para.setup.si1 = 2;
1618 break; 1618 break;
1619 case 0x11: 1619 case 0x11:
1620 /* Unrestr. digital information with 1620 /* Unrestr. digital information with
1621 * tones/announcements ( or 7 kHz audio 1621 * tones/announcements ( or 7 kHz audio
1622 */ 1622 */
1623 pc->para.setup.si1 = 3; 1623 pc->para.setup.si1 = 3;
1624 break; 1624 break;
1625 case 0x18: /* Video */ 1625 case 0x18: /* Video */
1626 pc->para.setup.si1 = 4; 1626 pc->para.setup.si1 = 4;
1627 break; 1627 break;
1628 default: 1628 default:
1629 err = 2; 1629 err = 2;
1630 break; 1630 break;
1631 } 1631 }
1632 switch (p[3] & 0x7f) { 1632 switch (p[3] & 0x7f) {
1633 case 0x40: /* packed mode */ 1633 case 0x40: /* packed mode */
1634 pc->para.setup.si1 = 8; 1634 pc->para.setup.si1 = 8;
1635 break; 1635 break;
1636 case 0x10: /* 64 kbit */ 1636 case 0x10: /* 64 kbit */
1637 case 0x11: /* 2*64 kbit */ 1637 case 0x11: /* 2*64 kbit */
1638 case 0x13: /* 384 kbit */ 1638 case 0x13: /* 384 kbit */
1639 case 0x15: /* 1536 kbit */ 1639 case 0x15: /* 1536 kbit */
1640 case 0x17: /* 1920 kbit */ 1640 case 0x17: /* 1920 kbit */
1641 pc->para.moderate = p[3] & 0x7f; 1641 pc->para.moderate = p[3] & 0x7f;
1642 break; 1642 break;
1643 default: 1643 default:
1644 err = 3; 1644 err = 3;
1645 break; 1645 break;
1646 } 1646 }
1647 } 1647 }
1648 if (pc->debug & L3_DEB_SI) 1648 if (pc->debug & L3_DEB_SI)
1649 l3_debug(pc->st, "SI=%d, AI=%d", 1649 l3_debug(pc->st, "SI=%d, AI=%d",
1650 pc->para.setup.si1, pc->para.setup.si2); 1650 pc->para.setup.si1, pc->para.setup.si2);
1651 if (err) { 1651 if (err) {
1652 if (pc->debug & L3_DEB_WARN) 1652 if (pc->debug & L3_DEB_WARN)
1653 l3_debug(pc->st, "setup with wrong bearer(l=%d:%x,%x)", 1653 l3_debug(pc->st, "setup with wrong bearer(l=%d:%x,%x)",
1654 p[1], p[2], p[3]); 1654 p[1], p[2], p[3]);
1655 pc->para.cause = 100; 1655 pc->para.cause = 100;
1656 l3dss1_msg_without_setup(pc, pr, NULL); 1656 l3dss1_msg_without_setup(pc, pr, NULL);
1657 return; 1657 return;
@@ -1672,17 +1672,17 @@ l3dss1_setup(struct l3_process *pc, u_char pr, void *arg)
1672 if ((3 == id) && (0x10 == pc->para.moderate)) { 1672 if ((3 == id) && (0x10 == pc->para.moderate)) {
1673 if (pc->debug & L3_DEB_WARN) 1673 if (pc->debug & L3_DEB_WARN)
1674 l3_debug(pc->st, "setup with wrong chid %x", 1674 l3_debug(pc->st, "setup with wrong chid %x",
1675 id); 1675 id);
1676 pc->para.cause = 100; 1676 pc->para.cause = 100;
1677 l3dss1_msg_without_setup(pc, pr, NULL); 1677 l3dss1_msg_without_setup(pc, pr, NULL);
1678 return; 1678 return;
1679 } 1679 }
1680 bcfound++; 1680 bcfound++;
1681 } else 1681 } else
1682 { if (pc->debug & L3_DEB_WARN) 1682 { if (pc->debug & L3_DEB_WARN)
1683 l3_debug(pc->st, "setup without bchannel, call waiting"); 1683 l3_debug(pc->st, "setup without bchannel, call waiting");
1684 bcfound++; 1684 bcfound++;
1685 } 1685 }
1686 } else { 1686 } else {
1687 if (pc->debug & L3_DEB_WARN) 1687 if (pc->debug & L3_DEB_WARN)
1688 l3_debug(pc->st, "setup with wrong chid ret %d", id); 1688 l3_debug(pc->st, "setup with wrong chid ret %d", id);
@@ -1757,7 +1757,7 @@ static void
1757l3dss1_disconnect_req(struct l3_process *pc, u_char pr, void *arg) 1757l3dss1_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
1758{ 1758{
1759 struct sk_buff *skb; 1759 struct sk_buff *skb;
1760 u_char tmp[16+40]; 1760 u_char tmp[16 + 40];
1761 u_char *p = tmp; 1761 u_char *p = tmp;
1762 int l; 1762 int l;
1763 u_char cause = 16; 1763 u_char cause = 16;
@@ -1774,14 +1774,14 @@ l3dss1_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
1774 *p++ = 0x80; 1774 *p++ = 0x80;
1775 *p++ = cause | 0x80; 1775 *p++ = cause | 0x80;
1776 1776
1777 if (pc->prot.dss1.uus1_data[0]) 1777 if (pc->prot.dss1.uus1_data[0])
1778 { *p++ = IE_USER_USER; /* UUS info element */ 1778 { *p++ = IE_USER_USER; /* UUS info element */
1779 *p++ = strlen(pc->prot.dss1.uus1_data) + 1; 1779 *p++ = strlen(pc->prot.dss1.uus1_data) + 1;
1780 *p++ = 0x04; /* IA5 chars */ 1780 *p++ = 0x04; /* IA5 chars */
1781 strcpy(p,pc->prot.dss1.uus1_data); 1781 strcpy(p, pc->prot.dss1.uus1_data);
1782 p += strlen(pc->prot.dss1.uus1_data); 1782 p += strlen(pc->prot.dss1.uus1_data);
1783 pc->prot.dss1.uus1_data[0] = '\0'; 1783 pc->prot.dss1.uus1_data[0] = '\0';
1784 } 1784 }
1785 1785
1786 l = p - tmp; 1786 l = p - tmp;
1787 if (!(skb = l3_alloc_skb(l))) 1787 if (!(skb = l3_alloc_skb(l)))
@@ -1796,12 +1796,12 @@ static void
1796l3dss1_setup_rsp(struct l3_process *pc, u_char pr, 1796l3dss1_setup_rsp(struct l3_process *pc, u_char pr,
1797 void *arg) 1797 void *arg)
1798{ 1798{
1799 if (!pc->para.bchannel) 1799 if (!pc->para.bchannel)
1800 { if (pc->debug & L3_DEB_WARN) 1800 { if (pc->debug & L3_DEB_WARN)
1801 l3_debug(pc->st, "D-chan connect for waiting call"); 1801 l3_debug(pc->st, "D-chan connect for waiting call");
1802 l3dss1_disconnect_req(pc, pr, arg); 1802 l3dss1_disconnect_req(pc, pr, arg);
1803 return; 1803 return;
1804 } 1804 }
1805 newl3state(pc, 8); 1805 newl3state(pc, 8);
1806 l3dss1_message(pc, MT_CONNECT); 1806 l3dss1_message(pc, MT_CONNECT);
1807 L3DelTimer(&pc->timer); 1807 L3DelTimer(&pc->timer);
@@ -1860,26 +1860,26 @@ l3dss1_release(struct l3_process *pc, u_char pr, void *arg)
1860{ 1860{
1861 struct sk_buff *skb = arg; 1861 struct sk_buff *skb = arg;
1862 u_char *p; 1862 u_char *p;
1863 int ret, cause=0; 1863 int ret, cause = 0;
1864 1864
1865 StopAllL3Timer(pc); 1865 StopAllL3Timer(pc);
1866 if ((ret = l3dss1_get_cause(pc, skb))>0) { 1866 if ((ret = l3dss1_get_cause(pc, skb)) > 0) {
1867 if (pc->debug & L3_DEB_WARN) 1867 if (pc->debug & L3_DEB_WARN)
1868 l3_debug(pc->st, "REL get_cause ret(%d)", ret); 1868 l3_debug(pc->st, "REL get_cause ret(%d)", ret);
1869 } else if (ret<0) 1869 } else if (ret < 0)
1870 pc->para.cause = NO_CAUSE; 1870 pc->para.cause = NO_CAUSE;
1871 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) { 1871 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) {
1872 l3dss1_parse_facility(pc->st, pc, pc->callref, p); 1872 l3dss1_parse_facility(pc->st, pc, pc->callref, p);
1873 } 1873 }
1874 if ((ret<0) && (pc->state != 11)) 1874 if ((ret < 0) && (pc->state != 11))
1875 cause = 96; 1875 cause = 96;
1876 else if (ret>0) 1876 else if (ret > 0)
1877 cause = 100; 1877 cause = 100;
1878 ret = check_infoelements(pc, skb, ie_RELEASE); 1878 ret = check_infoelements(pc, skb, ie_RELEASE);
1879 if (ERR_IE_COMPREHENSION == ret) 1879 if (ERR_IE_COMPREHENSION == ret)
1880 cause = 96; 1880 cause = 96;
1881 else if ((ERR_IE_UNRECOGNIZED == ret) && (!cause)) 1881 else if ((ERR_IE_UNRECOGNIZED == ret) && (!cause))
1882 cause = 99; 1882 cause = 99;
1883 if (cause) 1883 if (cause)
1884 l3dss1_message_cause(pc, MT_RELEASE_COMPLETE, cause); 1884 l3dss1_message_cause(pc, MT_RELEASE_COMPLETE, cause);
1885 else 1885 else
@@ -1894,10 +1894,10 @@ l3dss1_alert_req(struct l3_process *pc, u_char pr,
1894 void *arg) 1894 void *arg)
1895{ 1895{
1896 newl3state(pc, 7); 1896 newl3state(pc, 7);
1897 if (!pc->prot.dss1.uus1_data[0]) 1897 if (!pc->prot.dss1.uus1_data[0])
1898 l3dss1_message(pc, MT_ALERTING); 1898 l3dss1_message(pc, MT_ALERTING);
1899 else 1899 else
1900 l3dss1_msg_with_uus(pc, MT_ALERTING); 1900 l3dss1_msg_with_uus(pc, MT_ALERTING);
1901} 1901}
1902 1902
1903static void 1903static void
@@ -1906,12 +1906,12 @@ l3dss1_proceed_req(struct l3_process *pc, u_char pr,
1906{ 1906{
1907 newl3state(pc, 9); 1907 newl3state(pc, 9);
1908 l3dss1_message(pc, MT_CALL_PROCEEDING); 1908 l3dss1_message(pc, MT_CALL_PROCEEDING);
1909 pc->st->l3.l3l4(pc->st, CC_PROCEED_SEND | INDICATION, pc); 1909 pc->st->l3.l3l4(pc->st, CC_PROCEED_SEND | INDICATION, pc);
1910} 1910}
1911 1911
1912static void 1912static void
1913l3dss1_setup_ack_req(struct l3_process *pc, u_char pr, 1913l3dss1_setup_ack_req(struct l3_process *pc, u_char pr,
1914 void *arg) 1914 void *arg)
1915{ 1915{
1916 newl3state(pc, 25); 1916 newl3state(pc, 25);
1917 L3DelTimer(&pc->timer); 1917 L3DelTimer(&pc->timer);
@@ -1925,22 +1925,22 @@ l3dss1_setup_ack_req(struct l3_process *pc, u_char pr,
1925static void 1925static void
1926l3dss1_deliver_display(struct l3_process *pc, int pr, u_char *infp) 1926l3dss1_deliver_display(struct l3_process *pc, int pr, u_char *infp)
1927{ u_char len; 1927{ u_char len;
1928 isdn_ctrl ic; 1928 isdn_ctrl ic;
1929 struct IsdnCardState *cs; 1929 struct IsdnCardState *cs;
1930 char *p; 1930 char *p;
1931 1931
1932 if (*infp++ != IE_DISPLAY) return; 1932 if (*infp++ != IE_DISPLAY) return;
1933 if ((len = *infp++) > 80) return; /* total length <= 82 */ 1933 if ((len = *infp++) > 80) return; /* total length <= 82 */
1934 if (!pc->chan) return; 1934 if (!pc->chan) return;
1935 1935
1936 p = ic.parm.display; 1936 p = ic.parm.display;
1937 while (len--) 1937 while (len--)
1938 *p++ = *infp++; 1938 *p++ = *infp++;
1939 *p = '\0'; 1939 *p = '\0';
1940 ic.command = ISDN_STAT_DISPLAY; 1940 ic.command = ISDN_STAT_DISPLAY;
1941 cs = pc->st->l1.hardware; 1941 cs = pc->st->l1.hardware;
1942 ic.driver = cs->myid; 1942 ic.driver = cs->myid;
1943 ic.arg = pc->chan->chan; 1943 ic.arg = pc->chan->chan;
1944 cs->iif.statcallb(&ic); 1944 cs->iif.statcallb(&ic);
1945} /* l3dss1_deliver_display */ 1945} /* l3dss1_deliver_display */
1946 1946
@@ -1958,37 +1958,37 @@ l3dss1_progress(struct l3_process *pc, u_char pr, void *arg)
1958 pc->para.cause = 100; 1958 pc->para.cause = 100;
1959 } else if (!(p[2] & 0x70)) { 1959 } else if (!(p[2] & 0x70)) {
1960 switch (p[2]) { 1960 switch (p[2]) {
1961 case 0x80: 1961 case 0x80:
1962 case 0x81:
1963 case 0x82:
1964 case 0x84:
1965 case 0x85:
1966 case 0x87:
1967 case 0x8a:
1968 switch (p[3]) {
1962 case 0x81: 1969 case 0x81:
1963 case 0x82: 1970 case 0x82:
1971 case 0x83:
1964 case 0x84: 1972 case 0x84:
1965 case 0x85: 1973 case 0x88:
1966 case 0x87:
1967 case 0x8a:
1968 switch (p[3]) {
1969 case 0x81:
1970 case 0x82:
1971 case 0x83:
1972 case 0x84:
1973 case 0x88:
1974 break;
1975 default:
1976 err = 2;
1977 pc->para.cause = 100;
1978 break;
1979 }
1980 break; 1974 break;
1981 default: 1975 default:
1982 err = 3; 1976 err = 2;
1983 pc->para.cause = 100; 1977 pc->para.cause = 100;
1984 break; 1978 break;
1979 }
1980 break;
1981 default:
1982 err = 3;
1983 pc->para.cause = 100;
1984 break;
1985 } 1985 }
1986 } 1986 }
1987 } else { 1987 } else {
1988 pc->para.cause = 96; 1988 pc->para.cause = 96;
1989 err = 4; 1989 err = 4;
1990 } 1990 }
1991 if (err) { 1991 if (err) {
1992 if (pc->debug & L3_DEB_WARN) 1992 if (pc->debug & L3_DEB_WARN)
1993 l3_debug(pc->st, "progress error %d", err); 1993 l3_debug(pc->st, "progress error %d", err);
1994 l3dss1_status_send(pc, pr, NULL); 1994 l3dss1_status_send(pc, pr, NULL);
@@ -2015,21 +2015,21 @@ l3dss1_notify(struct l3_process *pc, u_char pr, void *arg)
2015 pc->para.cause = 100; 2015 pc->para.cause = 100;
2016 } else { 2016 } else {
2017 switch (p[2]) { 2017 switch (p[2]) {
2018 case 0x80: 2018 case 0x80:
2019 case 0x81: 2019 case 0x81:
2020 case 0x82: 2020 case 0x82:
2021 break; 2021 break;
2022 default: 2022 default:
2023 pc->para.cause = 100; 2023 pc->para.cause = 100;
2024 err = 2; 2024 err = 2;
2025 break; 2025 break;
2026 } 2026 }
2027 } 2027 }
2028 } else { 2028 } else {
2029 pc->para.cause = 96; 2029 pc->para.cause = 96;
2030 err = 3; 2030 err = 3;
2031 } 2031 }
2032 if (err) { 2032 if (err) {
2033 if (pc->debug & L3_DEB_WARN) 2033 if (pc->debug & L3_DEB_WARN)
2034 l3_debug(pc->st, "notify error %d", err); 2034 l3_debug(pc->st, "notify error %d", err);
2035 l3dss1_status_send(pc, pr, NULL); 2035 l3dss1_status_send(pc, pr, NULL);
@@ -2052,7 +2052,7 @@ l3dss1_status_enq(struct l3_process *pc, u_char pr, void *arg)
2052 ret = check_infoelements(pc, skb, ie_STATUS_ENQUIRY); 2052 ret = check_infoelements(pc, skb, ie_STATUS_ENQUIRY);
2053 l3dss1_std_ie_err(pc, ret); 2053 l3dss1_std_ie_err(pc, ret);
2054 pc->para.cause = 30; /* response to STATUS_ENQUIRY */ 2054 pc->para.cause = 30; /* response to STATUS_ENQUIRY */
2055 l3dss1_status_send(pc, pr, NULL); 2055 l3dss1_status_send(pc, pr, NULL);
2056} 2056}
2057 2057
2058static void 2058static void
@@ -2086,68 +2086,68 @@ static void l3dss1_redir_req(struct l3_process *pc, u_char pr, void *arg)
2086 struct sk_buff *skb; 2086 struct sk_buff *skb;
2087 u_char tmp[128]; 2087 u_char tmp[128];
2088 u_char *p = tmp; 2088 u_char *p = tmp;
2089 u_char *subp; 2089 u_char *subp;
2090 u_char len_phone = 0; 2090 u_char len_phone = 0;
2091 u_char len_sub = 0; 2091 u_char len_sub = 0;
2092 int l; 2092 int l;
2093 2093
2094 2094
2095 strcpy(pc->prot.dss1.uus1_data,pc->chan->setup.eazmsn); /* copy uus element if available */ 2095 strcpy(pc->prot.dss1.uus1_data, pc->chan->setup.eazmsn); /* copy uus element if available */
2096 if (!pc->chan->setup.phone[0]) 2096 if (!pc->chan->setup.phone[0])
2097 { pc->para.cause = -1; 2097 { pc->para.cause = -1;
2098 l3dss1_disconnect_req(pc,pr,arg); /* disconnect immediately */ 2098 l3dss1_disconnect_req(pc, pr, arg); /* disconnect immediately */
2099 return; 2099 return;
2100 } /* only uus */ 2100 } /* only uus */
2101 2101
2102 if (pc->prot.dss1.invoke_id) 2102 if (pc->prot.dss1.invoke_id)
2103 free_invoke_id(pc->st,pc->prot.dss1.invoke_id); 2103 free_invoke_id(pc->st, pc->prot.dss1.invoke_id);
2104 2104
2105 if (!(pc->prot.dss1.invoke_id = new_invoke_id(pc->st))) 2105 if (!(pc->prot.dss1.invoke_id = new_invoke_id(pc->st)))
2106 return; 2106 return;
2107 2107
2108 MsgHead(p, pc->callref, MT_FACILITY); 2108 MsgHead(p, pc->callref, MT_FACILITY);
2109 2109
2110 for (subp = pc->chan->setup.phone; (*subp) && (*subp != '.'); subp++) len_phone++; /* len of phone number */ 2110 for (subp = pc->chan->setup.phone; (*subp) && (*subp != '.'); subp++) len_phone++; /* len of phone number */
2111 if (*subp++ == '.') len_sub = strlen(subp) + 2; /* length including info subaddress element */ 2111 if (*subp++ == '.') len_sub = strlen(subp) + 2; /* length including info subaddress element */
2112 2112
2113 *p++ = 0x1c; /* Facility info element */ 2113 *p++ = 0x1c; /* Facility info element */
2114 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3 + 3; /* length of element */ 2114 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3 + 3; /* length of element */
2115 *p++ = 0x91; /* remote operations protocol */ 2115 *p++ = 0x91; /* remote operations protocol */
2116 *p++ = 0xa1; /* invoke component */ 2116 *p++ = 0xa1; /* invoke component */
2117 2117
2118 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3; /* length of data */ 2118 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3; /* length of data */
2119 *p++ = 0x02; /* invoke id tag, integer */ 2119 *p++ = 0x02; /* invoke id tag, integer */
2120 *p++ = 0x01; /* length */ 2120 *p++ = 0x01; /* length */
2121 *p++ = pc->prot.dss1.invoke_id; /* invoke id */ 2121 *p++ = pc->prot.dss1.invoke_id; /* invoke id */
2122 *p++ = 0x02; /* operation value tag, integer */ 2122 *p++ = 0x02; /* operation value tag, integer */
2123 *p++ = 0x01; /* length */ 2123 *p++ = 0x01; /* length */
2124 *p++ = 0x0D; /* Call Deflect */ 2124 *p++ = 0x0D; /* Call Deflect */
2125 2125
2126 *p++ = 0x30; /* sequence phone number */ 2126 *p++ = 0x30; /* sequence phone number */
2127 *p++ = len_phone + 2 + 2 + 3 + len_sub; /* length */ 2127 *p++ = len_phone + 2 + 2 + 3 + len_sub; /* length */
2128 2128
2129 *p++ = 0x30; /* Deflected to UserNumber */ 2129 *p++ = 0x30; /* Deflected to UserNumber */
2130 *p++ = len_phone+2+len_sub; /* length */ 2130 *p++ = len_phone + 2 + len_sub; /* length */
2131 *p++ = 0x80; /* NumberDigits */ 2131 *p++ = 0x80; /* NumberDigits */
2132 *p++ = len_phone; /* length */ 2132 *p++ = len_phone; /* length */
2133 for (l = 0; l < len_phone; l++) 2133 for (l = 0; l < len_phone; l++)
2134 *p++ = pc->chan->setup.phone[l]; 2134 *p++ = pc->chan->setup.phone[l];
2135 2135
2136 if (len_sub) 2136 if (len_sub)
2137 { *p++ = 0x04; /* called party subaddress */ 2137 { *p++ = 0x04; /* called party subaddress */
2138 *p++ = len_sub - 2; 2138 *p++ = len_sub - 2;
2139 while (*subp) *p++ = *subp++; 2139 while (*subp) *p++ = *subp++;
2140 } 2140 }
2141 2141
2142 *p++ = 0x01; /* screening identifier */ 2142 *p++ = 0x01; /* screening identifier */
2143 *p++ = 0x01; 2143 *p++ = 0x01;
2144 *p++ = pc->chan->setup.screen; 2144 *p++ = pc->chan->setup.screen;
2145 2145
2146 l = p - tmp; 2146 l = p - tmp;
2147 if (!(skb = l3_alloc_skb(l))) return; 2147 if (!(skb = l3_alloc_skb(l))) return;
2148 memcpy(skb_put(skb, l), tmp, l); 2148 memcpy(skb_put(skb, l), tmp, l);
2149 2149
2150 l3_msg(pc->st, DL_DATA | REQUEST, skb); 2150 l3_msg(pc->st, DL_DATA | REQUEST, skb);
2151} /* l3dss1_redir_req */ 2151} /* l3dss1_redir_req */
2152 2152
2153/********************************************/ 2153/********************************************/
@@ -2155,8 +2155,8 @@ static void l3dss1_redir_req(struct l3_process *pc, u_char pr, void *arg)
2155/********************************************/ 2155/********************************************/
2156static void l3dss1_redir_req_early(struct l3_process *pc, u_char pr, void *arg) 2156static void l3dss1_redir_req_early(struct l3_process *pc, u_char pr, void *arg)
2157{ 2157{
2158 l3dss1_proceed_req(pc,pr,arg); 2158 l3dss1_proceed_req(pc, pr, arg);
2159 l3dss1_redir_req(pc,pr,arg); 2159 l3dss1_redir_req(pc, pr, arg);
2160} /* l3dss1_redir_req_early */ 2160} /* l3dss1_redir_req_early */
2161 2161
2162/***********************************************/ 2162/***********************************************/
@@ -2166,108 +2166,108 @@ static void l3dss1_redir_req_early(struct l3_process *pc, u_char pr, void *arg)
2166/***********************************************/ 2166/***********************************************/
2167static int l3dss1_cmd_global(struct PStack *st, isdn_ctrl *ic) 2167static int l3dss1_cmd_global(struct PStack *st, isdn_ctrl *ic)
2168{ u_char id; 2168{ u_char id;
2169 u_char temp[265]; 2169 u_char temp[265];
2170 u_char *p = temp; 2170 u_char *p = temp;
2171 int i, l, proc_len; 2171 int i, l, proc_len;
2172 struct sk_buff *skb; 2172 struct sk_buff *skb;
2173 struct l3_process *pc = NULL; 2173 struct l3_process *pc = NULL;
2174 2174
2175 switch (ic->arg) 2175 switch (ic->arg)
2176 { case DSS1_CMD_INVOKE: 2176 { case DSS1_CMD_INVOKE:
2177 if (ic->parm.dss1_io.datalen < 0) return(-2); /* invalid parameter */ 2177 if (ic->parm.dss1_io.datalen < 0) return (-2); /* invalid parameter */
2178 2178
2179 for (proc_len = 1, i = ic->parm.dss1_io.proc >> 8; i; i++) 2179 for (proc_len = 1, i = ic->parm.dss1_io.proc >> 8; i; i++)
2180 i = i >> 8; /* add one byte */ 2180 i = i >> 8; /* add one byte */
2181 l = ic->parm.dss1_io.datalen + proc_len + 8; /* length excluding ie header */ 2181 l = ic->parm.dss1_io.datalen + proc_len + 8; /* length excluding ie header */
2182 if (l > 255) 2182 if (l > 255)
2183 return(-2); /* too long */ 2183 return (-2); /* too long */
2184 2184
2185 if (!(id = new_invoke_id(st))) 2185 if (!(id = new_invoke_id(st)))
2186 return(0); /* first get a invoke id -> return if no available */ 2186 return (0); /* first get a invoke id -> return if no available */
2187 2187
2188 i = -1; 2188 i = -1;
2189 MsgHead(p, i, MT_FACILITY); /* build message head */ 2189 MsgHead(p, i, MT_FACILITY); /* build message head */
2190 *p++ = 0x1C; /* Facility IE */ 2190 *p++ = 0x1C; /* Facility IE */
2191 *p++ = l; /* length of ie */ 2191 *p++ = l; /* length of ie */
2192 *p++ = 0x91; /* remote operations */ 2192 *p++ = 0x91; /* remote operations */
2193 *p++ = 0xA1; /* invoke */ 2193 *p++ = 0xA1; /* invoke */
2194 *p++ = l - 3; /* length of invoke */ 2194 *p++ = l - 3; /* length of invoke */
2195 *p++ = 0x02; /* invoke id tag */ 2195 *p++ = 0x02; /* invoke id tag */
2196 *p++ = 0x01; /* length is 1 */ 2196 *p++ = 0x01; /* length is 1 */
2197 *p++ = id; /* invoke id */ 2197 *p++ = id; /* invoke id */
2198 *p++ = 0x02; /* operation */ 2198 *p++ = 0x02; /* operation */
2199 *p++ = proc_len; /* length of operation */ 2199 *p++ = proc_len; /* length of operation */
2200 2200
2201 for (i = proc_len; i; i--) 2201 for (i = proc_len; i; i--)
2202 *p++ = (ic->parm.dss1_io.proc >> (i-1)) & 0xFF; 2202 *p++ = (ic->parm.dss1_io.proc >> (i - 1)) & 0xFF;
2203 memcpy(p, ic->parm.dss1_io.data, ic->parm.dss1_io.datalen); /* copy data */ 2203 memcpy(p, ic->parm.dss1_io.data, ic->parm.dss1_io.datalen); /* copy data */
2204 l = (p - temp) + ic->parm.dss1_io.datalen; /* total length */ 2204 l = (p - temp) + ic->parm.dss1_io.datalen; /* total length */
2205 2205
2206 if (ic->parm.dss1_io.timeout > 0) 2206 if (ic->parm.dss1_io.timeout > 0)
2207 if (!(pc = dss1_new_l3_process(st, -1))) 2207 if (!(pc = dss1_new_l3_process(st, -1)))
2208 { free_invoke_id(st, id); 2208 { free_invoke_id(st, id);
2209 return(-2); 2209 return (-2);
2210 } 2210 }
2211 pc->prot.dss1.ll_id = ic->parm.dss1_io.ll_id; /* remember id */ 2211 pc->prot.dss1.ll_id = ic->parm.dss1_io.ll_id; /* remember id */
2212 pc->prot.dss1.proc = ic->parm.dss1_io.proc; /* and procedure */ 2212 pc->prot.dss1.proc = ic->parm.dss1_io.proc; /* and procedure */
2213 2213
2214 if (!(skb = l3_alloc_skb(l))) 2214 if (!(skb = l3_alloc_skb(l)))
2215 { free_invoke_id(st, id); 2215 { free_invoke_id(st, id);
2216 if (pc) dss1_release_l3_process(pc); 2216 if (pc) dss1_release_l3_process(pc);
2217 return(-2); 2217 return (-2);
2218 } 2218 }
2219 memcpy(skb_put(skb, l), temp, l); 2219 memcpy(skb_put(skb, l), temp, l);
2220 2220
2221 if (pc) 2221 if (pc)
2222 { pc->prot.dss1.invoke_id = id; /* remember id */ 2222 { pc->prot.dss1.invoke_id = id; /* remember id */
2223 L3AddTimer(&pc->timer, ic->parm.dss1_io.timeout, CC_TDSS1_IO | REQUEST); 2223 L3AddTimer(&pc->timer, ic->parm.dss1_io.timeout, CC_TDSS1_IO | REQUEST);
2224 } 2224 }
2225 2225
2226 l3_msg(st, DL_DATA | REQUEST, skb); 2226 l3_msg(st, DL_DATA | REQUEST, skb);
2227 ic->parm.dss1_io.hl_id = id; /* return id */ 2227 ic->parm.dss1_io.hl_id = id; /* return id */
2228 return(0); 2228 return (0);
2229 2229
2230 case DSS1_CMD_INVOKE_ABORT: 2230 case DSS1_CMD_INVOKE_ABORT:
2231 if ((pc = l3dss1_search_dummy_proc(st, ic->parm.dss1_io.hl_id))) 2231 if ((pc = l3dss1_search_dummy_proc(st, ic->parm.dss1_io.hl_id)))
2232 { L3DelTimer(&pc->timer); /* remove timer */ 2232 { L3DelTimer(&pc->timer); /* remove timer */
2233 dss1_release_l3_process(pc); 2233 dss1_release_l3_process(pc);
2234 return(0); 2234 return (0);
2235 } 2235 }
2236 else 2236 else
2237 { l3_debug(st, "l3dss1_cmd_global abort unknown id"); 2237 { l3_debug(st, "l3dss1_cmd_global abort unknown id");
2238 return(-2); 2238 return (-2);
2239 } 2239 }
2240 break; 2240 break;
2241 2241
2242 default: 2242 default:
2243 l3_debug(st, "l3dss1_cmd_global unknown cmd 0x%lx", ic->arg); 2243 l3_debug(st, "l3dss1_cmd_global unknown cmd 0x%lx", ic->arg);
2244 return(-1); 2244 return (-1);
2245 } /* switch ic-> arg */ 2245 } /* switch ic-> arg */
2246 return(-1); 2246 return (-1);
2247} /* l3dss1_cmd_global */ 2247} /* l3dss1_cmd_global */
2248 2248
2249static void 2249static void
2250l3dss1_io_timer(struct l3_process *pc) 2250l3dss1_io_timer(struct l3_process *pc)
2251{ isdn_ctrl ic; 2251{ isdn_ctrl ic;
2252 struct IsdnCardState *cs = pc->st->l1.hardware; 2252 struct IsdnCardState *cs = pc->st->l1.hardware;
2253 2253
2254 L3DelTimer(&pc->timer); /* remove timer */ 2254 L3DelTimer(&pc->timer); /* remove timer */
2255 2255
2256 ic.driver = cs->myid; 2256 ic.driver = cs->myid;
2257 ic.command = ISDN_STAT_PROT; 2257 ic.command = ISDN_STAT_PROT;
2258 ic.arg = DSS1_STAT_INVOKE_ERR; 2258 ic.arg = DSS1_STAT_INVOKE_ERR;
2259 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id; 2259 ic.parm.dss1_io.hl_id = pc->prot.dss1.invoke_id;
2260 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id; 2260 ic.parm.dss1_io.ll_id = pc->prot.dss1.ll_id;
2261 ic.parm.dss1_io.proc = pc->prot.dss1.proc; 2261 ic.parm.dss1_io.proc = pc->prot.dss1.proc;
2262 ic.parm.dss1_io.timeout= -1; 2262 ic.parm.dss1_io.timeout = -1;
2263 ic.parm.dss1_io.datalen = 0; 2263 ic.parm.dss1_io.datalen = 0;
2264 ic.parm.dss1_io.data = NULL; 2264 ic.parm.dss1_io.data = NULL;
2265 free_invoke_id(pc->st, pc->prot.dss1.invoke_id); 2265 free_invoke_id(pc->st, pc->prot.dss1.invoke_id);
2266 pc->prot.dss1.invoke_id = 0; /* reset id */ 2266 pc->prot.dss1.invoke_id = 0; /* reset id */
2267 2267
2268 cs->iif.statcallb(&ic); 2268 cs->iif.statcallb(&ic);
2269 2269
2270 dss1_release_l3_process(pc); 2270 dss1_release_l3_process(pc);
2271} /* l3dss1_io_timer */ 2271} /* l3dss1_io_timer */
2272 2272
2273static void 2273static void
@@ -2437,12 +2437,12 @@ l3dss1_status(struct l3_process *pc, u_char pr, void *arg)
2437{ 2437{
2438 u_char *p; 2438 u_char *p;
2439 struct sk_buff *skb = arg; 2439 struct sk_buff *skb = arg;
2440 int ret; 2440 int ret;
2441 u_char cause = 0, callState = 0; 2441 u_char cause = 0, callState = 0;
2442 2442
2443 if ((ret = l3dss1_get_cause(pc, skb))) { 2443 if ((ret = l3dss1_get_cause(pc, skb))) {
2444 if (pc->debug & L3_DEB_WARN) 2444 if (pc->debug & L3_DEB_WARN)
2445 l3_debug(pc->st, "STATUS get_cause ret(%d)",ret); 2445 l3_debug(pc->st, "STATUS get_cause ret(%d)", ret);
2446 if (ret < 0) 2446 if (ret < 0)
2447 cause = 96; 2447 cause = 96;
2448 else if (ret > 0) 2448 else if (ret > 0)
@@ -2467,9 +2467,9 @@ l3dss1_status(struct l3_process *pc, u_char pr, void *arg)
2467 } 2467 }
2468 if (cause) { 2468 if (cause) {
2469 u_char tmp; 2469 u_char tmp;
2470 2470
2471 if (pc->debug & L3_DEB_WARN) 2471 if (pc->debug & L3_DEB_WARN)
2472 l3_debug(pc->st, "STATUS error(%d/%d)",ret,cause); 2472 l3_debug(pc->st, "STATUS error(%d/%d)", ret, cause);
2473 tmp = pc->para.cause; 2473 tmp = pc->para.cause;
2474 pc->para.cause = cause; 2474 pc->para.cause = cause;
2475 l3dss1_status_send(pc, 0, NULL); 2475 l3dss1_status_send(pc, 0, NULL);
@@ -2495,10 +2495,10 @@ l3dss1_facility(struct l3_process *pc, u_char pr, void *arg)
2495{ 2495{
2496 struct sk_buff *skb = arg; 2496 struct sk_buff *skb = arg;
2497 int ret; 2497 int ret;
2498 2498
2499 ret = check_infoelements(pc, skb, ie_FACILITY); 2499 ret = check_infoelements(pc, skb, ie_FACILITY);
2500 l3dss1_std_ie_err(pc, ret); 2500 l3dss1_std_ie_err(pc, ret);
2501 { 2501 {
2502 u_char *p; 2502 u_char *p;
2503 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) 2503 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0)))
2504 l3dss1_parse_facility(pc->st, pc, pc->callref, p); 2504 l3dss1_parse_facility(pc->st, pc, pc->callref, p);
@@ -2547,7 +2547,7 @@ l3dss1_suspend_ack(struct l3_process *pc, u_char pr, void *arg)
2547 /* We don't handle suspend_ack for IE errors now */ 2547 /* We don't handle suspend_ack for IE errors now */
2548 if ((ret = check_infoelements(pc, skb, ie_SUSPEND_ACKNOWLEDGE))) 2548 if ((ret = check_infoelements(pc, skb, ie_SUSPEND_ACKNOWLEDGE)))
2549 if (pc->debug & L3_DEB_WARN) 2549 if (pc->debug & L3_DEB_WARN)
2550 l3_debug(pc->st, "SUSPACK check ie(%d)",ret); 2550 l3_debug(pc->st, "SUSPACK check ie(%d)", ret);
2551 dss1_release_l3_process(pc); 2551 dss1_release_l3_process(pc);
2552} 2552}
2553 2553
@@ -2559,8 +2559,8 @@ l3dss1_suspend_rej(struct l3_process *pc, u_char pr, void *arg)
2559 2559
2560 if ((ret = l3dss1_get_cause(pc, skb))) { 2560 if ((ret = l3dss1_get_cause(pc, skb))) {
2561 if (pc->debug & L3_DEB_WARN) 2561 if (pc->debug & L3_DEB_WARN)
2562 l3_debug(pc->st, "SUSP_REJ get_cause ret(%d)",ret); 2562 l3_debug(pc->st, "SUSP_REJ get_cause ret(%d)", ret);
2563 if (ret < 0) 2563 if (ret < 0)
2564 pc->para.cause = 96; 2564 pc->para.cause = 96;
2565 else 2565 else
2566 pc->para.cause = 100; 2566 pc->para.cause = 100;
@@ -2651,8 +2651,8 @@ l3dss1_resume_rej(struct l3_process *pc, u_char pr, void *arg)
2651 2651
2652 if ((ret = l3dss1_get_cause(pc, skb))) { 2652 if ((ret = l3dss1_get_cause(pc, skb))) {
2653 if (pc->debug & L3_DEB_WARN) 2653 if (pc->debug & L3_DEB_WARN)
2654 l3_debug(pc->st, "RES_REJ get_cause ret(%d)",ret); 2654 l3_debug(pc->st, "RES_REJ get_cause ret(%d)", ret);
2655 if (ret < 0) 2655 if (ret < 0)
2656 pc->para.cause = 96; 2656 pc->para.cause = 96;
2657 else 2657 else
2658 pc->para.cause = 100; 2658 pc->para.cause = 100;
@@ -2729,36 +2729,36 @@ l3dss1_global_restart(struct l3_process *pc, u_char pr, void *arg)
2729static void 2729static void
2730l3dss1_dl_reset(struct l3_process *pc, u_char pr, void *arg) 2730l3dss1_dl_reset(struct l3_process *pc, u_char pr, void *arg)
2731{ 2731{
2732 pc->para.cause = 0x29; /* Temporary failure */ 2732 pc->para.cause = 0x29; /* Temporary failure */
2733 pc->para.loc = 0; 2733 pc->para.loc = 0;
2734 l3dss1_disconnect_req(pc, pr, NULL); 2734 l3dss1_disconnect_req(pc, pr, NULL);
2735 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc); 2735 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc);
2736} 2736}
2737 2737
2738static void 2738static void
2739l3dss1_dl_release(struct l3_process *pc, u_char pr, void *arg) 2739l3dss1_dl_release(struct l3_process *pc, u_char pr, void *arg)
2740{ 2740{
2741 newl3state(pc, 0); 2741 newl3state(pc, 0);
2742 pc->para.cause = 0x1b; /* Destination out of order */ 2742 pc->para.cause = 0x1b; /* Destination out of order */
2743 pc->para.loc = 0; 2743 pc->para.loc = 0;
2744 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc); 2744 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc);
2745 release_l3_process(pc); 2745 release_l3_process(pc);
2746} 2746}
2747 2747
2748static void 2748static void
2749l3dss1_dl_reestablish(struct l3_process *pc, u_char pr, void *arg) 2749l3dss1_dl_reestablish(struct l3_process *pc, u_char pr, void *arg)
2750{ 2750{
2751 L3DelTimer(&pc->timer); 2751 L3DelTimer(&pc->timer);
2752 L3AddTimer(&pc->timer, T309, CC_T309); 2752 L3AddTimer(&pc->timer, T309, CC_T309);
2753 l3_msg(pc->st, DL_ESTABLISH | REQUEST, NULL); 2753 l3_msg(pc->st, DL_ESTABLISH | REQUEST, NULL);
2754} 2754}
2755 2755
2756static void 2756static void
2757l3dss1_dl_reest_status(struct l3_process *pc, u_char pr, void *arg) 2757l3dss1_dl_reest_status(struct l3_process *pc, u_char pr, void *arg)
2758{ 2758{
2759 L3DelTimer(&pc->timer); 2759 L3DelTimer(&pc->timer);
2760 2760
2761 pc->para.cause = 0x1F; /* normal, unspecified */ 2761 pc->para.cause = 0x1F; /* normal, unspecified */
2762 l3dss1_status_send(pc, 0, NULL); 2762 l3dss1_status_send(pc, 0, NULL);
2763} 2763}
2764 2764
@@ -2791,12 +2791,12 @@ static struct stateentry downstatelist[] =
2791 CC_SETUP | RESPONSE, l3dss1_setup_rsp}, 2791 CC_SETUP | RESPONSE, l3dss1_setup_rsp},
2792 {SBIT(10), 2792 {SBIT(10),
2793 CC_SUSPEND | REQUEST, l3dss1_suspend_req}, 2793 CC_SUSPEND | REQUEST, l3dss1_suspend_req},
2794 {SBIT(7) | SBIT(9) | SBIT(25), 2794 {SBIT(7) | SBIT(9) | SBIT(25),
2795 CC_REDIR | REQUEST, l3dss1_redir_req}, 2795 CC_REDIR | REQUEST, l3dss1_redir_req},
2796 {SBIT(6), 2796 {SBIT(6),
2797 CC_REDIR | REQUEST, l3dss1_redir_req_early}, 2797 CC_REDIR | REQUEST, l3dss1_redir_req_early},
2798 {SBIT(9) | SBIT(25), 2798 {SBIT(9) | SBIT(25),
2799 CC_DISCONNECT | REQUEST, l3dss1_disconnect_req}, 2799 CC_DISCONNECT | REQUEST, l3dss1_disconnect_req},
2800 {SBIT(25), 2800 {SBIT(25),
2801 CC_T302, l3dss1_t302}, 2801 CC_T302, l3dss1_t302},
2802 {SBIT(1), 2802 {SBIT(1),
@@ -2880,20 +2880,20 @@ static struct stateentry globalmes_list[] =
2880 {SBIT(0), 2880 {SBIT(0),
2881 MT_RESTART, l3dss1_global_restart}, 2881 MT_RESTART, l3dss1_global_restart},
2882/* {SBIT(1), 2882/* {SBIT(1),
2883 MT_RESTART_ACKNOWLEDGE, l3dss1_restart_ack}, 2883 MT_RESTART_ACKNOWLEDGE, l3dss1_restart_ack},
2884*/ 2884*/
2885}; 2885};
2886 2886
2887static struct stateentry manstatelist[] = 2887static struct stateentry manstatelist[] =
2888{ 2888{
2889 {SBIT(2), 2889 {SBIT(2),
2890 DL_ESTABLISH | INDICATION, l3dss1_dl_reset}, 2890 DL_ESTABLISH | INDICATION, l3dss1_dl_reset},
2891 {SBIT(10), 2891 {SBIT(10),
2892 DL_ESTABLISH | CONFIRM, l3dss1_dl_reest_status}, 2892 DL_ESTABLISH | CONFIRM, l3dss1_dl_reest_status},
2893 {SBIT(10), 2893 {SBIT(10),
2894 DL_RELEASE | INDICATION, l3dss1_dl_reestablish}, 2894 DL_RELEASE | INDICATION, l3dss1_dl_reestablish},
2895 {ALL_STATES, 2895 {ALL_STATES,
2896 DL_RELEASE | INDICATION, l3dss1_dl_release}, 2896 DL_RELEASE | INDICATION, l3dss1_dl_release},
2897}; 2897};
2898 2898
2899/* *INDENT-ON* */ 2899/* *INDENT-ON* */
@@ -2916,13 +2916,13 @@ global_handler(struct PStack *st, int mt, struct sk_buff *skb)
2916 if (i == ARRAY_SIZE(globalmes_list)) { 2916 if (i == ARRAY_SIZE(globalmes_list)) {
2917 if (st->l3.debug & L3_DEB_STATE) { 2917 if (st->l3.debug & L3_DEB_STATE) {
2918 l3_debug(st, "dss1 global state %d mt %x unhandled", 2918 l3_debug(st, "dss1 global state %d mt %x unhandled",
2919 proc->state, mt); 2919 proc->state, mt);
2920 } 2920 }
2921 MsgHead(p, proc->callref, MT_STATUS); 2921 MsgHead(p, proc->callref, MT_STATUS);
2922 *p++ = IE_CAUSE; 2922 *p++ = IE_CAUSE;
2923 *p++ = 0x2; 2923 *p++ = 0x2;
2924 *p++ = 0x80; 2924 *p++ = 0x80;
2925 *p++ = 81 |0x80; /* invalid cr */ 2925 *p++ = 81 | 0x80; /* invalid cr */
2926 *p++ = 0x14; /* CallState */ 2926 *p++ = 0x14; /* CallState */
2927 *p++ = 0x1; 2927 *p++ = 0x1;
2928 *p++ = proc->state & 0x3f; 2928 *p++ = proc->state & 0x3f;
@@ -2934,7 +2934,7 @@ global_handler(struct PStack *st, int mt, struct sk_buff *skb)
2934 } else { 2934 } else {
2935 if (st->l3.debug & L3_DEB_STATE) { 2935 if (st->l3.debug & L3_DEB_STATE) {
2936 l3_debug(st, "dss1 global %d mt %x", 2936 l3_debug(st, "dss1 global %d mt %x",
2937 proc->state, mt); 2937 proc->state, mt);
2938 } 2938 }
2939 globalmes_list[i].rout(proc, mt, skb); 2939 globalmes_list[i].rout(proc, mt, skb);
2940 } 2940 }
@@ -2950,19 +2950,19 @@ dss1up(struct PStack *st, int pr, void *arg)
2950 struct l3_process *proc; 2950 struct l3_process *proc;
2951 2951
2952 switch (pr) { 2952 switch (pr) {
2953 case (DL_DATA | INDICATION): 2953 case (DL_DATA | INDICATION):
2954 case (DL_UNIT_DATA | INDICATION): 2954 case (DL_UNIT_DATA | INDICATION):
2955 break; 2955 break;
2956 case (DL_ESTABLISH | CONFIRM): 2956 case (DL_ESTABLISH | CONFIRM):
2957 case (DL_ESTABLISH | INDICATION): 2957 case (DL_ESTABLISH | INDICATION):
2958 case (DL_RELEASE | INDICATION): 2958 case (DL_RELEASE | INDICATION):
2959 case (DL_RELEASE | CONFIRM): 2959 case (DL_RELEASE | CONFIRM):
2960 l3_msg(st, pr, arg); 2960 l3_msg(st, pr, arg);
2961 return; 2961 return;
2962 break; 2962 break;
2963 default: 2963 default:
2964 printk(KERN_ERR "HiSax dss1up unknown pr=%04x\n", pr); 2964 printk(KERN_ERR "HiSax dss1up unknown pr=%04x\n", pr);
2965 return; 2965 return;
2966 } 2966 }
2967 if (skb->len < 3) { 2967 if (skb->len < 3) {
2968 l3_debug(st, "dss1up frame too short(%d)", skb->len); 2968 l3_debug(st, "dss1up frame too short(%d)", skb->len);
@@ -2996,17 +2996,17 @@ dss1up(struct PStack *st, int pr, void *arg)
2996 } else if (cr == -1) { /* Dummy Callref */ 2996 } else if (cr == -1) { /* Dummy Callref */
2997 if (mt == MT_FACILITY) 2997 if (mt == MT_FACILITY)
2998 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) { 2998 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) {
2999 l3dss1_parse_facility(st, NULL, 2999 l3dss1_parse_facility(st, NULL,
3000 (pr == (DL_DATA | INDICATION)) ? -1 : -2, p); 3000 (pr == (DL_DATA | INDICATION)) ? -1 : -2, p);
3001 dev_kfree_skb(skb); 3001 dev_kfree_skb(skb);
3002 return; 3002 return;
3003 } 3003 }
3004 if (st->l3.debug & L3_DEB_WARN) 3004 if (st->l3.debug & L3_DEB_WARN)
3005 l3_debug(st, "dss1up dummy Callref (no facility msg or ie)"); 3005 l3_debug(st, "dss1up dummy Callref (no facility msg or ie)");
3006 dev_kfree_skb(skb); 3006 dev_kfree_skb(skb);
3007 return; 3007 return;
3008 } else if ((((skb->data[1] & 0x0f) == 1) && (0==(cr & 0x7f))) || 3008 } else if ((((skb->data[1] & 0x0f) == 1) && (0 == (cr & 0x7f))) ||
3009 (((skb->data[1] & 0x0f) == 2) && (0==(cr & 0x7fff)))) { /* Global CallRef */ 3009 (((skb->data[1] & 0x0f) == 2) && (0 == (cr & 0x7fff)))) { /* Global CallRef */
3010 if (st->l3.debug & L3_DEB_STATE) 3010 if (st->l3.debug & L3_DEB_STATE)
3011 l3_debug(st, "dss1up Global CallRef"); 3011 l3_debug(st, "dss1up Global CallRef");
3012 global_handler(st, mt, skb); 3012 global_handler(st, mt, skb);
@@ -3084,8 +3084,8 @@ dss1up(struct PStack *st, int pr, void *arg)
3084 dev_kfree_skb(skb); 3084 dev_kfree_skb(skb);
3085 return; 3085 return;
3086 } 3086 }
3087 if ((p = findie(skb->data, skb->len, IE_DISPLAY, 0)) != NULL) 3087 if ((p = findie(skb->data, skb->len, IE_DISPLAY, 0)) != NULL)
3088 l3dss1_deliver_display(proc, pr, p); /* Display IE included */ 3088 l3dss1_deliver_display(proc, pr, p); /* Display IE included */
3089 for (i = 0; i < ARRAY_SIZE(datastatelist); i++) 3089 for (i = 0; i < ARRAY_SIZE(datastatelist); i++)
3090 if ((mt == datastatelist[i].primitive) && 3090 if ((mt == datastatelist[i].primitive) &&
3091 ((1 << proc->state) & datastatelist[i].state)) 3091 ((1 << proc->state) & datastatelist[i].state))
@@ -3093,8 +3093,8 @@ dss1up(struct PStack *st, int pr, void *arg)
3093 if (i == ARRAY_SIZE(datastatelist)) { 3093 if (i == ARRAY_SIZE(datastatelist)) {
3094 if (st->l3.debug & L3_DEB_STATE) { 3094 if (st->l3.debug & L3_DEB_STATE) {
3095 l3_debug(st, "dss1up%sstate %d mt %#x unhandled", 3095 l3_debug(st, "dss1up%sstate %d mt %#x unhandled",
3096 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 3096 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
3097 proc->state, mt); 3097 proc->state, mt);
3098 } 3098 }
3099 if ((MT_RELEASE_COMPLETE != mt) && (MT_RELEASE != mt)) { 3099 if ((MT_RELEASE_COMPLETE != mt) && (MT_RELEASE != mt)) {
3100 proc->para.cause = 101; 3100 proc->para.cause = 101;
@@ -3103,8 +3103,8 @@ dss1up(struct PStack *st, int pr, void *arg)
3103 } else { 3103 } else {
3104 if (st->l3.debug & L3_DEB_STATE) { 3104 if (st->l3.debug & L3_DEB_STATE) {
3105 l3_debug(st, "dss1up%sstate %d mt %x", 3105 l3_debug(st, "dss1up%sstate %d mt %x",
3106 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 3106 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
3107 proc->state, mt); 3107 proc->state, mt);
3108 } 3108 }
3109 datastatelist[i].rout(proc, pr, skb); 3109 datastatelist[i].rout(proc, pr, skb);
3110 } 3110 }
@@ -3140,10 +3140,10 @@ dss1down(struct PStack *st, int pr, void *arg)
3140 return; 3140 return;
3141 } 3141 }
3142 3142
3143 if ( pr == (CC_TDSS1_IO | REQUEST)) { 3143 if (pr == (CC_TDSS1_IO | REQUEST)) {
3144 l3dss1_io_timer(proc); /* timer expires */ 3144 l3dss1_io_timer(proc); /* timer expires */
3145 return; 3145 return;
3146 } 3146 }
3147 3147
3148 for (i = 0; i < ARRAY_SIZE(downstatelist); i++) 3148 for (i = 0; i < ARRAY_SIZE(downstatelist); i++)
3149 if ((pr == downstatelist[i].primitive) && 3149 if ((pr == downstatelist[i].primitive) &&
@@ -3152,12 +3152,12 @@ dss1down(struct PStack *st, int pr, void *arg)
3152 if (i == ARRAY_SIZE(downstatelist)) { 3152 if (i == ARRAY_SIZE(downstatelist)) {
3153 if (st->l3.debug & L3_DEB_STATE) { 3153 if (st->l3.debug & L3_DEB_STATE) {
3154 l3_debug(st, "dss1down state %d prim %#x unhandled", 3154 l3_debug(st, "dss1down state %d prim %#x unhandled",
3155 proc->state, pr); 3155 proc->state, pr);
3156 } 3156 }
3157 } else { 3157 } else {
3158 if (st->l3.debug & L3_DEB_STATE) { 3158 if (st->l3.debug & L3_DEB_STATE) {
3159 l3_debug(st, "dss1down state %d prim %#x", 3159 l3_debug(st, "dss1down state %d prim %#x",
3160 proc->state, pr); 3160 proc->state, pr);
3161 } 3161 }
3162 downstatelist[i].rout(proc, pr, arg); 3162 downstatelist[i].rout(proc, pr, arg);
3163 } 3163 }
@@ -3166,31 +3166,31 @@ dss1down(struct PStack *st, int pr, void *arg)
3166static void 3166static void
3167dss1man(struct PStack *st, int pr, void *arg) 3167dss1man(struct PStack *st, int pr, void *arg)
3168{ 3168{
3169 int i; 3169 int i;
3170 struct l3_process *proc = arg; 3170 struct l3_process *proc = arg;
3171 3171
3172 if (!proc) { 3172 if (!proc) {
3173 printk(KERN_ERR "HiSax dss1man without proc pr=%04x\n", pr); 3173 printk(KERN_ERR "HiSax dss1man without proc pr=%04x\n", pr);
3174 return; 3174 return;
3175 } 3175 }
3176 for (i = 0; i < ARRAY_SIZE(manstatelist); i++) 3176 for (i = 0; i < ARRAY_SIZE(manstatelist); i++)
3177 if ((pr == manstatelist[i].primitive) && 3177 if ((pr == manstatelist[i].primitive) &&
3178 ((1 << proc->state) & manstatelist[i].state)) 3178 ((1 << proc->state) & manstatelist[i].state))
3179 break; 3179 break;
3180 if (i == ARRAY_SIZE(manstatelist)) { 3180 if (i == ARRAY_SIZE(manstatelist)) {
3181 if (st->l3.debug & L3_DEB_STATE) { 3181 if (st->l3.debug & L3_DEB_STATE) {
3182 l3_debug(st, "cr %d dss1man state %d prim %#x unhandled", 3182 l3_debug(st, "cr %d dss1man state %d prim %#x unhandled",
3183 proc->callref & 0x7f, proc->state, pr); 3183 proc->callref & 0x7f, proc->state, pr);
3184 } 3184 }
3185 } else { 3185 } else {
3186 if (st->l3.debug & L3_DEB_STATE) { 3186 if (st->l3.debug & L3_DEB_STATE) {
3187 l3_debug(st, "cr %d dss1man state %d prim %#x", 3187 l3_debug(st, "cr %d dss1man state %d prim %#x",
3188 proc->callref & 0x7f, proc->state, pr); 3188 proc->callref & 0x7f, proc->state, pr);
3189 } 3189 }
3190 manstatelist[i].rout(proc, pr, arg); 3190 manstatelist[i].rout(proc, pr, arg);
3191 } 3191 }
3192} 3192}
3193 3193
3194void 3194void
3195setstack_dss1(struct PStack *st) 3195setstack_dss1(struct PStack *st)
3196{ 3196{
@@ -3205,8 +3205,8 @@ setstack_dss1(struct PStack *st)
3205 st->prot.dss1.last_invoke_id = 0; 3205 st->prot.dss1.last_invoke_id = 0;
3206 st->prot.dss1.invoke_used[0] = 1; /* Bit 0 must always be set to 1 */ 3206 st->prot.dss1.invoke_used[0] = 1; /* Bit 0 must always be set to 1 */
3207 i = 1; 3207 i = 1;
3208 while (i < 32) 3208 while (i < 32)
3209 st->prot.dss1.invoke_used[i++] = 0; 3209 st->prot.dss1.invoke_used[i++] = 0;
3210 3210
3211 if (!(st->l3.global = kmalloc(sizeof(struct l3_process), GFP_ATOMIC))) { 3211 if (!(st->l3.global = kmalloc(sizeof(struct l3_process), GFP_ATOMIC))) {
3212 printk(KERN_ERR "HiSax can't get memory for dss1 global CR\n"); 3212 printk(KERN_ERR "HiSax can't get memory for dss1 global CR\n");
@@ -3217,7 +3217,7 @@ setstack_dss1(struct PStack *st)
3217 st->l3.global->debug = L3_DEB_WARN; 3217 st->l3.global->debug = L3_DEB_WARN;
3218 st->l3.global->st = st; 3218 st->l3.global->st = st;
3219 st->l3.global->N303 = 1; 3219 st->l3.global->N303 = 1;
3220 st->l3.global->prot.dss1.invoke_id = 0; 3220 st->l3.global->prot.dss1.invoke_id = 0;
3221 3221
3222 L3InitTimer(st->l3.global, &st->l3.global->timer); 3222 L3InitTimer(st->l3.global, &st->l3.global->timer);
3223 } 3223 }
diff --git a/drivers/isdn/hisax/l3dss1.h b/drivers/isdn/hisax/l3dss1.h
index 6da47f05ef2a..a7807e8a94f1 100644
--- a/drivers/isdn/hisax/l3dss1.h
+++ b/drivers/isdn/hisax/l3dss1.h
@@ -107,18 +107,18 @@
107 107
108/* l3dss1 specific data in l3 process */ 108/* l3dss1 specific data in l3 process */
109typedef struct 109typedef struct
110 { unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */ 110{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
111 ulong ll_id; /* remebered ll id */ 111 ulong ll_id; /* remebered ll id */
112 u8 remote_operation; /* handled remote operation, 0 = not active */ 112 u8 remote_operation; /* handled remote operation, 0 = not active */
113 int proc; /* rememered procedure */ 113 int proc; /* rememered procedure */
114 ulong remote_result; /* result of remote operation for statcallb */ 114 ulong remote_result; /* result of remote operation for statcallb */
115 char uus1_data[35]; /* data send during alerting or disconnect */ 115 char uus1_data[35]; /* data send during alerting or disconnect */
116 } dss1_proc_priv; 116} dss1_proc_priv;
117 117
118/* l3dss1 specific data in protocol stack */ 118/* l3dss1 specific data in protocol stack */
119typedef struct 119typedef struct
120 { unsigned char last_invoke_id; /* last used value for invoking */ 120{ unsigned char last_invoke_id; /* last used value for invoking */
121 unsigned char invoke_used[32]; /* 256 bits for 256 values */ 121 unsigned char invoke_used[32]; /* 256 bits for 256 values */
122 } dss1_stk_priv; 122} dss1_stk_priv;
123 123
124#endif /* only l3dss1_process */ 124#endif /* only l3dss1_process */
diff --git a/drivers/isdn/hisax/l3ni1.c b/drivers/isdn/hisax/l3ni1.c
index 092dcbb39d94..0df6691d045c 100644
--- a/drivers/isdn/hisax/l3ni1.c
+++ b/drivers/isdn/hisax/l3ni1.c
@@ -4,14 +4,14 @@
4 * 4 *
5 * Author Matt Henderson & Guy Ellis 5 * Author Matt Henderson & Guy Ellis
6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au 6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 * 2000.6.6 Initial implementation of routines for US NI1 11 * 2000.6.6 Initial implementation of routines for US NI1
12 * Layer 3 protocol based on the EURO/DSS1 D-channel protocol 12 * Layer 3 protocol based on the EURO/DSS1 D-channel protocol
13 * driver written by Karsten Keil et al. 13 * driver written by Karsten Keil et al.
14 * NI-1 Hall of Fame - Thanks to.... 14 * NI-1 Hall of Fame - Thanks to....
15 * Ragnar Paulson - for some handy code fragments 15 * Ragnar Paulson - for some handy code fragments
16 * Will Scales - beta tester extraordinaire 16 * Will Scales - beta tester extraordinaire
17 * Brett Whittacre - beta tester and remote devel system in Vegas 17 * Brett Whittacre - beta tester and remote devel system in Vegas
@@ -29,14 +29,14 @@ static const char *ni1_revision = "$Revision: 2.8.2.3 $";
29 29
30#define EXT_BEARER_CAPS 1 30#define EXT_BEARER_CAPS 1
31 31
32#define MsgHead(ptr, cref, mty) \ 32#define MsgHead(ptr, cref, mty) \
33 *ptr++ = 0x8; \ 33 *ptr++ = 0x8; \
34 if (cref == -1) { \ 34 if (cref == -1) { \
35 *ptr++ = 0x0; \ 35 *ptr++ = 0x0; \
36 } else { \ 36 } else { \
37 *ptr++ = 0x1; \ 37 *ptr++ = 0x1; \
38 *ptr++ = cref^0x80; \ 38 *ptr++ = cref^0x80; \
39 } \ 39 } \
40 *ptr++ = mty 40 *ptr++ = mty
41 41
42 42
@@ -48,22 +48,22 @@ static unsigned char new_invoke_id(struct PStack *p)
48{ 48{
49 unsigned char retval; 49 unsigned char retval;
50 int i; 50 int i;
51 51
52 i = 32; /* maximum search depth */ 52 i = 32; /* maximum search depth */
53 53
54 retval = p->prot.ni1.last_invoke_id + 1; /* try new id */ 54 retval = p->prot.ni1.last_invoke_id + 1; /* try new id */
55 while ((i) && (p->prot.ni1.invoke_used[retval >> 3] == 0xFF)) { 55 while ((i) && (p->prot.ni1.invoke_used[retval >> 3] == 0xFF)) {
56 p->prot.ni1.last_invoke_id = (retval & 0xF8) + 8; 56 p->prot.ni1.last_invoke_id = (retval & 0xF8) + 8;
57 i--; 57 i--;
58 } 58 }
59 if (i) { 59 if (i) {
60 while (p->prot.ni1.invoke_used[retval >> 3] & (1 << (retval & 7))) 60 while (p->prot.ni1.invoke_used[retval >> 3] & (1 << (retval & 7)))
61 retval++; 61 retval++;
62 } else 62 } else
63 retval = 0; 63 retval = 0;
64 p->prot.ni1.last_invoke_id = retval; 64 p->prot.ni1.last_invoke_id = retval;
65 p->prot.ni1.invoke_used[retval >> 3] |= (1 << (retval & 7)); 65 p->prot.ni1.invoke_used[retval >> 3] |= (1 << (retval & 7));
66 return(retval); 66 return (retval);
67} /* new_invoke_id */ 67} /* new_invoke_id */
68 68
69/*************************/ 69/*************************/
@@ -72,10 +72,10 @@ static unsigned char new_invoke_id(struct PStack *p)
72static void free_invoke_id(struct PStack *p, unsigned char id) 72static void free_invoke_id(struct PStack *p, unsigned char id)
73{ 73{
74 74
75 if (!id) return; /* 0 = invalid value */ 75 if (!id) return; /* 0 = invalid value */
76 76
77 p->prot.ni1.invoke_used[id >> 3] &= ~(1 << (id & 7)); 77 p->prot.ni1.invoke_used[id >> 3] &= ~(1 << (id & 7));
78} /* free_invoke_id */ 78} /* free_invoke_id */
79 79
80 80
81/**********************************************************/ 81/**********************************************************/
@@ -85,26 +85,26 @@ static struct l3_process
85*ni1_new_l3_process(struct PStack *st, int cr) 85*ni1_new_l3_process(struct PStack *st, int cr)
86{ struct l3_process *proc; 86{ struct l3_process *proc;
87 87
88 if (!(proc = new_l3_process(st, cr))) 88 if (!(proc = new_l3_process(st, cr)))
89 return(NULL); 89 return (NULL);
90 90
91 proc->prot.ni1.invoke_id = 0; 91 proc->prot.ni1.invoke_id = 0;
92 proc->prot.ni1.remote_operation = 0; 92 proc->prot.ni1.remote_operation = 0;
93 proc->prot.ni1.uus1_data[0] = '\0'; 93 proc->prot.ni1.uus1_data[0] = '\0';
94 94
95 return(proc); 95 return (proc);
96} /* ni1_new_l3_process */ 96} /* ni1_new_l3_process */
97 97
98/************************************************/ 98/************************************************/
99/* free a l3 process and all ni1 specific data */ 99/* free a l3 process and all ni1 specific data */
100/************************************************/ 100/************************************************/
101static void 101static void
102ni1_release_l3_process(struct l3_process *p) 102ni1_release_l3_process(struct l3_process *p)
103{ 103{
104 free_invoke_id(p->st,p->prot.ni1.invoke_id); 104 free_invoke_id(p->st, p->prot.ni1.invoke_id);
105 release_l3_process(p); 105 release_l3_process(p);
106} /* ni1_release_l3_process */ 106} /* ni1_release_l3_process */
107 107
108/********************************************************/ 108/********************************************************/
109/* search a process with invoke id id and dummy callref */ 109/* search a process with invoke id id and dummy callref */
110/********************************************************/ 110/********************************************************/
@@ -112,120 +112,120 @@ static struct l3_process *
112l3ni1_search_dummy_proc(struct PStack *st, int id) 112l3ni1_search_dummy_proc(struct PStack *st, int id)
113{ struct l3_process *pc = st->l3.proc; /* start of processes */ 113{ struct l3_process *pc = st->l3.proc; /* start of processes */
114 114
115 if (!id) return(NULL); 115 if (!id) return (NULL);
116 116
117 while (pc) 117 while (pc)
118 { if ((pc->callref == -1) && (pc->prot.ni1.invoke_id == id)) 118 { if ((pc->callref == -1) && (pc->prot.ni1.invoke_id == id))
119 return(pc); 119 return (pc);
120 pc = pc->next; 120 pc = pc->next;
121 } 121 }
122 return(NULL); 122 return (NULL);
123} /* l3ni1_search_dummy_proc */ 123} /* l3ni1_search_dummy_proc */
124 124
125/*******************************************************************/ 125/*******************************************************************/
126/* called when a facility message with a dummy callref is received */ 126/* called when a facility message with a dummy callref is received */
127/* and a return result is delivered. id specifies the invoke id. */ 127/* and a return result is delivered. id specifies the invoke id. */
128/*******************************************************************/ 128/*******************************************************************/
129static void 129static void
130l3ni1_dummy_return_result(struct PStack *st, int id, u_char *p, u_char nlen) 130l3ni1_dummy_return_result(struct PStack *st, int id, u_char *p, u_char nlen)
131{ isdn_ctrl ic; 131{ isdn_ctrl ic;
132 struct IsdnCardState *cs; 132 struct IsdnCardState *cs;
133 struct l3_process *pc = NULL; 133 struct l3_process *pc = NULL;
134 134
135 if ((pc = l3ni1_search_dummy_proc(st, id))) 135 if ((pc = l3ni1_search_dummy_proc(st, id)))
136 { L3DelTimer(&pc->timer); /* remove timer */ 136 { L3DelTimer(&pc->timer); /* remove timer */
137 137
138 cs = pc->st->l1.hardware; 138 cs = pc->st->l1.hardware;
139 ic.driver = cs->myid; 139 ic.driver = cs->myid;
140 ic.command = ISDN_STAT_PROT; 140 ic.command = ISDN_STAT_PROT;
141 ic.arg = NI1_STAT_INVOKE_RES; 141 ic.arg = NI1_STAT_INVOKE_RES;
142 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id; 142 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id;
143 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id; 143 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id;
144 ic.parm.ni1_io.proc = pc->prot.ni1.proc; 144 ic.parm.ni1_io.proc = pc->prot.ni1.proc;
145 ic.parm.ni1_io.timeout= 0; 145 ic.parm.ni1_io.timeout = 0;
146 ic.parm.ni1_io.datalen = nlen; 146 ic.parm.ni1_io.datalen = nlen;
147 ic.parm.ni1_io.data = p; 147 ic.parm.ni1_io.data = p;
148 free_invoke_id(pc->st, pc->prot.ni1.invoke_id); 148 free_invoke_id(pc->st, pc->prot.ni1.invoke_id);
149 pc->prot.ni1.invoke_id = 0; /* reset id */ 149 pc->prot.ni1.invoke_id = 0; /* reset id */
150 150
151 cs->iif.statcallb(&ic); 151 cs->iif.statcallb(&ic);
152 ni1_release_l3_process(pc); 152 ni1_release_l3_process(pc);
153 } 153 }
154 else 154 else
155 l3_debug(st, "dummy return result id=0x%x result len=%d",id,nlen); 155 l3_debug(st, "dummy return result id=0x%x result len=%d", id, nlen);
156} /* l3ni1_dummy_return_result */ 156} /* l3ni1_dummy_return_result */
157 157
158/*******************************************************************/ 158/*******************************************************************/
159/* called when a facility message with a dummy callref is received */ 159/* called when a facility message with a dummy callref is received */
160/* and a return error is delivered. id specifies the invoke id. */ 160/* and a return error is delivered. id specifies the invoke id. */
161/*******************************************************************/ 161/*******************************************************************/
162static void 162static void
163l3ni1_dummy_error_return(struct PStack *st, int id, ulong error) 163l3ni1_dummy_error_return(struct PStack *st, int id, ulong error)
164{ isdn_ctrl ic; 164{ isdn_ctrl ic;
165 struct IsdnCardState *cs; 165 struct IsdnCardState *cs;
166 struct l3_process *pc = NULL; 166 struct l3_process *pc = NULL;
167 167
168 if ((pc = l3ni1_search_dummy_proc(st, id))) 168 if ((pc = l3ni1_search_dummy_proc(st, id)))
169 { L3DelTimer(&pc->timer); /* remove timer */ 169 { L3DelTimer(&pc->timer); /* remove timer */
170 170
171 cs = pc->st->l1.hardware; 171 cs = pc->st->l1.hardware;
172 ic.driver = cs->myid; 172 ic.driver = cs->myid;
173 ic.command = ISDN_STAT_PROT; 173 ic.command = ISDN_STAT_PROT;
174 ic.arg = NI1_STAT_INVOKE_ERR; 174 ic.arg = NI1_STAT_INVOKE_ERR;
175 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id; 175 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id;
176 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id; 176 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id;
177 ic.parm.ni1_io.proc = pc->prot.ni1.proc; 177 ic.parm.ni1_io.proc = pc->prot.ni1.proc;
178 ic.parm.ni1_io.timeout= error; 178 ic.parm.ni1_io.timeout = error;
179 ic.parm.ni1_io.datalen = 0; 179 ic.parm.ni1_io.datalen = 0;
180 ic.parm.ni1_io.data = NULL; 180 ic.parm.ni1_io.data = NULL;
181 free_invoke_id(pc->st, pc->prot.ni1.invoke_id); 181 free_invoke_id(pc->st, pc->prot.ni1.invoke_id);
182 pc->prot.ni1.invoke_id = 0; /* reset id */ 182 pc->prot.ni1.invoke_id = 0; /* reset id */
183 183
184 cs->iif.statcallb(&ic); 184 cs->iif.statcallb(&ic);
185 ni1_release_l3_process(pc); 185 ni1_release_l3_process(pc);
186 } 186 }
187 else 187 else
188 l3_debug(st, "dummy return error id=0x%x error=0x%lx",id,error); 188 l3_debug(st, "dummy return error id=0x%x error=0x%lx", id, error);
189} /* l3ni1_error_return */ 189} /* l3ni1_error_return */
190 190
191/*******************************************************************/ 191/*******************************************************************/
192/* called when a facility message with a dummy callref is received */ 192/* called when a facility message with a dummy callref is received */
193/* and a invoke is delivered. id specifies the invoke id. */ 193/* and a invoke is delivered. id specifies the invoke id. */
194/*******************************************************************/ 194/*******************************************************************/
195static void 195static void
196l3ni1_dummy_invoke(struct PStack *st, int cr, int id, 196l3ni1_dummy_invoke(struct PStack *st, int cr, int id,
197 int ident, u_char *p, u_char nlen) 197 int ident, u_char *p, u_char nlen)
198{ isdn_ctrl ic; 198{ isdn_ctrl ic;
199 struct IsdnCardState *cs; 199 struct IsdnCardState *cs;
200 200
201 l3_debug(st, "dummy invoke %s id=0x%x ident=0x%x datalen=%d", 201 l3_debug(st, "dummy invoke %s id=0x%x ident=0x%x datalen=%d",
202 (cr == -1) ? "local" : "broadcast",id,ident,nlen); 202 (cr == -1) ? "local" : "broadcast", id, ident, nlen);
203 if (cr >= -1) return; /* ignore local data */ 203 if (cr >= -1) return; /* ignore local data */
204 204
205 cs = st->l1.hardware; 205 cs = st->l1.hardware;
206 ic.driver = cs->myid; 206 ic.driver = cs->myid;
207 ic.command = ISDN_STAT_PROT; 207 ic.command = ISDN_STAT_PROT;
208 ic.arg = NI1_STAT_INVOKE_BRD; 208 ic.arg = NI1_STAT_INVOKE_BRD;
209 ic.parm.ni1_io.hl_id = id; 209 ic.parm.ni1_io.hl_id = id;
210 ic.parm.ni1_io.ll_id = 0; 210 ic.parm.ni1_io.ll_id = 0;
211 ic.parm.ni1_io.proc = ident; 211 ic.parm.ni1_io.proc = ident;
212 ic.parm.ni1_io.timeout= 0; 212 ic.parm.ni1_io.timeout = 0;
213 ic.parm.ni1_io.datalen = nlen; 213 ic.parm.ni1_io.datalen = nlen;
214 ic.parm.ni1_io.data = p; 214 ic.parm.ni1_io.data = p;
215 215
216 cs->iif.statcallb(&ic); 216 cs->iif.statcallb(&ic);
217} /* l3ni1_dummy_invoke */ 217} /* l3ni1_dummy_invoke */
218 218
219static void 219static void
220l3ni1_parse_facility(struct PStack *st, struct l3_process *pc, 220l3ni1_parse_facility(struct PStack *st, struct l3_process *pc,
221 int cr, u_char * p) 221 int cr, u_char *p)
222{ 222{
223 int qd_len = 0; 223 int qd_len = 0;
224 unsigned char nlen = 0, ilen, cp_tag; 224 unsigned char nlen = 0, ilen, cp_tag;
225 int ident, id; 225 int ident, id;
226 ulong err_ret; 226 ulong err_ret;
227 227
228 if (pc) 228 if (pc)
229 st = pc->st; /* valid Stack */ 229 st = pc->st; /* valid Stack */
230 else 230 else
231 if ((!st) || (cr >= 0)) return; /* neither pc nor st specified */ 231 if ((!st) || (cr >= 0)) return; /* neither pc nor st specified */
@@ -254,173 +254,173 @@ l3ni1_parse_facility(struct PStack *st, struct l3_process *pc,
254 l3_debug(st, "class and form != 0xA0"); 254 l3_debug(st, "class and form != 0xA0");
255 return; 255 return;
256 } 256 }
257
258 cp_tag = *p & 0x1F; /* remember tag value */
259 257
260 p++; 258 cp_tag = *p & 0x1F; /* remember tag value */
259
260 p++;
261 qd_len--; 261 qd_len--;
262 if (qd_len < 1) 262 if (qd_len < 1)
263 { l3_debug(st, "qd_len < 1"); 263 { l3_debug(st, "qd_len < 1");
264 return; 264 return;
265 } 265 }
266 if (*p & 0x80) 266 if (*p & 0x80)
267 { /* length format indefinite or limited */ 267 { /* length format indefinite or limited */
268 nlen = *p++ & 0x7F; /* number of len bytes or indefinite */ 268 nlen = *p++ & 0x7F; /* number of len bytes or indefinite */
269 if ((qd_len-- < ((!nlen) ? 3 : (1 + nlen))) || 269 if ((qd_len-- < ((!nlen) ? 3 : (1 + nlen))) ||
270 (nlen > 1)) 270 (nlen > 1))
271 { l3_debug(st, "length format error or not implemented"); 271 { l3_debug(st, "length format error or not implemented");
272 return; 272 return;
273 } 273 }
274 if (nlen == 1) 274 if (nlen == 1)
275 { nlen = *p++; /* complete length */ 275 { nlen = *p++; /* complete length */
276 qd_len--; 276 qd_len--;
277 } 277 }
278 else 278 else
279 { qd_len -= 2; /* trailing null bytes */ 279 { qd_len -= 2; /* trailing null bytes */
280 if ((*(p+qd_len)) || (*(p+qd_len+1))) 280 if ((*(p + qd_len)) || (*(p + qd_len + 1)))
281 { l3_debug(st,"length format indefinite error"); 281 { l3_debug(st, "length format indefinite error");
282 return; 282 return;
283 } 283 }
284 nlen = qd_len; 284 nlen = qd_len;
285 } 285 }
286 } 286 }
287 else 287 else
288 { nlen = *p++; 288 { nlen = *p++;
289 qd_len--; 289 qd_len--;
290 } 290 }
291 if (qd_len < nlen) 291 if (qd_len < nlen)
292 { l3_debug(st, "qd_len < nlen"); 292 { l3_debug(st, "qd_len < nlen");
293 return; 293 return;
294 } 294 }
295 qd_len -= nlen; 295 qd_len -= nlen;
296 296
297 if (nlen < 2) 297 if (nlen < 2)
298 { l3_debug(st, "nlen < 2"); 298 { l3_debug(st, "nlen < 2");
299 return; 299 return;
300 } 300 }
301 if (*p != 0x02) 301 if (*p != 0x02)
302 { /* invoke identifier tag */ 302 { /* invoke identifier tag */
303 l3_debug(st, "invoke identifier tag !=0x02"); 303 l3_debug(st, "invoke identifier tag !=0x02");
304 return; 304 return;
305 } 305 }
306 p++; 306 p++;
307 nlen--; 307 nlen--;
308 if (*p & 0x80) 308 if (*p & 0x80)
309 { /* length format */ 309 { /* length format */
310 l3_debug(st, "invoke id length format 2"); 310 l3_debug(st, "invoke id length format 2");
311 return; 311 return;
312 } 312 }
313 ilen = *p++; 313 ilen = *p++;
314 nlen--; 314 nlen--;
315 if (ilen > nlen || ilen == 0) 315 if (ilen > nlen || ilen == 0)
316 { l3_debug(st, "ilen > nlen || ilen == 0"); 316 { l3_debug(st, "ilen > nlen || ilen == 0");
317 return; 317 return;
318 } 318 }
319 nlen -= ilen; 319 nlen -= ilen;
320 id = 0; 320 id = 0;
321 while (ilen > 0) 321 while (ilen > 0)
322 { id = (id << 8) | (*p++ & 0xFF); /* invoke identifier */ 322 { id = (id << 8) | (*p++ & 0xFF); /* invoke identifier */
323 ilen--; 323 ilen--;
324 } 324 }
325 325
326 switch (cp_tag) { /* component tag */ 326 switch (cp_tag) { /* component tag */
327 case 1: /* invoke */ 327 case 1: /* invoke */
328 if (nlen < 2) { 328 if (nlen < 2) {
329 l3_debug(st, "nlen < 2 22"); 329 l3_debug(st, "nlen < 2 22");
330 return; 330 return;
331 } 331 }
332 if (*p != 0x02) { /* operation value */ 332 if (*p != 0x02) { /* operation value */
333 l3_debug(st, "operation value !=0x02"); 333 l3_debug(st, "operation value !=0x02");
334 return; 334 return;
335 } 335 }
336 p++; 336 p++;
337 nlen--; 337 nlen--;
338 ilen = *p++; 338 ilen = *p++;
339 nlen--; 339 nlen--;
340 if (ilen > nlen || ilen == 0) { 340 if (ilen > nlen || ilen == 0) {
341 l3_debug(st, "ilen > nlen || ilen == 0 22"); 341 l3_debug(st, "ilen > nlen || ilen == 0 22");
342 return; 342 return;
343 } 343 }
344 nlen -= ilen; 344 nlen -= ilen;
345 ident = 0; 345 ident = 0;
346 while (ilen > 0) { 346 while (ilen > 0) {
347 ident = (ident << 8) | (*p++ & 0xFF); 347 ident = (ident << 8) | (*p++ & 0xFF);
348 ilen--; 348 ilen--;
349 } 349 }
350 350
351 if (!pc) 351 if (!pc)
352 { 352 {
353 l3ni1_dummy_invoke(st, cr, id, ident, p, nlen); 353 l3ni1_dummy_invoke(st, cr, id, ident, p, nlen);
354 return; 354 return;
355 } 355 }
356 l3_debug(st, "invoke break"); 356 l3_debug(st, "invoke break");
357 break; 357 break;
358 case 2: /* return result */ 358 case 2: /* return result */
359 /* if no process available handle separately */ 359 /* if no process available handle separately */
360 if (!pc) 360 if (!pc)
361 { if (cr == -1) 361 { if (cr == -1)
362 l3ni1_dummy_return_result(st, id, p, nlen); 362 l3ni1_dummy_return_result(st, id, p, nlen);
363 return; 363 return;
364 } 364 }
365 if ((pc->prot.ni1.invoke_id) && (pc->prot.ni1.invoke_id == id)) 365 if ((pc->prot.ni1.invoke_id) && (pc->prot.ni1.invoke_id == id))
366 { /* Diversion successful */ 366 { /* Diversion successful */
367 free_invoke_id(st,pc->prot.ni1.invoke_id); 367 free_invoke_id(st, pc->prot.ni1.invoke_id);
368 pc->prot.ni1.remote_result = 0; /* success */ 368 pc->prot.ni1.remote_result = 0; /* success */
369 pc->prot.ni1.invoke_id = 0; 369 pc->prot.ni1.invoke_id = 0;
370 pc->redir_result = pc->prot.ni1.remote_result; 370 pc->redir_result = pc->prot.ni1.remote_result;
371 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); } /* Diversion successful */ 371 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); } /* Diversion successful */
372 else 372 else
373 l3_debug(st,"return error unknown identifier"); 373 l3_debug(st, "return error unknown identifier");
374 break; 374 break;
375 case 3: /* return error */ 375 case 3: /* return error */
376 err_ret = 0; 376 err_ret = 0;
377 if (nlen < 2) 377 if (nlen < 2)
378 { l3_debug(st, "return error nlen < 2"); 378 { l3_debug(st, "return error nlen < 2");
379 return; 379 return;
380 } 380 }
381 if (*p != 0x02) 381 if (*p != 0x02)
382 { /* result tag */ 382 { /* result tag */
383 l3_debug(st, "invoke error tag !=0x02"); 383 l3_debug(st, "invoke error tag !=0x02");
384 return; 384 return;
385 } 385 }
386 p++; 386 p++;
387 nlen--; 387 nlen--;
388 if (*p > 4) 388 if (*p > 4)
389 { /* length format */ 389 { /* length format */
390 l3_debug(st, "invoke return errlen > 4 "); 390 l3_debug(st, "invoke return errlen > 4 ");
391 return; 391 return;
392 } 392 }
393 ilen = *p++; 393 ilen = *p++;
394 nlen--; 394 nlen--;
395 if (ilen > nlen || ilen == 0) 395 if (ilen > nlen || ilen == 0)
396 { l3_debug(st, "error return ilen > nlen || ilen == 0"); 396 { l3_debug(st, "error return ilen > nlen || ilen == 0");
397 return; 397 return;
398 } 398 }
399 nlen -= ilen; 399 nlen -= ilen;
400 while (ilen > 0) 400 while (ilen > 0)
401 { err_ret = (err_ret << 8) | (*p++ & 0xFF); /* error value */ 401 { err_ret = (err_ret << 8) | (*p++ & 0xFF); /* error value */
402 ilen--; 402 ilen--;
403 } 403 }
404 /* if no process available handle separately */ 404 /* if no process available handle separately */
405 if (!pc) 405 if (!pc)
406 { if (cr == -1) 406 { if (cr == -1)
407 l3ni1_dummy_error_return(st, id, err_ret); 407 l3ni1_dummy_error_return(st, id, err_ret);
408 return; 408 return;
409 } 409 }
410 if ((pc->prot.ni1.invoke_id) && (pc->prot.ni1.invoke_id == id)) 410 if ((pc->prot.ni1.invoke_id) && (pc->prot.ni1.invoke_id == id))
411 { /* Deflection error */ 411 { /* Deflection error */
412 free_invoke_id(st,pc->prot.ni1.invoke_id); 412 free_invoke_id(st, pc->prot.ni1.invoke_id);
413 pc->prot.ni1.remote_result = err_ret; /* result */ 413 pc->prot.ni1.remote_result = err_ret; /* result */
414 pc->prot.ni1.invoke_id = 0; 414 pc->prot.ni1.invoke_id = 0;
415 pc->redir_result = pc->prot.ni1.remote_result; 415 pc->redir_result = pc->prot.ni1.remote_result;
416 st->l3.l3l4(st, CC_REDIR | INDICATION, pc); 416 st->l3.l3l4(st, CC_REDIR | INDICATION, pc);
417 } /* Deflection error */ 417 } /* Deflection error */
418 else 418 else
419 l3_debug(st,"return result unknown identifier"); 419 l3_debug(st, "return result unknown identifier");
420 break; 420 break;
421 default: 421 default:
422 l3_debug(st, "facility default break tag=0x%02x",cp_tag); 422 l3_debug(st, "facility default break tag=0x%02x", cp_tag);
423 break; 423 break;
424 } 424 }
425} 425}
426 426
@@ -518,21 +518,21 @@ l3ni1_msg_without_setup(struct l3_process *pc, u_char pr, void *arg)
518 struct sk_buff *skb; 518 struct sk_buff *skb;
519 519
520 switch (pc->para.cause) { 520 switch (pc->para.cause) {
521 case 81: /* invalid callreference */ 521 case 81: /* invalid callreference */
522 case 88: /* incomp destination */ 522 case 88: /* incomp destination */
523 case 96: /* mandory IE missing */ 523 case 96: /* mandory IE missing */
524 case 100: /* invalid IE contents */ 524 case 100: /* invalid IE contents */
525 case 101: /* incompatible Callstate */ 525 case 101: /* incompatible Callstate */
526 MsgHead(p, pc->callref, MT_RELEASE_COMPLETE); 526 MsgHead(p, pc->callref, MT_RELEASE_COMPLETE);
527 *p++ = IE_CAUSE; 527 *p++ = IE_CAUSE;
528 *p++ = 0x2; 528 *p++ = 0x2;
529 *p++ = 0x80; 529 *p++ = 0x80;
530 *p++ = pc->para.cause | 0x80; 530 *p++ = pc->para.cause | 0x80;
531 break; 531 break;
532 default: 532 default:
533 printk(KERN_ERR "HiSax l3ni1_msg_without_setup wrong cause %d\n", 533 printk(KERN_ERR "HiSax l3ni1_msg_without_setup wrong cause %d\n",
534 pc->para.cause); 534 pc->para.cause);
535 return; 535 return;
536 } 536 }
537 l = p - tmp; 537 l = p - tmp;
538 if (!(skb = l3_alloc_skb(l))) 538 if (!(skb = l3_alloc_skb(l)))
@@ -543,42 +543,42 @@ l3ni1_msg_without_setup(struct l3_process *pc, u_char pr, void *arg)
543} 543}
544 544
545static int ie_ALERTING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 545static int ie_ALERTING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
546 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_HLC, 546 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_HLC,
547 IE_USER_USER, -1}; 547 IE_USER_USER, -1};
548static int ie_CALL_PROCEEDING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 548static int ie_CALL_PROCEEDING[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
549 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_HLC, -1}; 549 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_HLC, -1};
550static int ie_CONNECT[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1, 550static int ie_CONNECT[] = {IE_BEARER, IE_CHANNEL_ID | IE_MANDATORY_1,
551 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_DATE, IE_SIGNAL, 551 IE_FACILITY, IE_PROGRESS, IE_DISPLAY, IE_DATE, IE_SIGNAL,
552 IE_CONNECT_PN, IE_CONNECT_SUB, IE_LLC, IE_HLC, IE_USER_USER, -1}; 552 IE_CONNECT_PN, IE_CONNECT_SUB, IE_LLC, IE_HLC, IE_USER_USER, -1};
553static int ie_CONNECT_ACKNOWLEDGE[] = {IE_CHANNEL_ID, IE_DISPLAY, IE_SIGNAL, -1}; 553static int ie_CONNECT_ACKNOWLEDGE[] = {IE_CHANNEL_ID, IE_DISPLAY, IE_SIGNAL, -1};
554static int ie_DISCONNECT[] = {IE_CAUSE | IE_MANDATORY, IE_FACILITY, 554static int ie_DISCONNECT[] = {IE_CAUSE | IE_MANDATORY, IE_FACILITY,
555 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1}; 555 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1};
556static int ie_INFORMATION[] = {IE_COMPLETE, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, 556static int ie_INFORMATION[] = {IE_COMPLETE, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL,
557 IE_CALLED_PN, -1}; 557 IE_CALLED_PN, -1};
558static int ie_NOTIFY[] = {IE_BEARER, IE_NOTIFY | IE_MANDATORY, IE_DISPLAY, -1}; 558static int ie_NOTIFY[] = {IE_BEARER, IE_NOTIFY | IE_MANDATORY, IE_DISPLAY, -1};
559static int ie_PROGRESS[] = {IE_BEARER, IE_CAUSE, IE_FACILITY, IE_PROGRESS | 559static int ie_PROGRESS[] = {IE_BEARER, IE_CAUSE, IE_FACILITY, IE_PROGRESS |
560 IE_MANDATORY, IE_DISPLAY, IE_HLC, IE_USER_USER, -1}; 560 IE_MANDATORY, IE_DISPLAY, IE_HLC, IE_USER_USER, -1};
561static int ie_RELEASE[] = {IE_CAUSE | IE_MANDATORY_1, IE_FACILITY, IE_DISPLAY, 561static int ie_RELEASE[] = {IE_CAUSE | IE_MANDATORY_1, IE_FACILITY, IE_DISPLAY,
562 IE_SIGNAL, IE_USER_USER, -1}; 562 IE_SIGNAL, IE_USER_USER, -1};
563/* a RELEASE_COMPLETE with errors don't require special actions 563/* a RELEASE_COMPLETE with errors don't require special actions
564static int ie_RELEASE_COMPLETE[] = {IE_CAUSE | IE_MANDATORY_1, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1}; 564 static int ie_RELEASE_COMPLETE[] = {IE_CAUSE | IE_MANDATORY_1, IE_DISPLAY, IE_SIGNAL, IE_USER_USER, -1};
565*/ 565*/
566static int ie_RESUME_ACKNOWLEDGE[] = {IE_CHANNEL_ID| IE_MANDATORY, IE_FACILITY, 566static int ie_RESUME_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY,
567 IE_DISPLAY, -1}; 567 IE_DISPLAY, -1};
568static int ie_RESUME_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 568static int ie_RESUME_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
569static int ie_SETUP[] = {IE_COMPLETE, IE_BEARER | IE_MANDATORY, 569static int ie_SETUP[] = {IE_COMPLETE, IE_BEARER | IE_MANDATORY,
570 IE_CHANNEL_ID| IE_MANDATORY, IE_FACILITY, IE_PROGRESS, 570 IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY, IE_PROGRESS,
571 IE_NET_FAC, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, IE_CALLING_PN, 571 IE_NET_FAC, IE_DISPLAY, IE_KEYPAD, IE_SIGNAL, IE_CALLING_PN,
572 IE_CALLING_SUB, IE_CALLED_PN, IE_CALLED_SUB, IE_REDIR_NR, 572 IE_CALLING_SUB, IE_CALLED_PN, IE_CALLED_SUB, IE_REDIR_NR,
573 IE_LLC, IE_HLC, IE_USER_USER, -1}; 573 IE_LLC, IE_HLC, IE_USER_USER, -1};
574static int ie_SETUP_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY, 574static int ie_SETUP_ACKNOWLEDGE[] = {IE_CHANNEL_ID | IE_MANDATORY, IE_FACILITY,
575 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, -1}; 575 IE_PROGRESS, IE_DISPLAY, IE_SIGNAL, -1};
576static int ie_STATUS[] = {IE_CAUSE | IE_MANDATORY, IE_CALL_STATE | 576static int ie_STATUS[] = {IE_CAUSE | IE_MANDATORY, IE_CALL_STATE |
577 IE_MANDATORY, IE_DISPLAY, -1}; 577 IE_MANDATORY, IE_DISPLAY, -1};
578static int ie_STATUS_ENQUIRY[] = {IE_DISPLAY, -1}; 578static int ie_STATUS_ENQUIRY[] = {IE_DISPLAY, -1};
579static int ie_SUSPEND_ACKNOWLEDGE[] = {IE_DISPLAY, IE_FACILITY, -1}; 579static int ie_SUSPEND_ACKNOWLEDGE[] = {IE_DISPLAY, IE_FACILITY, -1};
580static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 580static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
581/* not used 581/* not used
582 * static int ie_CONGESTION_CONTROL[] = {IE_CONGESTION | IE_MANDATORY, 582 * static int ie_CONGESTION_CONTROL[] = {IE_CONGESTION | IE_MANDATORY,
583 * IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1}; 583 * IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
584 * static int ie_USER_INFORMATION[] = {IE_MORE_DATA, IE_USER_USER | IE_MANDATORY, -1}; 584 * static int ie_USER_INFORMATION[] = {IE_MORE_DATA, IE_USER_USER | IE_MANDATORY, -1};
@@ -586,8 +586,8 @@ static int ie_SUSPEND_REJECT[] = {IE_CAUSE | IE_MANDATORY, IE_DISPLAY, -1};
586 * IE_MANDATORY, -1}; 586 * IE_MANDATORY, -1};
587 */ 587 */
588static int ie_FACILITY[] = {IE_FACILITY | IE_MANDATORY, IE_DISPLAY, -1}; 588static int ie_FACILITY[] = {IE_FACILITY | IE_MANDATORY, IE_DISPLAY, -1};
589static int comp_required[] = {1,2,3,5,6,7,9,10,11,14,15,-1}; 589static int comp_required[] = {1, 2, 3, 5, 6, 7, 9, 10, 11, 14, 15, -1};
590static int l3_valid_states[] = {0,1,2,3,4,6,7,8,9,10,11,12,15,17,19,25,-1}; 590static int l3_valid_states[] = {0, 1, 2, 3, 4, 6, 7, 8, 9, 10, 11, 12, 15, 17, 19, 25, -1};
591 591
592struct ie_len { 592struct ie_len {
593 int ie; 593 int ie;
@@ -628,7 +628,7 @@ struct ie_len max_ie_len[] = {
628 {IE_LLC, 18}, 628 {IE_LLC, 18},
629 {IE_HLC, 5}, 629 {IE_HLC, 5},
630 {IE_USER_USER, 131}, 630 {IE_USER_USER, 131},
631 {-1,0}, 631 {-1, 0},
632}; 632};
633 633
634static int 634static int
@@ -636,10 +636,10 @@ getmax_ie_len(u_char ie) {
636 int i = 0; 636 int i = 0;
637 while (max_ie_len[i].ie != -1) { 637 while (max_ie_len[i].ie != -1) {
638 if (max_ie_len[i].ie == ie) 638 if (max_ie_len[i].ie == ie)
639 return(max_ie_len[i].len); 639 return (max_ie_len[i].len);
640 i++; 640 i++;
641 } 641 }
642 return(255); 642 return (255);
643} 643}
644 644
645static int 645static int
@@ -649,14 +649,14 @@ ie_in_set(struct l3_process *pc, u_char ie, int *checklist) {
649 while (*checklist != -1) { 649 while (*checklist != -1) {
650 if ((*checklist & 0xff) == ie) { 650 if ((*checklist & 0xff) == ie) {
651 if (ie & 0x80) 651 if (ie & 0x80)
652 return(-ret); 652 return (-ret);
653 else 653 else
654 return(ret); 654 return (ret);
655 } 655 }
656 ret++; 656 ret++;
657 checklist++; 657 checklist++;
658 } 658 }
659 return(0); 659 return (0);
660} 660}
661 661
662static int 662static int
@@ -670,7 +670,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
670 u_char codeset = 0; 670 u_char codeset = 0;
671 u_char old_codeset = 0; 671 u_char old_codeset = 0;
672 u_char codelock = 1; 672 u_char codelock = 1;
673 673
674 p = skb->data; 674 p = skb->data;
675 /* skip cr */ 675 /* skip cr */
676 p++; 676 p++;
@@ -688,7 +688,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
688 codelock = 1; 688 codelock = 1;
689 if (pc->debug & L3_DEB_CHECK) 689 if (pc->debug & L3_DEB_CHECK)
690 l3_debug(pc->st, "check IE shift%scodeset %d->%d", 690 l3_debug(pc->st, "check IE shift%scodeset %d->%d",
691 codelock ? " locking ": " ", old_codeset, codeset); 691 codelock ? " locking " : " ", old_codeset, codeset);
692 p++; 692 p++;
693 continue; 693 continue;
694 } 694 }
@@ -720,7 +720,7 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
720 if (!codelock) { 720 if (!codelock) {
721 if (pc->debug & L3_DEB_CHECK) 721 if (pc->debug & L3_DEB_CHECK)
722 l3_debug(pc->st, "check IE shift back codeset %d->%d", 722 l3_debug(pc->st, "check IE shift back codeset %d->%d",
723 codeset, old_codeset); 723 codeset, old_codeset);
724 codeset = old_codeset; 724 codeset = old_codeset;
725 codelock = 1; 725 codelock = 1;
726 } 726 }
@@ -728,17 +728,17 @@ check_infoelements(struct l3_process *pc, struct sk_buff *skb, int *checklist)
728 if (err_compr | err_ureg | err_len | err_seq) { 728 if (err_compr | err_ureg | err_len | err_seq) {
729 if (pc->debug & L3_DEB_CHECK) 729 if (pc->debug & L3_DEB_CHECK)
730 l3_debug(pc->st, "check IE MT(%x) %d/%d/%d/%d", 730 l3_debug(pc->st, "check IE MT(%x) %d/%d/%d/%d",
731 mt, err_compr, err_ureg, err_len, err_seq); 731 mt, err_compr, err_ureg, err_len, err_seq);
732 if (err_compr) 732 if (err_compr)
733 return(ERR_IE_COMPREHENSION); 733 return (ERR_IE_COMPREHENSION);
734 if (err_ureg) 734 if (err_ureg)
735 return(ERR_IE_UNRECOGNIZED); 735 return (ERR_IE_UNRECOGNIZED);
736 if (err_len) 736 if (err_len)
737 return(ERR_IE_LENGTH); 737 return (ERR_IE_LENGTH);
738 if (err_seq) 738 if (err_seq)
739 return(ERR_IE_SEQUENCE); 739 return (ERR_IE_SEQUENCE);
740 } 740 }
741 return(0); 741 return (0);
742} 742}
743 743
744/* verify if a message type exists and contain no IE error */ 744/* verify if a message type exists and contain no IE error */
@@ -746,42 +746,42 @@ static int
746l3ni1_check_messagetype_validity(struct l3_process *pc, int mt, void *arg) 746l3ni1_check_messagetype_validity(struct l3_process *pc, int mt, void *arg)
747{ 747{
748 switch (mt) { 748 switch (mt) {
749 case MT_ALERTING: 749 case MT_ALERTING:
750 case MT_CALL_PROCEEDING: 750 case MT_CALL_PROCEEDING:
751 case MT_CONNECT: 751 case MT_CONNECT:
752 case MT_CONNECT_ACKNOWLEDGE: 752 case MT_CONNECT_ACKNOWLEDGE:
753 case MT_DISCONNECT: 753 case MT_DISCONNECT:
754 case MT_INFORMATION: 754 case MT_INFORMATION:
755 case MT_FACILITY: 755 case MT_FACILITY:
756 case MT_NOTIFY: 756 case MT_NOTIFY:
757 case MT_PROGRESS: 757 case MT_PROGRESS:
758 case MT_RELEASE: 758 case MT_RELEASE:
759 case MT_RELEASE_COMPLETE: 759 case MT_RELEASE_COMPLETE:
760 case MT_SETUP: 760 case MT_SETUP:
761 case MT_SETUP_ACKNOWLEDGE: 761 case MT_SETUP_ACKNOWLEDGE:
762 case MT_RESUME_ACKNOWLEDGE: 762 case MT_RESUME_ACKNOWLEDGE:
763 case MT_RESUME_REJECT: 763 case MT_RESUME_REJECT:
764 case MT_SUSPEND_ACKNOWLEDGE: 764 case MT_SUSPEND_ACKNOWLEDGE:
765 case MT_SUSPEND_REJECT: 765 case MT_SUSPEND_REJECT:
766 case MT_USER_INFORMATION: 766 case MT_USER_INFORMATION:
767 case MT_RESTART: 767 case MT_RESTART:
768 case MT_RESTART_ACKNOWLEDGE: 768 case MT_RESTART_ACKNOWLEDGE:
769 case MT_CONGESTION_CONTROL: 769 case MT_CONGESTION_CONTROL:
770 case MT_STATUS: 770 case MT_STATUS:
771 case MT_STATUS_ENQUIRY: 771 case MT_STATUS_ENQUIRY:
772 if (pc->debug & L3_DEB_CHECK) 772 if (pc->debug & L3_DEB_CHECK)
773 l3_debug(pc->st, "l3ni1_check_messagetype_validity mt(%x) OK", mt); 773 l3_debug(pc->st, "l3ni1_check_messagetype_validity mt(%x) OK", mt);
774 break; 774 break;
775 case MT_RESUME: /* RESUME only in user->net */ 775 case MT_RESUME: /* RESUME only in user->net */
776 case MT_SUSPEND: /* SUSPEND only in user->net */ 776 case MT_SUSPEND: /* SUSPEND only in user->net */
777 default: 777 default:
778 if (pc->debug & (L3_DEB_CHECK | L3_DEB_WARN)) 778 if (pc->debug & (L3_DEB_CHECK | L3_DEB_WARN))
779 l3_debug(pc->st, "l3ni1_check_messagetype_validity mt(%x) fail", mt); 779 l3_debug(pc->st, "l3ni1_check_messagetype_validity mt(%x) fail", mt);
780 pc->para.cause = 97; 780 pc->para.cause = 97;
781 l3ni1_status_send(pc, 0, NULL); 781 l3ni1_status_send(pc, 0, NULL);
782 return(1); 782 return (1);
783 } 783 }
784 return(0); 784 return (0);
785} 785}
786 786
787static void 787static void
@@ -789,24 +789,24 @@ l3ni1_std_ie_err(struct l3_process *pc, int ret) {
789 789
790 if (pc->debug & L3_DEB_CHECK) 790 if (pc->debug & L3_DEB_CHECK)
791 l3_debug(pc->st, "check_infoelements ret %d", ret); 791 l3_debug(pc->st, "check_infoelements ret %d", ret);
792 switch(ret) { 792 switch (ret) {
793 case 0: 793 case 0:
794 break; 794 break;
795 case ERR_IE_COMPREHENSION: 795 case ERR_IE_COMPREHENSION:
796 pc->para.cause = 96; 796 pc->para.cause = 96;
797 l3ni1_status_send(pc, 0, NULL); 797 l3ni1_status_send(pc, 0, NULL);
798 break; 798 break;
799 case ERR_IE_UNRECOGNIZED: 799 case ERR_IE_UNRECOGNIZED:
800 pc->para.cause = 99; 800 pc->para.cause = 99;
801 l3ni1_status_send(pc, 0, NULL); 801 l3ni1_status_send(pc, 0, NULL);
802 break; 802 break;
803 case ERR_IE_LENGTH: 803 case ERR_IE_LENGTH:
804 pc->para.cause = 100; 804 pc->para.cause = 100;
805 l3ni1_status_send(pc, 0, NULL); 805 l3ni1_status_send(pc, 0, NULL);
806 break; 806 break;
807 case ERR_IE_SEQUENCE: 807 case ERR_IE_SEQUENCE:
808 default: 808 default:
809 break; 809 break;
810 } 810 }
811} 811}
812 812
@@ -828,14 +828,14 @@ l3ni1_get_channel_id(struct l3_process *pc, struct sk_buff *skb) {
828 l3_debug(pc->st, "wrong chid %x", *p); 828 l3_debug(pc->st, "wrong chid %x", *p);
829 return (-3); 829 return (-3);
830 } 830 }
831 return(*p & 0x3); 831 return (*p & 0x3);
832 } else 832 } else
833 return(-1); 833 return (-1);
834} 834}
835 835
836static int 836static int
837l3ni1_get_cause(struct l3_process *pc, struct sk_buff *skb) { 837l3ni1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
838 u_char l, i=0; 838 u_char l, i = 0;
839 u_char *p; 839 u_char *p;
840 840
841 p = skb->data; 841 p = skb->data;
@@ -844,13 +844,13 @@ l3ni1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
844 if ((p = findie(p, skb->len, IE_CAUSE, 0))) { 844 if ((p = findie(p, skb->len, IE_CAUSE, 0))) {
845 p++; 845 p++;
846 l = *p++; 846 l = *p++;
847 if (l>30) 847 if (l > 30)
848 return(1); 848 return (1);
849 if (l) { 849 if (l) {
850 pc->para.loc = *p++; 850 pc->para.loc = *p++;
851 l--; 851 l--;
852 } else { 852 } else {
853 return(2); 853 return (2);
854 } 854 }
855 if (l && !(pc->para.loc & 0x80)) { 855 if (l && !(pc->para.loc & 0x80)) {
856 l--; 856 l--;
@@ -860,36 +860,36 @@ l3ni1_get_cause(struct l3_process *pc, struct sk_buff *skb) {
860 pc->para.cause = *p++; 860 pc->para.cause = *p++;
861 l--; 861 l--;
862 if (!(pc->para.cause & 0x80)) 862 if (!(pc->para.cause & 0x80))
863 return(3); 863 return (3);
864 } else 864 } else
865 return(4); 865 return (4);
866 while (l && (i<6)) { 866 while (l && (i < 6)) {
867 pc->para.diag[i++] = *p++; 867 pc->para.diag[i++] = *p++;
868 l--; 868 l--;
869 } 869 }
870 } else 870 } else
871 return(-1); 871 return (-1);
872 return(0); 872 return (0);
873} 873}
874 874
875static void 875static void
876l3ni1_msg_with_uus(struct l3_process *pc, u_char cmd) 876l3ni1_msg_with_uus(struct l3_process *pc, u_char cmd)
877{ 877{
878 struct sk_buff *skb; 878 struct sk_buff *skb;
879 u_char tmp[16+40]; 879 u_char tmp[16 + 40];
880 u_char *p = tmp; 880 u_char *p = tmp;
881 int l; 881 int l;
882 882
883 MsgHead(p, pc->callref, cmd); 883 MsgHead(p, pc->callref, cmd);
884 884
885 if (pc->prot.ni1.uus1_data[0]) 885 if (pc->prot.ni1.uus1_data[0])
886 { *p++ = IE_USER_USER; /* UUS info element */ 886 { *p++ = IE_USER_USER; /* UUS info element */
887 *p++ = strlen(pc->prot.ni1.uus1_data) + 1; 887 *p++ = strlen(pc->prot.ni1.uus1_data) + 1;
888 *p++ = 0x04; /* IA5 chars */ 888 *p++ = 0x04; /* IA5 chars */
889 strcpy(p,pc->prot.ni1.uus1_data); 889 strcpy(p, pc->prot.ni1.uus1_data);
890 p += strlen(pc->prot.ni1.uus1_data); 890 p += strlen(pc->prot.ni1.uus1_data);
891 pc->prot.ni1.uus1_data[0] = '\0'; 891 pc->prot.ni1.uus1_data[0] = '\0';
892 } 892 }
893 893
894 l = p - tmp; 894 l = p - tmp;
895 if (!(skb = l3_alloc_skb(l))) 895 if (!(skb = l3_alloc_skb(l)))
@@ -903,7 +903,7 @@ l3ni1_release_req(struct l3_process *pc, u_char pr, void *arg)
903{ 903{
904 StopAllL3Timer(pc); 904 StopAllL3Timer(pc);
905 newl3state(pc, 19); 905 newl3state(pc, 19);
906 if (!pc->prot.ni1.uus1_data[0]) 906 if (!pc->prot.ni1.uus1_data[0])
907 l3ni1_message(pc, MT_RELEASE); 907 l3ni1_message(pc, MT_RELEASE);
908 else 908 else
909 l3ni1_msg_with_uus(pc, MT_RELEASE); 909 l3ni1_msg_with_uus(pc, MT_RELEASE);
@@ -916,9 +916,9 @@ l3ni1_release_cmpl(struct l3_process *pc, u_char pr, void *arg)
916 struct sk_buff *skb = arg; 916 struct sk_buff *skb = arg;
917 int ret; 917 int ret;
918 918
919 if ((ret = l3ni1_get_cause(pc, skb))>0) { 919 if ((ret = l3ni1_get_cause(pc, skb)) > 0) {
920 if (pc->debug & L3_DEB_WARN) 920 if (pc->debug & L3_DEB_WARN)
921 l3_debug(pc->st, "RELCMPL get_cause ret(%d)",ret); 921 l3_debug(pc->st, "RELCMPL get_cause ret(%d)", ret);
922 } else if (ret < 0) 922 } else if (ret < 0)
923 pc->para.cause = NO_CAUSE; 923 pc->para.cause = NO_CAUSE;
924 StopAllL3Timer(pc); 924 StopAllL3Timer(pc);
@@ -930,7 +930,7 @@ l3ni1_release_cmpl(struct l3_process *pc, u_char pr, void *arg)
930#if EXT_BEARER_CAPS 930#if EXT_BEARER_CAPS
931 931
932static u_char * 932static u_char *
933EncodeASyncParams(u_char * p, u_char si2) 933EncodeASyncParams(u_char *p, u_char si2)
934{ // 7c 06 88 90 21 42 00 bb 934{ // 7c 06 88 90 21 42 00 bb
935 935
936 p[0] = 0; 936 p[0] = 0;
@@ -958,38 +958,38 @@ EncodeASyncParams(u_char * p, u_char si2)
958 p[2] += 3; 958 p[2] += 3;
959 959
960 switch (si2 & 0x07) { 960 switch (si2 & 0x07) {
961 case 0: 961 case 0:
962 p[0] = 66; // 1200 bit/s 962 p[0] = 66; // 1200 bit/s
963 963
964 break; 964 break;
965 case 1: 965 case 1:
966 p[0] = 88; // 1200/75 bit/s 966 p[0] = 88; // 1200/75 bit/s
967 967
968 break; 968 break;
969 case 2: 969 case 2:
970 p[0] = 87; // 75/1200 bit/s 970 p[0] = 87; // 75/1200 bit/s
971 971
972 break; 972 break;
973 case 3: 973 case 3:
974 p[0] = 67; // 2400 bit/s 974 p[0] = 67; // 2400 bit/s
975 975
976 break; 976 break;
977 case 4: 977 case 4:
978 p[0] = 69; // 4800 bit/s 978 p[0] = 69; // 4800 bit/s
979 979
980 break; 980 break;
981 case 5: 981 case 5:
982 p[0] = 72; // 9600 bit/s 982 p[0] = 72; // 9600 bit/s
983 983
984 break; 984 break;
985 case 6: 985 case 6:
986 p[0] = 73; // 14400 bit/s 986 p[0] = 73; // 14400 bit/s
987 987
988 break; 988 break;
989 case 7: 989 case 7:
990 p[0] = 75; // 19200 bit/s 990 p[0] = 75; // 19200 bit/s
991 991
992 break; 992 break;
993 } 993 }
994 return p + 3; 994 return p + 3;
995} 995}
@@ -999,84 +999,84 @@ EncodeSyncParams(u_char si2, u_char ai)
999{ 999{
1000 1000
1001 switch (si2) { 1001 switch (si2) {
1002 case 0: 1002 case 0:
1003 return ai + 2; // 1200 bit/s 1003 return ai + 2; // 1200 bit/s
1004 1004
1005 case 1: 1005 case 1:
1006 return ai + 24; // 1200/75 bit/s 1006 return ai + 24; // 1200/75 bit/s
1007 1007
1008 case 2: 1008 case 2:
1009 return ai + 23; // 75/1200 bit/s 1009 return ai + 23; // 75/1200 bit/s
1010 1010
1011 case 3: 1011 case 3:
1012 return ai + 3; // 2400 bit/s 1012 return ai + 3; // 2400 bit/s
1013 1013
1014 case 4: 1014 case 4:
1015 return ai + 5; // 4800 bit/s 1015 return ai + 5; // 4800 bit/s
1016 1016
1017 case 5: 1017 case 5:
1018 return ai + 8; // 9600 bit/s 1018 return ai + 8; // 9600 bit/s
1019 1019
1020 case 6: 1020 case 6:
1021 return ai + 9; // 14400 bit/s 1021 return ai + 9; // 14400 bit/s
1022 1022
1023 case 7: 1023 case 7:
1024 return ai + 11; // 19200 bit/s 1024 return ai + 11; // 19200 bit/s
1025 1025
1026 case 8: 1026 case 8:
1027 return ai + 14; // 48000 bit/s 1027 return ai + 14; // 48000 bit/s
1028 1028
1029 case 9: 1029 case 9:
1030 return ai + 15; // 56000 bit/s 1030 return ai + 15; // 56000 bit/s
1031 1031
1032 case 15: 1032 case 15:
1033 return ai + 40; // negotiate bit/s 1033 return ai + 40; // negotiate bit/s
1034 1034
1035 default: 1035 default:
1036 break; 1036 break;
1037 } 1037 }
1038 return ai; 1038 return ai;
1039} 1039}
1040 1040
1041 1041
1042static u_char 1042static u_char
1043DecodeASyncParams(u_char si2, u_char * p) 1043DecodeASyncParams(u_char si2, u_char *p)
1044{ 1044{
1045 u_char info; 1045 u_char info;
1046 1046
1047 switch (p[5]) { 1047 switch (p[5]) {
1048 case 66: // 1200 bit/s 1048 case 66: // 1200 bit/s
1049 1049
1050 break; // si2 don't change 1050 break; // si2 don't change
1051 1051
1052 case 88: // 1200/75 bit/s 1052 case 88: // 1200/75 bit/s
1053 1053
1054 si2 += 1; 1054 si2 += 1;
1055 break; 1055 break;
1056 case 87: // 75/1200 bit/s 1056 case 87: // 75/1200 bit/s
1057 1057
1058 si2 += 2; 1058 si2 += 2;
1059 break; 1059 break;
1060 case 67: // 2400 bit/s 1060 case 67: // 2400 bit/s
1061 1061
1062 si2 += 3; 1062 si2 += 3;
1063 break; 1063 break;
1064 case 69: // 4800 bit/s 1064 case 69: // 4800 bit/s
1065 1065
1066 si2 += 4; 1066 si2 += 4;
1067 break; 1067 break;
1068 case 72: // 9600 bit/s 1068 case 72: // 9600 bit/s
1069 1069
1070 si2 += 5; 1070 si2 += 5;
1071 break; 1071 break;
1072 case 73: // 14400 bit/s 1072 case 73: // 14400 bit/s
1073 1073
1074 si2 += 6; 1074 si2 += 6;
1075 break; 1075 break;
1076 case 75: // 19200 bit/s 1076 case 75: // 19200 bit/s
1077 1077
1078 si2 += 7; 1078 si2 += 7;
1079 break; 1079 break;
1080 } 1080 }
1081 1081
1082 info = p[7] & 0x7f; 1082 info = p[7] & 0x7f;
@@ -1101,39 +1101,39 @@ DecodeSyncParams(u_char si2, u_char info)
1101{ 1101{
1102 info &= 0x7f; 1102 info &= 0x7f;
1103 switch (info) { 1103 switch (info) {
1104 case 40: // bit/s negotiation failed ai := 165 not 175! 1104 case 40: // bit/s negotiation failed ai := 165 not 175!
1105 1105
1106 return si2 + 15; 1106 return si2 + 15;
1107 case 15: // 56000 bit/s failed, ai := 0 not 169 ! 1107 case 15: // 56000 bit/s failed, ai := 0 not 169 !
1108 1108
1109 return si2 + 9; 1109 return si2 + 9;
1110 case 14: // 48000 bit/s 1110 case 14: // 48000 bit/s
1111 1111
1112 return si2 + 8; 1112 return si2 + 8;
1113 case 11: // 19200 bit/s 1113 case 11: // 19200 bit/s
1114 1114
1115 return si2 + 7; 1115 return si2 + 7;
1116 case 9: // 14400 bit/s 1116 case 9: // 14400 bit/s
1117 1117
1118 return si2 + 6; 1118 return si2 + 6;
1119 case 8: // 9600 bit/s 1119 case 8: // 9600 bit/s
1120 1120
1121 return si2 + 5; 1121 return si2 + 5;
1122 case 5: // 4800 bit/s 1122 case 5: // 4800 bit/s
1123 1123
1124 return si2 + 4; 1124 return si2 + 4;
1125 case 3: // 2400 bit/s 1125 case 3: // 2400 bit/s
1126 1126
1127 return si2 + 3; 1127 return si2 + 3;
1128 case 23: // 75/1200 bit/s 1128 case 23: // 75/1200 bit/s
1129 1129
1130 return si2 + 2; 1130 return si2 + 2;
1131 case 24: // 1200/75 bit/s 1131 case 24: // 1200/75 bit/s
1132 1132
1133 return si2 + 1; 1133 return si2 + 1;
1134 default: // 1200 bit/s 1134 default: // 1200 bit/s
1135 1135
1136 return si2; 1136 return si2;
1137 } 1137 }
1138} 1138}
1139 1139
@@ -1144,20 +1144,20 @@ DecodeSI2(struct sk_buff *skb)
1144 1144
1145 if ((p = findie(skb->data, skb->len, 0x7c, 0))) { 1145 if ((p = findie(skb->data, skb->len, 0x7c, 0))) {
1146 switch (p[4] & 0x0f) { 1146 switch (p[4] & 0x0f) {
1147 case 0x01: 1147 case 0x01:
1148 if (p[1] == 0x04) // sync. Bitratenadaption 1148 if (p[1] == 0x04) // sync. Bitratenadaption
1149 1149
1150 return DecodeSyncParams(160, p[5]); // V.110/X.30 1150 return DecodeSyncParams(160, p[5]); // V.110/X.30
1151 1151
1152 else if (p[1] == 0x06) // async. Bitratenadaption 1152 else if (p[1] == 0x06) // async. Bitratenadaption
1153 1153
1154 return DecodeASyncParams(192, p); // V.110/X.30 1154 return DecodeASyncParams(192, p); // V.110/X.30
1155 1155
1156 break; 1156 break;
1157 case 0x08: // if (p[5] == 0x02) // sync. Bitratenadaption 1157 case 0x08: // if (p[5] == 0x02) // sync. Bitratenadaption
1158 if (p[1] > 3) 1158 if (p[1] > 3)
1159 return DecodeSyncParams(176, p[5]); // V.120 1159 return DecodeSyncParams(176, p[5]); // V.120
1160 break; 1160 break;
1161 } 1161 }
1162 } 1162 }
1163 return 0; 1163 return 0;
@@ -1168,7 +1168,7 @@ DecodeSI2(struct sk_buff *skb)
1168 1168
1169static void 1169static void
1170l3ni1_setup_req(struct l3_process *pc, u_char pr, 1170l3ni1_setup_req(struct l3_process *pc, u_char pr,
1171 void *arg) 1171 void *arg)
1172{ 1172{
1173 struct sk_buff *skb; 1173 struct sk_buff *skb;
1174 u_char tmp[128]; 1174 u_char tmp[128];
@@ -1191,7 +1191,7 @@ l3ni1_setup_req(struct l3_process *pc, u_char pr,
1191 case 1: /* Telephony */ 1191 case 1: /* Telephony */
1192 *p++ = IE_BEARER; 1192 *p++ = IE_BEARER;
1193 *p++ = 0x3; /* Length */ 1193 *p++ = 0x3; /* Length */
1194 *p++ = 0x90; /* 3.1khz Audio */ 1194 *p++ = 0x90; /* 3.1khz Audio */
1195 *p++ = 0x90; /* Circuit-Mode 64kbps */ 1195 *p++ = 0x90; /* Circuit-Mode 64kbps */
1196 *p++ = 0xa2; /* u-Law Audio */ 1196 *p++ = 0xa2; /* u-Law Audio */
1197 break; 1197 break;
@@ -1214,7 +1214,7 @@ l3ni1_setup_req(struct l3_process *pc, u_char pr,
1214 } else 1214 } else
1215 sp++; 1215 sp++;
1216 } 1216 }
1217 1217
1218 *p++ = IE_KEYPAD; 1218 *p++ = IE_KEYPAD;
1219 *p++ = strlen(teln); 1219 *p++ = strlen(teln);
1220 while (*teln) 1220 while (*teln)
@@ -1222,7 +1222,7 @@ l3ni1_setup_req(struct l3_process *pc, u_char pr,
1222 1222
1223 if (sub) 1223 if (sub)
1224 *sub++ = '.'; 1224 *sub++ = '.';
1225 1225
1226#if EXT_BEARER_CAPS 1226#if EXT_BEARER_CAPS
1227 if ((pc->para.setup.si2 >= 160) && (pc->para.setup.si2 <= 175)) { // sync. Bitratenadaption, V.110/X.30 1227 if ((pc->para.setup.si2 >= 160) && (pc->para.setup.si2 <= 175)) { // sync. Bitratenadaption, V.110/X.30
1228 1228
@@ -1250,7 +1250,7 @@ l3ni1_setup_req(struct l3_process *pc, u_char pr,
1250 *p++ = 0x21; 1250 *p++ = 0x21;
1251 p = EncodeASyncParams(p, pc->para.setup.si2 - 192); 1251 p = EncodeASyncParams(p, pc->para.setup.si2 - 192);
1252 } else { 1252 } else {
1253 switch (pc->para.setup.si1) { 1253 switch (pc->para.setup.si1) {
1254 case 1: /* Telephony */ 1254 case 1: /* Telephony */
1255 *p++ = IE_LLC; 1255 *p++ = IE_LLC;
1256 *p++ = 0x3; /* Length */ 1256 *p++ = 0x3; /* Length */
@@ -1266,14 +1266,14 @@ l3ni1_setup_req(struct l3_process *pc, u_char pr,
1266 *p++ = 0x88; /* Coding Std. CCITT, unrestr. dig. Inform. */ 1266 *p++ = 0x88; /* Coding Std. CCITT, unrestr. dig. Inform. */
1267 *p++ = 0x90; /* Circuit-Mode 64kbps */ 1267 *p++ = 0x90; /* Circuit-Mode 64kbps */
1268 break; 1268 break;
1269 } 1269 }
1270 } 1270 }
1271#endif 1271#endif
1272 l = p - tmp; 1272 l = p - tmp;
1273 if (!(skb = l3_alloc_skb(l))) 1273 if (!(skb = l3_alloc_skb(l)))
1274{ 1274 {
1275 return; 1275 return;
1276} 1276 }
1277 memcpy(skb_put(skb, l), tmp, l); 1277 memcpy(skb_put(skb, l), tmp, l);
1278 L3DelTimer(&pc->timer); 1278 L3DelTimer(&pc->timer);
1279 L3AddTimer(&pc->timer, T303, CC_T303); 1279 L3AddTimer(&pc->timer, T303, CC_T303);
@@ -1375,7 +1375,7 @@ l3ni1_disconnect(struct l3_process *pc, u_char pr, void *arg)
1375 cause = 96; 1375 cause = 96;
1376 else if (ret > 0) 1376 else if (ret > 0)
1377 cause = 100; 1377 cause = 100;
1378 } 1378 }
1379 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) 1379 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0)))
1380 l3ni1_parse_facility(pc->st, pc, pc->callref, p); 1380 l3ni1_parse_facility(pc->st, pc, pc->callref, p);
1381 ret = check_infoelements(pc, skb, ie_DISCONNECT); 1381 ret = check_infoelements(pc, skb, ie_DISCONNECT);
@@ -1387,10 +1387,10 @@ l3ni1_disconnect(struct l3_process *pc, u_char pr, void *arg)
1387 newl3state(pc, 12); 1387 newl3state(pc, 12);
1388 if (cause) 1388 if (cause)
1389 newl3state(pc, 19); 1389 newl3state(pc, 19);
1390 if (11 != ret) 1390 if (11 != ret)
1391 pc->st->l3.l3l4(pc->st, CC_DISCONNECT | INDICATION, pc); 1391 pc->st->l3.l3l4(pc->st, CC_DISCONNECT | INDICATION, pc);
1392 else if (!cause) 1392 else if (!cause)
1393 l3ni1_release_req(pc, pr, NULL); 1393 l3ni1_release_req(pc, pr, NULL);
1394 if (cause) { 1394 if (cause) {
1395 l3ni1_message_cause(pc, MT_RELEASE, cause); 1395 l3ni1_message_cause(pc, MT_RELEASE, cause);
1396 L3AddTimer(&pc->timer, T308, CC_T308_1); 1396 L3AddTimer(&pc->timer, T308, CC_T308_1);
@@ -1456,56 +1456,56 @@ l3ni1_setup(struct l3_process *pc, u_char pr, void *arg)
1456 else { 1456 else {
1457 pc->para.setup.si2 = 0; 1457 pc->para.setup.si2 = 0;
1458 switch (p[2] & 0x7f) { 1458 switch (p[2] & 0x7f) {
1459 case 0x00: /* Speech */ 1459 case 0x00: /* Speech */
1460 case 0x10: /* 3.1 Khz audio */ 1460 case 0x10: /* 3.1 Khz audio */
1461 pc->para.setup.si1 = 1; 1461 pc->para.setup.si1 = 1;
1462 break; 1462 break;
1463 case 0x08: /* Unrestricted digital information */ 1463 case 0x08: /* Unrestricted digital information */
1464 pc->para.setup.si1 = 7; 1464 pc->para.setup.si1 = 7;
1465/* JIM, 05.11.97 I wanna set service indicator 2 */ 1465/* JIM, 05.11.97 I wanna set service indicator 2 */
1466#if EXT_BEARER_CAPS 1466#if EXT_BEARER_CAPS
1467 pc->para.setup.si2 = DecodeSI2(skb); 1467 pc->para.setup.si2 = DecodeSI2(skb);
1468#endif 1468#endif
1469 break; 1469 break;
1470 case 0x09: /* Restricted digital information */ 1470 case 0x09: /* Restricted digital information */
1471 pc->para.setup.si1 = 2; 1471 pc->para.setup.si1 = 2;
1472 break; 1472 break;
1473 case 0x11: 1473 case 0x11:
1474 /* Unrestr. digital information with 1474 /* Unrestr. digital information with
1475 * tones/announcements ( or 7 kHz audio 1475 * tones/announcements ( or 7 kHz audio
1476 */ 1476 */
1477 pc->para.setup.si1 = 3; 1477 pc->para.setup.si1 = 3;
1478 break; 1478 break;
1479 case 0x18: /* Video */ 1479 case 0x18: /* Video */
1480 pc->para.setup.si1 = 4; 1480 pc->para.setup.si1 = 4;
1481 break; 1481 break;
1482 default: 1482 default:
1483 err = 2; 1483 err = 2;
1484 break; 1484 break;
1485 } 1485 }
1486 switch (p[3] & 0x7f) { 1486 switch (p[3] & 0x7f) {
1487 case 0x40: /* packed mode */ 1487 case 0x40: /* packed mode */
1488 pc->para.setup.si1 = 8; 1488 pc->para.setup.si1 = 8;
1489 break; 1489 break;
1490 case 0x10: /* 64 kbit */ 1490 case 0x10: /* 64 kbit */
1491 case 0x11: /* 2*64 kbit */ 1491 case 0x11: /* 2*64 kbit */
1492 case 0x13: /* 384 kbit */ 1492 case 0x13: /* 384 kbit */
1493 case 0x15: /* 1536 kbit */ 1493 case 0x15: /* 1536 kbit */
1494 case 0x17: /* 1920 kbit */ 1494 case 0x17: /* 1920 kbit */
1495 pc->para.moderate = p[3] & 0x7f; 1495 pc->para.moderate = p[3] & 0x7f;
1496 break; 1496 break;
1497 default: 1497 default:
1498 err = 3; 1498 err = 3;
1499 break; 1499 break;
1500 } 1500 }
1501 } 1501 }
1502 if (pc->debug & L3_DEB_SI) 1502 if (pc->debug & L3_DEB_SI)
1503 l3_debug(pc->st, "SI=%d, AI=%d", 1503 l3_debug(pc->st, "SI=%d, AI=%d",
1504 pc->para.setup.si1, pc->para.setup.si2); 1504 pc->para.setup.si1, pc->para.setup.si2);
1505 if (err) { 1505 if (err) {
1506 if (pc->debug & L3_DEB_WARN) 1506 if (pc->debug & L3_DEB_WARN)
1507 l3_debug(pc->st, "setup with wrong bearer(l=%d:%x,%x)", 1507 l3_debug(pc->st, "setup with wrong bearer(l=%d:%x,%x)",
1508 p[1], p[2], p[3]); 1508 p[1], p[2], p[3]);
1509 pc->para.cause = 100; 1509 pc->para.cause = 100;
1510 l3ni1_msg_without_setup(pc, pr, NULL); 1510 l3ni1_msg_without_setup(pc, pr, NULL);
1511 return; 1511 return;
@@ -1526,17 +1526,17 @@ l3ni1_setup(struct l3_process *pc, u_char pr, void *arg)
1526 if ((3 == id) && (0x10 == pc->para.moderate)) { 1526 if ((3 == id) && (0x10 == pc->para.moderate)) {
1527 if (pc->debug & L3_DEB_WARN) 1527 if (pc->debug & L3_DEB_WARN)
1528 l3_debug(pc->st, "setup with wrong chid %x", 1528 l3_debug(pc->st, "setup with wrong chid %x",
1529 id); 1529 id);
1530 pc->para.cause = 100; 1530 pc->para.cause = 100;
1531 l3ni1_msg_without_setup(pc, pr, NULL); 1531 l3ni1_msg_without_setup(pc, pr, NULL);
1532 return; 1532 return;
1533 } 1533 }
1534 bcfound++; 1534 bcfound++;
1535 } else 1535 } else
1536 { if (pc->debug & L3_DEB_WARN) 1536 { if (pc->debug & L3_DEB_WARN)
1537 l3_debug(pc->st, "setup without bchannel, call waiting"); 1537 l3_debug(pc->st, "setup without bchannel, call waiting");
1538 bcfound++; 1538 bcfound++;
1539 } 1539 }
1540 } else { 1540 } else {
1541 if (pc->debug & L3_DEB_WARN) 1541 if (pc->debug & L3_DEB_WARN)
1542 l3_debug(pc->st, "setup with wrong chid ret %d", id); 1542 l3_debug(pc->st, "setup with wrong chid ret %d", id);
@@ -1611,7 +1611,7 @@ static void
1611l3ni1_disconnect_req(struct l3_process *pc, u_char pr, void *arg) 1611l3ni1_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
1612{ 1612{
1613 struct sk_buff *skb; 1613 struct sk_buff *skb;
1614 u_char tmp[16+40]; 1614 u_char tmp[16 + 40];
1615 u_char *p = tmp; 1615 u_char *p = tmp;
1616 int l; 1616 int l;
1617 u_char cause = 16; 1617 u_char cause = 16;
@@ -1628,14 +1628,14 @@ l3ni1_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
1628 *p++ = 0x80; 1628 *p++ = 0x80;
1629 *p++ = cause | 0x80; 1629 *p++ = cause | 0x80;
1630 1630
1631 if (pc->prot.ni1.uus1_data[0]) 1631 if (pc->prot.ni1.uus1_data[0])
1632 { *p++ = IE_USER_USER; /* UUS info element */ 1632 { *p++ = IE_USER_USER; /* UUS info element */
1633 *p++ = strlen(pc->prot.ni1.uus1_data) + 1; 1633 *p++ = strlen(pc->prot.ni1.uus1_data) + 1;
1634 *p++ = 0x04; /* IA5 chars */ 1634 *p++ = 0x04; /* IA5 chars */
1635 strcpy(p,pc->prot.ni1.uus1_data); 1635 strcpy(p, pc->prot.ni1.uus1_data);
1636 p += strlen(pc->prot.ni1.uus1_data); 1636 p += strlen(pc->prot.ni1.uus1_data);
1637 pc->prot.ni1.uus1_data[0] = '\0'; 1637 pc->prot.ni1.uus1_data[0] = '\0';
1638 } 1638 }
1639 1639
1640 l = p - tmp; 1640 l = p - tmp;
1641 if (!(skb = l3_alloc_skb(l))) 1641 if (!(skb = l3_alloc_skb(l)))
@@ -1648,18 +1648,18 @@ l3ni1_disconnect_req(struct l3_process *pc, u_char pr, void *arg)
1648 1648
1649static void 1649static void
1650l3ni1_setup_rsp(struct l3_process *pc, u_char pr, 1650l3ni1_setup_rsp(struct l3_process *pc, u_char pr,
1651 void *arg) 1651 void *arg)
1652{ 1652{
1653 if (!pc->para.bchannel) 1653 if (!pc->para.bchannel)
1654 { if (pc->debug & L3_DEB_WARN) 1654 { if (pc->debug & L3_DEB_WARN)
1655 l3_debug(pc->st, "D-chan connect for waiting call"); 1655 l3_debug(pc->st, "D-chan connect for waiting call");
1656 l3ni1_disconnect_req(pc, pr, arg); 1656 l3ni1_disconnect_req(pc, pr, arg);
1657 return; 1657 return;
1658 } 1658 }
1659 newl3state(pc, 8); 1659 newl3state(pc, 8);
1660 if (pc->debug & L3_DEB_WARN) 1660 if (pc->debug & L3_DEB_WARN)
1661 l3_debug(pc->st, "D-chan connect for waiting call"); 1661 l3_debug(pc->st, "D-chan connect for waiting call");
1662 l3ni1_message_plus_chid(pc, MT_CONNECT); /* GE 05/09/00 */ 1662 l3ni1_message_plus_chid(pc, MT_CONNECT); /* GE 05/09/00 */
1663 L3DelTimer(&pc->timer); 1663 L3DelTimer(&pc->timer);
1664 L3AddTimer(&pc->timer, T313, CC_T313); 1664 L3AddTimer(&pc->timer, T313, CC_T313);
1665} 1665}
@@ -1716,26 +1716,26 @@ l3ni1_release(struct l3_process *pc, u_char pr, void *arg)
1716{ 1716{
1717 struct sk_buff *skb = arg; 1717 struct sk_buff *skb = arg;
1718 u_char *p; 1718 u_char *p;
1719 int ret, cause=0; 1719 int ret, cause = 0;
1720 1720
1721 StopAllL3Timer(pc); 1721 StopAllL3Timer(pc);
1722 if ((ret = l3ni1_get_cause(pc, skb))>0) { 1722 if ((ret = l3ni1_get_cause(pc, skb)) > 0) {
1723 if (pc->debug & L3_DEB_WARN) 1723 if (pc->debug & L3_DEB_WARN)
1724 l3_debug(pc->st, "REL get_cause ret(%d)", ret); 1724 l3_debug(pc->st, "REL get_cause ret(%d)", ret);
1725 } else if (ret<0) 1725 } else if (ret < 0)
1726 pc->para.cause = NO_CAUSE; 1726 pc->para.cause = NO_CAUSE;
1727 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) { 1727 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) {
1728 l3ni1_parse_facility(pc->st, pc, pc->callref, p); 1728 l3ni1_parse_facility(pc->st, pc, pc->callref, p);
1729 } 1729 }
1730 if ((ret<0) && (pc->state != 11)) 1730 if ((ret < 0) && (pc->state != 11))
1731 cause = 96; 1731 cause = 96;
1732 else if (ret>0) 1732 else if (ret > 0)
1733 cause = 100; 1733 cause = 100;
1734 ret = check_infoelements(pc, skb, ie_RELEASE); 1734 ret = check_infoelements(pc, skb, ie_RELEASE);
1735 if (ERR_IE_COMPREHENSION == ret) 1735 if (ERR_IE_COMPREHENSION == ret)
1736 cause = 96; 1736 cause = 96;
1737 else if ((ERR_IE_UNRECOGNIZED == ret) && (!cause)) 1737 else if ((ERR_IE_UNRECOGNIZED == ret) && (!cause))
1738 cause = 99; 1738 cause = 99;
1739 if (cause) 1739 if (cause)
1740 l3ni1_message_cause(pc, MT_RELEASE_COMPLETE, cause); 1740 l3ni1_message_cause(pc, MT_RELEASE_COMPLETE, cause);
1741 else 1741 else
@@ -1747,27 +1747,27 @@ l3ni1_release(struct l3_process *pc, u_char pr, void *arg)
1747 1747
1748static void 1748static void
1749l3ni1_alert_req(struct l3_process *pc, u_char pr, 1749l3ni1_alert_req(struct l3_process *pc, u_char pr,
1750 void *arg) 1750 void *arg)
1751{ 1751{
1752 newl3state(pc, 7); 1752 newl3state(pc, 7);
1753 if (!pc->prot.ni1.uus1_data[0]) 1753 if (!pc->prot.ni1.uus1_data[0])
1754 l3ni1_message(pc, MT_ALERTING); 1754 l3ni1_message(pc, MT_ALERTING);
1755 else 1755 else
1756 l3ni1_msg_with_uus(pc, MT_ALERTING); 1756 l3ni1_msg_with_uus(pc, MT_ALERTING);
1757} 1757}
1758 1758
1759static void 1759static void
1760l3ni1_proceed_req(struct l3_process *pc, u_char pr, 1760l3ni1_proceed_req(struct l3_process *pc, u_char pr,
1761 void *arg) 1761 void *arg)
1762{ 1762{
1763 newl3state(pc, 9); 1763 newl3state(pc, 9);
1764 l3ni1_message(pc, MT_CALL_PROCEEDING); 1764 l3ni1_message(pc, MT_CALL_PROCEEDING);
1765 pc->st->l3.l3l4(pc->st, CC_PROCEED_SEND | INDICATION, pc); 1765 pc->st->l3.l3l4(pc->st, CC_PROCEED_SEND | INDICATION, pc);
1766} 1766}
1767 1767
1768static void 1768static void
1769l3ni1_setup_ack_req(struct l3_process *pc, u_char pr, 1769l3ni1_setup_ack_req(struct l3_process *pc, u_char pr,
1770 void *arg) 1770 void *arg)
1771{ 1771{
1772 newl3state(pc, 25); 1772 newl3state(pc, 25);
1773 L3DelTimer(&pc->timer); 1773 L3DelTimer(&pc->timer);
@@ -1781,22 +1781,22 @@ l3ni1_setup_ack_req(struct l3_process *pc, u_char pr,
1781static void 1781static void
1782l3ni1_deliver_display(struct l3_process *pc, int pr, u_char *infp) 1782l3ni1_deliver_display(struct l3_process *pc, int pr, u_char *infp)
1783{ u_char len; 1783{ u_char len;
1784 isdn_ctrl ic; 1784 isdn_ctrl ic;
1785 struct IsdnCardState *cs; 1785 struct IsdnCardState *cs;
1786 char *p; 1786 char *p;
1787 1787
1788 if (*infp++ != IE_DISPLAY) return; 1788 if (*infp++ != IE_DISPLAY) return;
1789 if ((len = *infp++) > 80) return; /* total length <= 82 */ 1789 if ((len = *infp++) > 80) return; /* total length <= 82 */
1790 if (!pc->chan) return; 1790 if (!pc->chan) return;
1791 1791
1792 p = ic.parm.display; 1792 p = ic.parm.display;
1793 while (len--) 1793 while (len--)
1794 *p++ = *infp++; 1794 *p++ = *infp++;
1795 *p = '\0'; 1795 *p = '\0';
1796 ic.command = ISDN_STAT_DISPLAY; 1796 ic.command = ISDN_STAT_DISPLAY;
1797 cs = pc->st->l1.hardware; 1797 cs = pc->st->l1.hardware;
1798 ic.driver = cs->myid; 1798 ic.driver = cs->myid;
1799 ic.arg = pc->chan->chan; 1799 ic.arg = pc->chan->chan;
1800 cs->iif.statcallb(&ic); 1800 cs->iif.statcallb(&ic);
1801} /* l3ni1_deliver_display */ 1801} /* l3ni1_deliver_display */
1802 1802
@@ -1814,37 +1814,37 @@ l3ni1_progress(struct l3_process *pc, u_char pr, void *arg)
1814 pc->para.cause = 100; 1814 pc->para.cause = 100;
1815 } else if (!(p[2] & 0x70)) { 1815 } else if (!(p[2] & 0x70)) {
1816 switch (p[2]) { 1816 switch (p[2]) {
1817 case 0x80: 1817 case 0x80:
1818 case 0x81:
1819 case 0x82:
1820 case 0x84:
1821 case 0x85:
1822 case 0x87:
1823 case 0x8a:
1824 switch (p[3]) {
1818 case 0x81: 1825 case 0x81:
1819 case 0x82: 1826 case 0x82:
1827 case 0x83:
1820 case 0x84: 1828 case 0x84:
1821 case 0x85: 1829 case 0x88:
1822 case 0x87:
1823 case 0x8a:
1824 switch (p[3]) {
1825 case 0x81:
1826 case 0x82:
1827 case 0x83:
1828 case 0x84:
1829 case 0x88:
1830 break;
1831 default:
1832 err = 2;
1833 pc->para.cause = 100;
1834 break;
1835 }
1836 break; 1830 break;
1837 default: 1831 default:
1838 err = 3; 1832 err = 2;
1839 pc->para.cause = 100; 1833 pc->para.cause = 100;
1840 break; 1834 break;
1835 }
1836 break;
1837 default:
1838 err = 3;
1839 pc->para.cause = 100;
1840 break;
1841 } 1841 }
1842 } 1842 }
1843 } else { 1843 } else {
1844 pc->para.cause = 96; 1844 pc->para.cause = 96;
1845 err = 4; 1845 err = 4;
1846 } 1846 }
1847 if (err) { 1847 if (err) {
1848 if (pc->debug & L3_DEB_WARN) 1848 if (pc->debug & L3_DEB_WARN)
1849 l3_debug(pc->st, "progress error %d", err); 1849 l3_debug(pc->st, "progress error %d", err);
1850 l3ni1_status_send(pc, pr, NULL); 1850 l3ni1_status_send(pc, pr, NULL);
@@ -1871,21 +1871,21 @@ l3ni1_notify(struct l3_process *pc, u_char pr, void *arg)
1871 pc->para.cause = 100; 1871 pc->para.cause = 100;
1872 } else { 1872 } else {
1873 switch (p[2]) { 1873 switch (p[2]) {
1874 case 0x80: 1874 case 0x80:
1875 case 0x81: 1875 case 0x81:
1876 case 0x82: 1876 case 0x82:
1877 break; 1877 break;
1878 default: 1878 default:
1879 pc->para.cause = 100; 1879 pc->para.cause = 100;
1880 err = 2; 1880 err = 2;
1881 break; 1881 break;
1882 } 1882 }
1883 } 1883 }
1884 } else { 1884 } else {
1885 pc->para.cause = 96; 1885 pc->para.cause = 96;
1886 err = 3; 1886 err = 3;
1887 } 1887 }
1888 if (err) { 1888 if (err) {
1889 if (pc->debug & L3_DEB_WARN) 1889 if (pc->debug & L3_DEB_WARN)
1890 l3_debug(pc->st, "notify error %d", err); 1890 l3_debug(pc->st, "notify error %d", err);
1891 l3ni1_status_send(pc, pr, NULL); 1891 l3ni1_status_send(pc, pr, NULL);
@@ -1908,7 +1908,7 @@ l3ni1_status_enq(struct l3_process *pc, u_char pr, void *arg)
1908 ret = check_infoelements(pc, skb, ie_STATUS_ENQUIRY); 1908 ret = check_infoelements(pc, skb, ie_STATUS_ENQUIRY);
1909 l3ni1_std_ie_err(pc, ret); 1909 l3ni1_std_ie_err(pc, ret);
1910 pc->para.cause = 30; /* response to STATUS_ENQUIRY */ 1910 pc->para.cause = 30; /* response to STATUS_ENQUIRY */
1911 l3ni1_status_send(pc, pr, NULL); 1911 l3ni1_status_send(pc, pr, NULL);
1912} 1912}
1913 1913
1914static void 1914static void
@@ -1942,68 +1942,68 @@ static void l3ni1_redir_req(struct l3_process *pc, u_char pr, void *arg)
1942 struct sk_buff *skb; 1942 struct sk_buff *skb;
1943 u_char tmp[128]; 1943 u_char tmp[128];
1944 u_char *p = tmp; 1944 u_char *p = tmp;
1945 u_char *subp; 1945 u_char *subp;
1946 u_char len_phone = 0; 1946 u_char len_phone = 0;
1947 u_char len_sub = 0; 1947 u_char len_sub = 0;
1948 int l; 1948 int l;
1949 1949
1950 1950
1951 strcpy(pc->prot.ni1.uus1_data,pc->chan->setup.eazmsn); /* copy uus element if available */ 1951 strcpy(pc->prot.ni1.uus1_data, pc->chan->setup.eazmsn); /* copy uus element if available */
1952 if (!pc->chan->setup.phone[0]) 1952 if (!pc->chan->setup.phone[0])
1953 { pc->para.cause = -1; 1953 { pc->para.cause = -1;
1954 l3ni1_disconnect_req(pc,pr,arg); /* disconnect immediately */ 1954 l3ni1_disconnect_req(pc, pr, arg); /* disconnect immediately */
1955 return; 1955 return;
1956 } /* only uus */ 1956 } /* only uus */
1957 1957
1958 if (pc->prot.ni1.invoke_id) 1958 if (pc->prot.ni1.invoke_id)
1959 free_invoke_id(pc->st,pc->prot.ni1.invoke_id); 1959 free_invoke_id(pc->st, pc->prot.ni1.invoke_id);
1960 1960
1961 if (!(pc->prot.ni1.invoke_id = new_invoke_id(pc->st))) 1961 if (!(pc->prot.ni1.invoke_id = new_invoke_id(pc->st)))
1962 return; 1962 return;
1963 1963
1964 MsgHead(p, pc->callref, MT_FACILITY); 1964 MsgHead(p, pc->callref, MT_FACILITY);
1965 1965
1966 for (subp = pc->chan->setup.phone; (*subp) && (*subp != '.'); subp++) len_phone++; /* len of phone number */ 1966 for (subp = pc->chan->setup.phone; (*subp) && (*subp != '.'); subp++) len_phone++; /* len of phone number */
1967 if (*subp++ == '.') len_sub = strlen(subp) + 2; /* length including info subaddress element */ 1967 if (*subp++ == '.') len_sub = strlen(subp) + 2; /* length including info subaddress element */
1968 1968
1969 *p++ = 0x1c; /* Facility info element */ 1969 *p++ = 0x1c; /* Facility info element */
1970 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3 + 3; /* length of element */ 1970 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3 + 3; /* length of element */
1971 *p++ = 0x91; /* remote operations protocol */ 1971 *p++ = 0x91; /* remote operations protocol */
1972 *p++ = 0xa1; /* invoke component */ 1972 *p++ = 0xa1; /* invoke component */
1973 1973
1974 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3; /* length of data */ 1974 *p++ = len_phone + len_sub + 2 + 2 + 8 + 3; /* length of data */
1975 *p++ = 0x02; /* invoke id tag, integer */ 1975 *p++ = 0x02; /* invoke id tag, integer */
1976 *p++ = 0x01; /* length */ 1976 *p++ = 0x01; /* length */
1977 *p++ = pc->prot.ni1.invoke_id; /* invoke id */ 1977 *p++ = pc->prot.ni1.invoke_id; /* invoke id */
1978 *p++ = 0x02; /* operation value tag, integer */ 1978 *p++ = 0x02; /* operation value tag, integer */
1979 *p++ = 0x01; /* length */ 1979 *p++ = 0x01; /* length */
1980 *p++ = 0x0D; /* Call Deflect */ 1980 *p++ = 0x0D; /* Call Deflect */
1981 1981
1982 *p++ = 0x30; /* sequence phone number */ 1982 *p++ = 0x30; /* sequence phone number */
1983 *p++ = len_phone + 2 + 2 + 3 + len_sub; /* length */ 1983 *p++ = len_phone + 2 + 2 + 3 + len_sub; /* length */
1984 1984
1985 *p++ = 0x30; /* Deflected to UserNumber */ 1985 *p++ = 0x30; /* Deflected to UserNumber */
1986 *p++ = len_phone+2+len_sub; /* length */ 1986 *p++ = len_phone + 2 + len_sub; /* length */
1987 *p++ = 0x80; /* NumberDigits */ 1987 *p++ = 0x80; /* NumberDigits */
1988 *p++ = len_phone; /* length */ 1988 *p++ = len_phone; /* length */
1989 for (l = 0; l < len_phone; l++) 1989 for (l = 0; l < len_phone; l++)
1990 *p++ = pc->chan->setup.phone[l]; 1990 *p++ = pc->chan->setup.phone[l];
1991 1991
1992 if (len_sub) 1992 if (len_sub)
1993 { *p++ = 0x04; /* called party subaddress */ 1993 { *p++ = 0x04; /* called party subaddress */
1994 *p++ = len_sub - 2; 1994 *p++ = len_sub - 2;
1995 while (*subp) *p++ = *subp++; 1995 while (*subp) *p++ = *subp++;
1996 } 1996 }
1997 1997
1998 *p++ = 0x01; /* screening identifier */ 1998 *p++ = 0x01; /* screening identifier */
1999 *p++ = 0x01; 1999 *p++ = 0x01;
2000 *p++ = pc->chan->setup.screen; 2000 *p++ = pc->chan->setup.screen;
2001 2001
2002 l = p - tmp; 2002 l = p - tmp;
2003 if (!(skb = l3_alloc_skb(l))) return; 2003 if (!(skb = l3_alloc_skb(l))) return;
2004 memcpy(skb_put(skb, l), tmp, l); 2004 memcpy(skb_put(skb, l), tmp, l);
2005 2005
2006 l3_msg(pc->st, DL_DATA | REQUEST, skb); 2006 l3_msg(pc->st, DL_DATA | REQUEST, skb);
2007} /* l3ni1_redir_req */ 2007} /* l3ni1_redir_req */
2008 2008
2009/********************************************/ 2009/********************************************/
@@ -2011,8 +2011,8 @@ static void l3ni1_redir_req(struct l3_process *pc, u_char pr, void *arg)
2011/********************************************/ 2011/********************************************/
2012static void l3ni1_redir_req_early(struct l3_process *pc, u_char pr, void *arg) 2012static void l3ni1_redir_req_early(struct l3_process *pc, u_char pr, void *arg)
2013{ 2013{
2014 l3ni1_proceed_req(pc,pr,arg); 2014 l3ni1_proceed_req(pc, pr, arg);
2015 l3ni1_redir_req(pc,pr,arg); 2015 l3ni1_redir_req(pc, pr, arg);
2016} /* l3ni1_redir_req_early */ 2016} /* l3ni1_redir_req_early */
2017 2017
2018/***********************************************/ 2018/***********************************************/
@@ -2022,108 +2022,108 @@ static void l3ni1_redir_req_early(struct l3_process *pc, u_char pr, void *arg)
2022/***********************************************/ 2022/***********************************************/
2023static int l3ni1_cmd_global(struct PStack *st, isdn_ctrl *ic) 2023static int l3ni1_cmd_global(struct PStack *st, isdn_ctrl *ic)
2024{ u_char id; 2024{ u_char id;
2025 u_char temp[265]; 2025 u_char temp[265];
2026 u_char *p = temp; 2026 u_char *p = temp;
2027 int i, l, proc_len; 2027 int i, l, proc_len;
2028 struct sk_buff *skb; 2028 struct sk_buff *skb;
2029 struct l3_process *pc = NULL; 2029 struct l3_process *pc = NULL;
2030 2030
2031 switch (ic->arg) 2031 switch (ic->arg)
2032 { case NI1_CMD_INVOKE: 2032 { case NI1_CMD_INVOKE:
2033 if (ic->parm.ni1_io.datalen < 0) return(-2); /* invalid parameter */ 2033 if (ic->parm.ni1_io.datalen < 0) return (-2); /* invalid parameter */
2034 2034
2035 for (proc_len = 1, i = ic->parm.ni1_io.proc >> 8; i; i++) 2035 for (proc_len = 1, i = ic->parm.ni1_io.proc >> 8; i; i++)
2036 i = i >> 8; /* add one byte */ 2036 i = i >> 8; /* add one byte */
2037 l = ic->parm.ni1_io.datalen + proc_len + 8; /* length excluding ie header */ 2037 l = ic->parm.ni1_io.datalen + proc_len + 8; /* length excluding ie header */
2038 if (l > 255) 2038 if (l > 255)
2039 return(-2); /* too long */ 2039 return (-2); /* too long */
2040 2040
2041 if (!(id = new_invoke_id(st))) 2041 if (!(id = new_invoke_id(st)))
2042 return(0); /* first get a invoke id -> return if no available */ 2042 return (0); /* first get a invoke id -> return if no available */
2043 2043
2044 i = -1; 2044 i = -1;
2045 MsgHead(p, i, MT_FACILITY); /* build message head */ 2045 MsgHead(p, i, MT_FACILITY); /* build message head */
2046 *p++ = 0x1C; /* Facility IE */ 2046 *p++ = 0x1C; /* Facility IE */
2047 *p++ = l; /* length of ie */ 2047 *p++ = l; /* length of ie */
2048 *p++ = 0x91; /* remote operations */ 2048 *p++ = 0x91; /* remote operations */
2049 *p++ = 0xA1; /* invoke */ 2049 *p++ = 0xA1; /* invoke */
2050 *p++ = l - 3; /* length of invoke */ 2050 *p++ = l - 3; /* length of invoke */
2051 *p++ = 0x02; /* invoke id tag */ 2051 *p++ = 0x02; /* invoke id tag */
2052 *p++ = 0x01; /* length is 1 */ 2052 *p++ = 0x01; /* length is 1 */
2053 *p++ = id; /* invoke id */ 2053 *p++ = id; /* invoke id */
2054 *p++ = 0x02; /* operation */ 2054 *p++ = 0x02; /* operation */
2055 *p++ = proc_len; /* length of operation */ 2055 *p++ = proc_len; /* length of operation */
2056 2056
2057 for (i = proc_len; i; i--) 2057 for (i = proc_len; i; i--)
2058 *p++ = (ic->parm.ni1_io.proc >> (i-1)) & 0xFF; 2058 *p++ = (ic->parm.ni1_io.proc >> (i - 1)) & 0xFF;
2059 memcpy(p, ic->parm.ni1_io.data, ic->parm.ni1_io.datalen); /* copy data */ 2059 memcpy(p, ic->parm.ni1_io.data, ic->parm.ni1_io.datalen); /* copy data */
2060 l = (p - temp) + ic->parm.ni1_io.datalen; /* total length */ 2060 l = (p - temp) + ic->parm.ni1_io.datalen; /* total length */
2061 2061
2062 if (ic->parm.ni1_io.timeout > 0) 2062 if (ic->parm.ni1_io.timeout > 0)
2063 if (!(pc = ni1_new_l3_process(st, -1))) 2063 if (!(pc = ni1_new_l3_process(st, -1)))
2064 { free_invoke_id(st, id); 2064 { free_invoke_id(st, id);
2065 return(-2); 2065 return (-2);
2066 } 2066 }
2067 pc->prot.ni1.ll_id = ic->parm.ni1_io.ll_id; /* remember id */ 2067 pc->prot.ni1.ll_id = ic->parm.ni1_io.ll_id; /* remember id */
2068 pc->prot.ni1.proc = ic->parm.ni1_io.proc; /* and procedure */ 2068 pc->prot.ni1.proc = ic->parm.ni1_io.proc; /* and procedure */
2069 2069
2070 if (!(skb = l3_alloc_skb(l))) 2070 if (!(skb = l3_alloc_skb(l)))
2071 { free_invoke_id(st, id); 2071 { free_invoke_id(st, id);
2072 if (pc) ni1_release_l3_process(pc); 2072 if (pc) ni1_release_l3_process(pc);
2073 return(-2); 2073 return (-2);
2074 } 2074 }
2075 memcpy(skb_put(skb, l), temp, l); 2075 memcpy(skb_put(skb, l), temp, l);
2076 2076
2077 if (pc) 2077 if (pc)
2078 { pc->prot.ni1.invoke_id = id; /* remember id */ 2078 { pc->prot.ni1.invoke_id = id; /* remember id */
2079 L3AddTimer(&pc->timer, ic->parm.ni1_io.timeout, CC_TNI1_IO | REQUEST); 2079 L3AddTimer(&pc->timer, ic->parm.ni1_io.timeout, CC_TNI1_IO | REQUEST);
2080 } 2080 }
2081 2081
2082 l3_msg(st, DL_DATA | REQUEST, skb); 2082 l3_msg(st, DL_DATA | REQUEST, skb);
2083 ic->parm.ni1_io.hl_id = id; /* return id */ 2083 ic->parm.ni1_io.hl_id = id; /* return id */
2084 return(0); 2084 return (0);
2085 2085
2086 case NI1_CMD_INVOKE_ABORT: 2086 case NI1_CMD_INVOKE_ABORT:
2087 if ((pc = l3ni1_search_dummy_proc(st, ic->parm.ni1_io.hl_id))) 2087 if ((pc = l3ni1_search_dummy_proc(st, ic->parm.ni1_io.hl_id)))
2088 { L3DelTimer(&pc->timer); /* remove timer */ 2088 { L3DelTimer(&pc->timer); /* remove timer */
2089 ni1_release_l3_process(pc); 2089 ni1_release_l3_process(pc);
2090 return(0); 2090 return (0);
2091 } 2091 }
2092 else 2092 else
2093 { l3_debug(st, "l3ni1_cmd_global abort unknown id"); 2093 { l3_debug(st, "l3ni1_cmd_global abort unknown id");
2094 return(-2); 2094 return (-2);
2095 } 2095 }
2096 break; 2096 break;
2097 2097
2098 default: 2098 default:
2099 l3_debug(st, "l3ni1_cmd_global unknown cmd 0x%lx", ic->arg); 2099 l3_debug(st, "l3ni1_cmd_global unknown cmd 0x%lx", ic->arg);
2100 return(-1); 2100 return (-1);
2101 } /* switch ic-> arg */ 2101 } /* switch ic-> arg */
2102 return(-1); 2102 return (-1);
2103} /* l3ni1_cmd_global */ 2103} /* l3ni1_cmd_global */
2104 2104
2105static void 2105static void
2106l3ni1_io_timer(struct l3_process *pc) 2106l3ni1_io_timer(struct l3_process *pc)
2107{ isdn_ctrl ic; 2107{ isdn_ctrl ic;
2108 struct IsdnCardState *cs = pc->st->l1.hardware; 2108 struct IsdnCardState *cs = pc->st->l1.hardware;
2109 2109
2110 L3DelTimer(&pc->timer); /* remove timer */ 2110 L3DelTimer(&pc->timer); /* remove timer */
2111 2111
2112 ic.driver = cs->myid; 2112 ic.driver = cs->myid;
2113 ic.command = ISDN_STAT_PROT; 2113 ic.command = ISDN_STAT_PROT;
2114 ic.arg = NI1_STAT_INVOKE_ERR; 2114 ic.arg = NI1_STAT_INVOKE_ERR;
2115 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id; 2115 ic.parm.ni1_io.hl_id = pc->prot.ni1.invoke_id;
2116 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id; 2116 ic.parm.ni1_io.ll_id = pc->prot.ni1.ll_id;
2117 ic.parm.ni1_io.proc = pc->prot.ni1.proc; 2117 ic.parm.ni1_io.proc = pc->prot.ni1.proc;
2118 ic.parm.ni1_io.timeout= -1; 2118 ic.parm.ni1_io.timeout = -1;
2119 ic.parm.ni1_io.datalen = 0; 2119 ic.parm.ni1_io.datalen = 0;
2120 ic.parm.ni1_io.data = NULL; 2120 ic.parm.ni1_io.data = NULL;
2121 free_invoke_id(pc->st, pc->prot.ni1.invoke_id); 2121 free_invoke_id(pc->st, pc->prot.ni1.invoke_id);
2122 pc->prot.ni1.invoke_id = 0; /* reset id */ 2122 pc->prot.ni1.invoke_id = 0; /* reset id */
2123 2123
2124 cs->iif.statcallb(&ic); 2124 cs->iif.statcallb(&ic);
2125 2125
2126 ni1_release_l3_process(pc); 2126 ni1_release_l3_process(pc);
2127} /* l3ni1_io_timer */ 2127} /* l3ni1_io_timer */
2128 2128
2129static void 2129static void
@@ -2293,12 +2293,12 @@ l3ni1_status(struct l3_process *pc, u_char pr, void *arg)
2293{ 2293{
2294 u_char *p; 2294 u_char *p;
2295 struct sk_buff *skb = arg; 2295 struct sk_buff *skb = arg;
2296 int ret; 2296 int ret;
2297 u_char cause = 0, callState = 0; 2297 u_char cause = 0, callState = 0;
2298 2298
2299 if ((ret = l3ni1_get_cause(pc, skb))) { 2299 if ((ret = l3ni1_get_cause(pc, skb))) {
2300 if (pc->debug & L3_DEB_WARN) 2300 if (pc->debug & L3_DEB_WARN)
2301 l3_debug(pc->st, "STATUS get_cause ret(%d)",ret); 2301 l3_debug(pc->st, "STATUS get_cause ret(%d)", ret);
2302 if (ret < 0) 2302 if (ret < 0)
2303 cause = 96; 2303 cause = 96;
2304 else if (ret > 0) 2304 else if (ret > 0)
@@ -2323,9 +2323,9 @@ l3ni1_status(struct l3_process *pc, u_char pr, void *arg)
2323 } 2323 }
2324 if (cause) { 2324 if (cause) {
2325 u_char tmp; 2325 u_char tmp;
2326 2326
2327 if (pc->debug & L3_DEB_WARN) 2327 if (pc->debug & L3_DEB_WARN)
2328 l3_debug(pc->st, "STATUS error(%d/%d)",ret,cause); 2328 l3_debug(pc->st, "STATUS error(%d/%d)", ret, cause);
2329 tmp = pc->para.cause; 2329 tmp = pc->para.cause;
2330 pc->para.cause = cause; 2330 pc->para.cause = cause;
2331 l3ni1_status_send(pc, 0, NULL); 2331 l3ni1_status_send(pc, 0, NULL);
@@ -2351,10 +2351,10 @@ l3ni1_facility(struct l3_process *pc, u_char pr, void *arg)
2351{ 2351{
2352 struct sk_buff *skb = arg; 2352 struct sk_buff *skb = arg;
2353 int ret; 2353 int ret;
2354 2354
2355 ret = check_infoelements(pc, skb, ie_FACILITY); 2355 ret = check_infoelements(pc, skb, ie_FACILITY);
2356 l3ni1_std_ie_err(pc, ret); 2356 l3ni1_std_ie_err(pc, ret);
2357 { 2357 {
2358 u_char *p; 2358 u_char *p;
2359 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) 2359 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0)))
2360 l3ni1_parse_facility(pc->st, pc, pc->callref, p); 2360 l3ni1_parse_facility(pc->st, pc, pc->callref, p);
@@ -2403,7 +2403,7 @@ l3ni1_suspend_ack(struct l3_process *pc, u_char pr, void *arg)
2403 /* We don't handle suspend_ack for IE errors now */ 2403 /* We don't handle suspend_ack for IE errors now */
2404 if ((ret = check_infoelements(pc, skb, ie_SUSPEND_ACKNOWLEDGE))) 2404 if ((ret = check_infoelements(pc, skb, ie_SUSPEND_ACKNOWLEDGE)))
2405 if (pc->debug & L3_DEB_WARN) 2405 if (pc->debug & L3_DEB_WARN)
2406 l3_debug(pc->st, "SUSPACK check ie(%d)",ret); 2406 l3_debug(pc->st, "SUSPACK check ie(%d)", ret);
2407 ni1_release_l3_process(pc); 2407 ni1_release_l3_process(pc);
2408} 2408}
2409 2409
@@ -2415,8 +2415,8 @@ l3ni1_suspend_rej(struct l3_process *pc, u_char pr, void *arg)
2415 2415
2416 if ((ret = l3ni1_get_cause(pc, skb))) { 2416 if ((ret = l3ni1_get_cause(pc, skb))) {
2417 if (pc->debug & L3_DEB_WARN) 2417 if (pc->debug & L3_DEB_WARN)
2418 l3_debug(pc->st, "SUSP_REJ get_cause ret(%d)",ret); 2418 l3_debug(pc->st, "SUSP_REJ get_cause ret(%d)", ret);
2419 if (ret < 0) 2419 if (ret < 0)
2420 pc->para.cause = 96; 2420 pc->para.cause = 96;
2421 else 2421 else
2422 pc->para.cause = 100; 2422 pc->para.cause = 100;
@@ -2507,8 +2507,8 @@ l3ni1_resume_rej(struct l3_process *pc, u_char pr, void *arg)
2507 2507
2508 if ((ret = l3ni1_get_cause(pc, skb))) { 2508 if ((ret = l3ni1_get_cause(pc, skb))) {
2509 if (pc->debug & L3_DEB_WARN) 2509 if (pc->debug & L3_DEB_WARN)
2510 l3_debug(pc->st, "RES_REJ get_cause ret(%d)",ret); 2510 l3_debug(pc->st, "RES_REJ get_cause ret(%d)", ret);
2511 if (ret < 0) 2511 if (ret < 0)
2512 pc->para.cause = 96; 2512 pc->para.cause = 96;
2513 else 2513 else
2514 pc->para.cause = 100; 2514 pc->para.cause = 100;
@@ -2562,7 +2562,7 @@ l3ni1_global_restart(struct l3_process *pc, u_char pr, void *arg)
2562 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); 2562 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up);
2563 else if (up->para.bchannel == chan) 2563 else if (up->para.bchannel == chan)
2564 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up); 2564 up->st->lli.l4l3(up->st, CC_RESTART | REQUEST, up);
2565 2565
2566 up = up->next; 2566 up = up->next;
2567 } 2567 }
2568 p = tmp; 2568 p = tmp;
@@ -2586,112 +2586,112 @@ l3ni1_global_restart(struct l3_process *pc, u_char pr, void *arg)
2586static void 2586static void
2587l3ni1_dl_reset(struct l3_process *pc, u_char pr, void *arg) 2587l3ni1_dl_reset(struct l3_process *pc, u_char pr, void *arg)
2588{ 2588{
2589 pc->para.cause = 0x29; /* Temporary failure */ 2589 pc->para.cause = 0x29; /* Temporary failure */
2590 pc->para.loc = 0; 2590 pc->para.loc = 0;
2591 l3ni1_disconnect_req(pc, pr, NULL); 2591 l3ni1_disconnect_req(pc, pr, NULL);
2592 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc); 2592 pc->st->l3.l3l4(pc->st, CC_SETUP_ERR, pc);
2593} 2593}
2594 2594
2595static void 2595static void
2596l3ni1_dl_release(struct l3_process *pc, u_char pr, void *arg) 2596l3ni1_dl_release(struct l3_process *pc, u_char pr, void *arg)
2597{ 2597{
2598 newl3state(pc, 0); 2598 newl3state(pc, 0);
2599 pc->para.cause = 0x1b; /* Destination out of order */ 2599 pc->para.cause = 0x1b; /* Destination out of order */
2600 pc->para.loc = 0; 2600 pc->para.loc = 0;
2601 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc); 2601 pc->st->l3.l3l4(pc->st, CC_RELEASE | INDICATION, pc);
2602 release_l3_process(pc); 2602 release_l3_process(pc);
2603} 2603}
2604 2604
2605static void 2605static void
2606l3ni1_dl_reestablish(struct l3_process *pc, u_char pr, void *arg) 2606l3ni1_dl_reestablish(struct l3_process *pc, u_char pr, void *arg)
2607{ 2607{
2608 L3DelTimer(&pc->timer); 2608 L3DelTimer(&pc->timer);
2609 L3AddTimer(&pc->timer, T309, CC_T309); 2609 L3AddTimer(&pc->timer, T309, CC_T309);
2610 l3_msg(pc->st, DL_ESTABLISH | REQUEST, NULL); 2610 l3_msg(pc->st, DL_ESTABLISH | REQUEST, NULL);
2611} 2611}
2612 2612
2613static void 2613static void
2614l3ni1_dl_reest_status(struct l3_process *pc, u_char pr, void *arg) 2614l3ni1_dl_reest_status(struct l3_process *pc, u_char pr, void *arg)
2615{ 2615{
2616 L3DelTimer(&pc->timer); 2616 L3DelTimer(&pc->timer);
2617 2617
2618 pc->para.cause = 0x1F; /* normal, unspecified */ 2618 pc->para.cause = 0x1F; /* normal, unspecified */
2619 l3ni1_status_send(pc, 0, NULL); 2619 l3ni1_status_send(pc, 0, NULL);
2620} 2620}
2621 2621
2622static void l3ni1_SendSpid( struct l3_process *pc, u_char pr, struct sk_buff *skb, int iNewState ) 2622static void l3ni1_SendSpid(struct l3_process *pc, u_char pr, struct sk_buff *skb, int iNewState)
2623{ 2623{
2624 u_char * p; 2624 u_char *p;
2625 char * pSPID; 2625 char *pSPID;
2626 struct Channel * pChan = pc->st->lli.userdata; 2626 struct Channel *pChan = pc->st->lli.userdata;
2627 int l; 2627 int l;
2628 2628
2629 if ( skb ) 2629 if (skb)
2630 dev_kfree_skb( skb); 2630 dev_kfree_skb(skb);
2631 2631
2632 if ( !( pSPID = strchr( pChan->setup.eazmsn, ':' ) ) ) 2632 if (!(pSPID = strchr(pChan->setup.eazmsn, ':')))
2633 { 2633 {
2634 printk( KERN_ERR "SPID not supplied in EAZMSN %s\n", pChan->setup.eazmsn ); 2634 printk(KERN_ERR "SPID not supplied in EAZMSN %s\n", pChan->setup.eazmsn);
2635 newl3state( pc, 0 ); 2635 newl3state(pc, 0);
2636 pc->st->l3.l3l2( pc->st, DL_RELEASE | REQUEST, NULL ); 2636 pc->st->l3.l3l2(pc->st, DL_RELEASE | REQUEST, NULL);
2637 return; 2637 return;
2638 } 2638 }
2639 2639
2640 l = strlen( ++pSPID ); 2640 l = strlen(++pSPID);
2641 if ( !( skb = l3_alloc_skb( 5+l ) ) ) 2641 if (!(skb = l3_alloc_skb(5 + l)))
2642 { 2642 {
2643 printk( KERN_ERR "HiSax can't get memory to send SPID\n" ); 2643 printk(KERN_ERR "HiSax can't get memory to send SPID\n");
2644 return; 2644 return;
2645 } 2645 }
2646 2646
2647 p = skb_put( skb, 5 ); 2647 p = skb_put(skb, 5);
2648 *p++ = PROTO_DIS_EURO; 2648 *p++ = PROTO_DIS_EURO;
2649 *p++ = 0; 2649 *p++ = 0;
2650 *p++ = MT_INFORMATION; 2650 *p++ = MT_INFORMATION;
2651 *p++ = IE_SPID; 2651 *p++ = IE_SPID;
2652 *p++ = l; 2652 *p++ = l;
2653 2653
2654 memcpy( skb_put( skb, l ), pSPID, l ); 2654 memcpy(skb_put(skb, l), pSPID, l);
2655 2655
2656 newl3state( pc, iNewState ); 2656 newl3state(pc, iNewState);
2657 2657
2658 L3DelTimer( &pc->timer ); 2658 L3DelTimer(&pc->timer);
2659 L3AddTimer( &pc->timer, TSPID, CC_TSPID ); 2659 L3AddTimer(&pc->timer, TSPID, CC_TSPID);
2660 2660
2661 pc->st->l3.l3l2( pc->st, DL_DATA | REQUEST, skb ); 2661 pc->st->l3.l3l2(pc->st, DL_DATA | REQUEST, skb);
2662} 2662}
2663 2663
2664static void l3ni1_spid_send( struct l3_process *pc, u_char pr, void *arg ) 2664static void l3ni1_spid_send(struct l3_process *pc, u_char pr, void *arg)
2665{ 2665{
2666 l3ni1_SendSpid( pc, pr, arg, 20 ); 2666 l3ni1_SendSpid(pc, pr, arg, 20);
2667} 2667}
2668 2668
2669static void l3ni1_spid_epid( struct l3_process *pc, u_char pr, void *arg ) 2669static void l3ni1_spid_epid(struct l3_process *pc, u_char pr, void *arg)
2670{ 2670{
2671 struct sk_buff *skb = arg; 2671 struct sk_buff *skb = arg;
2672 2672
2673 if ( skb->data[ 1 ] == 0 ) 2673 if (skb->data[1] == 0)
2674 if ( skb->data[ 3 ] == IE_ENDPOINT_ID ) 2674 if (skb->data[3] == IE_ENDPOINT_ID)
2675 { 2675 {
2676 L3DelTimer( &pc->timer ); 2676 L3DelTimer(&pc->timer);
2677 newl3state( pc, 0 ); 2677 newl3state(pc, 0);
2678 l3_msg( pc->st, DL_ESTABLISH | CONFIRM, NULL ); 2678 l3_msg(pc->st, DL_ESTABLISH | CONFIRM, NULL);
2679 } 2679 }
2680 dev_kfree_skb( skb); 2680 dev_kfree_skb(skb);
2681} 2681}
2682 2682
2683static void l3ni1_spid_tout( struct l3_process *pc, u_char pr, void *arg ) 2683static void l3ni1_spid_tout(struct l3_process *pc, u_char pr, void *arg)
2684{ 2684{
2685 if ( pc->state < 22 ) 2685 if (pc->state < 22)
2686 l3ni1_SendSpid( pc, pr, arg, pc->state+1 ); 2686 l3ni1_SendSpid(pc, pr, arg, pc->state + 1);
2687 else 2687 else
2688 { 2688 {
2689 L3DelTimer( &pc->timer ); 2689 L3DelTimer(&pc->timer);
2690 dev_kfree_skb( arg); 2690 dev_kfree_skb(arg);
2691 2691
2692 printk( KERN_ERR "SPID not accepted\n" ); 2692 printk(KERN_ERR "SPID not accepted\n");
2693 newl3state( pc, 0 ); 2693 newl3state(pc, 0);
2694 pc->st->l3.l3l2( pc->st, DL_RELEASE | REQUEST, NULL ); 2694 pc->st->l3.l3l2(pc->st, DL_RELEASE | REQUEST, NULL);
2695 } 2695 }
2696} 2696}
2697 2697
@@ -2724,12 +2724,12 @@ static struct stateentry downstatelist[] =
2724 CC_SETUP | RESPONSE, l3ni1_setup_rsp}, 2724 CC_SETUP | RESPONSE, l3ni1_setup_rsp},
2725 {SBIT(10), 2725 {SBIT(10),
2726 CC_SUSPEND | REQUEST, l3ni1_suspend_req}, 2726 CC_SUSPEND | REQUEST, l3ni1_suspend_req},
2727 {SBIT(7) | SBIT(9) | SBIT(25), 2727 {SBIT(7) | SBIT(9) | SBIT(25),
2728 CC_REDIR | REQUEST, l3ni1_redir_req}, 2728 CC_REDIR | REQUEST, l3ni1_redir_req},
2729 {SBIT(6), 2729 {SBIT(6),
2730 CC_REDIR | REQUEST, l3ni1_redir_req_early}, 2730 CC_REDIR | REQUEST, l3ni1_redir_req_early},
2731 {SBIT(9) | SBIT(25), 2731 {SBIT(9) | SBIT(25),
2732 CC_DISCONNECT | REQUEST, l3ni1_disconnect_req}, 2732 CC_DISCONNECT | REQUEST, l3ni1_disconnect_req},
2733 {SBIT(25), 2733 {SBIT(25),
2734 CC_T302, l3ni1_t302}, 2734 CC_T302, l3ni1_t302},
2735 {SBIT(1), 2735 {SBIT(1),
@@ -2752,8 +2752,8 @@ static struct stateentry downstatelist[] =
2752 CC_T308_2, l3ni1_t308_2}, 2752 CC_T308_2, l3ni1_t308_2},
2753 {SBIT(10), 2753 {SBIT(10),
2754 CC_T309, l3ni1_dl_release}, 2754 CC_T309, l3ni1_dl_release},
2755 { SBIT( 20 ) | SBIT( 21 ) | SBIT( 22 ), 2755 { SBIT(20) | SBIT(21) | SBIT(22),
2756 CC_TSPID, l3ni1_spid_tout }, 2756 CC_TSPID, l3ni1_spid_tout },
2757}; 2757};
2758 2758
2759static struct stateentry datastatelist[] = 2759static struct stateentry datastatelist[] =
@@ -2815,22 +2815,22 @@ static struct stateentry globalmes_list[] =
2815 {SBIT(0), 2815 {SBIT(0),
2816 MT_RESTART, l3ni1_global_restart}, 2816 MT_RESTART, l3ni1_global_restart},
2817/* {SBIT(1), 2817/* {SBIT(1),
2818 MT_RESTART_ACKNOWLEDGE, l3ni1_restart_ack}, 2818 MT_RESTART_ACKNOWLEDGE, l3ni1_restart_ack},
2819*/ 2819*/
2820 { SBIT( 0 ), MT_DL_ESTABLISHED, l3ni1_spid_send }, 2820 { SBIT(0), MT_DL_ESTABLISHED, l3ni1_spid_send },
2821 { SBIT( 20 ) | SBIT( 21 ) | SBIT( 22 ), MT_INFORMATION, l3ni1_spid_epid }, 2821 { SBIT(20) | SBIT(21) | SBIT(22), MT_INFORMATION, l3ni1_spid_epid },
2822}; 2822};
2823 2823
2824static struct stateentry manstatelist[] = 2824static struct stateentry manstatelist[] =
2825{ 2825{
2826 {SBIT(2), 2826 {SBIT(2),
2827 DL_ESTABLISH | INDICATION, l3ni1_dl_reset}, 2827 DL_ESTABLISH | INDICATION, l3ni1_dl_reset},
2828 {SBIT(10), 2828 {SBIT(10),
2829 DL_ESTABLISH | CONFIRM, l3ni1_dl_reest_status}, 2829 DL_ESTABLISH | CONFIRM, l3ni1_dl_reest_status},
2830 {SBIT(10), 2830 {SBIT(10),
2831 DL_RELEASE | INDICATION, l3ni1_dl_reestablish}, 2831 DL_RELEASE | INDICATION, l3ni1_dl_reestablish},
2832 {ALL_STATES, 2832 {ALL_STATES,
2833 DL_RELEASE | INDICATION, l3ni1_dl_release}, 2833 DL_RELEASE | INDICATION, l3ni1_dl_release},
2834}; 2834};
2835 2835
2836/* *INDENT-ON* */ 2836/* *INDENT-ON* */
@@ -2845,7 +2845,7 @@ global_handler(struct PStack *st, int mt, struct sk_buff *skb)
2845 int i; 2845 int i;
2846 struct l3_process *proc = st->l3.global; 2846 struct l3_process *proc = st->l3.global;
2847 2847
2848 if ( skb ) 2848 if (skb)
2849 proc->callref = skb->data[2]; /* cr flag */ 2849 proc->callref = skb->data[2]; /* cr flag */
2850 else 2850 else
2851 proc->callref = 0; 2851 proc->callref = 0;
@@ -2856,13 +2856,13 @@ global_handler(struct PStack *st, int mt, struct sk_buff *skb)
2856 if (i == ARRAY_SIZE(globalmes_list)) { 2856 if (i == ARRAY_SIZE(globalmes_list)) {
2857 if (st->l3.debug & L3_DEB_STATE) { 2857 if (st->l3.debug & L3_DEB_STATE) {
2858 l3_debug(st, "ni1 global state %d mt %x unhandled", 2858 l3_debug(st, "ni1 global state %d mt %x unhandled",
2859 proc->state, mt); 2859 proc->state, mt);
2860 } 2860 }
2861 MsgHead(p, proc->callref, MT_STATUS); 2861 MsgHead(p, proc->callref, MT_STATUS);
2862 *p++ = IE_CAUSE; 2862 *p++ = IE_CAUSE;
2863 *p++ = 0x2; 2863 *p++ = 0x2;
2864 *p++ = 0x80; 2864 *p++ = 0x80;
2865 *p++ = 81 |0x80; /* invalid cr */ 2865 *p++ = 81 | 0x80; /* invalid cr */
2866 *p++ = 0x14; /* CallState */ 2866 *p++ = 0x14; /* CallState */
2867 *p++ = 0x1; 2867 *p++ = 0x1;
2868 *p++ = proc->state & 0x3f; 2868 *p++ = proc->state & 0x3f;
@@ -2874,7 +2874,7 @@ global_handler(struct PStack *st, int mt, struct sk_buff *skb)
2874 } else { 2874 } else {
2875 if (st->l3.debug & L3_DEB_STATE) { 2875 if (st->l3.debug & L3_DEB_STATE) {
2876 l3_debug(st, "ni1 global %d mt %x", 2876 l3_debug(st, "ni1 global %d mt %x",
2877 proc->state, mt); 2877 proc->state, mt);
2878 } 2878 }
2879 globalmes_list[i].rout(proc, mt, skb); 2879 globalmes_list[i].rout(proc, mt, skb);
2880 } 2880 }
@@ -2890,23 +2890,23 @@ ni1up(struct PStack *st, int pr, void *arg)
2890 struct l3_process *proc; 2890 struct l3_process *proc;
2891 2891
2892 switch (pr) { 2892 switch (pr) {
2893 case (DL_DATA | INDICATION): 2893 case (DL_DATA | INDICATION):
2894 case (DL_UNIT_DATA | INDICATION): 2894 case (DL_UNIT_DATA | INDICATION):
2895 break; 2895 break;
2896 case (DL_ESTABLISH | INDICATION): 2896 case (DL_ESTABLISH | INDICATION):
2897 case (DL_RELEASE | INDICATION): 2897 case (DL_RELEASE | INDICATION):
2898 case (DL_RELEASE | CONFIRM): 2898 case (DL_RELEASE | CONFIRM):
2899 l3_msg(st, pr, arg); 2899 l3_msg(st, pr, arg);
2900 return; 2900 return;
2901 break; 2901 break;
2902 2902
2903 case (DL_ESTABLISH | CONFIRM): 2903 case (DL_ESTABLISH | CONFIRM):
2904 global_handler( st, MT_DL_ESTABLISHED, NULL ); 2904 global_handler(st, MT_DL_ESTABLISHED, NULL);
2905 return; 2905 return;
2906 2906
2907 default: 2907 default:
2908 printk(KERN_ERR "HiSax ni1up unknown pr=%04x\n", pr); 2908 printk(KERN_ERR "HiSax ni1up unknown pr=%04x\n", pr);
2909 return; 2909 return;
2910 } 2910 }
2911 if (skb->len < 3) { 2911 if (skb->len < 3) {
2912 l3_debug(st, "ni1up frame too short(%d)", skb->len); 2912 l3_debug(st, "ni1up frame too short(%d)", skb->len);
@@ -2941,10 +2941,10 @@ ni1up(struct PStack *st, int pr, void *arg)
2941 if (mt == MT_FACILITY) 2941 if (mt == MT_FACILITY)
2942 { 2942 {
2943 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) { 2943 if ((p = findie(skb->data, skb->len, IE_FACILITY, 0))) {
2944 l3ni1_parse_facility(st, NULL, 2944 l3ni1_parse_facility(st, NULL,
2945 (pr == (DL_DATA | INDICATION)) ? -1 : -2, p); 2945 (pr == (DL_DATA | INDICATION)) ? -1 : -2, p);
2946 dev_kfree_skb(skb); 2946 dev_kfree_skb(skb);
2947 return; 2947 return;
2948 } 2948 }
2949 } 2949 }
2950 else 2950 else
@@ -2952,13 +2952,13 @@ ni1up(struct PStack *st, int pr, void *arg)
2952 global_handler(st, mt, skb); 2952 global_handler(st, mt, skb);
2953 return; 2953 return;
2954 } 2954 }
2955 2955
2956 if (st->l3.debug & L3_DEB_WARN) 2956 if (st->l3.debug & L3_DEB_WARN)
2957 l3_debug(st, "ni1up dummy Callref (no facility msg or ie)"); 2957 l3_debug(st, "ni1up dummy Callref (no facility msg or ie)");
2958 dev_kfree_skb(skb); 2958 dev_kfree_skb(skb);
2959 return; 2959 return;
2960 } else if ((((skb->data[1] & 0x0f) == 1) && (0==(cr & 0x7f))) || 2960 } else if ((((skb->data[1] & 0x0f) == 1) && (0 == (cr & 0x7f))) ||
2961 (((skb->data[1] & 0x0f) == 2) && (0==(cr & 0x7fff)))) { /* Global CallRef */ 2961 (((skb->data[1] & 0x0f) == 2) && (0 == (cr & 0x7fff)))) { /* Global CallRef */
2962 if (st->l3.debug & L3_DEB_STATE) 2962 if (st->l3.debug & L3_DEB_STATE)
2963 l3_debug(st, "ni1up Global CallRef"); 2963 l3_debug(st, "ni1up Global CallRef");
2964 global_handler(st, mt, skb); 2964 global_handler(st, mt, skb);
@@ -3036,8 +3036,8 @@ ni1up(struct PStack *st, int pr, void *arg)
3036 dev_kfree_skb(skb); 3036 dev_kfree_skb(skb);
3037 return; 3037 return;
3038 } 3038 }
3039 if ((p = findie(skb->data, skb->len, IE_DISPLAY, 0)) != NULL) 3039 if ((p = findie(skb->data, skb->len, IE_DISPLAY, 0)) != NULL)
3040 l3ni1_deliver_display(proc, pr, p); /* Display IE included */ 3040 l3ni1_deliver_display(proc, pr, p); /* Display IE included */
3041 for (i = 0; i < ARRAY_SIZE(datastatelist); i++) 3041 for (i = 0; i < ARRAY_SIZE(datastatelist); i++)
3042 if ((mt == datastatelist[i].primitive) && 3042 if ((mt == datastatelist[i].primitive) &&
3043 ((1 << proc->state) & datastatelist[i].state)) 3043 ((1 << proc->state) & datastatelist[i].state))
@@ -3045,8 +3045,8 @@ ni1up(struct PStack *st, int pr, void *arg)
3045 if (i == ARRAY_SIZE(datastatelist)) { 3045 if (i == ARRAY_SIZE(datastatelist)) {
3046 if (st->l3.debug & L3_DEB_STATE) { 3046 if (st->l3.debug & L3_DEB_STATE) {
3047 l3_debug(st, "ni1up%sstate %d mt %#x unhandled", 3047 l3_debug(st, "ni1up%sstate %d mt %#x unhandled",
3048 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 3048 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
3049 proc->state, mt); 3049 proc->state, mt);
3050 } 3050 }
3051 if ((MT_RELEASE_COMPLETE != mt) && (MT_RELEASE != mt)) { 3051 if ((MT_RELEASE_COMPLETE != mt) && (MT_RELEASE != mt)) {
3052 proc->para.cause = 101; 3052 proc->para.cause = 101;
@@ -3055,8 +3055,8 @@ ni1up(struct PStack *st, int pr, void *arg)
3055 } else { 3055 } else {
3056 if (st->l3.debug & L3_DEB_STATE) { 3056 if (st->l3.debug & L3_DEB_STATE) {
3057 l3_debug(st, "ni1up%sstate %d mt %x", 3057 l3_debug(st, "ni1up%sstate %d mt %x",
3058 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ", 3058 (pr == (DL_DATA | INDICATION)) ? " " : "(broadcast) ",
3059 proc->state, mt); 3059 proc->state, mt);
3060 } 3060 }
3061 datastatelist[i].rout(proc, pr, skb); 3061 datastatelist[i].rout(proc, pr, skb);
3062 } 3062 }
@@ -3092,10 +3092,10 @@ ni1down(struct PStack *st, int pr, void *arg)
3092 return; 3092 return;
3093 } 3093 }
3094 3094
3095 if ( pr == (CC_TNI1_IO | REQUEST)) { 3095 if (pr == (CC_TNI1_IO | REQUEST)) {
3096 l3ni1_io_timer(proc); /* timer expires */ 3096 l3ni1_io_timer(proc); /* timer expires */
3097 return; 3097 return;
3098 } 3098 }
3099 3099
3100 for (i = 0; i < ARRAY_SIZE(downstatelist); i++) 3100 for (i = 0; i < ARRAY_SIZE(downstatelist); i++)
3101 if ((pr == downstatelist[i].primitive) && 3101 if ((pr == downstatelist[i].primitive) &&
@@ -3104,12 +3104,12 @@ ni1down(struct PStack *st, int pr, void *arg)
3104 if (i == ARRAY_SIZE(downstatelist)) { 3104 if (i == ARRAY_SIZE(downstatelist)) {
3105 if (st->l3.debug & L3_DEB_STATE) { 3105 if (st->l3.debug & L3_DEB_STATE) {
3106 l3_debug(st, "ni1down state %d prim %#x unhandled", 3106 l3_debug(st, "ni1down state %d prim %#x unhandled",
3107 proc->state, pr); 3107 proc->state, pr);
3108 } 3108 }
3109 } else { 3109 } else {
3110 if (st->l3.debug & L3_DEB_STATE) { 3110 if (st->l3.debug & L3_DEB_STATE) {
3111 l3_debug(st, "ni1down state %d prim %#x", 3111 l3_debug(st, "ni1down state %d prim %#x",
3112 proc->state, pr); 3112 proc->state, pr);
3113 } 3113 }
3114 downstatelist[i].rout(proc, pr, arg); 3114 downstatelist[i].rout(proc, pr, arg);
3115 } 3115 }
@@ -3118,31 +3118,31 @@ ni1down(struct PStack *st, int pr, void *arg)
3118static void 3118static void
3119ni1man(struct PStack *st, int pr, void *arg) 3119ni1man(struct PStack *st, int pr, void *arg)
3120{ 3120{
3121 int i; 3121 int i;
3122 struct l3_process *proc = arg; 3122 struct l3_process *proc = arg;
3123 3123
3124 if (!proc) { 3124 if (!proc) {
3125 printk(KERN_ERR "HiSax ni1man without proc pr=%04x\n", pr); 3125 printk(KERN_ERR "HiSax ni1man without proc pr=%04x\n", pr);
3126 return; 3126 return;
3127 } 3127 }
3128 for (i = 0; i < ARRAY_SIZE(manstatelist); i++) 3128 for (i = 0; i < ARRAY_SIZE(manstatelist); i++)
3129 if ((pr == manstatelist[i].primitive) && 3129 if ((pr == manstatelist[i].primitive) &&
3130 ((1 << proc->state) & manstatelist[i].state)) 3130 ((1 << proc->state) & manstatelist[i].state))
3131 break; 3131 break;
3132 if (i == ARRAY_SIZE(manstatelist)) { 3132 if (i == ARRAY_SIZE(manstatelist)) {
3133 if (st->l3.debug & L3_DEB_STATE) { 3133 if (st->l3.debug & L3_DEB_STATE) {
3134 l3_debug(st, "cr %d ni1man state %d prim %#x unhandled", 3134 l3_debug(st, "cr %d ni1man state %d prim %#x unhandled",
3135 proc->callref & 0x7f, proc->state, pr); 3135 proc->callref & 0x7f, proc->state, pr);
3136 } 3136 }
3137 } else { 3137 } else {
3138 if (st->l3.debug & L3_DEB_STATE) { 3138 if (st->l3.debug & L3_DEB_STATE) {
3139 l3_debug(st, "cr %d ni1man state %d prim %#x", 3139 l3_debug(st, "cr %d ni1man state %d prim %#x",
3140 proc->callref & 0x7f, proc->state, pr); 3140 proc->callref & 0x7f, proc->state, pr);
3141 } 3141 }
3142 manstatelist[i].rout(proc, pr, arg); 3142 manstatelist[i].rout(proc, pr, arg);
3143 } 3143 }
3144} 3144}
3145 3145
3146void 3146void
3147setstack_ni1(struct PStack *st) 3147setstack_ni1(struct PStack *st)
3148{ 3148{
@@ -3157,8 +3157,8 @@ setstack_ni1(struct PStack *st)
3157 st->prot.ni1.last_invoke_id = 0; 3157 st->prot.ni1.last_invoke_id = 0;
3158 st->prot.ni1.invoke_used[0] = 1; /* Bit 0 must always be set to 1 */ 3158 st->prot.ni1.invoke_used[0] = 1; /* Bit 0 must always be set to 1 */
3159 i = 1; 3159 i = 1;
3160 while (i < 32) 3160 while (i < 32)
3161 st->prot.ni1.invoke_used[i++] = 0; 3161 st->prot.ni1.invoke_used[i++] = 0;
3162 3162
3163 if (!(st->l3.global = kmalloc(sizeof(struct l3_process), GFP_ATOMIC))) { 3163 if (!(st->l3.global = kmalloc(sizeof(struct l3_process), GFP_ATOMIC))) {
3164 printk(KERN_ERR "HiSax can't get memory for ni1 global CR\n"); 3164 printk(KERN_ERR "HiSax can't get memory for ni1 global CR\n");
@@ -3169,7 +3169,7 @@ setstack_ni1(struct PStack *st)
3169 st->l3.global->debug = L3_DEB_WARN; 3169 st->l3.global->debug = L3_DEB_WARN;
3170 st->l3.global->st = st; 3170 st->l3.global->st = st;
3171 st->l3.global->N303 = 1; 3171 st->l3.global->N303 = 1;
3172 st->l3.global->prot.ni1.invoke_id = 0; 3172 st->l3.global->prot.ni1.invoke_id = 0;
3173 3173
3174 L3InitTimer(st->l3.global, &st->l3.global->timer); 3174 L3InitTimer(st->l3.global, &st->l3.global->timer);
3175 } 3175 }
diff --git a/drivers/isdn/hisax/l3ni1.h b/drivers/isdn/hisax/l3ni1.h
index 4066da2fe5a2..99d37d2cea4f 100644
--- a/drivers/isdn/hisax/l3ni1.h
+++ b/drivers/isdn/hisax/l3ni1.h
@@ -4,13 +4,13 @@
4 * 4 *
5 * Author Matt Henderson & Guy Ellis 5 * Author Matt Henderson & Guy Ellis
6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au 6 * Copyright by Traverse Technologies Pty Ltd, www.travers.com.au
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 * 2000.6.6 Initial implementation of routines for US NI1 11 * 2000.6.6 Initial implementation of routines for US NI1
12 * Layer 3 protocol based on the EURO/DSS1 D-channel protocol 12 * Layer 3 protocol based on the EURO/DSS1 D-channel protocol
13 * driver written by Karsten Keil et al. Thanks also for the 13 * driver written by Karsten Keil et al. Thanks also for the
14 * code provided by Ragnar Paulson. 14 * code provided by Ragnar Paulson.
15 * 15 *
16 */ 16 */
@@ -119,18 +119,18 @@
119 119
120/* l3ni1 specific data in l3 process */ 120/* l3ni1 specific data in l3 process */
121typedef struct 121typedef struct
122 { unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */ 122{ unsigned char invoke_id; /* used invoke id in remote ops, 0 = not active */
123 ulong ll_id; /* remebered ll id */ 123 ulong ll_id; /* remebered ll id */
124 u8 remote_operation; /* handled remote operation, 0 = not active */ 124 u8 remote_operation; /* handled remote operation, 0 = not active */
125 int proc; /* rememered procedure */ 125 int proc; /* rememered procedure */
126 ulong remote_result; /* result of remote operation for statcallb */ 126 ulong remote_result; /* result of remote operation for statcallb */
127 char uus1_data[35]; /* data send during alerting or disconnect */ 127 char uus1_data[35]; /* data send during alerting or disconnect */
128 } ni1_proc_priv; 128} ni1_proc_priv;
129 129
130/* l3dni1 specific data in protocol stack */ 130/* l3dni1 specific data in protocol stack */
131typedef struct 131typedef struct
132 { unsigned char last_invoke_id; /* last used value for invoking */ 132{ unsigned char last_invoke_id; /* last used value for invoking */
133 unsigned char invoke_used[32]; /* 256 bits for 256 values */ 133 unsigned char invoke_used[32]; /* 256 bits for 256 values */
134 } ni1_stk_priv; 134} ni1_stk_priv;
135 135
136#endif /* only l3dni1_process */ 136#endif /* only l3dni1_process */
diff --git a/drivers/isdn/hisax/lmgr.c b/drivers/isdn/hisax/lmgr.c
index d4f86d654de0..5b63eb6601aa 100644
--- a/drivers/isdn/hisax/lmgr.c
+++ b/drivers/isdn/hisax/lmgr.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -16,12 +16,12 @@ static void
16error_handling_dchan(struct PStack *st, int Error) 16error_handling_dchan(struct PStack *st, int Error)
17{ 17{
18 switch (Error) { 18 switch (Error) {
19 case 'C': 19 case 'C':
20 case 'D': 20 case 'D':
21 case 'G': 21 case 'G':
22 case 'H': 22 case 'H':
23 st->l2.l2tei(st, MDL_ERROR | REQUEST, NULL); 23 st->l2.l2tei(st, MDL_ERROR | REQUEST, NULL);
24 break; 24 break;
25 } 25 }
26} 26}
27 27
@@ -31,15 +31,15 @@ hisax_manager(struct PStack *st, int pr, void *arg)
31 long Code; 31 long Code;
32 32
33 switch (pr) { 33 switch (pr) {
34 case (MDL_ERROR | INDICATION): 34 case (MDL_ERROR | INDICATION):
35 Code = (long) arg; 35 Code = (long) arg;
36 HiSax_putstatus(st->l1.hardware, "manager: MDL_ERROR", 36 HiSax_putstatus(st->l1.hardware, "manager: MDL_ERROR",
37 " %c %s", (char)Code, 37 " %c %s", (char)Code,
38 test_bit(FLG_LAPD, &st->l2.flag) ? 38 test_bit(FLG_LAPD, &st->l2.flag) ?
39 "D-channel" : "B-channel"); 39 "D-channel" : "B-channel");
40 if (test_bit(FLG_LAPD, &st->l2.flag)) 40 if (test_bit(FLG_LAPD, &st->l2.flag))
41 error_handling_dchan(st, Code); 41 error_handling_dchan(st, Code);
42 break; 42 break;
43 } 43 }
44} 44}
45 45
diff --git a/drivers/isdn/hisax/mic.c b/drivers/isdn/hisax/mic.c
index 253943029d25..08a6b7fb17f7 100644
--- a/drivers/isdn/hisax/mic.c
+++ b/drivers/isdn/hisax/mic.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Stephan von Krawczynski 5 * Author Stephan von Krawczynski
6 * Copyright by Stephan von Krawczynski <skraw@ithnet.com> 6 * Copyright by Stephan von Krawczynski <skraw@ithnet.com>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -18,7 +18,7 @@
18 18
19static const char *mic_revision = "$Revision: 1.12.2.4 $"; 19static const char *mic_revision = "$Revision: 1.12.2.4 $";
20 20
21#define byteout(addr,val) outb(val,addr) 21#define byteout(addr, val) outb(val, addr)
22#define bytein(addr) inb(addr) 22#define bytein(addr) inb(addr)
23 23
24#define MIC_ISAC 2 24#define MIC_ISAC 2
@@ -39,7 +39,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
39} 39}
40 40
41static inline void 41static inline void
42readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 42readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
43{ 43{
44 byteout(ale, off); 44 byteout(ale, off);
45 insb(adr, data, size); 45 insb(adr, data, size);
@@ -54,7 +54,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
54} 54}
55 55
56static inline void 56static inline void
57writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 57writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
58{ 58{
59 byteout(ale, off); 59 byteout(ale, off);
60 outsb(adr, data, size); 60 outsb(adr, data, size);
@@ -75,13 +75,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
75} 75}
76 76
77static void 77static void
78ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 78ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
79{ 79{
80 readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); 80 readfifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);
81} 81}
82 82
83static void 83static void
84WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 84WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
85{ 85{
86 writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size); 86 writefifo(cs->hw.mic.adr, cs->hw.mic.isac, 0, data, size);
87} 87}
@@ -104,16 +104,16 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
104 * fast interrupt HSCX stuff goes here 104 * fast interrupt HSCX stuff goes here
105 */ 105 */
106 106
107#define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \ 107#define READHSCX(cs, nr, reg) readreg(cs->hw.mic.adr, \
108 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0)) 108 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0))
109#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \ 109#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.mic.adr, \
110 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data) 110 cs->hw.mic.hscx, reg + (nr ? 0x40 : 0), data)
111 111
112#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \ 112#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.mic.adr, \
113 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt) 113 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
114 114
115#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \ 115#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.mic.adr, \
116 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt) 116 cs->hw.mic.hscx, (nr ? 0x40 : 0), ptr, cnt)
117 117
118#include "hscx_irq.c" 118#include "hscx_irq.c"
119 119
@@ -126,11 +126,11 @@ mic_interrupt(int intno, void *dev_id)
126 126
127 spin_lock_irqsave(&cs->lock, flags); 127 spin_lock_irqsave(&cs->lock, flags);
128 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); 128 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
129 Start_HSCX: 129Start_HSCX:
130 if (val) 130 if (val)
131 hscx_int_main(cs, val); 131 hscx_int_main(cs, val);
132 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA); 132 val = readreg(cs->hw.mic.adr, cs->hw.mic.isac, ISAC_ISTA);
133 Start_ISAC: 133Start_ISAC:
134 if (val) 134 if (val)
135 isac_interrupt(cs, val); 135 isac_interrupt(cs, val);
136 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40); 136 val = readreg(cs->hw.mic.adr, cs->hw.mic.hscx, HSCX_ISTA + 0x40);
@@ -170,21 +170,21 @@ mic_card_msg(struct IsdnCardState *cs, int mt, void *arg)
170 u_long flags; 170 u_long flags;
171 171
172 switch (mt) { 172 switch (mt) {
173 case CARD_RESET: 173 case CARD_RESET:
174 return(0); 174 return (0);
175 case CARD_RELEASE: 175 case CARD_RELEASE:
176 release_io_mic(cs); 176 release_io_mic(cs);
177 return(0); 177 return (0);
178 case CARD_INIT: 178 case CARD_INIT:
179 spin_lock_irqsave(&cs->lock, flags); 179 spin_lock_irqsave(&cs->lock, flags);
180 inithscx(cs); /* /RTSA := ISAC RST */ 180 inithscx(cs); /* /RTSA := ISAC RST */
181 inithscxisac(cs, 3); 181 inithscxisac(cs, 3);
182 spin_unlock_irqrestore(&cs->lock, flags); 182 spin_unlock_irqrestore(&cs->lock, flags);
183 return(0); 183 return (0);
184 case CARD_TEST: 184 case CARD_TEST:
185 return(0); 185 return (0);
186 } 186 }
187 return(0); 187 return (0);
188} 188}
189 189
190int __devinit 190int __devinit
@@ -214,7 +214,7 @@ setup_mic(struct IsdnCard *card)
214 return (0); 214 return (0);
215 } 215 }
216 printk(KERN_INFO "mic: defined at 0x%x IRQ %d\n", 216 printk(KERN_INFO "mic: defined at 0x%x IRQ %d\n",
217 cs->hw.mic.cfg_reg, cs->irq); 217 cs->hw.mic.cfg_reg, cs->irq);
218 setup_isac(cs); 218 setup_isac(cs);
219 cs->readisac = &ReadISAC; 219 cs->readisac = &ReadISAC;
220 cs->writeisac = &WriteISAC; 220 cs->writeisac = &WriteISAC;
@@ -228,7 +228,7 @@ setup_mic(struct IsdnCard *card)
228 ISACVersion(cs, "mic:"); 228 ISACVersion(cs, "mic:");
229 if (HscxVersion(cs, "mic:")) { 229 if (HscxVersion(cs, "mic:")) {
230 printk(KERN_WARNING 230 printk(KERN_WARNING
231 "mic: wrong HSCX versions check IO address\n"); 231 "mic: wrong HSCX versions check IO address\n");
232 release_io_mic(cs); 232 release_io_mic(cs);
233 return (0); 233 return (0);
234 } 234 }
diff --git a/drivers/isdn/hisax/netjet.c b/drivers/isdn/hisax/netjet.c
index 644891efc26f..b646eed379df 100644
--- a/drivers/isdn/hisax/netjet.c
+++ b/drivers/isdn/hisax/netjet.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -31,21 +31,21 @@ u_char
31NETjet_ReadIC(struct IsdnCardState *cs, u_char offset) 31NETjet_ReadIC(struct IsdnCardState *cs, u_char offset)
32{ 32{
33 u_char ret; 33 u_char ret;
34 34
35 cs->hw.njet.auxd &= 0xfc; 35 cs->hw.njet.auxd &= 0xfc;
36 cs->hw.njet.auxd |= (offset>>4) & 3; 36 cs->hw.njet.auxd |= (offset >> 4) & 3;
37 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 37 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
38 ret = bytein(cs->hw.njet.isac + ((offset & 0xf)<<2)); 38 ret = bytein(cs->hw.njet.isac + ((offset & 0xf) << 2));
39 return(ret); 39 return (ret);
40} 40}
41 41
42void 42void
43NETjet_WriteIC(struct IsdnCardState *cs, u_char offset, u_char value) 43NETjet_WriteIC(struct IsdnCardState *cs, u_char offset, u_char value)
44{ 44{
45 cs->hw.njet.auxd &= 0xfc; 45 cs->hw.njet.auxd &= 0xfc;
46 cs->hw.njet.auxd |= (offset>>4) & 3; 46 cs->hw.njet.auxd |= (offset >> 4) & 3;
47 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 47 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
48 byteout(cs->hw.njet.isac + ((offset & 0xf)<<2), value); 48 byteout(cs->hw.njet.isac + ((offset & 0xf) << 2), value);
49} 49}
50 50
51void 51void
@@ -56,7 +56,7 @@ NETjet_ReadICfifo(struct IsdnCardState *cs, u_char *data, int size)
56 insb(cs->hw.njet.isac, data, size); 56 insb(cs->hw.njet.isac, data, size);
57} 57}
58 58
59void 59void
60NETjet_WriteICfifo(struct IsdnCardState *cs, u_char *data, int size) 60NETjet_WriteICfifo(struct IsdnCardState *cs, u_char *data, int size)
61{ 61{
62 cs->hw.njet.auxd &= 0xfc; 62 cs->hw.njet.auxd &= 0xfc;
@@ -66,17 +66,17 @@ NETjet_WriteICfifo(struct IsdnCardState *cs, u_char *data, int size)
66 66
67static void fill_mem(struct BCState *bcs, u_int *pos, u_int cnt, int chan, u_char fill) 67static void fill_mem(struct BCState *bcs, u_int *pos, u_int cnt, int chan, u_char fill)
68{ 68{
69 u_int mask=0x000000ff, val = 0, *p=pos; 69 u_int mask = 0x000000ff, val = 0, *p = pos;
70 u_int i; 70 u_int i;
71 71
72 val |= fill; 72 val |= fill;
73 if (chan) { 73 if (chan) {
74 val <<= 8; 74 val <<= 8;
75 mask <<= 8; 75 mask <<= 8;
76 } 76 }
77 mask ^= 0xffffffff; 77 mask ^= 0xffffffff;
78 for (i=0; i<cnt; i++) { 78 for (i = 0; i < cnt; i++) {
79 *p &= mask; 79 *p &= mask;
80 *p++ |= val; 80 *p++ |= val;
81 if (p > bcs->hw.tiger.s_end) 81 if (p > bcs->hw.tiger.s_end)
82 p = bcs->hw.tiger.send; 82 p = bcs->hw.tiger.send;
@@ -87,7 +87,7 @@ static void
87mode_tiger(struct BCState *bcs, int mode, int bc) 87mode_tiger(struct BCState *bcs, int mode, int bc)
88{ 88{
89 struct IsdnCardState *cs = bcs->cs; 89 struct IsdnCardState *cs = bcs->cs;
90 u_char led; 90 u_char led;
91 91
92 if (cs->debug & L1_DEB_HSCX) 92 if (cs->debug & L1_DEB_HSCX)
93 debugl1(cs, "Tiger mode %d bchan %d/%d", 93 debugl1(cs, "Tiger mode %d bchan %d/%d",
@@ -95,63 +95,63 @@ mode_tiger(struct BCState *bcs, int mode, int bc)
95 bcs->mode = mode; 95 bcs->mode = mode;
96 bcs->channel = bc; 96 bcs->channel = bc;
97 switch (mode) { 97 switch (mode) {
98 case (L1_MODE_NULL): 98 case (L1_MODE_NULL):
99 fill_mem(bcs, bcs->hw.tiger.send, 99 fill_mem(bcs, bcs->hw.tiger.send,
100 NETJET_DMA_TXSIZE, bc, 0xff); 100 NETJET_DMA_TXSIZE, bc, 0xff);
101 if (cs->debug & L1_DEB_HSCX) 101 if (cs->debug & L1_DEB_HSCX)
102 debugl1(cs, "Tiger stat rec %d/%d send %d", 102 debugl1(cs, "Tiger stat rec %d/%d send %d",
103 bcs->hw.tiger.r_tot, bcs->hw.tiger.r_err, 103 bcs->hw.tiger.r_tot, bcs->hw.tiger.r_err,
104 bcs->hw.tiger.s_tot); 104 bcs->hw.tiger.s_tot);
105 if ((cs->bcs[0].mode == L1_MODE_NULL) && 105 if ((cs->bcs[0].mode == L1_MODE_NULL) &&
106 (cs->bcs[1].mode == L1_MODE_NULL)) { 106 (cs->bcs[1].mode == L1_MODE_NULL)) {
107 cs->hw.njet.dmactrl = 0; 107 cs->hw.njet.dmactrl = 0;
108 byteout(cs->hw.njet.base + NETJET_DMACTRL, 108 byteout(cs->hw.njet.base + NETJET_DMACTRL,
109 cs->hw.njet.dmactrl); 109 cs->hw.njet.dmactrl);
110 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0); 110 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0);
111 } 111 }
112 if (cs->typ == ISDN_CTYPE_NETJET_S) 112 if (cs->typ == ISDN_CTYPE_NETJET_S)
113 { 113 {
114 // led off 114 // led off
115 led = bc & 0x01; 115 led = bc & 0x01;
116 led = 0x01 << (6 + led); // convert to mask 116 led = 0x01 << (6 + led); // convert to mask
117 led = ~led; 117 led = ~led;
118 cs->hw.njet.auxd &= led; 118 cs->hw.njet.auxd &= led;
119 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 119 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
120 } 120 }
121 break; 121 break;
122 case (L1_MODE_TRANS): 122 case (L1_MODE_TRANS):
123 break; 123 break;
124 case (L1_MODE_HDLC_56K): 124 case (L1_MODE_HDLC_56K):
125 case (L1_MODE_HDLC): 125 case (L1_MODE_HDLC):
126 fill_mem(bcs, bcs->hw.tiger.send,
127 NETJET_DMA_TXSIZE, bc, 0xff);
128 bcs->hw.tiger.r_state = HDLC_ZERO_SEARCH;
129 bcs->hw.tiger.r_tot = 0;
130 bcs->hw.tiger.r_bitcnt = 0;
131 bcs->hw.tiger.r_one = 0;
132 bcs->hw.tiger.r_err = 0;
133 bcs->hw.tiger.s_tot = 0;
134 if (!cs->hw.njet.dmactrl) {
126 fill_mem(bcs, bcs->hw.tiger.send, 135 fill_mem(bcs, bcs->hw.tiger.send,
127 NETJET_DMA_TXSIZE, bc, 0xff); 136 NETJET_DMA_TXSIZE, !bc, 0xff);
128 bcs->hw.tiger.r_state = HDLC_ZERO_SEARCH; 137 cs->hw.njet.dmactrl = 1;
129 bcs->hw.tiger.r_tot = 0; 138 byteout(cs->hw.njet.base + NETJET_DMACTRL,
130 bcs->hw.tiger.r_bitcnt = 0; 139 cs->hw.njet.dmactrl);
131 bcs->hw.tiger.r_one = 0; 140 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0x0f);
132 bcs->hw.tiger.r_err = 0;
133 bcs->hw.tiger.s_tot = 0;
134 if (! cs->hw.njet.dmactrl) {
135 fill_mem(bcs, bcs->hw.tiger.send,
136 NETJET_DMA_TXSIZE, !bc, 0xff);
137 cs->hw.njet.dmactrl = 1;
138 byteout(cs->hw.njet.base + NETJET_DMACTRL,
139 cs->hw.njet.dmactrl);
140 byteout(cs->hw.njet.base + NETJET_IRQMASK0, 0x0f);
141 /* was 0x3f now 0x0f for TJ300 and TJ320 GE 13/07/00 */ 141 /* was 0x3f now 0x0f for TJ300 and TJ320 GE 13/07/00 */
142 } 142 }
143 bcs->hw.tiger.sendp = bcs->hw.tiger.send; 143 bcs->hw.tiger.sendp = bcs->hw.tiger.send;
144 bcs->hw.tiger.free = NETJET_DMA_TXSIZE; 144 bcs->hw.tiger.free = NETJET_DMA_TXSIZE;
145 test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag); 145 test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
146 if (cs->typ == ISDN_CTYPE_NETJET_S) 146 if (cs->typ == ISDN_CTYPE_NETJET_S)
147 { 147 {
148 // led on 148 // led on
149 led = bc & 0x01; 149 led = bc & 0x01;
150 led = 0x01 << (6 + led); // convert to mask 150 led = 0x01 << (6 + led); // convert to mask
151 cs->hw.njet.auxd |= led; 151 cs->hw.njet.auxd |= led;
152 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 152 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
153 } 153 }
154 break; 154 break;
155 } 155 }
156 if (cs->debug & L1_DEB_HSCX) 156 if (cs->debug & L1_DEB_HSCX)
157 debugl1(cs, "tiger: set %x %x %x %x/%x pulse=%d", 157 debugl1(cs, "tiger: set %x %x %x %x/%x pulse=%d",
@@ -166,15 +166,15 @@ mode_tiger(struct BCState *bcs, int mode, int bc)
166static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s) { 166static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s) {
167 char tmp[128]; 167 char tmp[128];
168 char *t = tmp; 168 char *t = tmp;
169 int i=count,j; 169 int i = count, j;
170 u_char *p = buf; 170 u_char *p = buf;
171 171
172 t += sprintf(t, "tiger %s(%4d)", s, count); 172 t += sprintf(t, "tiger %s(%4d)", s, count);
173 while (i>0) { 173 while (i > 0) {
174 if (i>16) 174 if (i > 16)
175 j=16; 175 j = 16;
176 else 176 else
177 j=i; 177 j = i;
178 QuickHex(t, p, j); 178 QuickHex(t, p, j);
179 debugl1(cs, tmp); 179 debugl1(cs, tmp);
180 p += j; 180 p += j;
@@ -186,78 +186,78 @@ static void printframe(struct IsdnCardState *cs, u_char *buf, int count, char *s
186 186
187// macro for 64k 187// macro for 64k
188 188
189#define MAKE_RAW_BYTE for (j=0; j<8; j++) { \ 189#define MAKE_RAW_BYTE for (j = 0; j < 8; j++) { \
190 bitcnt++;\ 190 bitcnt++; \
191 s_val >>= 1;\ 191 s_val >>= 1; \
192 if (val & 1) {\ 192 if (val & 1) { \
193 s_one++;\ 193 s_one++; \
194 s_val |= 0x80;\ 194 s_val |= 0x80; \
195 } else {\ 195 } else { \
196 s_one = 0;\ 196 s_one = 0; \
197 s_val &= 0x7f;\ 197 s_val &= 0x7f; \
198 }\ 198 } \
199 if (bitcnt==8) {\ 199 if (bitcnt == 8) { \
200 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\ 200 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
201 bitcnt = 0;\ 201 bitcnt = 0; \
202 }\ 202 } \
203 if (s_one == 5) {\ 203 if (s_one == 5) { \
204 s_val >>= 1;\ 204 s_val >>= 1; \
205 s_val &= 0x7f;\ 205 s_val &= 0x7f; \
206 bitcnt++;\ 206 bitcnt++; \
207 s_one = 0;\ 207 s_one = 0; \
208 }\ 208 } \
209 if (bitcnt==8) {\ 209 if (bitcnt == 8) { \
210 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\ 210 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
211 bitcnt = 0;\ 211 bitcnt = 0; \
212 }\ 212 } \
213 val >>= 1;\ 213 val >>= 1; \
214 } 214 }
215 215
216static int make_raw_data(struct BCState *bcs) { 216static int make_raw_data(struct BCState *bcs) {
217// this make_raw is for 64k 217// this make_raw is for 64k
218 register u_int i,s_cnt=0; 218 register u_int i, s_cnt = 0;
219 register u_char j; 219 register u_char j;
220 register u_char val; 220 register u_char val;
221 register u_char s_one = 0; 221 register u_char s_one = 0;
222 register u_char s_val = 0; 222 register u_char s_val = 0;
223 register u_char bitcnt = 0; 223 register u_char bitcnt = 0;
224 u_int fcs; 224 u_int fcs;
225 225
226 if (!bcs->tx_skb) { 226 if (!bcs->tx_skb) {
227 debugl1(bcs->cs, "tiger make_raw: NULL skb"); 227 debugl1(bcs->cs, "tiger make_raw: NULL skb");
228 return(1); 228 return (1);
229 } 229 }
230 bcs->hw.tiger.sendbuf[s_cnt++] = HDLC_FLAG_VALUE; 230 bcs->hw.tiger.sendbuf[s_cnt++] = HDLC_FLAG_VALUE;
231 fcs = PPP_INITFCS; 231 fcs = PPP_INITFCS;
232 for (i=0; i<bcs->tx_skb->len; i++) { 232 for (i = 0; i < bcs->tx_skb->len; i++) {
233 val = bcs->tx_skb->data[i]; 233 val = bcs->tx_skb->data[i];
234 fcs = PPP_FCS (fcs, val); 234 fcs = PPP_FCS(fcs, val);
235 MAKE_RAW_BYTE; 235 MAKE_RAW_BYTE;
236 } 236 }
237 fcs ^= 0xffff; 237 fcs ^= 0xffff;
238 val = fcs & 0xff; 238 val = fcs & 0xff;
239 MAKE_RAW_BYTE; 239 MAKE_RAW_BYTE;
240 val = (fcs>>8) & 0xff; 240 val = (fcs >> 8) & 0xff;
241 MAKE_RAW_BYTE; 241 MAKE_RAW_BYTE;
242 val = HDLC_FLAG_VALUE; 242 val = HDLC_FLAG_VALUE;
243 for (j=0; j<8; j++) { 243 for (j = 0; j < 8; j++) {
244 bitcnt++; 244 bitcnt++;
245 s_val >>= 1; 245 s_val >>= 1;
246 if (val & 1) 246 if (val & 1)
247 s_val |= 0x80; 247 s_val |= 0x80;
248 else 248 else
249 s_val &= 0x7f; 249 s_val &= 0x7f;
250 if (bitcnt==8) { 250 if (bitcnt == 8) {
251 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; 251 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
252 bitcnt = 0; 252 bitcnt = 0;
253 } 253 }
254 val >>= 1; 254 val >>= 1;
255 } 255 }
256 if (bcs->cs->debug & L1_DEB_HSCX) 256 if (bcs->cs->debug & L1_DEB_HSCX)
257 debugl1(bcs->cs,"tiger make_raw: in %u out %d.%d", 257 debugl1(bcs->cs, "tiger make_raw: in %u out %d.%d",
258 bcs->tx_skb->len, s_cnt, bitcnt); 258 bcs->tx_skb->len, s_cnt, bitcnt);
259 if (bitcnt) { 259 if (bitcnt) {
260 while (8>bitcnt++) { 260 while (8 > bitcnt++) {
261 s_val >>= 1; 261 s_val >>= 1;
262 s_val |= 0x80; 262 s_val |= 0x80;
263 } 263 }
@@ -267,65 +267,65 @@ static int make_raw_data(struct BCState *bcs) {
267 bcs->hw.tiger.sendcnt = s_cnt; 267 bcs->hw.tiger.sendcnt = s_cnt;
268 bcs->tx_cnt -= bcs->tx_skb->len; 268 bcs->tx_cnt -= bcs->tx_skb->len;
269 bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf; 269 bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
270 return(0); 270 return (0);
271} 271}
272 272
273// macro for 56k 273// macro for 56k
274 274
275#define MAKE_RAW_BYTE_56K for (j=0; j<8; j++) { \ 275#define MAKE_RAW_BYTE_56K for (j = 0; j < 8; j++) { \
276 bitcnt++;\ 276 bitcnt++; \
277 s_val >>= 1;\ 277 s_val >>= 1; \
278 if (val & 1) {\ 278 if (val & 1) { \
279 s_one++;\ 279 s_one++; \
280 s_val |= 0x80;\ 280 s_val |= 0x80; \
281 } else {\ 281 } else { \
282 s_one = 0;\ 282 s_one = 0; \
283 s_val &= 0x7f;\ 283 s_val &= 0x7f; \
284 }\ 284 } \
285 if (bitcnt==7) {\ 285 if (bitcnt == 7) { \
286 s_val >>= 1;\ 286 s_val >>= 1; \
287 s_val |= 0x80;\ 287 s_val |= 0x80; \
288 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\ 288 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
289 bitcnt = 0;\ 289 bitcnt = 0; \
290 }\ 290 } \
291 if (s_one == 5) {\ 291 if (s_one == 5) { \
292 s_val >>= 1;\ 292 s_val >>= 1; \
293 s_val &= 0x7f;\ 293 s_val &= 0x7f; \
294 bitcnt++;\ 294 bitcnt++; \
295 s_one = 0;\ 295 s_one = 0; \
296 }\ 296 } \
297 if (bitcnt==7) {\ 297 if (bitcnt == 7) { \
298 s_val >>= 1;\ 298 s_val >>= 1; \
299 s_val |= 0x80;\ 299 s_val |= 0x80; \
300 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;\ 300 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; \
301 bitcnt = 0;\ 301 bitcnt = 0; \
302 }\ 302 } \
303 val >>= 1;\ 303 val >>= 1; \
304 } 304 }
305 305
306static int make_raw_data_56k(struct BCState *bcs) { 306static int make_raw_data_56k(struct BCState *bcs) {
307// this make_raw is for 56k 307// this make_raw is for 56k
308 register u_int i,s_cnt=0; 308 register u_int i, s_cnt = 0;
309 register u_char j; 309 register u_char j;
310 register u_char val; 310 register u_char val;
311 register u_char s_one = 0; 311 register u_char s_one = 0;
312 register u_char s_val = 0; 312 register u_char s_val = 0;
313 register u_char bitcnt = 0; 313 register u_char bitcnt = 0;
314 u_int fcs; 314 u_int fcs;
315 315
316 if (!bcs->tx_skb) { 316 if (!bcs->tx_skb) {
317 debugl1(bcs->cs, "tiger make_raw_56k: NULL skb"); 317 debugl1(bcs->cs, "tiger make_raw_56k: NULL skb");
318 return(1); 318 return (1);
319 } 319 }
320 val = HDLC_FLAG_VALUE; 320 val = HDLC_FLAG_VALUE;
321 for (j=0; j<8; j++) { 321 for (j = 0; j < 8; j++) {
322 bitcnt++; 322 bitcnt++;
323 s_val >>= 1; 323 s_val >>= 1;
324 if (val & 1) 324 if (val & 1)
325 s_val |= 0x80; 325 s_val |= 0x80;
326 else 326 else
327 s_val &= 0x7f; 327 s_val &= 0x7f;
328 if (bitcnt==7) { 328 if (bitcnt == 7) {
329 s_val >>= 1; 329 s_val >>= 1;
330 s_val |= 0x80; 330 s_val |= 0x80;
331 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; 331 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
@@ -334,25 +334,25 @@ static int make_raw_data_56k(struct BCState *bcs) {
334 val >>= 1; 334 val >>= 1;
335 }; 335 };
336 fcs = PPP_INITFCS; 336 fcs = PPP_INITFCS;
337 for (i=0; i<bcs->tx_skb->len; i++) { 337 for (i = 0; i < bcs->tx_skb->len; i++) {
338 val = bcs->tx_skb->data[i]; 338 val = bcs->tx_skb->data[i];
339 fcs = PPP_FCS (fcs, val); 339 fcs = PPP_FCS(fcs, val);
340 MAKE_RAW_BYTE_56K; 340 MAKE_RAW_BYTE_56K;
341 } 341 }
342 fcs ^= 0xffff; 342 fcs ^= 0xffff;
343 val = fcs & 0xff; 343 val = fcs & 0xff;
344 MAKE_RAW_BYTE_56K; 344 MAKE_RAW_BYTE_56K;
345 val = (fcs>>8) & 0xff; 345 val = (fcs >> 8) & 0xff;
346 MAKE_RAW_BYTE_56K; 346 MAKE_RAW_BYTE_56K;
347 val = HDLC_FLAG_VALUE; 347 val = HDLC_FLAG_VALUE;
348 for (j=0; j<8; j++) { 348 for (j = 0; j < 8; j++) {
349 bitcnt++; 349 bitcnt++;
350 s_val >>= 1; 350 s_val >>= 1;
351 if (val & 1) 351 if (val & 1)
352 s_val |= 0x80; 352 s_val |= 0x80;
353 else 353 else
354 s_val &= 0x7f; 354 s_val &= 0x7f;
355 if (bitcnt==7) { 355 if (bitcnt == 7) {
356 s_val >>= 1; 356 s_val >>= 1;
357 s_val |= 0x80; 357 s_val |= 0x80;
358 bcs->hw.tiger.sendbuf[s_cnt++] = s_val; 358 bcs->hw.tiger.sendbuf[s_cnt++] = s_val;
@@ -361,10 +361,10 @@ static int make_raw_data_56k(struct BCState *bcs) {
361 val >>= 1; 361 val >>= 1;
362 } 362 }
363 if (bcs->cs->debug & L1_DEB_HSCX) 363 if (bcs->cs->debug & L1_DEB_HSCX)
364 debugl1(bcs->cs,"tiger make_raw_56k: in %u out %d.%d", 364 debugl1(bcs->cs, "tiger make_raw_56k: in %u out %d.%d",
365 bcs->tx_skb->len, s_cnt, bitcnt); 365 bcs->tx_skb->len, s_cnt, bitcnt);
366 if (bitcnt) { 366 if (bitcnt) {
367 while (8>bitcnt++) { 367 while (8 > bitcnt++) {
368 s_val >>= 1; 368 s_val >>= 1;
369 s_val |= 0x80; 369 s_val |= 0x80;
370 } 370 }
@@ -374,12 +374,12 @@ static int make_raw_data_56k(struct BCState *bcs) {
374 bcs->hw.tiger.sendcnt = s_cnt; 374 bcs->hw.tiger.sendcnt = s_cnt;
375 bcs->tx_cnt -= bcs->tx_skb->len; 375 bcs->tx_cnt -= bcs->tx_skb->len;
376 bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf; 376 bcs->hw.tiger.sp = bcs->hw.tiger.sendbuf;
377 return(0); 377 return (0);
378} 378}
379 379
380static void got_frame(struct BCState *bcs, int count) { 380static void got_frame(struct BCState *bcs, int count) {
381 struct sk_buff *skb; 381 struct sk_buff *skb;
382 382
383 if (!(skb = dev_alloc_skb(count))) 383 if (!(skb = dev_alloc_skb(count)))
384 printk(KERN_WARNING "TIGER: receive out of memory\n"); 384 printk(KERN_WARNING "TIGER: receive out of memory\n");
385 else { 385 else {
@@ -388,18 +388,18 @@ static void got_frame(struct BCState *bcs, int count) {
388 } 388 }
389 test_and_set_bit(B_RCVBUFREADY, &bcs->event); 389 test_and_set_bit(B_RCVBUFREADY, &bcs->event);
390 schedule_work(&bcs->tqueue); 390 schedule_work(&bcs->tqueue);
391 391
392 if (bcs->cs->debug & L1_DEB_RECEIVE_FRAME) 392 if (bcs->cs->debug & L1_DEB_RECEIVE_FRAME)
393 printframe(bcs->cs, bcs->hw.tiger.rcvbuf, count, "rec"); 393 printframe(bcs->cs, bcs->hw.tiger.rcvbuf, count, "rec");
394} 394}
395 395
396 396
397 397
398static void read_raw(struct BCState *bcs, u_int *buf, int cnt){ 398static void read_raw(struct BCState *bcs, u_int *buf, int cnt) {
399 int i; 399 int i;
400 register u_char j; 400 register u_char j;
401 register u_char val; 401 register u_char val;
402 u_int *pend = bcs->hw.tiger.rec +NETJET_DMA_RXSIZE -1; 402 u_int *pend = bcs->hw.tiger.rec + NETJET_DMA_RXSIZE - 1;
403 register u_char state = bcs->hw.tiger.r_state; 403 register u_char state = bcs->hw.tiger.r_state;
404 register u_char r_one = bcs->hw.tiger.r_one; 404 register u_char r_one = bcs->hw.tiger.r_one;
405 register u_char r_val = bcs->hw.tiger.r_val; 405 register u_char r_val = bcs->hw.tiger.r_val;
@@ -408,7 +408,7 @@ static void read_raw(struct BCState *bcs, u_int *buf, int cnt){
408 int bits; 408 int bits;
409 u_char mask; 409 u_char mask;
410 410
411 if (bcs->mode == L1_MODE_HDLC) { // it's 64k 411 if (bcs->mode == L1_MODE_HDLC) { // it's 64k
412 mask = 0xff; 412 mask = 0xff;
413 bits = 8; 413 bits = 8;
414 } 414 }
@@ -416,8 +416,8 @@ static void read_raw(struct BCState *bcs, u_int *buf, int cnt){
416 mask = 0x7f; 416 mask = 0x7f;
417 bits = 7; 417 bits = 7;
418 }; 418 };
419 for (i=0;i<cnt;i++) { 419 for (i = 0; i < cnt; i++) {
420 val = bcs->channel ? ((*p>>8) & 0xff) : (*p & 0xff); 420 val = bcs->channel ? ((*p >> 8) & 0xff) : (*p & 0xff);
421 p++; 421 p++;
422 if (p > pend) 422 if (p > pend)
423 p = bcs->hw.tiger.rec; 423 p = bcs->hw.tiger.rec;
@@ -428,137 +428,137 @@ static void read_raw(struct BCState *bcs, u_int *buf, int cnt){
428 r_one = 0; 428 r_one = 0;
429 continue; 429 continue;
430 } 430 }
431 for (j=0;j<bits;j++) { 431 for (j = 0; j < bits; j++) {
432 if (state == HDLC_ZERO_SEARCH) { 432 if (state == HDLC_ZERO_SEARCH) {
433 if (val & 1) { 433 if (val & 1) {
434 r_one++; 434 r_one++;
435 } else { 435 } else {
436 r_one=0; 436 r_one = 0;
437 state= HDLC_FLAG_SEARCH; 437 state = HDLC_FLAG_SEARCH;
438 if (bcs->cs->debug & L1_DEB_HSCX) 438 if (bcs->cs->debug & L1_DEB_HSCX)
439 debugl1(bcs->cs,"tiger read_raw: zBit(%d,%d,%d) %x", 439 debugl1(bcs->cs, "tiger read_raw: zBit(%d,%d,%d) %x",
440 bcs->hw.tiger.r_tot,i,j,val); 440 bcs->hw.tiger.r_tot, i, j, val);
441 } 441 }
442 } else if (state == HDLC_FLAG_SEARCH) { 442 } else if (state == HDLC_FLAG_SEARCH) {
443 if (val & 1) { 443 if (val & 1) {
444 r_one++; 444 r_one++;
445 if (r_one>6) { 445 if (r_one > 6) {
446 state=HDLC_ZERO_SEARCH; 446 state = HDLC_ZERO_SEARCH;
447 } 447 }
448 } else { 448 } else {
449 if (r_one==6) { 449 if (r_one == 6) {
450 bitcnt=0; 450 bitcnt = 0;
451 r_val=0; 451 r_val = 0;
452 state=HDLC_FLAG_FOUND; 452 state = HDLC_FLAG_FOUND;
453 if (bcs->cs->debug & L1_DEB_HSCX) 453 if (bcs->cs->debug & L1_DEB_HSCX)
454 debugl1(bcs->cs,"tiger read_raw: flag(%d,%d,%d) %x", 454 debugl1(bcs->cs, "tiger read_raw: flag(%d,%d,%d) %x",
455 bcs->hw.tiger.r_tot,i,j,val); 455 bcs->hw.tiger.r_tot, i, j, val);
456 } 456 }
457 r_one=0; 457 r_one = 0;
458 } 458 }
459 } else if (state == HDLC_FLAG_FOUND) { 459 } else if (state == HDLC_FLAG_FOUND) {
460 if (val & 1) { 460 if (val & 1) {
461 r_one++; 461 r_one++;
462 if (r_one>6) { 462 if (r_one > 6) {
463 state=HDLC_ZERO_SEARCH; 463 state = HDLC_ZERO_SEARCH;
464 } else { 464 } else {
465 r_val >>= 1; 465 r_val >>= 1;
466 r_val |= 0x80; 466 r_val |= 0x80;
467 bitcnt++; 467 bitcnt++;
468 } 468 }
469 } else { 469 } else {
470 if (r_one==6) { 470 if (r_one == 6) {
471 bitcnt=0; 471 bitcnt = 0;
472 r_val=0; 472 r_val = 0;
473 r_one=0; 473 r_one = 0;
474 val >>= 1; 474 val >>= 1;
475 continue; 475 continue;
476 } else if (r_one!=5) { 476 } else if (r_one != 5) {
477 r_val >>= 1; 477 r_val >>= 1;
478 r_val &= 0x7f; 478 r_val &= 0x7f;
479 bitcnt++; 479 bitcnt++;
480 } 480 }
481 r_one=0; 481 r_one = 0;
482 } 482 }
483 if ((state != HDLC_ZERO_SEARCH) && 483 if ((state != HDLC_ZERO_SEARCH) &&
484 !(bitcnt & 7)) { 484 !(bitcnt & 7)) {
485 state=HDLC_FRAME_FOUND; 485 state = HDLC_FRAME_FOUND;
486 bcs->hw.tiger.r_fcs = PPP_INITFCS; 486 bcs->hw.tiger.r_fcs = PPP_INITFCS;
487 bcs->hw.tiger.rcvbuf[0] = r_val; 487 bcs->hw.tiger.rcvbuf[0] = r_val;
488 bcs->hw.tiger.r_fcs = PPP_FCS (bcs->hw.tiger.r_fcs, r_val); 488 bcs->hw.tiger.r_fcs = PPP_FCS(bcs->hw.tiger.r_fcs, r_val);
489 if (bcs->cs->debug & L1_DEB_HSCX) 489 if (bcs->cs->debug & L1_DEB_HSCX)
490 debugl1(bcs->cs,"tiger read_raw: byte1(%d,%d,%d) rval %x val %x i %x", 490 debugl1(bcs->cs, "tiger read_raw: byte1(%d,%d,%d) rval %x val %x i %x",
491 bcs->hw.tiger.r_tot,i,j,r_val,val, 491 bcs->hw.tiger.r_tot, i, j, r_val, val,
492 bcs->cs->hw.njet.irqstat0); 492 bcs->cs->hw.njet.irqstat0);
493 } 493 }
494 } else if (state == HDLC_FRAME_FOUND) { 494 } else if (state == HDLC_FRAME_FOUND) {
495 if (val & 1) { 495 if (val & 1) {
496 r_one++; 496 r_one++;
497 if (r_one>6) { 497 if (r_one > 6) {
498 state=HDLC_ZERO_SEARCH; 498 state = HDLC_ZERO_SEARCH;
499 bitcnt=0; 499 bitcnt = 0;
500 } else { 500 } else {
501 r_val >>= 1; 501 r_val >>= 1;
502 r_val |= 0x80; 502 r_val |= 0x80;
503 bitcnt++; 503 bitcnt++;
504 } 504 }
505 } else { 505 } else {
506 if (r_one==6) { 506 if (r_one == 6) {
507 r_val=0; 507 r_val = 0;
508 r_one=0; 508 r_one = 0;
509 bitcnt++; 509 bitcnt++;
510 if (bitcnt & 7) { 510 if (bitcnt & 7) {
511 debugl1(bcs->cs, "tiger: frame not byte aligned"); 511 debugl1(bcs->cs, "tiger: frame not byte aligned");
512 state=HDLC_FLAG_SEARCH; 512 state = HDLC_FLAG_SEARCH;
513 bcs->hw.tiger.r_err++; 513 bcs->hw.tiger.r_err++;
514#ifdef ERROR_STATISTIC 514#ifdef ERROR_STATISTIC
515 bcs->err_inv++; 515 bcs->err_inv++;
516#endif 516#endif
517 } else { 517 } else {
518 if (bcs->cs->debug & L1_DEB_HSCX) 518 if (bcs->cs->debug & L1_DEB_HSCX)
519 debugl1(bcs->cs,"tiger frame end(%d,%d): fcs(%x) i %x", 519 debugl1(bcs->cs, "tiger frame end(%d,%d): fcs(%x) i %x",
520 i,j,bcs->hw.tiger.r_fcs, bcs->cs->hw.njet.irqstat0); 520 i, j, bcs->hw.tiger.r_fcs, bcs->cs->hw.njet.irqstat0);
521 if (bcs->hw.tiger.r_fcs == PPP_GOODFCS) { 521 if (bcs->hw.tiger.r_fcs == PPP_GOODFCS) {
522 got_frame(bcs, (bitcnt>>3)-3); 522 got_frame(bcs, (bitcnt >> 3) - 3);
523 } else { 523 } else {
524 if (bcs->cs->debug) { 524 if (bcs->cs->debug) {
525 debugl1(bcs->cs, "tiger FCS error"); 525 debugl1(bcs->cs, "tiger FCS error");
526 printframe(bcs->cs, bcs->hw.tiger.rcvbuf, 526 printframe(bcs->cs, bcs->hw.tiger.rcvbuf,
527 (bitcnt>>3)-1, "rec"); 527 (bitcnt >> 3) - 1, "rec");
528 bcs->hw.tiger.r_err++; 528 bcs->hw.tiger.r_err++;
529 } 529 }
530#ifdef ERROR_STATISTIC 530#ifdef ERROR_STATISTIC
531 bcs->err_crc++; 531 bcs->err_crc++;
532#endif 532#endif
533 } 533 }
534 state=HDLC_FLAG_FOUND; 534 state = HDLC_FLAG_FOUND;
535 } 535 }
536 bitcnt=0; 536 bitcnt = 0;
537 } else if (r_one==5) { 537 } else if (r_one == 5) {
538 val >>= 1; 538 val >>= 1;
539 r_one=0; 539 r_one = 0;
540 continue; 540 continue;
541 } else { 541 } else {
542 r_val >>= 1; 542 r_val >>= 1;
543 r_val &= 0x7f; 543 r_val &= 0x7f;
544 bitcnt++; 544 bitcnt++;
545 } 545 }
546 r_one=0; 546 r_one = 0;
547 } 547 }
548 if ((state == HDLC_FRAME_FOUND) && 548 if ((state == HDLC_FRAME_FOUND) &&
549 !(bitcnt & 7)) { 549 !(bitcnt & 7)) {
550 if ((bitcnt>>3)>=HSCX_BUFMAX) { 550 if ((bitcnt >> 3) >= HSCX_BUFMAX) {
551 debugl1(bcs->cs, "tiger: frame too big"); 551 debugl1(bcs->cs, "tiger: frame too big");
552 r_val=0; 552 r_val = 0;
553 state=HDLC_FLAG_SEARCH; 553 state = HDLC_FLAG_SEARCH;
554 bcs->hw.tiger.r_err++; 554 bcs->hw.tiger.r_err++;
555#ifdef ERROR_STATISTIC 555#ifdef ERROR_STATISTIC
556 bcs->err_inv++; 556 bcs->err_inv++;
557#endif 557#endif
558 } else { 558 } else {
559 bcs->hw.tiger.rcvbuf[(bitcnt>>3)-1] = r_val; 559 bcs->hw.tiger.rcvbuf[(bitcnt >> 3) - 1] = r_val;
560 bcs->hw.tiger.r_fcs = 560 bcs->hw.tiger.r_fcs =
561 PPP_FCS (bcs->hw.tiger.r_fcs, r_val); 561 PPP_FCS(bcs->hw.tiger.r_fcs, r_val);
562 } 562 }
563 } 563 }
564 } 564 }
@@ -574,10 +574,10 @@ static void read_raw(struct BCState *bcs, u_int *buf, int cnt){
574 574
575void read_tiger(struct IsdnCardState *cs) { 575void read_tiger(struct IsdnCardState *cs) {
576 u_int *p; 576 u_int *p;
577 int cnt = NETJET_DMA_RXSIZE/2; 577 int cnt = NETJET_DMA_RXSIZE / 2;
578 578
579 if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_READ) { 579 if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_READ) {
580 debugl1(cs,"tiger warn read double dma %x/%x", 580 debugl1(cs, "tiger warn read double dma %x/%x",
581 cs->hw.njet.irqstat0, cs->hw.njet.last_is0); 581 cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
582#ifdef ERROR_STATISTIC 582#ifdef ERROR_STATISTIC
583 if (cs->bcs[0].mode) 583 if (cs->bcs[0].mode)
@@ -589,7 +589,7 @@ void read_tiger(struct IsdnCardState *cs) {
589 } else { 589 } else {
590 cs->hw.njet.last_is0 &= ~NETJET_IRQM0_READ; 590 cs->hw.njet.last_is0 &= ~NETJET_IRQM0_READ;
591 cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ); 591 cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ);
592 } 592 }
593 if (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ_1) 593 if (cs->hw.njet.irqstat0 & NETJET_IRQM0_READ_1)
594 p = cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1; 594 p = cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1;
595 else 595 else
@@ -612,20 +612,20 @@ void netjet_fill_dma(struct BCState *bcs)
612 if (!bcs->tx_skb) 612 if (!bcs->tx_skb)
613 return; 613 return;
614 if (bcs->cs->debug & L1_DEB_HSCX) 614 if (bcs->cs->debug & L1_DEB_HSCX)
615 debugl1(bcs->cs,"tiger fill_dma1: c%d %4lx", bcs->channel, 615 debugl1(bcs->cs, "tiger fill_dma1: c%d %4lx", bcs->channel,
616 bcs->Flag); 616 bcs->Flag);
617 if (test_and_set_bit(BC_FLG_BUSY, &bcs->Flag)) 617 if (test_and_set_bit(BC_FLG_BUSY, &bcs->Flag))
618 return; 618 return;
619 if (bcs->mode == L1_MODE_HDLC) { // it's 64k 619 if (bcs->mode == L1_MODE_HDLC) { // it's 64k
620 if (make_raw_data(bcs)) 620 if (make_raw_data(bcs))
621 return; 621 return;
622 } 622 }
623 else { // it's 56k 623 else { // it's 56k
624 if (make_raw_data_56k(bcs)) 624 if (make_raw_data_56k(bcs))
625 return; 625 return;
626 }; 626 };
627 if (bcs->cs->debug & L1_DEB_HSCX) 627 if (bcs->cs->debug & L1_DEB_HSCX)
628 debugl1(bcs->cs,"tiger fill_dma2: c%d %4lx", bcs->channel, 628 debugl1(bcs->cs, "tiger fill_dma2: c%d %4lx", bcs->channel,
629 bcs->Flag); 629 bcs->Flag);
630 if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) { 630 if (test_and_clear_bit(BC_FLG_NOFRAME, &bcs->Flag)) {
631 write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free); 631 write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
@@ -633,11 +633,11 @@ void netjet_fill_dma(struct BCState *bcs)
633 p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR)); 633 p = bus_to_virt(inl(bcs->cs->hw.njet.base + NETJET_DMA_READ_ADR));
634 sp = bcs->hw.tiger.sendp; 634 sp = bcs->hw.tiger.sendp;
635 if (p == bcs->hw.tiger.s_end) 635 if (p == bcs->hw.tiger.s_end)
636 p = bcs->hw.tiger.send -1; 636 p = bcs->hw.tiger.send - 1;
637 if (sp == bcs->hw.tiger.s_end) 637 if (sp == bcs->hw.tiger.s_end)
638 sp = bcs->hw.tiger.send -1; 638 sp = bcs->hw.tiger.send - 1;
639 cnt = p - sp; 639 cnt = p - sp;
640 if (cnt <0) { 640 if (cnt < 0) {
641 write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free); 641 write_raw(bcs, bcs->hw.tiger.sendp, bcs->hw.tiger.free);
642 } else { 642 } else {
643 p++; 643 p++;
@@ -655,30 +655,30 @@ void netjet_fill_dma(struct BCState *bcs)
655 cnt = bcs->hw.tiger.s_end - p; 655 cnt = bcs->hw.tiger.s_end - p;
656 if (cnt < 2) { 656 if (cnt < 2) {
657 p = bcs->hw.tiger.send + 1; 657 p = bcs->hw.tiger.send + 1;
658 cnt = NETJET_DMA_TXSIZE/2 - 2; 658 cnt = NETJET_DMA_TXSIZE / 2 - 2;
659 } else { 659 } else {
660 p++; 660 p++;
661 p++; 661 p++;
662 if (cnt <= (NETJET_DMA_TXSIZE/2)) 662 if (cnt <= (NETJET_DMA_TXSIZE / 2))
663 cnt += NETJET_DMA_TXSIZE/2; 663 cnt += NETJET_DMA_TXSIZE / 2;
664 cnt--; 664 cnt--;
665 cnt--; 665 cnt--;
666 } 666 }
667 write_raw(bcs, p, cnt); 667 write_raw(bcs, p, cnt);
668 } 668 }
669 if (bcs->cs->debug & L1_DEB_HSCX) 669 if (bcs->cs->debug & L1_DEB_HSCX)
670 debugl1(bcs->cs,"tiger fill_dma3: c%d %4lx", bcs->channel, 670 debugl1(bcs->cs, "tiger fill_dma3: c%d %4lx", bcs->channel,
671 bcs->Flag); 671 bcs->Flag);
672} 672}
673 673
674static void write_raw(struct BCState *bcs, u_int *buf, int cnt) { 674static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
675 u_int mask, val, *p=buf; 675 u_int mask, val, *p = buf;
676 u_int i, s_cnt; 676 u_int i, s_cnt;
677 677
678 if (cnt <= 0) 678 if (cnt <= 0)
679 return; 679 return;
680 if (test_bit(BC_FLG_BUSY, &bcs->Flag)) { 680 if (test_bit(BC_FLG_BUSY, &bcs->Flag)) {
681 if (bcs->hw.tiger.sendcnt> cnt) { 681 if (bcs->hw.tiger.sendcnt > cnt) {
682 s_cnt = cnt; 682 s_cnt = cnt;
683 bcs->hw.tiger.sendcnt -= cnt; 683 bcs->hw.tiger.sendcnt -= cnt;
684 } else { 684 } else {
@@ -689,17 +689,17 @@ static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
689 mask = 0xffff00ff; 689 mask = 0xffff00ff;
690 else 690 else
691 mask = 0xffffff00; 691 mask = 0xffffff00;
692 for (i=0; i<s_cnt; i++) { 692 for (i = 0; i < s_cnt; i++) {
693 val = bcs->channel ? ((bcs->hw.tiger.sp[i] <<8) & 0xff00) : 693 val = bcs->channel ? ((bcs->hw.tiger.sp[i] << 8) & 0xff00) :
694 (bcs->hw.tiger.sp[i]); 694 (bcs->hw.tiger.sp[i]);
695 *p &= mask; 695 *p &= mask;
696 *p++ |= val; 696 *p++ |= val;
697 if (p>bcs->hw.tiger.s_end) 697 if (p > bcs->hw.tiger.s_end)
698 p = bcs->hw.tiger.send; 698 p = bcs->hw.tiger.send;
699 } 699 }
700 bcs->hw.tiger.s_tot += s_cnt; 700 bcs->hw.tiger.s_tot += s_cnt;
701 if (bcs->cs->debug & L1_DEB_HSCX) 701 if (bcs->cs->debug & L1_DEB_HSCX)
702 debugl1(bcs->cs,"tiger write_raw: c%d %p-%p %d/%d %d %x", bcs->channel, 702 debugl1(bcs->cs, "tiger write_raw: c%d %p-%p %d/%d %d %x", bcs->channel,
703 buf, p, s_cnt, cnt, 703 buf, p, s_cnt, cnt,
704 bcs->hw.tiger.sendcnt, bcs->cs->hw.njet.irqstat0); 704 bcs->hw.tiger.sendcnt, bcs->cs->hw.njet.irqstat0);
705 if (bcs->cs->debug & L1_DEB_HSCX_FIFO) 705 if (bcs->cs->debug & L1_DEB_HSCX_FIFO)
@@ -708,10 +708,10 @@ static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
708 bcs->hw.tiger.sendp = p; 708 bcs->hw.tiger.sendp = p;
709 if (!bcs->hw.tiger.sendcnt) { 709 if (!bcs->hw.tiger.sendcnt) {
710 if (!bcs->tx_skb) { 710 if (!bcs->tx_skb) {
711 debugl1(bcs->cs,"tiger write_raw: NULL skb s_cnt %d", s_cnt); 711 debugl1(bcs->cs, "tiger write_raw: NULL skb s_cnt %d", s_cnt);
712 } else { 712 } else {
713 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 713 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
714 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 714 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
715 u_long flags; 715 u_long flags;
716 spin_lock_irqsave(&bcs->aclock, flags); 716 spin_lock_irqsave(&bcs->aclock, flags);
717 bcs->ackcnt += bcs->tx_skb->len; 717 bcs->ackcnt += bcs->tx_skb->len;
@@ -723,7 +723,7 @@ static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
723 } 723 }
724 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 724 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
725 bcs->hw.tiger.free = cnt - s_cnt; 725 bcs->hw.tiger.free = cnt - s_cnt;
726 if (bcs->hw.tiger.free > (NETJET_DMA_TXSIZE/2)) 726 if (bcs->hw.tiger.free > (NETJET_DMA_TXSIZE / 2))
727 test_and_set_bit(BC_FLG_HALF, &bcs->Flag); 727 test_and_set_bit(BC_FLG_HALF, &bcs->Flag);
728 else { 728 else {
729 test_and_clear_bit(BC_FLG_HALF, &bcs->Flag); 729 test_and_clear_bit(BC_FLG_HALF, &bcs->Flag);
@@ -734,9 +734,9 @@ static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
734 } else { 734 } else {
735 mask ^= 0xffffffff; 735 mask ^= 0xffffffff;
736 if (s_cnt < cnt) { 736 if (s_cnt < cnt) {
737 for (i=s_cnt; i<cnt;i++) { 737 for (i = s_cnt; i < cnt; i++) {
738 *p++ |= mask; 738 *p++ |= mask;
739 if (p>bcs->hw.tiger.s_end) 739 if (p > bcs->hw.tiger.s_end)
740 p = bcs->hw.tiger.send; 740 p = bcs->hw.tiger.send;
741 } 741 }
742 if (bcs->cs->debug & L1_DEB_HSCX) 742 if (bcs->cs->debug & L1_DEB_HSCX)
@@ -752,20 +752,20 @@ static void write_raw(struct BCState *bcs, u_int *buf, int cnt) {
752 fill_mem(bcs, buf, cnt, bcs->channel, 0xff); 752 fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
753 bcs->hw.tiger.free += cnt; 753 bcs->hw.tiger.free += cnt;
754 if (bcs->cs->debug & L1_DEB_HSCX) 754 if (bcs->cs->debug & L1_DEB_HSCX)
755 debugl1(bcs->cs,"tiger write_raw: fill half"); 755 debugl1(bcs->cs, "tiger write_raw: fill half");
756 } else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) { 756 } else if (test_and_clear_bit(BC_FLG_HALF, &bcs->Flag)) {
757 test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag); 757 test_and_set_bit(BC_FLG_EMPTY, &bcs->Flag);
758 fill_mem(bcs, buf, cnt, bcs->channel, 0xff); 758 fill_mem(bcs, buf, cnt, bcs->channel, 0xff);
759 if (bcs->cs->debug & L1_DEB_HSCX) 759 if (bcs->cs->debug & L1_DEB_HSCX)
760 debugl1(bcs->cs,"tiger write_raw: fill full"); 760 debugl1(bcs->cs, "tiger write_raw: fill full");
761 } 761 }
762} 762}
763 763
764void write_tiger(struct IsdnCardState *cs) { 764void write_tiger(struct IsdnCardState *cs) {
765 u_int *p, cnt = NETJET_DMA_TXSIZE/2; 765 u_int *p, cnt = NETJET_DMA_TXSIZE / 2;
766 766
767 if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_WRITE) { 767 if ((cs->hw.njet.irqstat0 & cs->hw.njet.last_is0) & NETJET_IRQM0_WRITE) {
768 debugl1(cs,"tiger warn write double dma %x/%x", 768 debugl1(cs, "tiger warn write double dma %x/%x",
769 cs->hw.njet.irqstat0, cs->hw.njet.last_is0); 769 cs->hw.njet.irqstat0, cs->hw.njet.last_is0);
770#ifdef ERROR_STATISTIC 770#ifdef ERROR_STATISTIC
771 if (cs->bcs[0].mode) 771 if (cs->bcs[0].mode)
@@ -777,7 +777,7 @@ void write_tiger(struct IsdnCardState *cs) {
777 } else { 777 } else {
778 cs->hw.njet.last_is0 &= ~NETJET_IRQM0_WRITE; 778 cs->hw.njet.last_is0 &= ~NETJET_IRQM0_WRITE;
779 cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE); 779 cs->hw.njet.last_is0 |= (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE);
780 } 780 }
781 if (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE_1) 781 if (cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE_1)
782 p = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1; 782 p = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
783 else 783 else
@@ -797,55 +797,55 @@ tiger_l2l1(struct PStack *st, int pr, void *arg)
797 u_long flags; 797 u_long flags;
798 798
799 switch (pr) { 799 switch (pr) {
800 case (PH_DATA | REQUEST): 800 case (PH_DATA | REQUEST):
801 spin_lock_irqsave(&bcs->cs->lock, flags); 801 spin_lock_irqsave(&bcs->cs->lock, flags);
802 if (bcs->tx_skb) { 802 if (bcs->tx_skb) {
803 skb_queue_tail(&bcs->squeue, skb); 803 skb_queue_tail(&bcs->squeue, skb);
804 } else { 804 } else {
805 bcs->tx_skb = skb; 805 bcs->tx_skb = skb;
806 bcs->cs->BC_Send_Data(bcs); 806 bcs->cs->BC_Send_Data(bcs);
807 } 807 }
808 spin_unlock_irqrestore(&bcs->cs->lock, flags); 808 spin_unlock_irqrestore(&bcs->cs->lock, flags);
809 break; 809 break;
810 case (PH_PULL | INDICATION): 810 case (PH_PULL | INDICATION):
811 spin_lock_irqsave(&bcs->cs->lock, flags); 811 spin_lock_irqsave(&bcs->cs->lock, flags);
812 if (bcs->tx_skb) { 812 if (bcs->tx_skb) {
813 printk(KERN_WARNING "tiger_l2l1: this shouldn't happen\n"); 813 printk(KERN_WARNING "tiger_l2l1: this shouldn't happen\n");
814 } else { 814 } else {
815 bcs->tx_skb = skb; 815 bcs->tx_skb = skb;
816 bcs->cs->BC_Send_Data(bcs); 816 bcs->cs->BC_Send_Data(bcs);
817 } 817 }
818 spin_unlock_irqrestore(&bcs->cs->lock, flags); 818 spin_unlock_irqrestore(&bcs->cs->lock, flags);
819 break; 819 break;
820 case (PH_PULL | REQUEST): 820 case (PH_PULL | REQUEST):
821 if (!bcs->tx_skb) { 821 if (!bcs->tx_skb) {
822 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 822 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
823 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 823 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
824 } else 824 } else
825 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 825 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
826 break; 826 break;
827 case (PH_ACTIVATE | REQUEST): 827 case (PH_ACTIVATE | REQUEST):
828 spin_lock_irqsave(&bcs->cs->lock, flags); 828 spin_lock_irqsave(&bcs->cs->lock, flags);
829 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag); 829 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
830 mode_tiger(bcs, st->l1.mode, st->l1.bc); 830 mode_tiger(bcs, st->l1.mode, st->l1.bc);
831 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */ 831 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
832 spin_unlock_irqrestore(&bcs->cs->lock, flags); 832 spin_unlock_irqrestore(&bcs->cs->lock, flags);
833 bcs->cs->cardmsg(bcs->cs, MDL_BC_ASSIGN, (void *)(&st->l1.bc)); 833 bcs->cs->cardmsg(bcs->cs, MDL_BC_ASSIGN, (void *)(&st->l1.bc));
834 l1_msg_b(st, pr, arg); 834 l1_msg_b(st, pr, arg);
835 break; 835 break;
836 case (PH_DEACTIVATE | REQUEST): 836 case (PH_DEACTIVATE | REQUEST):
837 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */ 837 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG */
838 bcs->cs->cardmsg(bcs->cs, MDL_BC_RELEASE, (void *)(&st->l1.bc)); 838 bcs->cs->cardmsg(bcs->cs, MDL_BC_RELEASE, (void *)(&st->l1.bc));
839 l1_msg_b(st, pr, arg); 839 l1_msg_b(st, pr, arg);
840 break; 840 break;
841 case (PH_DEACTIVATE | CONFIRM): 841 case (PH_DEACTIVATE | CONFIRM):
842 spin_lock_irqsave(&bcs->cs->lock, flags); 842 spin_lock_irqsave(&bcs->cs->lock, flags);
843 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag); 843 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
844 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag); 844 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
845 mode_tiger(bcs, 0, st->l1.bc); 845 mode_tiger(bcs, 0, st->l1.bc);
846 spin_unlock_irqrestore(&bcs->cs->lock, flags); 846 spin_unlock_irqrestore(&bcs->cs->lock, flags);
847 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL); 847 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
848 break; 848 break;
849 } 849 }
850} 850}
851 851
@@ -908,33 +908,33 @@ setstack_tiger(struct PStack *st, struct BCState *bcs)
908 return (0); 908 return (0);
909} 909}
910 910
911 911
912void 912void
913inittiger(struct IsdnCardState *cs) 913inittiger(struct IsdnCardState *cs)
914{ 914{
915 if (!(cs->bcs[0].hw.tiger.send = kmalloc(NETJET_DMA_TXSIZE * sizeof(unsigned int), 915 if (!(cs->bcs[0].hw.tiger.send = kmalloc(NETJET_DMA_TXSIZE * sizeof(unsigned int),
916 GFP_KERNEL | GFP_DMA))) { 916 GFP_KERNEL | GFP_DMA))) {
917 printk(KERN_WARNING 917 printk(KERN_WARNING
918 "HiSax: No memory for tiger.send\n"); 918 "HiSax: No memory for tiger.send\n");
919 return; 919 return;
920 } 920 }
921 cs->bcs[0].hw.tiger.s_irq = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE/2 - 1; 921 cs->bcs[0].hw.tiger.s_irq = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE / 2 - 1;
922 cs->bcs[0].hw.tiger.s_end = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1; 922 cs->bcs[0].hw.tiger.s_end = cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1;
923 cs->bcs[1].hw.tiger.send = cs->bcs[0].hw.tiger.send; 923 cs->bcs[1].hw.tiger.send = cs->bcs[0].hw.tiger.send;
924 cs->bcs[1].hw.tiger.s_irq = cs->bcs[0].hw.tiger.s_irq; 924 cs->bcs[1].hw.tiger.s_irq = cs->bcs[0].hw.tiger.s_irq;
925 cs->bcs[1].hw.tiger.s_end = cs->bcs[0].hw.tiger.s_end; 925 cs->bcs[1].hw.tiger.s_end = cs->bcs[0].hw.tiger.s_end;
926 926
927 memset(cs->bcs[0].hw.tiger.send, 0xff, NETJET_DMA_TXSIZE * sizeof(unsigned int)); 927 memset(cs->bcs[0].hw.tiger.send, 0xff, NETJET_DMA_TXSIZE * sizeof(unsigned int));
928 debugl1(cs, "tiger: send buf %p - %p", cs->bcs[0].hw.tiger.send, 928 debugl1(cs, "tiger: send buf %p - %p", cs->bcs[0].hw.tiger.send,
929 cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1); 929 cs->bcs[0].hw.tiger.send + NETJET_DMA_TXSIZE - 1);
930 outl(virt_to_bus(cs->bcs[0].hw.tiger.send), 930 outl(virt_to_bus(cs->bcs[0].hw.tiger.send),
931 cs->hw.njet.base + NETJET_DMA_READ_START); 931 cs->hw.njet.base + NETJET_DMA_READ_START);
932 outl(virt_to_bus(cs->bcs[0].hw.tiger.s_irq), 932 outl(virt_to_bus(cs->bcs[0].hw.tiger.s_irq),
933 cs->hw.njet.base + NETJET_DMA_READ_IRQ); 933 cs->hw.njet.base + NETJET_DMA_READ_IRQ);
934 outl(virt_to_bus(cs->bcs[0].hw.tiger.s_end), 934 outl(virt_to_bus(cs->bcs[0].hw.tiger.s_end),
935 cs->hw.njet.base + NETJET_DMA_READ_END); 935 cs->hw.njet.base + NETJET_DMA_READ_END);
936 if (!(cs->bcs[0].hw.tiger.rec = kmalloc(NETJET_DMA_RXSIZE * sizeof(unsigned int), 936 if (!(cs->bcs[0].hw.tiger.rec = kmalloc(NETJET_DMA_RXSIZE * sizeof(unsigned int),
937 GFP_KERNEL | GFP_DMA))) { 937 GFP_KERNEL | GFP_DMA))) {
938 printk(KERN_WARNING 938 printk(KERN_WARNING
939 "HiSax: No memory for tiger.rec\n"); 939 "HiSax: No memory for tiger.rec\n");
940 return; 940 return;
@@ -944,11 +944,11 @@ inittiger(struct IsdnCardState *cs)
944 cs->bcs[1].hw.tiger.rec = cs->bcs[0].hw.tiger.rec; 944 cs->bcs[1].hw.tiger.rec = cs->bcs[0].hw.tiger.rec;
945 memset(cs->bcs[0].hw.tiger.rec, 0xff, NETJET_DMA_RXSIZE * sizeof(unsigned int)); 945 memset(cs->bcs[0].hw.tiger.rec, 0xff, NETJET_DMA_RXSIZE * sizeof(unsigned int));
946 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec), 946 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec),
947 cs->hw.njet.base + NETJET_DMA_WRITE_START); 947 cs->hw.njet.base + NETJET_DMA_WRITE_START);
948 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE/2 - 1), 948 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE / 2 - 1),
949 cs->hw.njet.base + NETJET_DMA_WRITE_IRQ); 949 cs->hw.njet.base + NETJET_DMA_WRITE_IRQ);
950 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1), 950 outl(virt_to_bus(cs->bcs[0].hw.tiger.rec + NETJET_DMA_RXSIZE - 1),
951 cs->hw.njet.base + NETJET_DMA_WRITE_END); 951 cs->hw.njet.base + NETJET_DMA_WRITE_END);
952 debugl1(cs, "tiger: dmacfg %x/%x pulse=%d", 952 debugl1(cs, "tiger: dmacfg %x/%x pulse=%d",
953 inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR), 953 inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR),
954 inl(cs->hw.njet.base + NETJET_DMA_READ_ADR), 954 inl(cs->hw.njet.base + NETJET_DMA_READ_ADR),
@@ -979,4 +979,3 @@ release_io_netjet(struct IsdnCardState *cs)
979 releasetiger(cs); 979 releasetiger(cs);
980 release_region(cs->hw.njet.base, 256); 980 release_region(cs->hw.njet.base, 256);
981} 981}
982
diff --git a/drivers/isdn/hisax/netjet.h b/drivers/isdn/hisax/netjet.h
index 68e504d4ebf9..70590d5d5e64 100644
--- a/drivers/isdn/hisax/netjet.h
+++ b/drivers/isdn/hisax/netjet.h
@@ -6,13 +6,13 @@
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * by Matt Henderson, 7 * by Matt Henderson,
8 * Traverse Technologies P/L www.traverse.com.au 8 * Traverse Technologies P/L www.traverse.com.au
9 * 9 *
10 * This software may be used and distributed according to the terms 10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference. 11 * of the GNU General Public License, incorporated herein by reference.
12 * 12 *
13 */ 13 */
14 14
15#define byteout(addr,val) outb(val,addr) 15#define byteout(addr, val) outb(val, addr)
16#define bytein(addr) inb(addr) 16#define bytein(addr) inb(addr)
17 17
18#define NETJET_CTRL 0x00 18#define NETJET_CTRL 0x00
@@ -67,4 +67,3 @@ void netjet_fill_dma(struct BCState *bcs);
67void netjet_interrupt(int intno, void *dev_id); 67void netjet_interrupt(int intno, void *dev_id);
68void inittiger(struct IsdnCardState *cs); 68void inittiger(struct IsdnCardState *cs);
69void release_io_netjet(struct IsdnCardState *cs); 69void release_io_netjet(struct IsdnCardState *cs);
70
diff --git a/drivers/isdn/hisax/niccy.c b/drivers/isdn/hisax/niccy.c
index ccaa6e13310f..6569e0315cca 100644
--- a/drivers/isdn/hisax/niccy.c
+++ b/drivers/isdn/hisax/niccy.c
@@ -5,10 +5,10 @@
5 * 5 *
6 * Author Karsten Keil 6 * Author Karsten Keil
7 * Copyright by Karsten Keil <keil@isdn4linux.de> 7 * Copyright by Karsten Keil <keil@isdn4linux.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
12 * Thanks to Dr. Neuhaus and SAGEM for information 12 * Thanks to Dr. Neuhaus and SAGEM for information
13 * 13 *
14 */ 14 */
@@ -23,7 +23,7 @@
23 23
24static const char *niccy_revision = "$Revision: 1.21.2.4 $"; 24static const char *niccy_revision = "$Revision: 1.21.2.4 $";
25 25
26#define byteout(addr,val) outb(val,addr) 26#define byteout(addr, val) outb(val, addr)
27#define bytein(addr) inb(addr) 27#define bytein(addr) inb(addr)
28 28
29#define ISAC_PCI_DATA 0 29#define ISAC_PCI_DATA 0
@@ -53,21 +53,21 @@ static inline u_char readreg(unsigned int ale, unsigned int adr, u_char off)
53} 53}
54 54
55static inline void readfifo(unsigned int ale, unsigned int adr, u_char off, 55static inline void readfifo(unsigned int ale, unsigned int adr, u_char off,
56 u_char *data, int size) 56 u_char *data, int size)
57{ 57{
58 byteout(ale, off); 58 byteout(ale, off);
59 insb(adr, data, size); 59 insb(adr, data, size);
60} 60}
61 61
62static inline void writereg(unsigned int ale, unsigned int adr, u_char off, 62static inline void writereg(unsigned int ale, unsigned int adr, u_char off,
63 u_char data) 63 u_char data)
64{ 64{
65 byteout(ale, off); 65 byteout(ale, off);
66 byteout(adr, data); 66 byteout(adr, data);
67} 67}
68 68
69static inline void writefifo(unsigned int ale, unsigned int adr, u_char off, 69static inline void writefifo(unsigned int ale, unsigned int adr, u_char off,
70 u_char *data, int size) 70 u_char *data, int size)
71{ 71{
72 byteout(ale, off); 72 byteout(ale, off);
73 outsb(adr, data, size); 73 outsb(adr, data, size);
@@ -85,12 +85,12 @@ static void WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
85 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value); 85 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, offset, value);
86} 86}
87 87
88static void ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 88static void ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
89{ 89{
90 readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); 90 readfifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
91} 91}
92 92
93static void WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 93static void WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
94{ 94{
95 writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size); 95 writefifo(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, 0, data, size);
96} 96}
@@ -98,26 +98,26 @@ static void WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
98static u_char ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) 98static u_char ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
99{ 99{
100 return readreg(cs->hw.niccy.hscx_ale, 100 return readreg(cs->hw.niccy.hscx_ale,
101 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0)); 101 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0));
102} 102}
103 103
104static void WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, 104static void WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset,
105 u_char value) 105 u_char value)
106{ 106{
107 writereg(cs->hw.niccy.hscx_ale, 107 writereg(cs->hw.niccy.hscx_ale,
108 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0), value); 108 cs->hw.niccy.hscx, offset + (hscx ? 0x40 : 0), value);
109} 109}
110 110
111#define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \ 111#define READHSCX(cs, nr, reg) readreg(cs->hw.niccy.hscx_ale, \
112 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0)) 112 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0))
113#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.niccy.hscx_ale, \ 113#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.niccy.hscx_ale, \
114 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data) 114 cs->hw.niccy.hscx, reg + (nr ? 0x40 : 0), data)
115 115
116#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.niccy.hscx_ale, \ 116#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.niccy.hscx_ale, \
117 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt) 117 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
118 118
119#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.niccy.hscx_ale, \ 119#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.niccy.hscx_ale, \
120 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt) 120 cs->hw.niccy.hscx, (nr ? 0x40 : 0), ptr, cnt)
121 121
122#include "hscx_irq.c" 122#include "hscx_irq.c"
123 123
@@ -138,7 +138,7 @@ static irqreturn_t niccy_interrupt(int intno, void *dev_id)
138 outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG); 138 outl(ival, cs->hw.niccy.cfg_reg + PCI_IRQ_CTRL_REG);
139 } 139 }
140 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, 140 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
141 HSCX_ISTA + 0x40); 141 HSCX_ISTA + 0x40);
142Start_HSCX: 142Start_HSCX:
143 if (val) 143 if (val)
144 hscx_int_main(cs, val); 144 hscx_int_main(cs, val);
@@ -147,7 +147,7 @@ Start_ISAC:
147 if (val) 147 if (val)
148 isac_interrupt(cs, val); 148 isac_interrupt(cs, val);
149 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, 149 val = readreg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx,
150 HSCX_ISTA + 0x40); 150 HSCX_ISTA + 0x40);
151 if (val) { 151 if (val) {
152 if (cs->debug & L1_DEB_HSCX) 152 if (cs->debug & L1_DEB_HSCX)
153 debugl1(cs, "HSCX IntStat after IntRoutine"); 153 debugl1(cs, "HSCX IntStat after IntRoutine");
@@ -165,7 +165,7 @@ Start_ISAC:
165 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF); 165 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0xFF);
166 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0); 166 writereg(cs->hw.niccy.isac_ale, cs->hw.niccy.isac, ISAC_MASK, 0);
167 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0); 167 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK, 0);
168 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40,0); 168 writereg(cs->hw.niccy.hscx_ale, cs->hw.niccy.hscx, HSCX_MASK + 0x40, 0);
169 spin_unlock_irqrestore(&cs->lock, flags); 169 spin_unlock_irqrestore(&cs->lock, flags);
170 return IRQ_HANDLED; 170 return IRQ_HANDLED;
171} 171}
@@ -241,32 +241,32 @@ int __devinit setup_niccy(struct IsdnCard *card)
241 int err; 241 int err;
242 242
243 pnp_c = pnp_find_card(ISAPNP_VENDOR('S', 'D', 'A'), 243 pnp_c = pnp_find_card(ISAPNP_VENDOR('S', 'D', 'A'),
244 ISAPNP_FUNCTION(0x0150), pnp_c); 244 ISAPNP_FUNCTION(0x0150), pnp_c);
245 if (pnp_c) { 245 if (pnp_c) {
246 pnp_d = pnp_find_dev(pnp_c, 246 pnp_d = pnp_find_dev(pnp_c,
247 ISAPNP_VENDOR('S', 'D', 'A'), 247 ISAPNP_VENDOR('S', 'D', 'A'),
248 ISAPNP_FUNCTION(0x0150), pnp_d); 248 ISAPNP_FUNCTION(0x0150), pnp_d);
249 if (!pnp_d) { 249 if (!pnp_d) {
250 printk(KERN_ERR "NiccyPnP: PnP error card " 250 printk(KERN_ERR "NiccyPnP: PnP error card "
251 "found, no device\n"); 251 "found, no device\n");
252 return 0; 252 return 0;
253 } 253 }
254 pnp_disable_dev(pnp_d); 254 pnp_disable_dev(pnp_d);
255 err = pnp_activate_dev(pnp_d); 255 err = pnp_activate_dev(pnp_d);
256 if (err < 0) { 256 if (err < 0) {
257 printk(KERN_WARNING "%s: pnp_activate_dev " 257 printk(KERN_WARNING "%s: pnp_activate_dev "
258 "ret(%d)\n", __func__, err); 258 "ret(%d)\n", __func__, err);
259 return 0; 259 return 0;
260 } 260 }
261 card->para[1] = pnp_port_start(pnp_d, 0); 261 card->para[1] = pnp_port_start(pnp_d, 0);
262 card->para[2] = pnp_port_start(pnp_d, 1); 262 card->para[2] = pnp_port_start(pnp_d, 1);
263 card->para[0] = pnp_irq(pnp_d, 0); 263 card->para[0] = pnp_irq(pnp_d, 0);
264 if (!card->para[0] || !card->para[1] || 264 if (!card->para[0] || !card->para[1] ||
265 !card->para[2]) { 265 !card->para[2]) {
266 printk(KERN_ERR "NiccyPnP:some resources are " 266 printk(KERN_ERR "NiccyPnP:some resources are "
267 "missing %ld/%lx/%lx\n", 267 "missing %ld/%lx/%lx\n",
268 card->para[0], card->para[1], 268 card->para[0], card->para[1],
269 card->para[2]); 269 card->para[2]);
270 pnp_disable_dev(pnp_d); 270 pnp_disable_dev(pnp_d);
271 return 0; 271 return 0;
272 } 272 }
@@ -284,15 +284,15 @@ int __devinit setup_niccy(struct IsdnCard *card)
284 cs->irq = card->para[0]; 284 cs->irq = card->para[0];
285 if (!request_region(cs->hw.niccy.isac, 2, "niccy data")) { 285 if (!request_region(cs->hw.niccy.isac, 2, "niccy data")) {
286 printk(KERN_WARNING "HiSax: NICCY data port %x-%x " 286 printk(KERN_WARNING "HiSax: NICCY data port %x-%x "
287 "already in use\n", 287 "already in use\n",
288 cs->hw.niccy.isac, cs->hw.niccy.isac + 1); 288 cs->hw.niccy.isac, cs->hw.niccy.isac + 1);
289 return 0; 289 return 0;
290 } 290 }
291 if (!request_region(cs->hw.niccy.isac_ale, 2, "niccy addr")) { 291 if (!request_region(cs->hw.niccy.isac_ale, 2, "niccy addr")) {
292 printk(KERN_WARNING "HiSax: NICCY address port %x-%x " 292 printk(KERN_WARNING "HiSax: NICCY address port %x-%x "
293 "already in use\n", 293 "already in use\n",
294 cs->hw.niccy.isac_ale, 294 cs->hw.niccy.isac_ale,
295 cs->hw.niccy.isac_ale + 1); 295 cs->hw.niccy.isac_ale + 1);
296 release_region(cs->hw.niccy.isac, 2); 296 release_region(cs->hw.niccy.isac, 2);
297 return 0; 297 return 0;
298 } 298 }
@@ -303,8 +303,8 @@ int __devinit setup_niccy(struct IsdnCard *card)
303 u_int pci_ioaddr; 303 u_int pci_ioaddr;
304 cs->subtyp = 0; 304 cs->subtyp = 0;
305 if ((niccy_dev = hisax_find_pci_device(PCI_VENDOR_ID_SATSAGEM, 305 if ((niccy_dev = hisax_find_pci_device(PCI_VENDOR_ID_SATSAGEM,
306 PCI_DEVICE_ID_SATSAGEM_NICCY, 306 PCI_DEVICE_ID_SATSAGEM_NICCY,
307 niccy_dev))) { 307 niccy_dev))) {
308 if (pci_enable_device(niccy_dev)) 308 if (pci_enable_device(niccy_dev))
309 return 0; 309 return 0;
310 /* get IRQ */ 310 /* get IRQ */
@@ -357,8 +357,8 @@ int __devinit setup_niccy(struct IsdnCard *card)
357#endif /* CONFIG_PCI */ 357#endif /* CONFIG_PCI */
358 } 358 }
359 printk(KERN_INFO "HiSax: NICCY %s config irq:%d data:0x%X ale:0x%X\n", 359 printk(KERN_INFO "HiSax: NICCY %s config irq:%d data:0x%X ale:0x%X\n",
360 (cs->subtyp == 1) ? "PnP" : "PCI", 360 (cs->subtyp == 1) ? "PnP" : "PCI",
361 cs->irq, cs->hw.niccy.isac, cs->hw.niccy.isac_ale); 361 cs->irq, cs->hw.niccy.isac, cs->hw.niccy.isac_ale);
362 setup_isac(cs); 362 setup_isac(cs);
363 cs->readisac = &ReadISAC; 363 cs->readisac = &ReadISAC;
364 cs->writeisac = &WriteISAC; 364 cs->writeisac = &WriteISAC;
@@ -372,7 +372,7 @@ int __devinit setup_niccy(struct IsdnCard *card)
372 ISACVersion(cs, "Niccy:"); 372 ISACVersion(cs, "Niccy:");
373 if (HscxVersion(cs, "Niccy:")) { 373 if (HscxVersion(cs, "Niccy:")) {
374 printk(KERN_WARNING "Niccy: wrong HSCX versions check IO " 374 printk(KERN_WARNING "Niccy: wrong HSCX versions check IO "
375 "address\n"); 375 "address\n");
376 release_io_niccy(cs); 376 release_io_niccy(cs);
377 return 0; 377 return 0;
378 } 378 }
diff --git a/drivers/isdn/hisax/nj_s.c b/drivers/isdn/hisax/nj_s.c
index a1b89524b505..f36ff69c07e1 100644
--- a/drivers/isdn/hisax/nj_s.c
+++ b/drivers/isdn/hisax/nj_s.c
@@ -18,7 +18,7 @@ static const char *NETjet_S_revision = "$Revision: 2.13.2.4 $";
18 18
19static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off) 19static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
20{ 20{
21 return(5); 21 return (5);
22} 22}
23 23
24static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value) 24static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
@@ -46,48 +46,48 @@ netjet_s_interrupt(int intno, void *dev_id)
46 s1val = 1; 46 s1val = 1;
47 } else 47 } else
48 s1val = 0; 48 s1val = 0;
49 /* 49 /*
50 * read/write stat0 is better, because lower IRQ rate 50 * read/write stat0 is better, because lower IRQ rate
51 * Note the IRQ is on for 125 us if a condition match 51 * Note the IRQ is on for 125 us if a condition match
52 * thats long on modern CPU and so the IRQ is reentered 52 * thats long on modern CPU and so the IRQ is reentered
53 * all the time. 53 * all the time.
54 */ 54 */
55 s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0); 55 s0val = bytein(cs->hw.njet.base + NETJET_IRQSTAT0);
56 if ((s0val | s1val)==0) { // shared IRQ 56 if ((s0val | s1val) == 0) { // shared IRQ
57 spin_unlock_irqrestore(&cs->lock, flags); 57 spin_unlock_irqrestore(&cs->lock, flags);
58 return IRQ_NONE; 58 return IRQ_NONE;
59 } 59 }
60 if (s0val) 60 if (s0val)
61 byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val); 61 byteout(cs->hw.njet.base + NETJET_IRQSTAT0, s0val);
62 /* start new code 13/07/00 GE */ 62 /* start new code 13/07/00 GE */
63 /* set bits in sval to indicate which page is free */ 63 /* set bits in sval to indicate which page is free */
64 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) < 64 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
65 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ)) 65 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
66 /* the 2nd write page is free */ 66 /* the 2nd write page is free */
67 s0val = 0x08; 67 s0val = 0x08;
68 else /* the 1st write page is free */ 68 else /* the 1st write page is free */
69 s0val = 0x04; 69 s0val = 0x04;
70 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) < 70 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
71 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ)) 71 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
72 /* the 2nd read page is free */ 72 /* the 2nd read page is free */
73 s0val |= 0x02; 73 s0val |= 0x02;
74 else /* the 1st read page is free */ 74 else /* the 1st read page is free */
75 s0val |= 0x01; 75 s0val |= 0x01;
76 if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */ 76 if (s0val != cs->hw.njet.last_is0) /* we have a DMA interrupt */
77 { 77 {
78 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 78 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
79 printk(KERN_WARNING "nj LOCK_ATOMIC s0val %x->%x\n", 79 printk(KERN_WARNING "nj LOCK_ATOMIC s0val %x->%x\n",
80 cs->hw.njet.last_is0, s0val); 80 cs->hw.njet.last_is0, s0val);
81 spin_unlock_irqrestore(&cs->lock, flags); 81 spin_unlock_irqrestore(&cs->lock, flags);
82 return IRQ_HANDLED; 82 return IRQ_HANDLED;
83 } 83 }
84 cs->hw.njet.irqstat0 = s0val; 84 cs->hw.njet.irqstat0 = s0val;
85 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) != 85 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
86 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ)) 86 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
87 /* we have a read dma int */ 87 /* we have a read dma int */
88 read_tiger(cs); 88 read_tiger(cs);
89 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) != 89 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
90 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE)) 90 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
91 /* we have a write dma int */ 91 /* we have a write dma int */
92 write_tiger(cs); 92 write_tiger(cs);
93 /* end new code 13/07/00 GE */ 93 /* end new code 13/07/00 GE */
@@ -124,28 +124,28 @@ NETjet_S_card_msg(struct IsdnCardState *cs, int mt, void *arg)
124 u_long flags; 124 u_long flags;
125 125
126 switch (mt) { 126 switch (mt) {
127 case CARD_RESET: 127 case CARD_RESET:
128 spin_lock_irqsave(&cs->lock, flags); 128 spin_lock_irqsave(&cs->lock, flags);
129 reset_netjet_s(cs); 129 reset_netjet_s(cs);
130 spin_unlock_irqrestore(&cs->lock, flags); 130 spin_unlock_irqrestore(&cs->lock, flags);
131 return(0); 131 return (0);
132 case CARD_RELEASE: 132 case CARD_RELEASE:
133 release_io_netjet(cs); 133 release_io_netjet(cs);
134 return(0); 134 return (0);
135 case CARD_INIT: 135 case CARD_INIT:
136 reset_netjet_s(cs); 136 reset_netjet_s(cs);
137 inittiger(cs); 137 inittiger(cs);
138 spin_lock_irqsave(&cs->lock, flags); 138 spin_lock_irqsave(&cs->lock, flags);
139 clear_pending_isac_ints(cs); 139 clear_pending_isac_ints(cs);
140 initisac(cs); 140 initisac(cs);
141 /* Reenable all IRQ */ 141 /* Reenable all IRQ */
142 cs->writeisac(cs, ISAC_MASK, 0); 142 cs->writeisac(cs, ISAC_MASK, 0);
143 spin_unlock_irqrestore(&cs->lock, flags); 143 spin_unlock_irqrestore(&cs->lock, flags);
144 return(0); 144 return (0);
145 case CARD_TEST: 145 case CARD_TEST:
146 return(0); 146 return (0);
147 } 147 }
148 return(0); 148 return (0);
149} 149}
150 150
151static int __devinit njs_pci_probe(struct pci_dev *dev_netjet, 151static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
@@ -154,17 +154,17 @@ static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
154 u32 cfg; 154 u32 cfg;
155 155
156 if (pci_enable_device(dev_netjet)) 156 if (pci_enable_device(dev_netjet))
157 return(0); 157 return (0);
158 pci_set_master(dev_netjet); 158 pci_set_master(dev_netjet);
159 cs->irq = dev_netjet->irq; 159 cs->irq = dev_netjet->irq;
160 if (!cs->irq) { 160 if (!cs->irq) {
161 printk(KERN_WARNING "NETjet-S: No IRQ for PCI card found\n"); 161 printk(KERN_WARNING "NETjet-S: No IRQ for PCI card found\n");
162 return(0); 162 return (0);
163 } 163 }
164 cs->hw.njet.base = pci_resource_start(dev_netjet, 0); 164 cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
165 if (!cs->hw.njet.base) { 165 if (!cs->hw.njet.base) {
166 printk(KERN_WARNING "NETjet-S: No IO-Adr for PCI card found\n"); 166 printk(KERN_WARNING "NETjet-S: No IO-Adr for PCI card found\n");
167 return(0); 167 return (0);
168 } 168 }
169 /* the TJ300 and TJ320 must be detected, the IRQ handling is different 169 /* the TJ300 and TJ320 must be detected, the IRQ handling is different
170 * unfortunately the chips use the same device ID, but the TJ320 has 170 * unfortunately the chips use the same device ID, but the TJ320 has
@@ -177,14 +177,14 @@ static int __devinit njs_pci_probe(struct pci_dev *dev_netjet,
177 cs->subtyp = 0; /* TJ300 */ 177 cs->subtyp = 0; /* TJ300 */
178 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG www.formula-n.com */ 178 /* 2001/10/04 Christoph Ersfeld, Formula-n Europe AG www.formula-n.com */
179 if ((dev_netjet->subsystem_vendor == 0x55) && 179 if ((dev_netjet->subsystem_vendor == 0x55) &&
180 (dev_netjet->subsystem_device == 0x02)) { 180 (dev_netjet->subsystem_device == 0x02)) {
181 printk(KERN_WARNING "Netjet: You tried to load this driver with an incompatible TigerJet-card\n"); 181 printk(KERN_WARNING "Netjet: You tried to load this driver with an incompatible TigerJet-card\n");
182 printk(KERN_WARNING "Use type=41 for Formula-n enter:now ISDN PCI and compatible\n"); 182 printk(KERN_WARNING "Use type=41 for Formula-n enter:now ISDN PCI and compatible\n");
183 return(0); 183 return (0);
184 } 184 }
185 /* end new code */ 185 /* end new code */
186 186
187 return(1); 187 return (1);
188} 188}
189 189
190static int __devinit njs_cs_init(struct IsdnCard *card, 190static int __devinit njs_cs_init(struct IsdnCard *card,
@@ -209,18 +209,18 @@ static int __devinit njs_cs_init(struct IsdnCard *card,
209 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ); 209 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
210 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 210 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
211 211
212 switch ( ( ( NETjet_ReadIC( cs, ISAC_RBCH ) >> 5 ) & 3 ) ) 212 switch (((NETjet_ReadIC(cs, ISAC_RBCH) >> 5) & 3))
213 { 213 {
214 case 0 : 214 case 0:
215 return 1; /* end loop */ 215 return 1; /* end loop */
216 216
217 case 3 : 217 case 3:
218 printk( KERN_WARNING "NETjet-S: NETspider-U PCI card found\n" ); 218 printk(KERN_WARNING "NETjet-S: NETspider-U PCI card found\n");
219 return -1; /* continue looping */ 219 return -1; /* continue looping */
220 220
221 default : 221 default:
222 printk( KERN_WARNING "NETjet-S: No PCI card found\n" ); 222 printk(KERN_WARNING "NETjet-S: No PCI card found\n");
223 return 0; /* end loop & function */ 223 return 0; /* end loop & function */
224 } 224 }
225 return 1; /* end loop */ 225 return 1; /* end loop */
226} 226}
@@ -231,8 +231,8 @@ static int __devinit njs_cs_init_rest(struct IsdnCard *card,
231 const int bytecnt = 256; 231 const int bytecnt = 256;
232 232
233 printk(KERN_INFO 233 printk(KERN_INFO
234 "NETjet-S: %s card configured at %#lx IRQ %d\n", 234 "NETjet-S: %s card configured at %#lx IRQ %d\n",
235 cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq); 235 cs->subtyp ? "TJ320" : "TJ300", cs->hw.njet.base, cs->irq);
236 if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) { 236 if (!request_region(cs->hw.njet.base, bytecnt, "netjet-s isdn")) {
237 printk(KERN_WARNING 237 printk(KERN_WARNING
238 "HiSax: NETjet-S config port %#lx-%#lx already in use\n", 238 "HiSax: NETjet-S config port %#lx-%#lx already in use\n",
@@ -271,24 +271,24 @@ setup_netjet_s(struct IsdnCard *card)
271 strcpy(tmp, NETjet_S_revision); 271 strcpy(tmp, NETjet_S_revision);
272 printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp)); 272 printk(KERN_INFO "HiSax: Traverse Tech. NETjet-S driver Rev. %s\n", HiSax_getrev(tmp));
273 if (cs->typ != ISDN_CTYPE_NETJET_S) 273 if (cs->typ != ISDN_CTYPE_NETJET_S)
274 return(0); 274 return (0);
275 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 275 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
276 276
277 for ( ;; ) 277 for (;;)
278 { 278 {
279 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET, 279 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
280 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) { 280 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
281 ret = njs_pci_probe(dev_netjet, cs); 281 ret = njs_pci_probe(dev_netjet, cs);
282 if (!ret) 282 if (!ret)
283 return(0); 283 return (0);
284 } else { 284 } else {
285 printk(KERN_WARNING "NETjet-S: No PCI card found\n"); 285 printk(KERN_WARNING "NETjet-S: No PCI card found\n");
286 return(0); 286 return (0);
287 } 287 }
288 288
289 ret = njs_cs_init(card, cs); 289 ret = njs_cs_init(card, cs);
290 if (!ret) 290 if (!ret)
291 return(0); 291 return (0);
292 if (ret > 0) 292 if (ret > 0)
293 break; 293 break;
294 /* otherwise, ret < 0, continue looping */ 294 /* otherwise, ret < 0, continue looping */
diff --git a/drivers/isdn/hisax/nj_u.c b/drivers/isdn/hisax/nj_u.c
index 095e974aed80..333484aef425 100644
--- a/drivers/isdn/hisax/nj_u.c
+++ b/drivers/isdn/hisax/nj_u.c
@@ -1,4 +1,4 @@
1/* $Id: nj_u.c,v 2.14.2.3 2004/01/13 14:31:26 keil Exp $ 1/* $Id: nj_u.c,v 2.14.2.3 2004/01/13 14:31:26 keil Exp $
2 * 2 *
3 * This software may be used and distributed according to the terms 3 * This software may be used and distributed according to the terms
4 * of the GNU General Public License, incorporated herein by reference. 4 * of the GNU General Public License, incorporated herein by reference.
@@ -18,7 +18,7 @@ static const char *NETjet_U_revision = "$Revision: 2.14.2.3 $";
18 18
19static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off) 19static u_char dummyrr(struct IsdnCardState *cs, int chan, u_char off)
20{ 20{
21 return(5); 21 return (5);
22} 22}
23 23
24static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value) 24static void dummywr(struct IsdnCardState *cs, int chan, u_char off, u_char value)
@@ -34,7 +34,7 @@ netjet_u_interrupt(int intno, void *dev_id)
34 34
35 spin_lock_irqsave(&cs->lock, flags); 35 spin_lock_irqsave(&cs->lock, flags);
36 if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) & 36 if (!((sval = bytein(cs->hw.njet.base + NETJET_IRQSTAT1)) &
37 NETJET_ISACIRQ)) { 37 NETJET_ISACIRQ)) {
38 val = NETjet_ReadIC(cs, ICC_ISTA); 38 val = NETjet_ReadIC(cs, ICC_ISTA);
39 if (cs->debug & L1_DEB_ISAC) 39 if (cs->debug & L1_DEB_ISAC)
40 debugl1(cs, "tiger: i1 %x %x", sval, val); 40 debugl1(cs, "tiger: i1 %x %x", sval, val);
@@ -47,17 +47,17 @@ netjet_u_interrupt(int intno, void *dev_id)
47 /* start new code 13/07/00 GE */ 47 /* start new code 13/07/00 GE */
48 /* set bits in sval to indicate which page is free */ 48 /* set bits in sval to indicate which page is free */
49 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) < 49 if (inl(cs->hw.njet.base + NETJET_DMA_WRITE_ADR) <
50 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ)) 50 inl(cs->hw.njet.base + NETJET_DMA_WRITE_IRQ))
51 /* the 2nd write page is free */ 51 /* the 2nd write page is free */
52 sval = 0x08; 52 sval = 0x08;
53 else /* the 1st write page is free */ 53 else /* the 1st write page is free */
54 sval = 0x04; 54 sval = 0x04;
55 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) < 55 if (inl(cs->hw.njet.base + NETJET_DMA_READ_ADR) <
56 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ)) 56 inl(cs->hw.njet.base + NETJET_DMA_READ_IRQ))
57 /* the 2nd read page is free */ 57 /* the 2nd read page is free */
58 sval = sval | 0x02; 58 sval = sval | 0x02;
59 else /* the 1st read page is free */ 59 else /* the 1st read page is free */
60 sval = sval | 0x01; 60 sval = sval | 0x01;
61 if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */ 61 if (sval != cs->hw.njet.last_is0) /* we have a DMA interrupt */
62 { 62 {
63 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) { 63 if (test_and_set_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags)) {
@@ -65,12 +65,12 @@ netjet_u_interrupt(int intno, void *dev_id)
65 return IRQ_HANDLED; 65 return IRQ_HANDLED;
66 } 66 }
67 cs->hw.njet.irqstat0 = sval; 67 cs->hw.njet.irqstat0 = sval;
68 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) != 68 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_READ) !=
69 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ)) 69 (cs->hw.njet.last_is0 & NETJET_IRQM0_READ))
70 /* we have a read dma int */ 70 /* we have a read dma int */
71 read_tiger(cs); 71 read_tiger(cs);
72 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) != 72 if ((cs->hw.njet.irqstat0 & NETJET_IRQM0_WRITE) !=
73 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE)) 73 (cs->hw.njet.last_is0 & NETJET_IRQM0_WRITE))
74 /* we have a write dma int */ 74 /* we have a write dma int */
75 write_tiger(cs); 75 write_tiger(cs);
76 /* end new code 13/07/00 GE */ 76 /* end new code 13/07/00 GE */
@@ -104,45 +104,45 @@ NETjet_U_card_msg(struct IsdnCardState *cs, int mt, void *arg)
104 u_long flags; 104 u_long flags;
105 105
106 switch (mt) { 106 switch (mt) {
107 case CARD_RESET: 107 case CARD_RESET:
108 spin_lock_irqsave(&cs->lock, flags); 108 spin_lock_irqsave(&cs->lock, flags);
109 reset_netjet_u(cs); 109 reset_netjet_u(cs);
110 spin_unlock_irqrestore(&cs->lock, flags); 110 spin_unlock_irqrestore(&cs->lock, flags);
111 return(0); 111 return (0);
112 case CARD_RELEASE: 112 case CARD_RELEASE:
113 release_io_netjet(cs); 113 release_io_netjet(cs);
114 return(0); 114 return (0);
115 case CARD_INIT: 115 case CARD_INIT:
116 spin_lock_irqsave(&cs->lock, flags); 116 spin_lock_irqsave(&cs->lock, flags);
117 inittiger(cs); 117 inittiger(cs);
118 reset_netjet_u(cs); 118 reset_netjet_u(cs);
119 clear_pending_icc_ints(cs); 119 clear_pending_icc_ints(cs);
120 initicc(cs); 120 initicc(cs);
121 /* Reenable all IRQ */ 121 /* Reenable all IRQ */
122 cs->writeisac(cs, ICC_MASK, 0); 122 cs->writeisac(cs, ICC_MASK, 0);
123 spin_unlock_irqrestore(&cs->lock, flags); 123 spin_unlock_irqrestore(&cs->lock, flags);
124 return(0); 124 return (0);
125 case CARD_TEST: 125 case CARD_TEST:
126 return(0); 126 return (0);
127 } 127 }
128 return(0); 128 return (0);
129} 129}
130 130
131static int __devinit nju_pci_probe(struct pci_dev *dev_netjet, 131static int __devinit nju_pci_probe(struct pci_dev *dev_netjet,
132 struct IsdnCardState *cs) 132 struct IsdnCardState *cs)
133{ 133{
134 if (pci_enable_device(dev_netjet)) 134 if (pci_enable_device(dev_netjet))
135 return(0); 135 return (0);
136 pci_set_master(dev_netjet); 136 pci_set_master(dev_netjet);
137 cs->irq = dev_netjet->irq; 137 cs->irq = dev_netjet->irq;
138 if (!cs->irq) { 138 if (!cs->irq) {
139 printk(KERN_WARNING "NETspider-U: No IRQ for PCI card found\n"); 139 printk(KERN_WARNING "NETspider-U: No IRQ for PCI card found\n");
140 return(0); 140 return (0);
141 } 141 }
142 cs->hw.njet.base = pci_resource_start(dev_netjet, 0); 142 cs->hw.njet.base = pci_resource_start(dev_netjet, 0);
143 if (!cs->hw.njet.base) { 143 if (!cs->hw.njet.base) {
144 printk(KERN_WARNING "NETspider-U: No IO-Adr for PCI card found\n"); 144 printk(KERN_WARNING "NETspider-U: No IO-Adr for PCI card found\n");
145 return(0); 145 return (0);
146 } 146 }
147 147
148 return (1); 148 return (1);
@@ -171,18 +171,18 @@ static int __devinit nju_cs_init(struct IsdnCard *card,
171 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ); 171 byteout(cs->hw.njet.base + NETJET_IRQMASK1, NETJET_ISACIRQ);
172 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd); 172 byteout(cs->hw.njet.auxa, cs->hw.njet.auxd);
173 173
174 switch ( ( ( NETjet_ReadIC( cs, ICC_RBCH ) >> 5 ) & 3 ) ) 174 switch (((NETjet_ReadIC(cs, ICC_RBCH) >> 5) & 3))
175 { 175 {
176 case 3 : 176 case 3:
177 return 1; /* end loop */ 177 return 1; /* end loop */
178 178
179 case 0 : 179 case 0:
180 printk( KERN_WARNING "NETspider-U: NETjet-S PCI card found\n" ); 180 printk(KERN_WARNING "NETspider-U: NETjet-S PCI card found\n");
181 return -1; /* continue looping */ 181 return -1; /* continue looping */
182 182
183 default : 183 default:
184 printk( KERN_WARNING "NETspider-U: No PCI card found\n" ); 184 printk(KERN_WARNING "NETspider-U: No PCI card found\n");
185 return 0; /* end loop & function */ 185 return 0; /* end loop & function */
186 } 186 }
187 return 1; /* end loop */ 187 return 1; /* end loop */
188} 188}
@@ -193,8 +193,8 @@ static int __devinit nju_cs_init_rest(struct IsdnCard *card,
193 const int bytecnt = 256; 193 const int bytecnt = 256;
194 194
195 printk(KERN_INFO 195 printk(KERN_INFO
196 "NETspider-U: PCI card configured at %#lx IRQ %d\n", 196 "NETspider-U: PCI card configured at %#lx IRQ %d\n",
197 cs->hw.njet.base, cs->irq); 197 cs->hw.njet.base, cs->irq);
198 if (!request_region(cs->hw.njet.base, bytecnt, "netspider-u isdn")) { 198 if (!request_region(cs->hw.njet.base, bytecnt, "netspider-u isdn")) {
199 printk(KERN_WARNING 199 printk(KERN_WARNING
200 "HiSax: NETspider-U config port %#lx-%#lx " 200 "HiSax: NETspider-U config port %#lx-%#lx "
@@ -235,19 +235,19 @@ setup_netjet_u(struct IsdnCard *card)
235 strcpy(tmp, NETjet_U_revision); 235 strcpy(tmp, NETjet_U_revision);
236 printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n", HiSax_getrev(tmp)); 236 printk(KERN_INFO "HiSax: Traverse Tech. NETspider-U driver Rev. %s\n", HiSax_getrev(tmp));
237 if (cs->typ != ISDN_CTYPE_NETJET_U) 237 if (cs->typ != ISDN_CTYPE_NETJET_U)
238 return(0); 238 return (0);
239 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags); 239 test_and_clear_bit(FLG_LOCK_ATOMIC, &cs->HW_Flags);
240 240
241 for ( ;; ) 241 for (;;)
242 { 242 {
243 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET, 243 if ((dev_netjet = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
244 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) { 244 PCI_DEVICE_ID_TIGERJET_300, dev_netjet))) {
245 ret = nju_pci_probe(dev_netjet, cs); 245 ret = nju_pci_probe(dev_netjet, cs);
246 if (!ret) 246 if (!ret)
247 return(0); 247 return (0);
248 } else { 248 } else {
249 printk(KERN_WARNING "NETspider-U: No PCI card found\n"); 249 printk(KERN_WARNING "NETspider-U: No PCI card found\n");
250 return(0); 250 return (0);
251 } 251 }
252 252
253 ret = nju_cs_init(card, cs); 253 ret = nju_cs_init(card, cs);
diff --git a/drivers/isdn/hisax/q931.c b/drivers/isdn/hisax/q931.c
index c0771f98fa11..041bf52d9d0a 100644
--- a/drivers/isdn/hisax/q931.c
+++ b/drivers/isdn/hisax/q931.c
@@ -21,7 +21,7 @@
21#include "l3_1tr6.h" 21#include "l3_1tr6.h"
22 22
23void 23void
24iecpy(u_char * dest, u_char * iestart, int ieoffset) 24iecpy(u_char *dest, u_char *iestart, int ieoffset)
25{ 25{
26 u_char *p; 26 u_char *p;
27 int l; 27 int l;
@@ -215,7 +215,7 @@ prbits(char *dest, u_char b, int start, int len)
215 215
216static 216static
217u_char * 217u_char *
218skipext(u_char * p) 218skipext(u_char *p)
219{ 219{
220 while (!(*p++ & 0x80)); 220 while (!(*p++ & 0x80));
221 return (p); 221 return (p);
@@ -442,7 +442,7 @@ struct CauseValue {
442 442
443static 443static
444int 444int
445prcause(char *dest, u_char * p) 445prcause(char *dest, u_char *p)
446{ 446{
447 u_char *end; 447 u_char *end;
448 char *dp = dest; 448 char *dp = dest;
@@ -519,7 +519,7 @@ struct MessageType cause_1tr6[] =
519static int cause_1tr6_len = ARRAY_SIZE(cause_1tr6); 519static int cause_1tr6_len = ARRAY_SIZE(cause_1tr6);
520 520
521static int 521static int
522prcause_1tr6(char *dest, u_char * p) 522prcause_1tr6(char *dest, u_char *p)
523{ 523{
524 char *dp = dest; 524 char *dp = dest;
525 int i, cause; 525 int i, cause;
@@ -554,7 +554,7 @@ prcause_1tr6(char *dest, u_char * p)
554} 554}
555 555
556static int 556static int
557prchident(char *dest, u_char * p) 557prchident(char *dest, u_char *p)
558{ 558{
559 char *dp = dest; 559 char *dp = dest;
560 560
@@ -566,7 +566,7 @@ prchident(char *dest, u_char * p)
566} 566}
567 567
568static int 568static int
569prcalled(char *dest, u_char * p) 569prcalled(char *dest, u_char *p)
570{ 570{
571 int l; 571 int l;
572 char *dp = dest; 572 char *dp = dest;
@@ -583,7 +583,7 @@ prcalled(char *dest, u_char * p)
583 return (dp - dest); 583 return (dp - dest);
584} 584}
585static int 585static int
586prcalling(char *dest, u_char * p) 586prcalling(char *dest, u_char *p)
587{ 587{
588 int l; 588 int l;
589 char *dp = dest; 589 char *dp = dest;
@@ -610,7 +610,7 @@ prcalling(char *dest, u_char * p)
610 610
611static 611static
612int 612int
613prbearer(char *dest, u_char * p) 613prbearer(char *dest, u_char *p)
614{ 614{
615 char *dp = dest, ch; 615 char *dp = dest, ch;
616 616
@@ -658,7 +658,7 @@ prbearer(char *dest, u_char * p)
658 658
659static 659static
660int 660int
661prbearer_ni1(char *dest, u_char * p) 661prbearer_ni1(char *dest, u_char *p)
662{ 662{
663 char *dp = dest; 663 char *dp = dest;
664 u_char len; 664 u_char len;
@@ -668,46 +668,46 @@ prbearer_ni1(char *dest, u_char * p)
668 dp += sprintf(dp, " octet 3 "); 668 dp += sprintf(dp, " octet 3 ");
669 dp += prbits(dp, *p, 8, 8); 669 dp += prbits(dp, *p, 8, 8);
670 switch (*p++) { 670 switch (*p++) {
671 case 0x80: 671 case 0x80:
672 dp += sprintf(dp, " Speech"); 672 dp += sprintf(dp, " Speech");
673 break; 673 break;
674 case 0x88: 674 case 0x88:
675 dp += sprintf(dp, " Unrestricted digital information"); 675 dp += sprintf(dp, " Unrestricted digital information");
676 break; 676 break;
677 case 0x90: 677 case 0x90:
678 dp += sprintf(dp, " 3.1 kHz audio"); 678 dp += sprintf(dp, " 3.1 kHz audio");
679 break; 679 break;
680 default: 680 default:
681 dp += sprintf(dp, " Unknown information-transfer capability"); 681 dp += sprintf(dp, " Unknown information-transfer capability");
682 } 682 }
683 *dp++ = '\n'; 683 *dp++ = '\n';
684 dp += sprintf(dp, " octet 4 "); 684 dp += sprintf(dp, " octet 4 ");
685 dp += prbits(dp, *p, 8, 8); 685 dp += prbits(dp, *p, 8, 8);
686 switch (*p++) { 686 switch (*p++) {
687 case 0x90: 687 case 0x90:
688 dp += sprintf(dp, " 64 kbps, circuit mode"); 688 dp += sprintf(dp, " 64 kbps, circuit mode");
689 break; 689 break;
690 case 0xc0: 690 case 0xc0:
691 dp += sprintf(dp, " Packet mode"); 691 dp += sprintf(dp, " Packet mode");
692 break; 692 break;
693 default: 693 default:
694 dp += sprintf(dp, " Unknown transfer mode"); 694 dp += sprintf(dp, " Unknown transfer mode");
695 } 695 }
696 *dp++ = '\n'; 696 *dp++ = '\n';
697 if (len > 2) { 697 if (len > 2) {
698 dp += sprintf(dp, " octet 5 "); 698 dp += sprintf(dp, " octet 5 ");
699 dp += prbits(dp, *p, 8, 8); 699 dp += prbits(dp, *p, 8, 8);
700 switch (*p++) { 700 switch (*p++) {
701 case 0x21: 701 case 0x21:
702 dp += sprintf(dp, " Rate adaption\n"); 702 dp += sprintf(dp, " Rate adaption\n");
703 dp += sprintf(dp, " octet 5a "); 703 dp += sprintf(dp, " octet 5a ");
704 dp += prbits(dp, *p, 8, 8); 704 dp += prbits(dp, *p, 8, 8);
705 break; 705 break;
706 case 0xa2: 706 case 0xa2:
707 dp += sprintf(dp, " u-law"); 707 dp += sprintf(dp, " u-law");
708 break; 708 break;
709 default: 709 default:
710 dp += sprintf(dp, " Unknown UI layer 1 protocol"); 710 dp += sprintf(dp, " Unknown UI layer 1 protocol");
711 } 711 }
712 *dp++ = '\n'; 712 *dp++ = '\n';
713 } 713 }
@@ -715,7 +715,7 @@ prbearer_ni1(char *dest, u_char * p)
715} 715}
716 716
717static int 717static int
718general(char *dest, u_char * p) 718general(char *dest, u_char *p)
719{ 719{
720 char *dp = dest; 720 char *dp = dest;
721 char ch = ' '; 721 char ch = ' ';
@@ -742,7 +742,7 @@ general(char *dest, u_char * p)
742} 742}
743 743
744static int 744static int
745general_ni1(char *dest, u_char * p) 745general_ni1(char *dest, u_char *p)
746{ 746{
747 char *dp = dest; 747 char *dp = dest;
748 char ch = ' '; 748 char ch = ' ';
@@ -769,7 +769,7 @@ general_ni1(char *dest, u_char * p)
769} 769}
770 770
771static int 771static int
772prcharge(char *dest, u_char * p) 772prcharge(char *dest, u_char *p)
773{ 773{
774 char *dp = dest; 774 char *dp = dest;
775 int l; 775 int l;
@@ -786,7 +786,7 @@ prcharge(char *dest, u_char * p)
786 return (dp - dest); 786 return (dp - dest);
787} 787}
788static int 788static int
789prtext(char *dest, u_char * p) 789prtext(char *dest, u_char *p)
790{ 790{
791 char *dp = dest; 791 char *dp = dest;
792 int l; 792 int l;
@@ -802,7 +802,7 @@ prtext(char *dest, u_char * p)
802} 802}
803 803
804static int 804static int
805prfeatureind(char *dest, u_char * p) 805prfeatureind(char *dest, u_char *p)
806{ 806{
807 char *dp = dest; 807 char *dp = dest;
808 808
@@ -817,21 +817,21 @@ prfeatureind(char *dest, u_char * p)
817 } 817 }
818 dp += sprintf(dp, " Status: "); 818 dp += sprintf(dp, " Status: ");
819 switch (*p) { 819 switch (*p) {
820 case 0: 820 case 0:
821 dp += sprintf(dp, "Idle"); 821 dp += sprintf(dp, "Idle");
822 break; 822 break;
823 case 1: 823 case 1:
824 dp += sprintf(dp, "Active"); 824 dp += sprintf(dp, "Active");
825 break; 825 break;
826 case 2: 826 case 2:
827 dp += sprintf(dp, "Prompt"); 827 dp += sprintf(dp, "Prompt");
828 break; 828 break;
829 case 3: 829 case 3:
830 dp += sprintf(dp, "Pending"); 830 dp += sprintf(dp, "Pending");
831 break; 831 break;
832 default: 832 default:
833 dp += sprintf(dp, "(Reserved)"); 833 dp += sprintf(dp, "(Reserved)");
834 break; 834 break;
835 } 835 }
836 *dp++ = '\n'; 836 *dp++ = '\n';
837 return (dp - dest); 837 return (dp - dest);
@@ -868,7 +868,7 @@ struct DTag { /* Display tags */
868#define DTAGSIZE ARRAY_SIZE(dtaglist) 868#define DTAGSIZE ARRAY_SIZE(dtaglist)
869 869
870static int 870static int
871disptext_ni1(char *dest, u_char * p) 871disptext_ni1(char *dest, u_char *p)
872{ 872{
873 char *dp = dest; 873 char *dp = dest;
874 int l, tag, len, i; 874 int l, tag, len, i;
@@ -902,12 +902,12 @@ disptext_ni1(char *dest, u_char * p)
902 *dp++ = *p++; 902 *dp++ = *p++;
903 } 903 }
904 dp += sprintf(dp, "\n"); 904 dp += sprintf(dp, "\n");
905 } 905 }
906 } 906 }
907 return (dp - dest); 907 return (dp - dest);
908} 908}
909static int 909static int
910display(char *dest, u_char * p) 910display(char *dest, u_char *p)
911{ 911{
912 char *dp = dest; 912 char *dp = dest;
913 char ch = ' '; 913 char ch = ' ';
@@ -936,7 +936,7 @@ display(char *dest, u_char * p)
936} 936}
937 937
938static int 938static int
939prfacility(char *dest, u_char * p) 939prfacility(char *dest, u_char *p)
940{ 940{
941 char *dp = dest; 941 char *dp = dest;
942 int l, l2; 942 int l, l2;
@@ -1148,7 +1148,7 @@ static struct InformationElement we_6[] =
1148#define WE_6_LEN ARRAY_SIZE(we_6) 1148#define WE_6_LEN ARRAY_SIZE(we_6)
1149 1149
1150int 1150int
1151QuickHex(char *txt, u_char * p, int cnt) 1151QuickHex(char *txt, u_char *p, int cnt)
1152{ 1152{
1153 register int i; 1153 register int i;
1154 register char *t = txt; 1154 register char *t = txt;
@@ -1163,7 +1163,7 @@ QuickHex(char *txt, u_char * p, int cnt)
1163} 1163}
1164 1164
1165void 1165void
1166LogFrame(struct IsdnCardState *cs, u_char * buf, int size) 1166LogFrame(struct IsdnCardState *cs, u_char *buf, int size)
1167{ 1167{
1168 char *dp; 1168 char *dp;
1169 1169
@@ -1206,7 +1206,7 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1206 buf = skb->data; 1206 buf = skb->data;
1207 dp += sprintf(dp, "frame %s ", dir ? "network->user" : "user->network"); 1207 dp += sprintf(dp, "frame %s ", dir ? "network->user" : "user->network");
1208 size = skb->len; 1208 size = skb->len;
1209 1209
1210 if (tei == GROUP_TEI) { 1210 if (tei == GROUP_TEI) {
1211 if (sapi == CTRL_SAPI) { /* sapi 0 */ 1211 if (sapi == CTRL_SAPI) { /* sapi 0 */
1212 if (ftyp == 3) { 1212 if (ftyp == 3) {
@@ -1291,28 +1291,28 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1291 /* Is it a single octet information element? */ 1291 /* Is it a single octet information element? */
1292 if (*buf & 0x80) { 1292 if (*buf & 0x80) {
1293 switch ((*buf >> 4) & 7) { 1293 switch ((*buf >> 4) & 7) {
1294 case 1: 1294 case 1:
1295 dp += sprintf(dp, " Shift %x\n", *buf & 0xf); 1295 dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
1296 cs_old = cset; 1296 cs_old = cset;
1297 cset = *buf & 7; 1297 cset = *buf & 7;
1298 cs_fest = *buf & 8; 1298 cs_fest = *buf & 8;
1299 break; 1299 break;
1300 case 3: 1300 case 3:
1301 dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf); 1301 dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
1302 break; 1302 break;
1303 case 2: 1303 case 2:
1304 if (*buf == 0xa0) { 1304 if (*buf == 0xa0) {
1305 dp += sprintf(dp, " More data\n"); 1305 dp += sprintf(dp, " More data\n");
1306 break;
1307 }
1308 if (*buf == 0xa1) {
1309 dp += sprintf(dp, " Sending complete\n");
1310 }
1311 break;
1312 /* fall through */
1313 default:
1314 dp += sprintf(dp, " Reserved %x\n", *buf);
1315 break; 1306 break;
1307 }
1308 if (*buf == 0xa1) {
1309 dp += sprintf(dp, " Sending complete\n");
1310 }
1311 break;
1312 /* fall through */
1313 default:
1314 dp += sprintf(dp, " Reserved %x\n", *buf);
1315 break;
1316 } 1316 }
1317 buf++; 1317 buf++;
1318 continue; 1318 continue;
@@ -1366,11 +1366,11 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1366 /* display message type if it exists */ 1366 /* display message type if it exists */
1367 if (i == MTSIZE) 1367 if (i == MTSIZE)
1368 dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n", 1368 dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
1369 cr & 0x7f, (cr & 0x80) ? "called" : "caller", 1369 cr & 0x7f, (cr & 0x80) ? "called" : "caller",
1370 size, mt); 1370 size, mt);
1371 else 1371 else
1372 dp += sprintf(dp, "callref %d %s size %d message type %s\n", 1372 dp += sprintf(dp, "callref %d %s size %d message type %s\n",
1373 cr & 0x7f, (cr & 0x80) ? "called" : "caller", 1373 cr & 0x7f, (cr & 0x80) ? "called" : "caller",
1374 size, mtlist[i].descr); 1374 size, mtlist[i].descr);
1375 1375
1376 /* display each information element */ 1376 /* display each information element */
@@ -1378,15 +1378,15 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1378 /* Is it a single octet information element? */ 1378 /* Is it a single octet information element? */
1379 if (*buf & 0x80) { 1379 if (*buf & 0x80) {
1380 switch ((*buf >> 4) & 7) { 1380 switch ((*buf >> 4) & 7) {
1381 case 1: 1381 case 1:
1382 dp += sprintf(dp, " Shift %x\n", *buf & 0xf); 1382 dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
1383 cs_old = cset; 1383 cs_old = cset;
1384 cset = *buf & 7; 1384 cset = *buf & 7;
1385 cs_fest = *buf & 8; 1385 cs_fest = *buf & 8;
1386 break; 1386 break;
1387 default: 1387 default:
1388 dp += sprintf(dp, " Unknown single-octet IE %x\n", *buf); 1388 dp += sprintf(dp, " Unknown single-octet IE %x\n", *buf);
1389 break; 1389 break;
1390 } 1390 }
1391 buf++; 1391 buf++;
1392 continue; 1392 continue;
@@ -1452,11 +1452,11 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1452 /* display message type if it exists */ 1452 /* display message type if it exists */
1453 if (i == MTSIZE) 1453 if (i == MTSIZE)
1454 dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n", 1454 dp += sprintf(dp, "callref %d %s size %d unknown message type %x!\n",
1455 cr & 0x7f, (cr & 0x80) ? "called" : "caller", 1455 cr & 0x7f, (cr & 0x80) ? "called" : "caller",
1456 size, mt); 1456 size, mt);
1457 else 1457 else
1458 dp += sprintf(dp, "callref %d %s size %d message type %s\n", 1458 dp += sprintf(dp, "callref %d %s size %d message type %s\n",
1459 cr & 0x7f, (cr & 0x80) ? "called" : "caller", 1459 cr & 0x7f, (cr & 0x80) ? "called" : "caller",
1460 size, mtlist[i].descr); 1460 size, mtlist[i].descr);
1461 1461
1462 /* display each information element */ 1462 /* display each information element */
@@ -1464,28 +1464,28 @@ dlogframe(struct IsdnCardState *cs, struct sk_buff *skb, int dir)
1464 /* Is it a single octet information element? */ 1464 /* Is it a single octet information element? */
1465 if (*buf & 0x80) { 1465 if (*buf & 0x80) {
1466 switch ((*buf >> 4) & 7) { 1466 switch ((*buf >> 4) & 7) {
1467 case 1: 1467 case 1:
1468 dp += sprintf(dp, " Shift %x\n", *buf & 0xf); 1468 dp += sprintf(dp, " Shift %x\n", *buf & 0xf);
1469 break; 1469 break;
1470 case 3: 1470 case 3:
1471 dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf); 1471 dp += sprintf(dp, " Congestion level %x\n", *buf & 0xf);
1472 break; 1472 break;
1473 case 5: 1473 case 5:
1474 dp += sprintf(dp, " Repeat indicator %x\n", *buf & 0xf); 1474 dp += sprintf(dp, " Repeat indicator %x\n", *buf & 0xf);
1475 break; 1475 break;
1476 case 2: 1476 case 2:
1477 if (*buf == 0xa0) { 1477 if (*buf == 0xa0) {
1478 dp += sprintf(dp, " More data\n"); 1478 dp += sprintf(dp, " More data\n");
1479 break;
1480 }
1481 if (*buf == 0xa1) {
1482 dp += sprintf(dp, " Sending complete\n");
1483 }
1484 break;
1485 /* fall through */
1486 default:
1487 dp += sprintf(dp, " Reserved %x\n", *buf);
1488 break; 1479 break;
1480 }
1481 if (*buf == 0xa1) {
1482 dp += sprintf(dp, " Sending complete\n");
1483 }
1484 break;
1485 /* fall through */
1486 default:
1487 dp += sprintf(dp, " Reserved %x\n", *buf);
1488 break;
1489 } 1489 }
1490 buf++; 1490 buf++;
1491 continue; 1491 continue;
diff --git a/drivers/isdn/hisax/s0box.c b/drivers/isdn/hisax/s0box.c
index 16d00b555c8c..383c4e7ce50b 100644
--- a/drivers/isdn/hisax/s0box.c
+++ b/drivers/isdn/hisax/s0box.c
@@ -20,73 +20,73 @@ static const char *s0box_revision = "$Revision: 2.6.2.4 $";
20 20
21static inline void 21static inline void
22writereg(unsigned int padr, signed int addr, u_char off, u_char val) { 22writereg(unsigned int padr, signed int addr, u_char off, u_char val) {
23 outb_p(0x1c,padr+2); 23 outb_p(0x1c, padr + 2);
24 outb_p(0x14,padr+2); 24 outb_p(0x14, padr + 2);
25 outb_p((addr+off)&0x7f,padr); 25 outb_p((addr + off) & 0x7f, padr);
26 outb_p(0x16,padr+2); 26 outb_p(0x16, padr + 2);
27 outb_p(val,padr); 27 outb_p(val, padr);
28 outb_p(0x17,padr+2); 28 outb_p(0x17, padr + 2);
29 outb_p(0x14,padr+2); 29 outb_p(0x14, padr + 2);
30 outb_p(0x1c,padr+2); 30 outb_p(0x1c, padr + 2);
31} 31}
32 32
33static u_char nibtab[] = { 1, 9, 5, 0xd, 3, 0xb, 7, 0xf, 33static u_char nibtab[] = { 1, 9, 5, 0xd, 3, 0xb, 7, 0xf,
34 0, 0, 0, 0, 0, 0, 0, 0, 34 0, 0, 0, 0, 0, 0, 0, 0,
35 0, 8, 4, 0xc, 2, 0xa, 6, 0xe } ; 35 0, 8, 4, 0xc, 2, 0xa, 6, 0xe };
36 36
37static inline u_char 37static inline u_char
38readreg(unsigned int padr, signed int addr, u_char off) { 38readreg(unsigned int padr, signed int addr, u_char off) {
39 register u_char n1, n2; 39 register u_char n1, n2;
40 40
41 outb_p(0x1c,padr+2); 41 outb_p(0x1c, padr + 2);
42 outb_p(0x14,padr+2); 42 outb_p(0x14, padr + 2);
43 outb_p((addr+off)|0x80,padr); 43 outb_p((addr + off) | 0x80, padr);
44 outb_p(0x16,padr+2); 44 outb_p(0x16, padr + 2);
45 outb_p(0x17,padr+2); 45 outb_p(0x17, padr + 2);
46 n1 = (inb_p(padr+1) >> 3) & 0x17; 46 n1 = (inb_p(padr + 1) >> 3) & 0x17;
47 outb_p(0x16,padr+2); 47 outb_p(0x16, padr + 2);
48 n2 = (inb_p(padr+1) >> 3) & 0x17; 48 n2 = (inb_p(padr + 1) >> 3) & 0x17;
49 outb_p(0x14,padr+2); 49 outb_p(0x14, padr + 2);
50 outb_p(0x1c,padr+2); 50 outb_p(0x1c, padr + 2);
51 return nibtab[n1] | (nibtab[n2] << 4); 51 return nibtab[n1] | (nibtab[n2] << 4);
52} 52}
53 53
54static inline void 54static inline void
55read_fifo(unsigned int padr, signed int adr, u_char * data, int size) 55read_fifo(unsigned int padr, signed int adr, u_char *data, int size)
56{ 56{
57 int i; 57 int i;
58 register u_char n1, n2; 58 register u_char n1, n2;
59 59
60 outb_p(0x1c, padr+2); 60 outb_p(0x1c, padr + 2);
61 outb_p(0x14, padr+2); 61 outb_p(0x14, padr + 2);
62 outb_p(adr|0x80, padr); 62 outb_p(adr | 0x80, padr);
63 outb_p(0x16, padr+2); 63 outb_p(0x16, padr + 2);
64 for (i=0; i<size; i++) { 64 for (i = 0; i < size; i++) {
65 outb_p(0x17, padr+2); 65 outb_p(0x17, padr + 2);
66 n1 = (inb_p(padr+1) >> 3) & 0x17; 66 n1 = (inb_p(padr + 1) >> 3) & 0x17;
67 outb_p(0x16,padr+2); 67 outb_p(0x16, padr + 2);
68 n2 = (inb_p(padr+1) >> 3) & 0x17; 68 n2 = (inb_p(padr + 1) >> 3) & 0x17;
69 *(data++)=nibtab[n1] | (nibtab[n2] << 4); 69 *(data++) = nibtab[n1] | (nibtab[n2] << 4);
70 } 70 }
71 outb_p(0x14,padr+2); 71 outb_p(0x14, padr + 2);
72 outb_p(0x1c,padr+2); 72 outb_p(0x1c, padr + 2);
73 return; 73 return;
74} 74}
75 75
76static inline void 76static inline void
77write_fifo(unsigned int padr, signed int adr, u_char * data, int size) 77write_fifo(unsigned int padr, signed int adr, u_char *data, int size)
78{ 78{
79 int i; 79 int i;
80 outb_p(0x1c, padr+2); 80 outb_p(0x1c, padr + 2);
81 outb_p(0x14, padr+2); 81 outb_p(0x14, padr + 2);
82 outb_p(adr&0x7f, padr); 82 outb_p(adr & 0x7f, padr);
83 for (i=0; i<size; i++) { 83 for (i = 0; i < size; i++) {
84 outb_p(0x16, padr+2); 84 outb_p(0x16, padr + 2);
85 outb_p(*(data++), padr); 85 outb_p(*(data++), padr);
86 outb_p(0x17, padr+2); 86 outb_p(0x17, padr + 2);
87 } 87 }
88 outb_p(0x14,padr+2); 88 outb_p(0x14, padr + 2);
89 outb_p(0x1c,padr+2); 89 outb_p(0x1c, padr + 2);
90 return; 90 return;
91} 91}
92 92
@@ -105,13 +105,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
105} 105}
106 106
107static void 107static void
108ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 108ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
109{ 109{
110 read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); 110 read_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
111} 111}
112 112
113static void 113static void
114WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 114WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
115{ 115{
116 write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size); 116 write_fifo(cs->hw.teles3.cfg_reg, cs->hw.teles3.isacfifo, data, size);
117} 117}
@@ -150,11 +150,11 @@ s0box_interrupt(int intno, void *dev_id)
150 150
151 spin_lock_irqsave(&cs->lock, flags); 151 spin_lock_irqsave(&cs->lock, flags);
152 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA); 152 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.hscx[1], HSCX_ISTA);
153 Start_HSCX: 153Start_HSCX:
154 if (val) 154 if (val)
155 hscx_int_main(cs, val); 155 hscx_int_main(cs, val);
156 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA); 156 val = readreg(cs->hw.teles3.cfg_reg, cs->hw.teles3.isac, ISAC_ISTA);
157 Start_ISAC: 157Start_ISAC:
158 if (val) 158 if (val)
159 isac_interrupt(cs, val); 159 isac_interrupt(cs, val);
160 count++; 160 count++;
@@ -194,20 +194,20 @@ S0Box_card_msg(struct IsdnCardState *cs, int mt, void *arg)
194 u_long flags; 194 u_long flags;
195 195
196 switch (mt) { 196 switch (mt) {
197 case CARD_RESET: 197 case CARD_RESET:
198 break; 198 break;
199 case CARD_RELEASE: 199 case CARD_RELEASE:
200 release_io_s0box(cs); 200 release_io_s0box(cs);
201 break; 201 break;
202 case CARD_INIT: 202 case CARD_INIT:
203 spin_lock_irqsave(&cs->lock, flags); 203 spin_lock_irqsave(&cs->lock, flags);
204 inithscxisac(cs, 3); 204 inithscxisac(cs, 3);
205 spin_unlock_irqrestore(&cs->lock, flags); 205 spin_unlock_irqrestore(&cs->lock, flags);
206 break; 206 break;
207 case CARD_TEST: 207 case CARD_TEST:
208 break; 208 break;
209 } 209 }
210 return(0); 210 return (0);
211} 211}
212 212
213int __devinit 213int __devinit
@@ -229,17 +229,17 @@ setup_s0box(struct IsdnCard *card)
229 cs->hw.teles3.hscxfifo[0] = cs->hw.teles3.hscx[0] + 0x3e; 229 cs->hw.teles3.hscxfifo[0] = cs->hw.teles3.hscx[0] + 0x3e;
230 cs->hw.teles3.hscxfifo[1] = cs->hw.teles3.hscx[1] + 0x3e; 230 cs->hw.teles3.hscxfifo[1] = cs->hw.teles3.hscx[1] + 0x3e;
231 cs->irq = card->para[0]; 231 cs->irq = card->para[0];
232 if (!request_region(cs->hw.teles3.cfg_reg,8, "S0Box parallel I/O")) { 232 if (!request_region(cs->hw.teles3.cfg_reg, 8, "S0Box parallel I/O")) {
233 printk(KERN_WARNING "HiSax: S0Box ports %x-%x already in use\n", 233 printk(KERN_WARNING "HiSax: S0Box ports %x-%x already in use\n",
234 cs->hw.teles3.cfg_reg, 234 cs->hw.teles3.cfg_reg,
235 cs->hw.teles3.cfg_reg + 7); 235 cs->hw.teles3.cfg_reg + 7);
236 return 0; 236 return 0;
237 } 237 }
238 printk(KERN_INFO "HiSax: S0Box config irq:%d isac:0x%x cfg:0x%x\n", 238 printk(KERN_INFO "HiSax: S0Box config irq:%d isac:0x%x cfg:0x%x\n",
239 cs->irq, 239 cs->irq,
240 cs->hw.teles3.isac, cs->hw.teles3.cfg_reg); 240 cs->hw.teles3.isac, cs->hw.teles3.cfg_reg);
241 printk(KERN_INFO "HiSax: hscx A:0x%x hscx B:0x%x\n", 241 printk(KERN_INFO "HiSax: hscx A:0x%x hscx B:0x%x\n",
242 cs->hw.teles3.hscx[0], cs->hw.teles3.hscx[1]); 242 cs->hw.teles3.hscx[0], cs->hw.teles3.hscx[1]);
243 setup_isac(cs); 243 setup_isac(cs);
244 cs->readisac = &ReadISAC; 244 cs->readisac = &ReadISAC;
245 cs->writeisac = &WriteISAC; 245 cs->writeisac = &WriteISAC;
diff --git a/drivers/isdn/hisax/saphir.c b/drivers/isdn/hisax/saphir.c
index b34a81d655b8..75dcae6d36e0 100644
--- a/drivers/isdn/hisax/saphir.c
+++ b/drivers/isdn/hisax/saphir.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -20,7 +20,7 @@
20 20
21static char *saphir_rev = "$Revision: 1.10.2.4 $"; 21static char *saphir_rev = "$Revision: 1.10.2.4 $";
22 22
23#define byteout(addr,val) outb(val,addr) 23#define byteout(addr, val) outb(val, addr)
24#define bytein(addr) inb(addr) 24#define bytein(addr) inb(addr)
25 25
26#define ISAC_DATA 0 26#define ISAC_DATA 0
@@ -41,7 +41,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
41} 41}
42 42
43static inline void 43static inline void
44readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 44readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
45{ 45{
46 byteout(ale, off); 46 byteout(ale, off);
47 insb(adr, data, size); 47 insb(adr, data, size);
@@ -56,7 +56,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
56} 56}
57 57
58static inline void 58static inline void
59writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 59writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
60{ 60{
61 byteout(ale, off); 61 byteout(ale, off);
62 outsb(adr, data, size); 62 outsb(adr, data, size);
@@ -77,13 +77,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
77} 77}
78 78
79static void 79static void
80ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 80ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
81{ 81{
82 readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); 82 readfifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size);
83} 83}
84 84
85static void 85static void
86WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 86WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
87{ 87{
88 writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size); 88 writefifo(cs->hw.saphir.ale, cs->hw.saphir.isac, 0, data, size);
89} 89}
@@ -92,26 +92,26 @@ static u_char
92ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset) 92ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
93{ 93{
94 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, 94 return (readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx,
95 offset + (hscx ? 0x40 : 0))); 95 offset + (hscx ? 0x40 : 0)));
96} 96}
97 97
98static void 98static void
99WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value) 99WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
100{ 100{
101 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, 101 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx,
102 offset + (hscx ? 0x40 : 0), value); 102 offset + (hscx ? 0x40 : 0), value);
103} 103}
104 104
105#define READHSCX(cs, nr, reg) readreg(cs->hw.saphir.ale, \ 105#define READHSCX(cs, nr, reg) readreg(cs->hw.saphir.ale, \
106 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0)) 106 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0))
107#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.saphir.ale, \ 107#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.saphir.ale, \
108 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0), data) 108 cs->hw.saphir.hscx, reg + (nr ? 0x40 : 0), data)
109 109
110#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.saphir.ale, \ 110#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.saphir.ale, \
111 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt) 111 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
112 112
113#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.saphir.ale, \ 113#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.saphir.ale, \
114 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt) 114 cs->hw.saphir.hscx, (nr ? 0x40 : 0), ptr, cnt)
115 115
116#include "hscx_irq.c" 116#include "hscx_irq.c"
117 117
@@ -124,11 +124,11 @@ saphir_interrupt(int intno, void *dev_id)
124 124
125 spin_lock_irqsave(&cs->lock, flags); 125 spin_lock_irqsave(&cs->lock, flags);
126 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40); 126 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
127 Start_HSCX: 127Start_HSCX:
128 if (val) 128 if (val)
129 hscx_int_main(cs, val); 129 hscx_int_main(cs, val);
130 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA); 130 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.isac, ISAC_ISTA);
131 Start_ISAC: 131Start_ISAC:
132 if (val) 132 if (val)
133 isac_interrupt(cs, val); 133 isac_interrupt(cs, val);
134 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40); 134 val = readreg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_ISTA + 0x40);
@@ -144,8 +144,8 @@ saphir_interrupt(int intno, void *dev_id)
144 goto Start_ISAC; 144 goto Start_ISAC;
145 } 145 }
146 /* Watchdog */ 146 /* Watchdog */
147 if (cs->hw.saphir.timer.function) 147 if (cs->hw.saphir.timer.function)
148 mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ); 148 mod_timer(&cs->hw.saphir.timer, jiffies + 1 * HZ);
149 else 149 else
150 printk(KERN_WARNING "saphir: Spurious timer!\n"); 150 printk(KERN_WARNING "saphir: Spurious timer!\n");
151 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0xFF); 151 writereg(cs->hw.saphir.ale, cs->hw.saphir.hscx, HSCX_MASK, 0xFF);
@@ -164,10 +164,10 @@ SaphirWatchDog(struct IsdnCardState *cs)
164 u_long flags; 164 u_long flags;
165 165
166 spin_lock_irqsave(&cs->lock, flags); 166 spin_lock_irqsave(&cs->lock, flags);
167 /* 5 sec WatchDog, so read at least every 4 sec */ 167 /* 5 sec WatchDog, so read at least every 4 sec */
168 cs->readisac(cs, ISAC_RBCH); 168 cs->readisac(cs, ISAC_RBCH);
169 spin_unlock_irqrestore(&cs->lock, flags); 169 spin_unlock_irqrestore(&cs->lock, flags);
170 mod_timer(&cs->hw.saphir.timer, jiffies+1*HZ); 170 mod_timer(&cs->hw.saphir.timer, jiffies + 1 * HZ);
171} 171}
172 172
173static void 173static void
@@ -185,24 +185,24 @@ saphir_reset(struct IsdnCardState *cs)
185{ 185{
186 u_char irq_val; 186 u_char irq_val;
187 187
188 switch(cs->irq) { 188 switch (cs->irq) {
189 case 5: irq_val = 0; 189 case 5: irq_val = 0;
190 break; 190 break;
191 case 3: irq_val = 1; 191 case 3: irq_val = 1;
192 break; 192 break;
193 case 11: 193 case 11:
194 irq_val = 2; 194 irq_val = 2;
195 break; 195 break;
196 case 12: 196 case 12:
197 irq_val = 3; 197 irq_val = 3;
198 break; 198 break;
199 case 15: 199 case 15:
200 irq_val = 4; 200 irq_val = 4;
201 break; 201 break;
202 default: 202 default:
203 printk(KERN_WARNING "HiSax: saphir wrong IRQ %d\n", 203 printk(KERN_WARNING "HiSax: saphir wrong IRQ %d\n",
204 cs->irq); 204 cs->irq);
205 return (1); 205 return (1);
206 } 206 }
207 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val); 207 byteout(cs->hw.saphir.cfg_reg + IRQ_REG, irq_val);
208 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1); 208 byteout(cs->hw.saphir.cfg_reg + RESET_REG, 1);
@@ -220,23 +220,23 @@ saphir_card_msg(struct IsdnCardState *cs, int mt, void *arg)
220 u_long flags; 220 u_long flags;
221 221
222 switch (mt) { 222 switch (mt) {
223 case CARD_RESET: 223 case CARD_RESET:
224 spin_lock_irqsave(&cs->lock, flags); 224 spin_lock_irqsave(&cs->lock, flags);
225 saphir_reset(cs); 225 saphir_reset(cs);
226 spin_unlock_irqrestore(&cs->lock, flags); 226 spin_unlock_irqrestore(&cs->lock, flags);
227 return(0); 227 return (0);
228 case CARD_RELEASE: 228 case CARD_RELEASE:
229 release_io_saphir(cs); 229 release_io_saphir(cs);
230 return(0); 230 return (0);
231 case CARD_INIT: 231 case CARD_INIT:
232 spin_lock_irqsave(&cs->lock, flags); 232 spin_lock_irqsave(&cs->lock, flags);
233 inithscxisac(cs, 3); 233 inithscxisac(cs, 3);
234 spin_unlock_irqrestore(&cs->lock, flags); 234 spin_unlock_irqrestore(&cs->lock, flags);
235 return(0); 235 return (0);
236 case CARD_TEST: 236 case CARD_TEST:
237 return(0); 237 return (0);
238 } 238 }
239 return(0); 239 return (0);
240} 240}
241 241
242 242
@@ -259,9 +259,9 @@ setup_saphir(struct IsdnCard *card)
259 cs->irq = card->para[0]; 259 cs->irq = card->para[0];
260 if (!request_region(cs->hw.saphir.cfg_reg, 6, "saphir")) { 260 if (!request_region(cs->hw.saphir.cfg_reg, 6, "saphir")) {
261 printk(KERN_WARNING 261 printk(KERN_WARNING
262 "HiSax: HST Saphir config port %x-%x already in use\n", 262 "HiSax: HST Saphir config port %x-%x already in use\n",
263 cs->hw.saphir.cfg_reg, 263 cs->hw.saphir.cfg_reg,
264 cs->hw.saphir.cfg_reg + 5); 264 cs->hw.saphir.cfg_reg + 5);
265 return (0); 265 return (0);
266 } 266 }
267 267
@@ -272,7 +272,7 @@ setup_saphir(struct IsdnCard *card)
272 cs->hw.saphir.timer.function = (void *) SaphirWatchDog; 272 cs->hw.saphir.timer.function = (void *) SaphirWatchDog;
273 cs->hw.saphir.timer.data = (long) cs; 273 cs->hw.saphir.timer.data = (long) cs;
274 init_timer(&cs->hw.saphir.timer); 274 init_timer(&cs->hw.saphir.timer);
275 cs->hw.saphir.timer.expires = jiffies + 4*HZ; 275 cs->hw.saphir.timer.expires = jiffies + 4 * HZ;
276 add_timer(&cs->hw.saphir.timer); 276 add_timer(&cs->hw.saphir.timer);
277 if (saphir_reset(cs)) { 277 if (saphir_reset(cs)) {
278 release_io_saphir(cs); 278 release_io_saphir(cs);
@@ -290,7 +290,7 @@ setup_saphir(struct IsdnCard *card)
290 ISACVersion(cs, "saphir:"); 290 ISACVersion(cs, "saphir:");
291 if (HscxVersion(cs, "saphir:")) { 291 if (HscxVersion(cs, "saphir:")) {
292 printk(KERN_WARNING 292 printk(KERN_WARNING
293 "saphir: wrong HSCX versions check IO address\n"); 293 "saphir: wrong HSCX versions check IO address\n");
294 release_io_saphir(cs); 294 release_io_saphir(cs);
295 return (0); 295 return (0);
296 } 296 }
diff --git a/drivers/isdn/hisax/sedlbauer.c b/drivers/isdn/hisax/sedlbauer.c
index 69dfc8d29017..1ee531b6be99 100644
--- a/drivers/isdn/hisax/sedlbauer.c
+++ b/drivers/isdn/hisax/sedlbauer.c
@@ -9,7 +9,7 @@
9 * 9 *
10 * Author Marcus Niemann 10 * Author Marcus Niemann
11 * Copyright by Marcus Niemann <niemann@www-bib.fh-bielefeld.de> 11 * Copyright by Marcus Niemann <niemann@www-bib.fh-bielefeld.de>
12 * 12 *
13 * This software may be used and distributed according to the terms 13 * This software may be used and distributed according to the terms
14 * of the GNU General Public License, incorporated herein by reference. 14 * of the GNU General Public License, incorporated herein by reference.
15 * 15 *
@@ -30,13 +30,13 @@
30 * ISDN PC/104 IPAC DIP-SWITCH 30 * ISDN PC/104 IPAC DIP-SWITCH
31 * Speed Star2 IPAC CARDMGR 31 * Speed Star2 IPAC CARDMGR
32 * Speed PCI IPAC PCI PNP 32 * Speed PCI IPAC PCI PNP
33 * Speed Fax+ ISAC_ISAR PCI PNP Full analog support 33 * Speed Fax+ ISAC_ISAR PCI PNP Full analog support
34 * 34 *
35 * Important: 35 * Important:
36 * For the sedlbauer speed fax+ to work properly you have to download 36 * For the sedlbauer speed fax+ to work properly you have to download
37 * the firmware onto the card. 37 * the firmware onto the card.
38 * For example: hisaxctrl <DriverID> 9 ISAR.BIN 38 * For example: hisaxctrl <DriverID> 9 ISAR.BIN
39*/ 39 */
40 40
41#include <linux/init.h> 41#include <linux/init.h>
42#include "hisax.h" 42#include "hisax.h"
@@ -51,9 +51,9 @@
51static const char *Sedlbauer_revision = "$Revision: 1.34.2.6 $"; 51static const char *Sedlbauer_revision = "$Revision: 1.34.2.6 $";
52 52
53static const char *Sedlbauer_Types[] = 53static const char *Sedlbauer_Types[] =
54 {"None", "speed card/win", "speed star", "speed fax+", 54{"None", "speed card/win", "speed star", "speed fax+",
55 "speed win II / ISDN PC/104", "speed star II", "speed pci", 55 "speed win II / ISDN PC/104", "speed star II", "speed pci",
56 "speed fax+ pyramid", "speed fax+ pci", "HST Saphir III"}; 56 "speed fax+ pyramid", "speed fax+ pci", "HST Saphir III"};
57 57
58#define PCI_SUBVENDOR_SPEEDFAX_PYRAMID 0x51 58#define PCI_SUBVENDOR_SPEEDFAX_PYRAMID 0x51
59#define PCI_SUBVENDOR_HST_SAPHIR3 0x52 59#define PCI_SUBVENDOR_HST_SAPHIR3 0x52
@@ -62,11 +62,11 @@ static const char *Sedlbauer_Types[] =
62#define PCI_SUB_ID_SEDLBAUER 0x01 62#define PCI_SUB_ID_SEDLBAUER 0x01
63 63
64#define SEDL_SPEED_CARD_WIN 1 64#define SEDL_SPEED_CARD_WIN 1
65#define SEDL_SPEED_STAR 2 65#define SEDL_SPEED_STAR 2
66#define SEDL_SPEED_FAX 3 66#define SEDL_SPEED_FAX 3
67#define SEDL_SPEED_WIN2_PC104 4 67#define SEDL_SPEED_WIN2_PC104 4
68#define SEDL_SPEED_STAR2 5 68#define SEDL_SPEED_STAR2 5
69#define SEDL_SPEED_PCI 6 69#define SEDL_SPEED_PCI 6
70#define SEDL_SPEEDFAX_PYRAMID 7 70#define SEDL_SPEEDFAX_PYRAMID 7
71#define SEDL_SPEEDFAX_PCI 8 71#define SEDL_SPEEDFAX_PCI 8
72#define HST_SAPHIR3 9 72#define HST_SAPHIR3 9
@@ -80,7 +80,7 @@ static const char *Sedlbauer_Types[] =
80#define SEDL_BUS_PCI 2 80#define SEDL_BUS_PCI 2
81#define SEDL_BUS_PCMCIA 3 81#define SEDL_BUS_PCMCIA 3
82 82
83#define byteout(addr,val) outb(val,addr) 83#define byteout(addr, val) outb(val, addr)
84#define bytein(addr) inb(addr) 84#define bytein(addr) inb(addr)
85 85
86#define SEDL_HSCX_ISA_RESET_ON 0 86#define SEDL_HSCX_ISA_RESET_ON 0
@@ -127,7 +127,7 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
127} 127}
128 128
129static inline void 129static inline void
130readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 130readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
131{ 131{
132 byteout(ale, off); 132 byteout(ale, off);
133 insb(adr, data, size); 133 insb(adr, data, size);
@@ -142,7 +142,7 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
142} 142}
143 143
144static inline void 144static inline void
145writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 145writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
146{ 146{
147 byteout(ale, off); 147 byteout(ale, off);
148 outsb(adr, data, size); 148 outsb(adr, data, size);
@@ -163,13 +163,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
163} 163}
164 164
165static void 165static void
166ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 166ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
167{ 167{
168 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); 168 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size);
169} 169}
170 170
171static void 171static void
172WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 172WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
173{ 173{
174 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size); 174 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0, data, size);
175} 175}
@@ -177,23 +177,23 @@ WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
177static u_char 177static u_char
178ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset) 178ReadISAC_IPAC(struct IsdnCardState *cs, u_char offset)
179{ 179{
180 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset|0x80)); 180 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80));
181} 181}
182 182
183static void 183static void
184WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value) 184WriteISAC_IPAC(struct IsdnCardState *cs, u_char offset, u_char value)
185{ 185{
186 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset|0x80, value); 186 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, offset | 0x80, value);
187} 187}
188 188
189static void 189static void
190ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 190ReadISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
191{ 191{
192 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size); 192 readfifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size);
193} 193}
194 194
195static void 195static void
196WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char * data, int size) 196WriteISACfifo_IPAC(struct IsdnCardState *cs, u_char *data, int size)
197{ 197{
198 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size); 198 writefifo(cs->hw.sedl.adr, cs->hw.sedl.isac, 0x80, data, size);
199} 199}
@@ -220,12 +220,12 @@ WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
220 220
221static u_char 221static u_char
222ReadISAR(struct IsdnCardState *cs, int mode, u_char offset) 222ReadISAR(struct IsdnCardState *cs, int mode, u_char offset)
223{ 223{
224 if (mode == 0) 224 if (mode == 0)
225 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset)); 225 return (readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, offset));
226 else if (mode == 1) 226 else if (mode == 1)
227 byteout(cs->hw.sedl.adr, offset); 227 byteout(cs->hw.sedl.adr, offset);
228 return(bytein(cs->hw.sedl.hscx)); 228 return (bytein(cs->hw.sedl.hscx));
229} 229}
230 230
231static void 231static void
@@ -244,16 +244,16 @@ WriteISAR(struct IsdnCardState *cs, int mode, u_char offset, u_char value)
244 * fast interrupt HSCX stuff goes here 244 * fast interrupt HSCX stuff goes here
245 */ 245 */
246 246
247#define READHSCX(cs, nr, reg) readreg(cs->hw.sedl.adr, \ 247#define READHSCX(cs, nr, reg) readreg(cs->hw.sedl.adr, \
248 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0)) 248 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0))
249#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.sedl.adr, \ 249#define WRITEHSCX(cs, nr, reg, data) writereg(cs->hw.sedl.adr, \
250 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0), data) 250 cs->hw.sedl.hscx, reg + (nr ? 0x40 : 0), data)
251 251
252#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.sedl.adr, \ 252#define READHSCXFIFO(cs, nr, ptr, cnt) readfifo(cs->hw.sedl.adr, \
253 cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt) 253 cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
254 254
255#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.sedl.adr, \ 255#define WRITEHSCXFIFO(cs, nr, ptr, cnt) writefifo(cs->hw.sedl.adr, \
256 cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt) 256 cs->hw.sedl.hscx, (nr ? 0x40 : 0), ptr, cnt)
257 257
258#include "hscx_irq.c" 258#include "hscx_irq.c"
259 259
@@ -274,11 +274,11 @@ sedlbauer_interrupt(int intno, void *dev_id)
274 } 274 }
275 275
276 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40); 276 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
277 Start_HSCX: 277Start_HSCX:
278 if (val) 278 if (val)
279 hscx_int_main(cs, val); 279 hscx_int_main(cs, val);
280 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); 280 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA);
281 Start_ISAC: 281Start_ISAC:
282 if (val) 282 if (val)
283 isac_interrupt(cs, val); 283 isac_interrupt(cs, val);
284 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40); 284 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, HSCX_ISTA + 0x40);
@@ -360,11 +360,11 @@ sedlbauer_interrupt_isar(int intno, void *dev_id)
360 360
361 spin_lock_irqsave(&cs->lock, flags); 361 spin_lock_irqsave(&cs->lock, flags);
362 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT); 362 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT);
363 Start_ISAR: 363Start_ISAR:
364 if (val & ISAR_IRQSTA) 364 if (val & ISAR_IRQSTA)
365 isar_int_main(cs); 365 isar_int_main(cs);
366 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA); 366 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.isac, ISAC_ISTA);
367 Start_ISAC: 367Start_ISAC:
368 if (val) 368 if (val)
369 isac_interrupt(cs, val); 369 isac_interrupt(cs, val);
370 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT); 370 val = readreg(cs->hw.sedl.adr, cs->hw.sedl.hscx, ISAR_IRQBIT);
@@ -411,7 +411,7 @@ reset_sedlbauer(struct IsdnCardState *cs)
411 printk(KERN_INFO "Sedlbauer: resetting card\n"); 411 printk(KERN_INFO "Sedlbauer: resetting card\n");
412 412
413 if (!((cs->hw.sedl.bus == SEDL_BUS_PCMCIA) && 413 if (!((cs->hw.sedl.bus == SEDL_BUS_PCMCIA) &&
414 (cs->hw.sedl.chip == SEDL_CHIP_ISAC_HSCX))) { 414 (cs->hw.sedl.chip == SEDL_CHIP_ISAC_HSCX))) {
415 if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) { 415 if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) {
416 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_POTA2, 0x20); 416 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_POTA2, 0x20);
417 mdelay(2); 417 mdelay(2);
@@ -423,12 +423,12 @@ reset_sedlbauer(struct IsdnCardState *cs)
423 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_MASK, 0xc0); 423 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_MASK, 0xc0);
424 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_PCFG, 0x12); 424 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac, IPAC_PCFG, 0x12);
425 } else if ((cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) && 425 } else if ((cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) &&
426 (cs->hw.sedl.bus == SEDL_BUS_PCI)) { 426 (cs->hw.sedl.bus == SEDL_BUS_PCI)) {
427 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_on); 427 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_on);
428 mdelay(2); 428 mdelay(2);
429 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); 429 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
430 mdelay(10); 430 mdelay(10);
431 } else { 431 } else {
432 byteout(cs->hw.sedl.reset_on, SEDL_RESET); /* Reset On */ 432 byteout(cs->hw.sedl.reset_on, SEDL_RESET); /* Reset On */
433 mdelay(2); 433 mdelay(2);
434 byteout(cs->hw.sedl.reset_off, 0); /* Reset Off */ 434 byteout(cs->hw.sedl.reset_off, 0); /* Reset Off */
@@ -443,86 +443,86 @@ Sedl_card_msg(struct IsdnCardState *cs, int mt, void *arg)
443 u_long flags; 443 u_long flags;
444 444
445 switch (mt) { 445 switch (mt) {
446 case CARD_RESET: 446 case CARD_RESET:
447 spin_lock_irqsave(&cs->lock, flags); 447 spin_lock_irqsave(&cs->lock, flags);
448 reset_sedlbauer(cs); 448 reset_sedlbauer(cs);
449 spin_unlock_irqrestore(&cs->lock, flags); 449 spin_unlock_irqrestore(&cs->lock, flags);
450 return(0); 450 return (0);
451 case CARD_RELEASE: 451 case CARD_RELEASE:
452 if (cs->hw.sedl.bus == SEDL_BUS_PCI) 452 if (cs->hw.sedl.bus == SEDL_BUS_PCI)
453 /* disable all IRQ */ 453 /* disable all IRQ */
454 byteout(cs->hw.sedl.cfg_reg+ 5, 0); 454 byteout(cs->hw.sedl.cfg_reg + 5, 0);
455 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) { 455 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
456 spin_lock_irqsave(&cs->lock, flags);
457 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
458 ISAR_IRQBIT, 0);
459 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
460 ISAC_MASK, 0xFF);
461 reset_sedlbauer(cs);
462 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
463 ISAR_IRQBIT, 0);
464 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
465 ISAC_MASK, 0xFF);
466 spin_unlock_irqrestore(&cs->lock, flags);
467 }
468 release_io_sedlbauer(cs);
469 return(0);
470 case CARD_INIT:
471 spin_lock_irqsave(&cs->lock, flags); 456 spin_lock_irqsave(&cs->lock, flags);
472 if (cs->hw.sedl.bus == SEDL_BUS_PCI) 457 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
473 /* enable all IRQ */ 458 ISAR_IRQBIT, 0);
474 byteout(cs->hw.sedl.cfg_reg+ 5, 0x02); 459 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
460 ISAC_MASK, 0xFF);
475 reset_sedlbauer(cs); 461 reset_sedlbauer(cs);
476 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) { 462 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
477 clear_pending_isac_ints(cs); 463 ISAR_IRQBIT, 0);
478 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx, 464 writereg(cs->hw.sedl.adr, cs->hw.sedl.isac,
479 ISAR_IRQBIT, 0); 465 ISAC_MASK, 0xFF);
480 initisac(cs);
481 initisar(cs);
482 /* Reenable all IRQ */
483 cs->writeisac(cs, ISAC_MASK, 0);
484 /* RESET Receiver and Transmitter */
485 cs->writeisac(cs, ISAC_CMDR, 0x41);
486 } else {
487 inithscxisac(cs, 3);
488 }
489 spin_unlock_irqrestore(&cs->lock, flags); 466 spin_unlock_irqrestore(&cs->lock, flags);
490 return(0); 467 }
491 case CARD_TEST: 468 release_io_sedlbauer(cs);
492 return(0); 469 return (0);
493 case MDL_INFO_CONN: 470 case CARD_INIT:
494 if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID) 471 spin_lock_irqsave(&cs->lock, flags);
495 return(0); 472 if (cs->hw.sedl.bus == SEDL_BUS_PCI)
496 spin_lock_irqsave(&cs->lock, flags); 473 /* enable all IRQ */
497 if ((long) arg) 474 byteout(cs->hw.sedl.cfg_reg + 5, 0x02);
498 cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED2; 475 reset_sedlbauer(cs);
499 else 476 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
500 cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED1; 477 clear_pending_isac_ints(cs);
501 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); 478 writereg(cs->hw.sedl.adr, cs->hw.sedl.hscx,
502 spin_unlock_irqrestore(&cs->lock, flags); 479 ISAR_IRQBIT, 0);
503 break; 480 initisac(cs);
504 case MDL_INFO_REL: 481 initisar(cs);
505 if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID) 482 /* Reenable all IRQ */
506 return(0); 483 cs->writeisac(cs, ISAC_MASK, 0);
507 spin_lock_irqsave(&cs->lock, flags); 484 /* RESET Receiver and Transmitter */
508 if ((long) arg) 485 cs->writeisac(cs, ISAC_CMDR, 0x41);
509 cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED2; 486 } else {
510 else 487 inithscxisac(cs, 3);
511 cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED1; 488 }
512 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); 489 spin_unlock_irqrestore(&cs->lock, flags);
513 spin_unlock_irqrestore(&cs->lock, flags); 490 return (0);
514 break; 491 case CARD_TEST:
492 return (0);
493 case MDL_INFO_CONN:
494 if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
495 return (0);
496 spin_lock_irqsave(&cs->lock, flags);
497 if ((long) arg)
498 cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED2;
499 else
500 cs->hw.sedl.reset_off &= ~SEDL_ISAR_PCI_LED1;
501 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
502 spin_unlock_irqrestore(&cs->lock, flags);
503 break;
504 case MDL_INFO_REL:
505 if (cs->subtyp != SEDL_SPEEDFAX_PYRAMID)
506 return (0);
507 spin_lock_irqsave(&cs->lock, flags);
508 if ((long) arg)
509 cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED2;
510 else
511 cs->hw.sedl.reset_off |= SEDL_ISAR_PCI_LED1;
512 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
513 spin_unlock_irqrestore(&cs->lock, flags);
514 break;
515 } 515 }
516 return(0); 516 return (0);
517} 517}
518 518
519#ifdef __ISAPNP__ 519#ifdef __ISAPNP__
520static struct isapnp_device_id sedl_ids[] __devinitdata = { 520static struct isapnp_device_id sedl_ids[] __devinitdata = {
521 { ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01), 521 { ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01),
522 ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01), 522 ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x01),
523 (unsigned long) "Speed win" }, 523 (unsigned long) "Speed win" },
524 { ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02), 524 { ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02),
525 ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02), 525 ISAPNP_VENDOR('S', 'A', 'G'), ISAPNP_FUNCTION(0x02),
526 (unsigned long) "Speed Fax+" }, 526 (unsigned long) "Speed Fax+" },
527 { 0, } 527 { 0, }
528}; 528};
@@ -539,31 +539,31 @@ setup_sedlbauer_isapnp(struct IsdnCard *card, int *bytecnt)
539 if (!isapnp_present()) 539 if (!isapnp_present())
540 return -1; 540 return -1;
541 541
542 while(ipid->card_vendor) { 542 while (ipid->card_vendor) {
543 if ((pnp_c = pnp_find_card(ipid->card_vendor, 543 if ((pnp_c = pnp_find_card(ipid->card_vendor,
544 ipid->card_device, pnp_c))) { 544 ipid->card_device, pnp_c))) {
545 pnp_d = NULL; 545 pnp_d = NULL;
546 if ((pnp_d = pnp_find_dev(pnp_c, 546 if ((pnp_d = pnp_find_dev(pnp_c,
547 ipid->vendor, ipid->function, pnp_d))) { 547 ipid->vendor, ipid->function, pnp_d))) {
548 int err; 548 int err;
549 549
550 printk(KERN_INFO "HiSax: %s detected\n", 550 printk(KERN_INFO "HiSax: %s detected\n",
551 (char *)ipid->driver_data); 551 (char *)ipid->driver_data);
552 pnp_disable_dev(pnp_d); 552 pnp_disable_dev(pnp_d);
553 err = pnp_activate_dev(pnp_d); 553 err = pnp_activate_dev(pnp_d);
554 if (err<0) { 554 if (err < 0) {
555 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 555 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
556 __func__, err); 556 __func__, err);
557 return(0); 557 return (0);
558 } 558 }
559 card->para[1] = pnp_port_start(pnp_d, 0); 559 card->para[1] = pnp_port_start(pnp_d, 0);
560 card->para[0] = pnp_irq(pnp_d, 0); 560 card->para[0] = pnp_irq(pnp_d, 0);
561 561
562 if (!card->para[0] || !card->para[1]) { 562 if (!card->para[0] || !card->para[1]) {
563 printk(KERN_ERR "Sedlbauer PnP:some resources are missing %ld/%lx\n", 563 printk(KERN_ERR "Sedlbauer PnP:some resources are missing %ld/%lx\n",
564 card->para[0], card->para[1]); 564 card->para[0], card->para[1]);
565 pnp_disable_dev(pnp_d); 565 pnp_disable_dev(pnp_d);
566 return(0); 566 return (0);
567 } 567 }
568 cs->hw.sedl.cfg_reg = card->para[1]; 568 cs->hw.sedl.cfg_reg = card->para[1];
569 cs->irq = card->para[0]; 569 cs->irq = card->para[0];
@@ -579,12 +579,12 @@ setup_sedlbauer_isapnp(struct IsdnCard *card, int *bytecnt)
579 return (1); 579 return (1);
580 } else { 580 } else {
581 printk(KERN_ERR "Sedlbauer PnP: PnP error card found, no device\n"); 581 printk(KERN_ERR "Sedlbauer PnP: PnP error card found, no device\n");
582 return(0); 582 return (0);
583 } 583 }
584 } 584 }
585 ipid++; 585 ipid++;
586 pnp_c = NULL; 586 pnp_c = NULL;
587 } 587 }
588 588
589 printk(KERN_INFO "Sedlbauer PnP: no ISAPnP card found\n"); 589 printk(KERN_INFO "Sedlbauer PnP: no ISAPnP card found\n");
590 return -1; 590 return -1;
@@ -608,30 +608,30 @@ setup_sedlbauer_pci(struct IsdnCard *card)
608 u16 sub_vendor_id, sub_id; 608 u16 sub_vendor_id, sub_id;
609 609
610 if ((dev_sedl = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET, 610 if ((dev_sedl = hisax_find_pci_device(PCI_VENDOR_ID_TIGERJET,
611 PCI_DEVICE_ID_TIGERJET_100, dev_sedl))) { 611 PCI_DEVICE_ID_TIGERJET_100, dev_sedl))) {
612 if (pci_enable_device(dev_sedl)) 612 if (pci_enable_device(dev_sedl))
613 return(0); 613 return (0);
614 cs->irq = dev_sedl->irq; 614 cs->irq = dev_sedl->irq;
615 if (!cs->irq) { 615 if (!cs->irq) {
616 printk(KERN_WARNING "Sedlbauer: No IRQ for PCI card found\n"); 616 printk(KERN_WARNING "Sedlbauer: No IRQ for PCI card found\n");
617 return(0); 617 return (0);
618 } 618 }
619 cs->hw.sedl.cfg_reg = pci_resource_start(dev_sedl, 0); 619 cs->hw.sedl.cfg_reg = pci_resource_start(dev_sedl, 0);
620 } else { 620 } else {
621 printk(KERN_WARNING "Sedlbauer: No PCI card found\n"); 621 printk(KERN_WARNING "Sedlbauer: No PCI card found\n");
622 return(0); 622 return (0);
623 } 623 }
624 cs->irq_flags |= IRQF_SHARED; 624 cs->irq_flags |= IRQF_SHARED;
625 cs->hw.sedl.bus = SEDL_BUS_PCI; 625 cs->hw.sedl.bus = SEDL_BUS_PCI;
626 sub_vendor_id = dev_sedl->subsystem_vendor; 626 sub_vendor_id = dev_sedl->subsystem_vendor;
627 sub_id = dev_sedl->subsystem_device; 627 sub_id = dev_sedl->subsystem_device;
628 printk(KERN_INFO "Sedlbauer: PCI subvendor:%x subid %x\n", 628 printk(KERN_INFO "Sedlbauer: PCI subvendor:%x subid %x\n",
629 sub_vendor_id, sub_id); 629 sub_vendor_id, sub_id);
630 printk(KERN_INFO "Sedlbauer: PCI base adr %#x\n", 630 printk(KERN_INFO "Sedlbauer: PCI base adr %#x\n",
631 cs->hw.sedl.cfg_reg); 631 cs->hw.sedl.cfg_reg);
632 if (sub_id != PCI_SUB_ID_SEDLBAUER) { 632 if (sub_id != PCI_SUB_ID_SEDLBAUER) {
633 printk(KERN_ERR "Sedlbauer: unknown sub id %#x\n", sub_id); 633 printk(KERN_ERR "Sedlbauer: unknown sub id %#x\n", sub_id);
634 return(0); 634 return (0);
635 } 635 }
636 if (sub_vendor_id == PCI_SUBVENDOR_SPEEDFAX_PYRAMID) { 636 if (sub_vendor_id == PCI_SUBVENDOR_SPEEDFAX_PYRAMID) {
637 cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR; 637 cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR;
@@ -647,19 +647,19 @@ setup_sedlbauer_pci(struct IsdnCard *card)
647 cs->subtyp = SEDL_SPEED_PCI; 647 cs->subtyp = SEDL_SPEED_PCI;
648 } else { 648 } else {
649 printk(KERN_ERR "Sedlbauer: unknown sub vendor id %#x\n", 649 printk(KERN_ERR "Sedlbauer: unknown sub vendor id %#x\n",
650 sub_vendor_id); 650 sub_vendor_id);
651 return(0); 651 return (0);
652 } 652 }
653 653
654 cs->hw.sedl.reset_on = SEDL_ISAR_PCI_ISAR_RESET_ON; 654 cs->hw.sedl.reset_on = SEDL_ISAR_PCI_ISAR_RESET_ON;
655 cs->hw.sedl.reset_off = SEDL_ISAR_PCI_ISAR_RESET_OFF; 655 cs->hw.sedl.reset_off = SEDL_ISAR_PCI_ISAR_RESET_OFF;
656 byteout(cs->hw.sedl.cfg_reg, 0xff); 656 byteout(cs->hw.sedl.cfg_reg, 0xff);
657 byteout(cs->hw.sedl.cfg_reg, 0x00); 657 byteout(cs->hw.sedl.cfg_reg, 0x00);
658 byteout(cs->hw.sedl.cfg_reg+ 2, 0xdd); 658 byteout(cs->hw.sedl.cfg_reg + 2, 0xdd);
659 byteout(cs->hw.sedl.cfg_reg+ 5, 0); /* disable all IRQ */ 659 byteout(cs->hw.sedl.cfg_reg + 5, 0); /* disable all IRQ */
660 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_on); 660 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_on);
661 mdelay(2); 661 mdelay(2);
662 byteout(cs->hw.sedl.cfg_reg +3, cs->hw.sedl.reset_off); 662 byteout(cs->hw.sedl.cfg_reg + 3, cs->hw.sedl.reset_off);
663 mdelay(10); 663 mdelay(10);
664 664
665 return (1); 665 return (1);
@@ -684,20 +684,20 @@ setup_sedlbauer(struct IsdnCard *card)
684 684
685 strcpy(tmp, Sedlbauer_revision); 685 strcpy(tmp, Sedlbauer_revision);
686 printk(KERN_INFO "HiSax: Sedlbauer driver Rev. %s\n", HiSax_getrev(tmp)); 686 printk(KERN_INFO "HiSax: Sedlbauer driver Rev. %s\n", HiSax_getrev(tmp));
687 687
688 if (cs->typ == ISDN_CTYPE_SEDLBAUER) { 688 if (cs->typ == ISDN_CTYPE_SEDLBAUER) {
689 cs->subtyp = SEDL_SPEED_CARD_WIN; 689 cs->subtyp = SEDL_SPEED_CARD_WIN;
690 cs->hw.sedl.bus = SEDL_BUS_ISA; 690 cs->hw.sedl.bus = SEDL_BUS_ISA;
691 cs->hw.sedl.chip = SEDL_CHIP_TEST; 691 cs->hw.sedl.chip = SEDL_CHIP_TEST;
692 } else if (cs->typ == ISDN_CTYPE_SEDLBAUER_PCMCIA) { 692 } else if (cs->typ == ISDN_CTYPE_SEDLBAUER_PCMCIA) {
693 cs->subtyp = SEDL_SPEED_STAR; 693 cs->subtyp = SEDL_SPEED_STAR;
694 cs->hw.sedl.bus = SEDL_BUS_PCMCIA; 694 cs->hw.sedl.bus = SEDL_BUS_PCMCIA;
695 cs->hw.sedl.chip = SEDL_CHIP_TEST; 695 cs->hw.sedl.chip = SEDL_CHIP_TEST;
696 } else if (cs->typ == ISDN_CTYPE_SEDLBAUER_FAX) { 696 } else if (cs->typ == ISDN_CTYPE_SEDLBAUER_FAX) {
697 cs->subtyp = SEDL_SPEED_FAX; 697 cs->subtyp = SEDL_SPEED_FAX;
698 cs->hw.sedl.bus = SEDL_BUS_ISA; 698 cs->hw.sedl.bus = SEDL_BUS_ISA;
699 cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR; 699 cs->hw.sedl.chip = SEDL_CHIP_ISAC_ISAR;
700 } else 700 } else
701 return (0); 701 return (0);
702 702
703 bytecnt = 8; 703 bytecnt = 8;
@@ -720,22 +720,22 @@ setup_sedlbauer(struct IsdnCard *card)
720 return (0); 720 return (0);
721 721
722 bytecnt = 256; 722 bytecnt = 256;
723 } 723 }
724 724
725ready: 725ready:
726 726
727 /* In case of the sedlbauer pcmcia card, this region is in use, 727 /* In case of the sedlbauer pcmcia card, this region is in use,
728 * reserved for us by the card manager. So we do not check it 728 * reserved for us by the card manager. So we do not check it
729 * here, it would fail. 729 * here, it would fail.
730 */ 730 */
731 if (cs->hw.sedl.bus != SEDL_BUS_PCMCIA && 731 if (cs->hw.sedl.bus != SEDL_BUS_PCMCIA &&
732 !request_region(cs->hw.sedl.cfg_reg, bytecnt, "sedlbauer isdn")) { 732 !request_region(cs->hw.sedl.cfg_reg, bytecnt, "sedlbauer isdn")) {
733 printk(KERN_WARNING 733 printk(KERN_WARNING
734 "HiSax: %s config port %x-%x already in use\n", 734 "HiSax: %s config port %x-%x already in use\n",
735 CardType[card->typ], 735 CardType[card->typ],
736 cs->hw.sedl.cfg_reg, 736 cs->hw.sedl.cfg_reg,
737 cs->hw.sedl.cfg_reg + bytecnt); 737 cs->hw.sedl.cfg_reg + bytecnt);
738 return (0); 738 return (0);
739 } 739 }
740 740
741 printk(KERN_INFO 741 printk(KERN_INFO
@@ -753,12 +753,12 @@ ready:
753 * testing ISA and PCMCIA Cards for IPAC, default is ISAC 753 * testing ISA and PCMCIA Cards for IPAC, default is ISAC
754 * do not test for PCI card, because ports are different 754 * do not test for PCI card, because ports are different
755 * and PCI card uses only IPAC (for the moment) 755 * and PCI card uses only IPAC (for the moment)
756 */ 756 */
757 if (cs->hw.sedl.bus != SEDL_BUS_PCI) { 757 if (cs->hw.sedl.bus != SEDL_BUS_PCI) {
758 val = readreg(cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR, 758 val = readreg(cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR,
759 cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC, IPAC_ID); 759 cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC, IPAC_ID);
760 printk(KERN_DEBUG "Sedlbauer: testing IPAC version %x\n", val); 760 printk(KERN_DEBUG "Sedlbauer: testing IPAC version %x\n", val);
761 if ((val == 1) || (val == 2)) { 761 if ((val == 1) || (val == 2)) {
762 /* IPAC */ 762 /* IPAC */
763 cs->subtyp = SEDL_SPEED_WIN2_PC104; 763 cs->subtyp = SEDL_SPEED_WIN2_PC104;
764 if (cs->hw.sedl.bus == SEDL_BUS_PCMCIA) { 764 if (cs->hw.sedl.bus == SEDL_BUS_PCMCIA) {
@@ -777,16 +777,16 @@ ready:
777 * hw.sedl.chip is now properly set 777 * hw.sedl.chip is now properly set
778 */ 778 */
779 printk(KERN_INFO "Sedlbauer: %s detected\n", 779 printk(KERN_INFO "Sedlbauer: %s detected\n",
780 Sedlbauer_Types[cs->subtyp]); 780 Sedlbauer_Types[cs->subtyp]);
781 781
782 setup_isac(cs); 782 setup_isac(cs);
783 if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) { 783 if (cs->hw.sedl.chip == SEDL_CHIP_IPAC) {
784 if (cs->hw.sedl.bus == SEDL_BUS_PCI) { 784 if (cs->hw.sedl.bus == SEDL_BUS_PCI) {
785 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_ADR; 785 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_ADR;
786 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC; 786 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC;
787 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC; 787 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_PCI_IPAC;
788 } else { 788 } else {
789 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR; 789 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_ADR;
790 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC; 790 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC;
791 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC; 791 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + SEDL_IPAC_ANY_IPAC;
792 } 792 }
@@ -807,22 +807,22 @@ ready:
807 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) { 807 if (cs->hw.sedl.chip == SEDL_CHIP_ISAC_ISAR) {
808 if (cs->hw.sedl.bus == SEDL_BUS_PCI) { 808 if (cs->hw.sedl.bus == SEDL_BUS_PCI) {
809 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + 809 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg +
810 SEDL_ISAR_PCI_ADR; 810 SEDL_ISAR_PCI_ADR;
811 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + 811 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg +
812 SEDL_ISAR_PCI_ISAC; 812 SEDL_ISAR_PCI_ISAC;
813 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + 813 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg +
814 SEDL_ISAR_PCI_ISAR; 814 SEDL_ISAR_PCI_ISAR;
815 } else { 815 } else {
816 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg + 816 cs->hw.sedl.adr = cs->hw.sedl.cfg_reg +
817 SEDL_ISAR_ISA_ADR; 817 SEDL_ISAR_ISA_ADR;
818 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg + 818 cs->hw.sedl.isac = cs->hw.sedl.cfg_reg +
819 SEDL_ISAR_ISA_ISAC; 819 SEDL_ISAR_ISA_ISAC;
820 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg + 820 cs->hw.sedl.hscx = cs->hw.sedl.cfg_reg +
821 SEDL_ISAR_ISA_ISAR; 821 SEDL_ISAR_ISA_ISAR;
822 cs->hw.sedl.reset_on = cs->hw.sedl.cfg_reg + 822 cs->hw.sedl.reset_on = cs->hw.sedl.cfg_reg +
823 SEDL_ISAR_ISA_ISAR_RESET_ON; 823 SEDL_ISAR_ISA_ISAR_RESET_ON;
824 cs->hw.sedl.reset_off = cs->hw.sedl.cfg_reg + 824 cs->hw.sedl.reset_off = cs->hw.sedl.cfg_reg +
825 SEDL_ISAR_ISA_ISAR_RESET_OFF; 825 SEDL_ISAR_ISA_ISAR_RESET_OFF;
826 } 826 }
827 cs->bcs[0].hw.isar.reg = &cs->hw.sedl.isar; 827 cs->bcs[0].hw.isar.reg = &cs->hw.sedl.isar;
828 cs->bcs[1].hw.isar.reg = &cs->hw.sedl.isar; 828 cs->bcs[1].hw.isar.reg = &cs->hw.sedl.isar;
@@ -838,7 +838,7 @@ ready:
838 ver = ISARVersion(cs, "Sedlbauer:"); 838 ver = ISARVersion(cs, "Sedlbauer:");
839 if (ver < 0) 839 if (ver < 0)
840 printk(KERN_WARNING 840 printk(KERN_WARNING
841 "Sedlbauer: wrong ISAR version (ret = %d)\n", ver); 841 "Sedlbauer: wrong ISAR version (ret = %d)\n", ver);
842 else 842 else
843 break; 843 break;
844 reset_sedlbauer(cs); 844 reset_sedlbauer(cs);
@@ -865,10 +865,10 @@ ready:
865 } 865 }
866 cs->irq_func = &sedlbauer_interrupt; 866 cs->irq_func = &sedlbauer_interrupt;
867 ISACVersion(cs, "Sedlbauer:"); 867 ISACVersion(cs, "Sedlbauer:");
868 868
869 if (HscxVersion(cs, "Sedlbauer:")) { 869 if (HscxVersion(cs, "Sedlbauer:")) {
870 printk(KERN_WARNING 870 printk(KERN_WARNING
871 "Sedlbauer: wrong HSCX versions check IO address\n"); 871 "Sedlbauer: wrong HSCX versions check IO address\n");
872 release_io_sedlbauer(cs); 872 release_io_sedlbauer(cs);
873 return (0); 873 return (0);
874 } 874 }
diff --git a/drivers/isdn/hisax/sedlbauer_cs.c b/drivers/isdn/hisax/sedlbauer_cs.c
index 06473f81f039..68f50495d166 100644
--- a/drivers/isdn/hisax/sedlbauer_cs.c
+++ b/drivers/isdn/hisax/sedlbauer_cs.c
@@ -1,39 +1,39 @@
1/*====================================================================== 1/*======================================================================
2 2
3 A Sedlbauer PCMCIA client driver 3 A Sedlbauer PCMCIA client driver
4 4
5 This driver is for the Sedlbauer Speed Star and Speed Star II, 5 This driver is for the Sedlbauer Speed Star and Speed Star II,
6 which are ISDN PCMCIA Cards. 6 which are ISDN PCMCIA Cards.
7 7
8 The contents of this file are subject to the Mozilla Public 8 The contents of this file are subject to the Mozilla Public
9 License Version 1.1 (the "License"); you may not use this file 9 License Version 1.1 (the "License"); you may not use this file
10 except in compliance with the License. You may obtain a copy of 10 except in compliance with the License. You may obtain a copy of
11 the License at http://www.mozilla.org/MPL/ 11 the License at http://www.mozilla.org/MPL/
12 12
13 Software distributed under the License is distributed on an "AS 13 Software distributed under the License is distributed on an "AS
14 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or 14 IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
15 implied. See the License for the specific language governing 15 implied. See the License for the specific language governing
16 rights and limitations under the License. 16 rights and limitations under the License.
17 17
18 The initial developer of the original code is David A. Hinds 18 The initial developer of the original code is David A. Hinds
19 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds 19 <dahinds@users.sourceforge.net>. Portions created by David A. Hinds
20 are Copyright (C) 1999 David A. Hinds. All Rights Reserved. 20 are Copyright (C) 1999 David A. Hinds. All Rights Reserved.
21 21
22 Modifications from dummy_cs.c are Copyright (C) 1999-2001 Marcus Niemann 22 Modifications from dummy_cs.c are Copyright (C) 1999-2001 Marcus Niemann
23 <maniemann@users.sourceforge.net>. All Rights Reserved. 23 <maniemann@users.sourceforge.net>. All Rights Reserved.
24 24
25 Alternatively, the contents of this file may be used under the 25 Alternatively, the contents of this file may be used under the
26 terms of the GNU General Public License version 2 (the "GPL"), in 26 terms of the GNU General Public License version 2 (the "GPL"), in
27 which case the provisions of the GPL are applicable instead of the 27 which case the provisions of the GPL are applicable instead of the
28 above. If you wish to allow the use of your version of this file 28 above. If you wish to allow the use of your version of this file
29 only under the terms of the GPL and not to allow others to use 29 only under the terms of the GPL and not to allow others to use
30 your version of this file under the MPL, indicate your decision 30 your version of this file under the MPL, indicate your decision
31 by deleting the provisions above and replace them with the notice 31 by deleting the provisions above and replace them with the notice
32 and other provisions required by the GPL. If you do not delete 32 and other provisions required by the GPL. If you do not delete
33 the provisions above, a recipient may use your version of this 33 the provisions above, a recipient may use your version of this
34 file under either the MPL or the GPL. 34 file under either the MPL or the GPL.
35 35
36======================================================================*/ 36 ======================================================================*/
37 37
38#include <linux/kernel.h> 38#include <linux/kernel.h>
39#include <linux/module.h> 39#include <linux/module.h>
@@ -63,32 +63,32 @@ MODULE_LICENSE("Dual MPL/GPL");
63static int protocol = 2; /* EURO-ISDN Default */ 63static int protocol = 2; /* EURO-ISDN Default */
64module_param(protocol, int, 0); 64module_param(protocol, int, 0);
65 65
66static int sedlbauer_config(struct pcmcia_device *link) __devinit ; 66static int sedlbauer_config(struct pcmcia_device *link) __devinit;
67static void sedlbauer_release(struct pcmcia_device *link); 67static void sedlbauer_release(struct pcmcia_device *link);
68 68
69static void sedlbauer_detach(struct pcmcia_device *p_dev) __devexit; 69static void sedlbauer_detach(struct pcmcia_device *p_dev) __devexit;
70 70
71typedef struct local_info_t { 71typedef struct local_info_t {
72 struct pcmcia_device *p_dev; 72 struct pcmcia_device *p_dev;
73 int stop; 73 int stop;
74 int cardnr; 74 int cardnr;
75} local_info_t; 75} local_info_t;
76 76
77static int __devinit sedlbauer_probe(struct pcmcia_device *link) 77static int __devinit sedlbauer_probe(struct pcmcia_device *link)
78{ 78{
79 local_info_t *local; 79 local_info_t *local;
80 80
81 dev_dbg(&link->dev, "sedlbauer_attach()\n"); 81 dev_dbg(&link->dev, "sedlbauer_attach()\n");
82 82
83 /* Allocate space for private device-specific data */ 83 /* Allocate space for private device-specific data */
84 local = kzalloc(sizeof(local_info_t), GFP_KERNEL); 84 local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
85 if (!local) return -ENOMEM; 85 if (!local) return -ENOMEM;
86 local->cardnr = -1; 86 local->cardnr = -1;
87 87
88 local->p_dev = link; 88 local->p_dev = link;
89 link->priv = local; 89 link->priv = local;
90 90
91 return sedlbauer_config(link); 91 return sedlbauer_config(link);
92} /* sedlbauer_attach */ 92} /* sedlbauer_attach */
93 93
94static void __devexit sedlbauer_detach(struct pcmcia_device *link) 94static void __devexit sedlbauer_detach(struct pcmcia_device *link)
@@ -113,58 +113,58 @@ static int sedlbauer_config_check(struct pcmcia_device *p_dev, void *priv_data)
113 113
114static int __devinit sedlbauer_config(struct pcmcia_device *link) 114static int __devinit sedlbauer_config(struct pcmcia_device *link)
115{ 115{
116 int ret; 116 int ret;
117 IsdnCard_t icard; 117 IsdnCard_t icard;
118 118
119 dev_dbg(&link->dev, "sedlbauer_config(0x%p)\n", link); 119 dev_dbg(&link->dev, "sedlbauer_config(0x%p)\n", link);
120
121 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_CHECK_VCC |
122 CONF_AUTO_SET_VPP | CONF_AUTO_AUDIO | CONF_AUTO_SET_IO;
123
124 ret = pcmcia_loop_config(link, sedlbauer_config_check, NULL);
125 if (ret)
126 goto failed;
127
128 ret = pcmcia_enable_device(link);
129 if (ret)
130 goto failed;
131
132 icard.para[0] = link->irq;
133 icard.para[1] = link->resource[0]->start;
134 icard.protocol = protocol;
135 icard.typ = ISDN_CTYPE_SEDLBAUER_PCMCIA;
136
137 ret = hisax_init_pcmcia(link,
138 &(((local_info_t *)link->priv)->stop), &icard);
139 if (ret < 0) {
140 printk(KERN_ERR "sedlbauer_cs: failed to initialize SEDLBAUER PCMCIA %d with %pR\n",
141 ret, link->resource[0]);
142 sedlbauer_release(link);
143 return -ENODEV;
144 } else
145 ((local_info_t *)link->priv)->cardnr = ret;
146 120
147 return 0; 121 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_CHECK_VCC |
122 CONF_AUTO_SET_VPP | CONF_AUTO_AUDIO | CONF_AUTO_SET_IO;
123
124 ret = pcmcia_loop_config(link, sedlbauer_config_check, NULL);
125 if (ret)
126 goto failed;
127
128 ret = pcmcia_enable_device(link);
129 if (ret)
130 goto failed;
131
132 icard.para[0] = link->irq;
133 icard.para[1] = link->resource[0]->start;
134 icard.protocol = protocol;
135 icard.typ = ISDN_CTYPE_SEDLBAUER_PCMCIA;
136
137 ret = hisax_init_pcmcia(link,
138 &(((local_info_t *)link->priv)->stop), &icard);
139 if (ret < 0) {
140 printk(KERN_ERR "sedlbauer_cs: failed to initialize SEDLBAUER PCMCIA %d with %pR\n",
141 ret, link->resource[0]);
142 sedlbauer_release(link);
143 return -ENODEV;
144 } else
145 ((local_info_t *)link->priv)->cardnr = ret;
146
147 return 0;
148 148
149failed: 149failed:
150 sedlbauer_release(link); 150 sedlbauer_release(link);
151 return -ENODEV; 151 return -ENODEV;
152 152
153} /* sedlbauer_config */ 153} /* sedlbauer_config */
154 154
155static void sedlbauer_release(struct pcmcia_device *link) 155static void sedlbauer_release(struct pcmcia_device *link)
156{ 156{
157 local_info_t *local = link->priv; 157 local_info_t *local = link->priv;
158 dev_dbg(&link->dev, "sedlbauer_release(0x%p)\n", link); 158 dev_dbg(&link->dev, "sedlbauer_release(0x%p)\n", link);
159 159
160 if (local) { 160 if (local) {
161 if (local->cardnr >= 0) { 161 if (local->cardnr >= 0) {
162 /* no unregister function with hisax */ 162 /* no unregister function with hisax */
163 HiSax_closecard(local->cardnr); 163 HiSax_closecard(local->cardnr);
164 }
164 } 165 }
165 }
166 166
167 pcmcia_disable_device(link); 167 pcmcia_disable_device(link);
168} /* sedlbauer_release */ 168} /* sedlbauer_release */
169 169
170static int sedlbauer_suspend(struct pcmcia_device *link) 170static int sedlbauer_suspend(struct pcmcia_device *link)
diff --git a/drivers/isdn/hisax/sportster.c b/drivers/isdn/hisax/sportster.c
index 0a53759adfa4..1267298ef551 100644
--- a/drivers/isdn/hisax/sportster.c
+++ b/drivers/isdn/hisax/sportster.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -20,7 +20,7 @@
20 20
21static const char *sportster_revision = "$Revision: 1.16.2.4 $"; 21static const char *sportster_revision = "$Revision: 1.16.2.4 $";
22 22
23#define byteout(addr,val) outb(val,addr) 23#define byteout(addr, val) outb(val, addr)
24#define bytein(addr) inb(addr) 24#define bytein(addr) inb(addr)
25 25
26#define SPORTSTER_ISAC 0xC000 26#define SPORTSTER_ISAC 0xC000
@@ -33,17 +33,17 @@ static const char *sportster_revision = "$Revision: 1.16.2.4 $";
33static inline int 33static inline int
34calc_off(unsigned int base, unsigned int off) 34calc_off(unsigned int base, unsigned int off)
35{ 35{
36 return(base + ((off & 0xfc)<<8) + ((off & 3)<<1)); 36 return (base + ((off & 0xfc) << 8) + ((off & 3) << 1));
37} 37}
38 38
39static inline void 39static inline void
40read_fifo(unsigned int adr, u_char * data, int size) 40read_fifo(unsigned int adr, u_char *data, int size)
41{ 41{
42 insb(adr, data, size); 42 insb(adr, data, size);
43} 43}
44 44
45static void 45static void
46write_fifo(unsigned int adr, u_char * data, int size) 46write_fifo(unsigned int adr, u_char *data, int size)
47{ 47{
48 outsb(adr, data, size); 48 outsb(adr, data, size);
49} 49}
@@ -63,13 +63,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
63} 63}
64 64
65static void 65static void
66ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 66ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
67{ 67{
68 read_fifo(cs->hw.spt.isac, data, size); 68 read_fifo(cs->hw.spt.isac, data, size);
69} 69}
70 70
71static void 71static void
72WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 72WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
73{ 73{
74 write_fifo(cs->hw.spt.isac, data, size); 74 write_fifo(cs->hw.spt.isac, data, size);
75} 75}
@@ -106,11 +106,11 @@ sportster_interrupt(int intno, void *dev_id)
106 106
107 spin_lock_irqsave(&cs->lock, flags); 107 spin_lock_irqsave(&cs->lock, flags);
108 val = READHSCX(cs, 1, HSCX_ISTA); 108 val = READHSCX(cs, 1, HSCX_ISTA);
109 Start_HSCX: 109Start_HSCX:
110 if (val) 110 if (val)
111 hscx_int_main(cs, val); 111 hscx_int_main(cs, val);
112 val = ReadISAC(cs, ISAC_ISTA); 112 val = ReadISAC(cs, ISAC_ISTA);
113 Start_ISAC: 113Start_ISAC:
114 if (val) 114 if (val)
115 isac_interrupt(cs, val); 115 isac_interrupt(cs, val);
116 val = READHSCX(cs, 1, HSCX_ISTA); 116 val = READHSCX(cs, 1, HSCX_ISTA);
@@ -126,7 +126,7 @@ sportster_interrupt(int intno, void *dev_id)
126 goto Start_ISAC; 126 goto Start_ISAC;
127 } 127 }
128 /* get a new irq impulse if there any pending */ 128 /* get a new irq impulse if there any pending */
129 bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ +1); 129 bytein(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ + 1);
130 spin_unlock_irqrestore(&cs->lock, flags); 130 spin_unlock_irqrestore(&cs->lock, flags);
131 return IRQ_HANDLED; 131 return IRQ_HANDLED;
132} 132}
@@ -137,8 +137,8 @@ release_io_sportster(struct IsdnCardState *cs)
137 int i, adr; 137 int i, adr;
138 138
139 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0); 139 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, 0);
140 for (i=0; i<64; i++) { 140 for (i = 0; i < 64; i++) {
141 adr = cs->hw.spt.cfg_reg + i *1024; 141 adr = cs->hw.spt.cfg_reg + i * 1024;
142 release_region(adr, 8); 142 release_region(adr, 8);
143 } 143 }
144} 144}
@@ -160,51 +160,51 @@ Sportster_card_msg(struct IsdnCardState *cs, int mt, void *arg)
160 u_long flags; 160 u_long flags;
161 161
162 switch (mt) { 162 switch (mt) {
163 case CARD_RESET: 163 case CARD_RESET:
164 spin_lock_irqsave(&cs->lock, flags); 164 spin_lock_irqsave(&cs->lock, flags);
165 reset_sportster(cs); 165 reset_sportster(cs);
166 spin_unlock_irqrestore(&cs->lock, flags); 166 spin_unlock_irqrestore(&cs->lock, flags);
167 return(0); 167 return (0);
168 case CARD_RELEASE: 168 case CARD_RELEASE:
169 release_io_sportster(cs); 169 release_io_sportster(cs);
170 return(0); 170 return (0);
171 case CARD_INIT: 171 case CARD_INIT:
172 spin_lock_irqsave(&cs->lock, flags); 172 spin_lock_irqsave(&cs->lock, flags);
173 reset_sportster(cs); 173 reset_sportster(cs);
174 inithscxisac(cs, 1); 174 inithscxisac(cs, 1);
175 cs->hw.spt.res_irq |= SPORTSTER_INTE; /* IRQ On */ 175 cs->hw.spt.res_irq |= SPORTSTER_INTE; /* IRQ On */
176 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq); 176 byteout(cs->hw.spt.cfg_reg + SPORTSTER_RES_IRQ, cs->hw.spt.res_irq);
177 inithscxisac(cs, 2); 177 inithscxisac(cs, 2);
178 spin_unlock_irqrestore(&cs->lock, flags); 178 spin_unlock_irqrestore(&cs->lock, flags);
179 return(0); 179 return (0);
180 case CARD_TEST: 180 case CARD_TEST:
181 return(0); 181 return (0);
182 } 182 }
183 return(0); 183 return (0);
184} 184}
185 185
186static int __devinit 186static int __devinit
187get_io_range(struct IsdnCardState *cs) 187get_io_range(struct IsdnCardState *cs)
188{ 188{
189 int i, j, adr; 189 int i, j, adr;
190 190
191 for (i=0;i<64;i++) { 191 for (i = 0; i < 64; i++) {
192 adr = cs->hw.spt.cfg_reg + i *1024; 192 adr = cs->hw.spt.cfg_reg + i * 1024;
193 if (!request_region(adr, 8, "sportster")) { 193 if (!request_region(adr, 8, "sportster")) {
194 printk(KERN_WARNING "HiSax: USR Sportster config port " 194 printk(KERN_WARNING "HiSax: USR Sportster config port "
195 "%x-%x already in use\n", 195 "%x-%x already in use\n",
196 adr, adr + 8); 196 adr, adr + 8);
197 break; 197 break;
198 } 198 }
199 } 199 }
200 if (i==64) 200 if (i == 64)
201 return(1); 201 return (1);
202 else { 202 else {
203 for (j=0; j<i; j++) { 203 for (j = 0; j < i; j++) {
204 adr = cs->hw.spt.cfg_reg + j *1024; 204 adr = cs->hw.spt.cfg_reg + j * 1024;
205 release_region(adr, 8); 205 release_region(adr, 8);
206 } 206 }
207 return(0); 207 return (0);
208 } 208 }
209} 209}
210 210
@@ -226,28 +226,28 @@ setup_sportster(struct IsdnCard *card)
226 cs->hw.spt.isac = cs->hw.spt.cfg_reg + SPORTSTER_ISAC; 226 cs->hw.spt.isac = cs->hw.spt.cfg_reg + SPORTSTER_ISAC;
227 cs->hw.spt.hscx[0] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXA; 227 cs->hw.spt.hscx[0] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXA;
228 cs->hw.spt.hscx[1] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXB; 228 cs->hw.spt.hscx[1] = cs->hw.spt.cfg_reg + SPORTSTER_HSCXB;
229 229
230 switch(cs->irq) { 230 switch (cs->irq) {
231 case 5: cs->hw.spt.res_irq = 1; 231 case 5: cs->hw.spt.res_irq = 1;
232 break; 232 break;
233 case 7: cs->hw.spt.res_irq = 2; 233 case 7: cs->hw.spt.res_irq = 2;
234 break; 234 break;
235 case 10:cs->hw.spt.res_irq = 3; 235 case 10:cs->hw.spt.res_irq = 3;
236 break; 236 break;
237 case 11:cs->hw.spt.res_irq = 4; 237 case 11:cs->hw.spt.res_irq = 4;
238 break; 238 break;
239 case 12:cs->hw.spt.res_irq = 5; 239 case 12:cs->hw.spt.res_irq = 5;
240 break; 240 break;
241 case 14:cs->hw.spt.res_irq = 6; 241 case 14:cs->hw.spt.res_irq = 6;
242 break; 242 break;
243 case 15:cs->hw.spt.res_irq = 7; 243 case 15:cs->hw.spt.res_irq = 7;
244 break; 244 break;
245 default:release_io_sportster(cs); 245 default:release_io_sportster(cs);
246 printk(KERN_WARNING "Sportster: wrong IRQ\n"); 246 printk(KERN_WARNING "Sportster: wrong IRQ\n");
247 return(0); 247 return (0);
248 } 248 }
249 printk(KERN_INFO "HiSax: USR Sportster config irq:%d cfg:0x%X\n", 249 printk(KERN_INFO "HiSax: USR Sportster config irq:%d cfg:0x%X\n",
250 cs->irq, cs->hw.spt.cfg_reg); 250 cs->irq, cs->hw.spt.cfg_reg);
251 setup_isac(cs); 251 setup_isac(cs);
252 cs->readisac = &ReadISAC; 252 cs->readisac = &ReadISAC;
253 cs->writeisac = &WriteISAC; 253 cs->writeisac = &WriteISAC;
diff --git a/drivers/isdn/hisax/st5481.h b/drivers/isdn/hisax/st5481.h
index b9054cb7a0da..8cd2d8277426 100644
--- a/drivers/isdn/hisax/st5481.h
+++ b/drivers/isdn/hisax/st5481.h
@@ -4,7 +4,7 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -31,7 +31,7 @@
31#define EP_B2_IN 0x05U /* B2 channel in */ 31#define EP_B2_IN 0x05U /* B2 channel in */
32#define EP_D_OUT 0x06U /* D channel out */ 32#define EP_D_OUT 0x06U /* D channel out */
33#define EP_D_IN 0x07U /* D channel in */ 33#define EP_D_IN 0x07U /* D channel in */
34 34
35// Number of isochronous packets. With 20 packets we get 35// Number of isochronous packets. With 20 packets we get
36// 50 interrupts/sec for each endpoint. 36// 50 interrupts/sec for each endpoint.
37 37
@@ -51,7 +51,7 @@
51#define B_FLOW_ADJUST 2 51#define B_FLOW_ADJUST 2
52 52
53// Registers that are written using vendor specific device request 53// Registers that are written using vendor specific device request
54// on endpoint 0. 54// on endpoint 0.
55 55
56#define LBA 0x02 /* S loopback */ 56#define LBA 0x02 /* S loopback */
57#define SET_DEFAULT 0x06 /* Soft reset */ 57#define SET_DEFAULT 0x06 /* Soft reset */
@@ -84,7 +84,7 @@
84#define FFMSK_B2 0x50 /* B2 fifo interrupt MASK register */ 84#define FFMSK_B2 0x50 /* B2 fifo interrupt MASK register */
85#define GPIO_DIR 0x52 /* GPIO pins direction registers */ 85#define GPIO_DIR 0x52 /* GPIO pins direction registers */
86#define GPIO_OUT 0x53 /* GPIO pins output register */ 86#define GPIO_OUT 0x53 /* GPIO pins output register */
87#define GPIO_IN 0x54 /* GPIO pins input register */ 87#define GPIO_IN 0x54 /* GPIO pins input register */
88#define TXCI 0x56 /* CI command to be transmitted */ 88#define TXCI 0x56 /* CI command to be transmitted */
89 89
90 90
@@ -124,8 +124,8 @@
124#define IN_COUNTER_ZEROED 0x02 /* In down-counter reached 0 */ 124#define IN_COUNTER_ZEROED 0x02 /* In down-counter reached 0 */
125#define OUT_COUNTER_ZEROED 0x01 /* Out down-counter reached 0 */ 125#define OUT_COUNTER_ZEROED 0x01 /* Out down-counter reached 0 */
126 126
127#define ANY_REC_INT (IN_OVERRUN+IN_UP+IN_DOWN+IN_COUNTER_ZEROED) 127#define ANY_REC_INT (IN_OVERRUN + IN_UP + IN_DOWN + IN_COUNTER_ZEROED)
128#define ANY_XMIT_INT (OUT_UNDERRUN+OUT_UP+OUT_DOWN+OUT_COUNTER_ZEROED) 128#define ANY_XMIT_INT (OUT_UNDERRUN + OUT_UP + OUT_DOWN + OUT_COUNTER_ZEROED)
129 129
130 130
131// Level 1 commands that are sent using the TXCI device request 131// Level 1 commands that are sent using the TXCI device request
@@ -158,7 +158,7 @@ enum {
158 ST_DOUT_NORMAL, 158 ST_DOUT_NORMAL,
159 159
160 ST_DOUT_WAIT_FOR_UNDERRUN, 160 ST_DOUT_WAIT_FOR_UNDERRUN,
161 ST_DOUT_WAIT_FOR_NOT_BUSY, 161 ST_DOUT_WAIT_FOR_NOT_BUSY,
162 ST_DOUT_WAIT_FOR_STOP, 162 ST_DOUT_WAIT_FOR_STOP,
163 ST_DOUT_WAIT_FOR_RESET, 163 ST_DOUT_WAIT_FOR_RESET,
164}; 164};
@@ -188,9 +188,9 @@ enum {
188 ST_L1_F8, 188 ST_L1_F8,
189}; 189};
190 190
191#define L1_STATE_COUNT (ST_L1_F8+1) 191#define L1_STATE_COUNT (ST_L1_F8 + 1)
192 192
193// The first 16 entries match the Level 1 indications that 193// The first 16 entries match the Level 1 indications that
194// are found at offset 4 (CCIST) in the interrupt packet 194// are found at offset 4 (CCIST) in the interrupt packet
195 195
196enum { 196enum {
@@ -217,14 +217,14 @@ enum {
217 217
218#define L1_EVENT_COUNT (EV_TIMER3 + 1) 218#define L1_EVENT_COUNT (EV_TIMER3 + 1)
219 219
220#define ERR(format, arg...) \ 220#define ERR(format, arg...) \
221printk(KERN_ERR "%s:%s: " format "\n" , __FILE__, __func__ , ## arg) 221 printk(KERN_ERR "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
222 222
223#define WARNING(format, arg...) \ 223#define WARNING(format, arg...) \
224printk(KERN_WARNING "%s:%s: " format "\n" , __FILE__, __func__ , ## arg) 224 printk(KERN_WARNING "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
225 225
226#define INFO(format, arg...) \ 226#define INFO(format, arg...) \
227printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg) 227 printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
228 228
229#include <linux/isdn/hdlc.h> 229#include <linux/isdn/hdlc.h>
230#include "fsm.h" 230#include "fsm.h"
@@ -237,7 +237,7 @@ printk(KERN_INFO "%s:%s: " format "\n" , __FILE__, __func__ , ## arg)
237 237
238/* Generic FIFO structure */ 238/* Generic FIFO structure */
239struct fifo { 239struct fifo {
240 u_char r,w,count,size; 240 u_char r, w, count, size;
241 spinlock_t lock; 241 spinlock_t lock;
242}; 242};
243 243
@@ -269,7 +269,7 @@ static inline int fifo_add(struct fifo *fifo)
269 index = -1; 269 index = -1;
270 } else { 270 } else {
271 // Return index where to get the next data to add to the FIFO 271 // Return index where to get the next data to add to the FIFO
272 index = fifo->w++ & (fifo->size-1); 272 index = fifo->w++ & (fifo->size - 1);
273 fifo->count++; 273 fifo->count++;
274 } 274 }
275 spin_unlock_irqrestore(&fifo->lock, flags); 275 spin_unlock_irqrestore(&fifo->lock, flags);
@@ -294,7 +294,7 @@ static inline int fifo_remove(struct fifo *fifo)
294 index = -1; 294 index = -1;
295 } else { 295 } else {
296 // Return index where to get the next data from the FIFO 296 // Return index where to get the next data from the FIFO
297 index = fifo->r++ & (fifo->size-1); 297 index = fifo->r++ & (fifo->size - 1);
298 fifo->count--; 298 fifo->count--;
299 } 299 }
300 spin_unlock_irqrestore(&fifo->lock, flags); 300 spin_unlock_irqrestore(&fifo->lock, flags);
@@ -311,14 +311,14 @@ typedef struct ctrl_msg {
311 struct usb_ctrlrequest dr; 311 struct usb_ctrlrequest dr;
312 ctrl_complete_t complete; 312 ctrl_complete_t complete;
313 void *context; 313 void *context;
314} ctrl_msg; 314} ctrl_msg;
315 315
316/* FIFO of ctrl messages waiting to be sent */ 316/* FIFO of ctrl messages waiting to be sent */
317#define MAX_EP0_MSG 16 317#define MAX_EP0_MSG 16
318struct ctrl_msg_fifo { 318struct ctrl_msg_fifo {
319 struct fifo f; 319 struct fifo f;
320 struct ctrl_msg data[MAX_EP0_MSG]; 320 struct ctrl_msg data[MAX_EP0_MSG];
321}; 321};
322 322
323#define MAX_DFRAME_LEN_L1 300 323#define MAX_DFRAME_LEN_L1 300
324#define HSCX_BUFMAX 4096 324#define HSCX_BUFMAX 4096
@@ -330,7 +330,7 @@ struct st5481_ctrl {
330}; 330};
331 331
332struct st5481_intr { 332struct st5481_intr {
333 // struct evt_fifo evt_fifo; 333 // struct evt_fifo evt_fifo;
334 struct urb *urb; 334 struct urb *urb;
335}; 335};
336 336
@@ -407,21 +407,21 @@ struct st5481_adapter {
407 * Submit an URB with error reporting. This is a macro so 407 * Submit an URB with error reporting. This is a macro so
408 * the __func__ returns the caller function name. 408 * the __func__ returns the caller function name.
409 */ 409 */
410#define SUBMIT_URB(urb, mem_flags) \ 410#define SUBMIT_URB(urb, mem_flags) \
411({ \ 411 ({ \
412 int status; \ 412 int status; \
413 if ((status = usb_submit_urb(urb, mem_flags)) < 0) { \ 413 if ((status = usb_submit_urb(urb, mem_flags)) < 0) { \
414 WARNING("usb_submit_urb failed,status=%d", status); \ 414 WARNING("usb_submit_urb failed,status=%d", status); \
415 } \ 415 } \
416 status; \ 416 status; \
417}) 417 })
418 418
419/* 419/*
420 * USB double buffering, return the URB index (0 or 1). 420 * USB double buffering, return the URB index (0 or 1).
421 */ 421 */
422static inline int get_buf_nr(struct urb *urbs[], struct urb *urb) 422static inline int get_buf_nr(struct urb *urbs[], struct urb *urb)
423{ 423{
424 return (urbs[0]==urb ? 0 : 1); 424 return (urbs[0] == urb ? 0 : 1);
425} 425}
426 426
427/* ---------------------------------------------------------------------- */ 427/* ---------------------------------------------------------------------- */
@@ -442,17 +442,17 @@ void st5481_d_exit(void);
442 442
443/* USB */ 443/* USB */
444void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command); 444void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command);
445int st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev, 445int st5481_setup_isocpipes(struct urb *urb[2], struct usb_device *dev,
446 unsigned int pipe, int num_packets, 446 unsigned int pipe, int num_packets,
447 int packet_size, int buf_size, 447 int packet_size, int buf_size,
448 usb_complete_t complete, void *context); 448 usb_complete_t complete, void *context);
449void st5481_release_isocpipes(struct urb* urb[2]); 449void st5481_release_isocpipes(struct urb *urb[2]);
450 450
451void st5481_usb_pipe_reset(struct st5481_adapter *adapter, 451void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
452 u_char pipe, ctrl_complete_t complete, void *context); 452 u_char pipe, ctrl_complete_t complete, void *context);
453void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter, 453void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
454 u8 request, u16 value, 454 u8 request, u16 value,
455 ctrl_complete_t complete, void *context); 455 ctrl_complete_t complete, void *context);
456int st5481_setup_usb(struct st5481_adapter *adapter); 456int st5481_setup_usb(struct st5481_adapter *adapter);
457void st5481_release_usb(struct st5481_adapter *adapter); 457void st5481_release_usb(struct st5481_adapter *adapter);
458void st5481_start(struct st5481_adapter *adapter); 458void st5481_start(struct st5481_adapter *adapter);
@@ -468,18 +468,18 @@ extern int st5481_debug;
468 468
469#ifdef CONFIG_HISAX_DEBUG 469#ifdef CONFIG_HISAX_DEBUG
470 470
471#define DBG_ISO_PACKET(level,urb) \ 471#define DBG_ISO_PACKET(level, urb) \
472 if (level & __debug_variable) dump_iso_packet(__func__,urb) 472 if (level & __debug_variable) dump_iso_packet(__func__, urb)
473 473
474static void __attribute__((unused)) 474static void __attribute__((unused))
475dump_iso_packet(const char *name, struct urb *urb) 475dump_iso_packet(const char *name, struct urb *urb)
476{ 476{
477 int i,j; 477 int i, j;
478 int len,ofs; 478 int len, ofs;
479 u_char *data; 479 u_char *data;
480 480
481 printk(KERN_DEBUG "%s: packets=%d,errors=%d\n", 481 printk(KERN_DEBUG "%s: packets=%d,errors=%d\n",
482 name,urb->number_of_packets,urb->error_count); 482 name, urb->number_of_packets, urb->error_count);
483 for (i = 0; i < urb->number_of_packets; ++i) { 483 for (i = 0; i < urb->number_of_packets; ++i) {
484 if (urb->pipe & USB_DIR_IN) { 484 if (urb->pipe & USB_DIR_IN) {
485 len = urb->iso_frame_desc[i].actual_length; 485 len = urb->iso_frame_desc[i].actual_length;
@@ -487,11 +487,11 @@ dump_iso_packet(const char *name, struct urb *urb)
487 len = urb->iso_frame_desc[i].length; 487 len = urb->iso_frame_desc[i].length;
488 } 488 }
489 ofs = urb->iso_frame_desc[i].offset; 489 ofs = urb->iso_frame_desc[i].offset;
490 printk(KERN_DEBUG "len=%.2d,ofs=%.3d ",len,ofs); 490 printk(KERN_DEBUG "len=%.2d,ofs=%.3d ", len, ofs);
491 if (len) { 491 if (len) {
492 data = urb->transfer_buffer+ofs; 492 data = urb->transfer_buffer + ofs;
493 for (j=0; j < len; j++) { 493 for (j = 0; j < len; j++) {
494 printk ("%.2x", data[j]); 494 printk("%.2x", data[j]);
495 } 495 }
496 } 496 }
497 printk("\n"); 497 printk("\n");
@@ -513,17 +513,17 @@ static inline const char *ST5481_CMD_string(int evt)
513 case ST5481_CMD_ARL: return "ARL"; 513 case ST5481_CMD_ARL: return "ARL";
514 case ST5481_CMD_PDN: return "PDN"; 514 case ST5481_CMD_PDN: return "PDN";
515 }; 515 };
516 516
517 sprintf(s,"0x%x",evt); 517 sprintf(s, "0x%x", evt);
518 return s; 518 return s;
519} 519}
520 520
521#else 521#else
522 522
523#define DBG_ISO_PACKET(level,urb) do {} while (0) 523#define DBG_ISO_PACKET(level, urb) do {} while (0)
524 524
525#endif 525#endif
526 526
527 527
528 528
529#endif 529#endif
diff --git a/drivers/isdn/hisax/st5481_b.c b/drivers/isdn/hisax/st5481_b.c
index ed4bc564dc63..409849165838 100644
--- a/drivers/isdn/hisax/st5481_b.c
+++ b/drivers/isdn/hisax/st5481_b.c
@@ -4,7 +4,7 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -27,33 +27,33 @@ static inline void B_L1L2(struct st5481_bcs *bcs, int pr, void *arg)
27/* 27/*
28 * Encode and transmit next frame. 28 * Encode and transmit next frame.
29 */ 29 */
30static void usb_b_out(struct st5481_bcs *bcs,int buf_nr) 30static void usb_b_out(struct st5481_bcs *bcs, int buf_nr)
31{ 31{
32 struct st5481_b_out *b_out = &bcs->b_out; 32 struct st5481_b_out *b_out = &bcs->b_out;
33 struct st5481_adapter *adapter = bcs->adapter; 33 struct st5481_adapter *adapter = bcs->adapter;
34 struct urb *urb; 34 struct urb *urb;
35 unsigned int packet_size,offset; 35 unsigned int packet_size, offset;
36 int len,buf_size,bytes_sent; 36 int len, buf_size, bytes_sent;
37 int i; 37 int i;
38 struct sk_buff *skb; 38 struct sk_buff *skb;
39 39
40 if (test_and_set_bit(buf_nr, &b_out->busy)) { 40 if (test_and_set_bit(buf_nr, &b_out->busy)) {
41 DBG(4,"ep %d urb %d busy",(bcs->channel+1)*2,buf_nr); 41 DBG(4, "ep %d urb %d busy", (bcs->channel + 1) * 2, buf_nr);
42 return; 42 return;
43 } 43 }
44 urb = b_out->urb[buf_nr]; 44 urb = b_out->urb[buf_nr];
45 45
46 // Adjust isoc buffer size according to flow state 46 // Adjust isoc buffer size according to flow state
47 if(b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) { 47 if (b_out->flow_event & (OUT_DOWN | OUT_UNDERRUN)) {
48 buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST; 48 buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
49 packet_size = SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST; 49 packet_size = SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST;
50 DBG(4,"B%d,adjust flow,add %d bytes",bcs->channel+1,B_FLOW_ADJUST); 50 DBG(4, "B%d,adjust flow,add %d bytes", bcs->channel + 1, B_FLOW_ADJUST);
51 } else if(b_out->flow_event & OUT_UP){ 51 } else if (b_out->flow_event & OUT_UP) {
52 buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST; 52 buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
53 packet_size = SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST; 53 packet_size = SIZE_ISO_PACKETS_B_OUT - B_FLOW_ADJUST;
54 DBG(4,"B%d,adjust flow,remove %d bytes",bcs->channel+1,B_FLOW_ADJUST); 54 DBG(4, "B%d,adjust flow,remove %d bytes", bcs->channel + 1, B_FLOW_ADJUST);
55 } else { 55 } else {
56 buf_size = NUM_ISO_PACKETS_B*SIZE_ISO_PACKETS_B_OUT; 56 buf_size = NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT;
57 packet_size = 8; 57 packet_size = 8;
58 } 58 }
59 b_out->flow_event = 0; 59 b_out->flow_event = 0;
@@ -62,15 +62,15 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
62 while (len < buf_size) { 62 while (len < buf_size) {
63 if ((skb = b_out->tx_skb)) { 63 if ((skb = b_out->tx_skb)) {
64 DBG_SKB(0x100, skb); 64 DBG_SKB(0x100, skb);
65 DBG(4,"B%d,len=%d",bcs->channel+1,skb->len); 65 DBG(4, "B%d,len=%d", bcs->channel + 1, skb->len);
66 66
67 if (bcs->mode == L1_MODE_TRANS) { 67 if (bcs->mode == L1_MODE_TRANS) {
68 bytes_sent = buf_size - len; 68 bytes_sent = buf_size - len;
69 if (skb->len < bytes_sent) 69 if (skb->len < bytes_sent)
70 bytes_sent = skb->len; 70 bytes_sent = skb->len;
71 { /* swap tx bytes to get hearable audio data */ 71 { /* swap tx bytes to get hearable audio data */
72 register unsigned char *src = skb->data; 72 register unsigned char *src = skb->data;
73 register unsigned char *dest = urb->transfer_buffer+len; 73 register unsigned char *dest = urb->transfer_buffer + len;
74 register unsigned int count; 74 register unsigned int count;
75 for (count = 0; count < bytes_sent; count++) 75 for (count = 0; count < bytes_sent; count++)
76 *dest++ = bitrev8(*src++); 76 *dest++ = bitrev8(*src++);
@@ -79,7 +79,7 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
79 } else { 79 } else {
80 len += isdnhdlc_encode(&b_out->hdlc_state, 80 len += isdnhdlc_encode(&b_out->hdlc_state,
81 skb->data, skb->len, &bytes_sent, 81 skb->data, skb->len, &bytes_sent,
82 urb->transfer_buffer+len, buf_size-len); 82 urb->transfer_buffer + len, buf_size-len);
83 } 83 }
84 84
85 skb_pull(skb, bytes_sent); 85 skb_pull(skb, bytes_sent);
@@ -90,21 +90,21 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
90 B_L1L2(bcs, PH_DATA | CONFIRM, (void *)(unsigned long) skb->truesize); 90 B_L1L2(bcs, PH_DATA | CONFIRM, (void *)(unsigned long) skb->truesize);
91 dev_kfree_skb_any(skb); 91 dev_kfree_skb_any(skb);
92 92
93/* if (!(bcs->tx_skb = skb_dequeue(&bcs->sq))) { */ 93/* if (!(bcs->tx_skb = skb_dequeue(&bcs->sq))) { */
94/* st5481B_sched_event(bcs, B_XMTBUFREADY); */ 94/* st5481B_sched_event(bcs, B_XMTBUFREADY); */
95/* } */ 95/* } */
96 } 96 }
97 } else { 97 } else {
98 if (bcs->mode == L1_MODE_TRANS) { 98 if (bcs->mode == L1_MODE_TRANS) {
99 memset(urb->transfer_buffer+len, 0xff, buf_size-len); 99 memset(urb->transfer_buffer + len, 0xff, buf_size-len);
100 len = buf_size; 100 len = buf_size;
101 } else { 101 } else {
102 // Send flags 102 // Send flags
103 len += isdnhdlc_encode(&b_out->hdlc_state, 103 len += isdnhdlc_encode(&b_out->hdlc_state,
104 NULL, 0, &bytes_sent, 104 NULL, 0, &bytes_sent,
105 urb->transfer_buffer+len, buf_size-len); 105 urb->transfer_buffer + len, buf_size-len);
106 } 106 }
107 } 107 }
108 } 108 }
109 109
110 // Prepare the URB 110 // Prepare the URB
@@ -118,7 +118,7 @@ static void usb_b_out(struct st5481_bcs *bcs,int buf_nr)
118 urb->number_of_packets = i; 118 urb->number_of_packets = i;
119 urb->dev = adapter->usb_dev; 119 urb->dev = adapter->usb_dev;
120 120
121 DBG_ISO_PACKET(0x200,urb); 121 DBG_ISO_PACKET(0x200, urb);
122 122
123 SUBMIT_URB(urb, GFP_NOIO); 123 SUBMIT_URB(urb, GFP_NOIO);
124} 124}
@@ -131,12 +131,12 @@ static void st5481B_start_xfer(void *context)
131{ 131{
132 struct st5481_bcs *bcs = context; 132 struct st5481_bcs *bcs = context;
133 133
134 DBG(4,"B%d",bcs->channel+1); 134 DBG(4, "B%d", bcs->channel + 1);
135 135
136 // Start transmitting (flags or data) on B channel 136 // Start transmitting (flags or data) on B channel
137 137
138 usb_b_out(bcs,0); 138 usb_b_out(bcs, 0);
139 usb_b_out(bcs,1); 139 usb_b_out(bcs, 1);
140} 140}
141 141
142/* 142/*
@@ -158,7 +158,7 @@ static void led_blink(struct st5481_adapter *adapter)
158 } else { 158 } else {
159 leds &= ~GREEN_LED; 159 leds &= ~GREEN_LED;
160 } 160 }
161 161
162 st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, leds, NULL, NULL); 162 st5481_usb_device_ctrl_msg(adapter, GPIO_OUT, leds, NULL, NULL);
163} 163}
164 164
@@ -168,27 +168,27 @@ static void usb_b_out_complete(struct urb *urb)
168 struct st5481_b_out *b_out = &bcs->b_out; 168 struct st5481_b_out *b_out = &bcs->b_out;
169 struct st5481_adapter *adapter = bcs->adapter; 169 struct st5481_adapter *adapter = bcs->adapter;
170 int buf_nr; 170 int buf_nr;
171 171
172 buf_nr = get_buf_nr(b_out->urb, urb); 172 buf_nr = get_buf_nr(b_out->urb, urb);
173 test_and_clear_bit(buf_nr, &b_out->busy); 173 test_and_clear_bit(buf_nr, &b_out->busy);
174 174
175 if (unlikely(urb->status < 0)) { 175 if (unlikely(urb->status < 0)) {
176 switch (urb->status) { 176 switch (urb->status) {
177 case -ENOENT: 177 case -ENOENT:
178 case -ESHUTDOWN: 178 case -ESHUTDOWN:
179 case -ECONNRESET: 179 case -ECONNRESET:
180 DBG(4,"urb killed status %d", urb->status); 180 DBG(4, "urb killed status %d", urb->status);
181 return; // Give up 181 return; // Give up
182 default: 182 default:
183 WARNING("urb status %d",urb->status); 183 WARNING("urb status %d", urb->status);
184 if (b_out->busy == 0) { 184 if (b_out->busy == 0) {
185 st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2 | USB_DIR_OUT, NULL, NULL); 185 st5481_usb_pipe_reset(adapter, (bcs->channel + 1) * 2 | USB_DIR_OUT, NULL, NULL);
186 } 186 }
187 break; 187 break;
188 } 188 }
189 } 189 }
190 190
191 usb_b_out(bcs,buf_nr); 191 usb_b_out(bcs, buf_nr);
192 192
193 if (adapter->number_of_leds == 2) 193 if (adapter->number_of_leds == 2)
194 led_blink(adapter); 194 led_blink(adapter);
@@ -202,7 +202,7 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
202 struct st5481_b_out *b_out = &bcs->b_out; 202 struct st5481_b_out *b_out = &bcs->b_out;
203 struct st5481_adapter *adapter = bcs->adapter; 203 struct st5481_adapter *adapter = bcs->adapter;
204 204
205 DBG(4,"B%d,mode=%d", bcs->channel + 1, mode); 205 DBG(4, "B%d,mode=%d", bcs->channel + 1, mode);
206 206
207 if (bcs->mode == mode) 207 if (bcs->mode == mode)
208 return; 208 return;
@@ -223,14 +223,14 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
223 features |= HDLC_56KBIT; 223 features |= HDLC_56KBIT;
224 isdnhdlc_out_init(&b_out->hdlc_state, features); 224 isdnhdlc_out_init(&b_out->hdlc_state, features);
225 } 225 }
226 st5481_usb_pipe_reset(adapter, (bcs->channel+1)*2, NULL, NULL); 226 st5481_usb_pipe_reset(adapter, (bcs->channel + 1) * 2, NULL, NULL);
227 227
228 // Enable B channel interrupts 228 // Enable B channel interrupts
229 st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2), 229 st5481_usb_device_ctrl_msg(adapter, FFMSK_B1 + (bcs->channel * 2),
230 OUT_UP+OUT_DOWN+OUT_UNDERRUN, NULL, NULL); 230 OUT_UP + OUT_DOWN + OUT_UNDERRUN, NULL, NULL);
231 231
232 // Enable B channel FIFOs 232 // Enable B channel FIFOs
233 st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 32, st5481B_start_xfer, bcs); 233 st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel * 2), 32, st5481B_start_xfer, bcs);
234 if (adapter->number_of_leds == 4) { 234 if (adapter->number_of_leds == 4) {
235 if (bcs->channel == 0) { 235 if (bcs->channel == 0) {
236 adapter->leds |= B1_LED; 236 adapter->leds |= B1_LED;
@@ -240,10 +240,10 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
240 } 240 }
241 } else { 241 } else {
242 // Disble B channel interrupts 242 // Disble B channel interrupts
243 st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel*2), 0, NULL, NULL); 243 st5481_usb_device_ctrl_msg(adapter, FFMSK_B1+(bcs->channel * 2), 0, NULL, NULL);
244 244
245 // Disable B channel FIFOs 245 // Disable B channel FIFOs
246 st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel*2), 0, NULL, NULL); 246 st5481_usb_device_ctrl_msg(adapter, OUT_B1_COUNTER+(bcs->channel * 2), 0, NULL, NULL);
247 247
248 if (adapter->number_of_leds == 4) { 248 if (adapter->number_of_leds == 4) {
249 if (bcs->channel == 0) { 249 if (bcs->channel == 0) {
@@ -258,7 +258,7 @@ static void st5481B_mode(struct st5481_bcs *bcs, int mode)
258 dev_kfree_skb_any(b_out->tx_skb); 258 dev_kfree_skb_any(b_out->tx_skb);
259 b_out->tx_skb = NULL; 259 b_out->tx_skb = NULL;
260 } 260 }
261 261
262 } 262 }
263} 263}
264 264
@@ -268,9 +268,9 @@ static int st5481_setup_b_out(struct st5481_bcs *bcs)
268 struct usb_interface *intf; 268 struct usb_interface *intf;
269 struct usb_host_interface *altsetting = NULL; 269 struct usb_host_interface *altsetting = NULL;
270 struct usb_host_endpoint *endpoint; 270 struct usb_host_endpoint *endpoint;
271 struct st5481_b_out *b_out = &bcs->b_out; 271 struct st5481_b_out *b_out = &bcs->b_out;
272 272
273 DBG(4,""); 273 DBG(4, "");
274 274
275 intf = usb_ifnum_to_if(dev, 0); 275 intf = usb_ifnum_to_if(dev, 0);
276 if (intf) 276 if (intf)
@@ -281,11 +281,11 @@ static int st5481_setup_b_out(struct st5481_bcs *bcs)
281 // Allocate URBs and buffers for the B channel out 281 // Allocate URBs and buffers for the B channel out
282 endpoint = &altsetting->endpoint[EP_B1_OUT - 1 + bcs->channel * 2]; 282 endpoint = &altsetting->endpoint[EP_B1_OUT - 1 + bcs->channel * 2];
283 283
284 DBG(4,"endpoint address=%02x,packet size=%d", 284 DBG(4, "endpoint address=%02x,packet size=%d",
285 endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize)); 285 endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize));
286 286
287 // Allocate memory for 8000bytes/sec + extra bytes if underrun 287 // Allocate memory for 8000bytes/sec + extra bytes if underrun
288 return st5481_setup_isocpipes(b_out->urb, dev, 288 return st5481_setup_isocpipes(b_out->urb, dev,
289 usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress), 289 usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress),
290 NUM_ISO_PACKETS_B, SIZE_ISO_PACKETS_B_OUT, 290 NUM_ISO_PACKETS_B, SIZE_ISO_PACKETS_B_OUT,
291 NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST, 291 NUM_ISO_PACKETS_B * SIZE_ISO_PACKETS_B_OUT + B_FLOW_ADJUST,
@@ -296,7 +296,7 @@ static void st5481_release_b_out(struct st5481_bcs *bcs)
296{ 296{
297 struct st5481_b_out *b_out = &bcs->b_out; 297 struct st5481_b_out *b_out = &bcs->b_out;
298 298
299 DBG(4,""); 299 DBG(4, "");
300 300
301 st5481_release_isocpipes(b_out->urb); 301 st5481_release_isocpipes(b_out->urb);
302} 302}
@@ -305,7 +305,7 @@ int st5481_setup_b(struct st5481_bcs *bcs)
305{ 305{
306 int retval; 306 int retval;
307 307
308 DBG(4,""); 308 DBG(4, "");
309 309
310 retval = st5481_setup_b_out(bcs); 310 retval = st5481_setup_b_out(bcs);
311 if (retval) 311 if (retval)
@@ -324,9 +324,9 @@ int st5481_setup_b(struct st5481_bcs *bcs)
324 324
325 return 0; 325 return 0;
326 326
327 err_b_out: 327err_b_out:
328 st5481_release_b_out(bcs); 328 st5481_release_b_out(bcs);
329 err: 329err:
330 return retval; 330 return retval;
331} 331}
332 332
@@ -335,7 +335,7 @@ int st5481_setup_b(struct st5481_bcs *bcs)
335 */ 335 */
336void st5481_release_b(struct st5481_bcs *bcs) 336void st5481_release_b(struct st5481_bcs *bcs)
337{ 337{
338 DBG(4,""); 338 DBG(4, "");
339 339
340 st5481_release_in(&bcs->b_in); 340 st5481_release_in(&bcs->b_in);
341 st5481_release_b_out(bcs); 341 st5481_release_b_out(bcs);
@@ -365,12 +365,12 @@ void st5481_b_l2l1(struct hisax_if *ifc, int pr, void *arg)
365 break; 365 break;
366 case PH_ACTIVATE | REQUEST: 366 case PH_ACTIVATE | REQUEST:
367 mode = (long) arg; 367 mode = (long) arg;
368 DBG(4,"B%d,PH_ACTIVATE_REQUEST %ld", bcs->channel + 1, mode); 368 DBG(4, "B%d,PH_ACTIVATE_REQUEST %ld", bcs->channel + 1, mode);
369 st5481B_mode(bcs, mode); 369 st5481B_mode(bcs, mode);
370 B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL); 370 B_L1L2(bcs, PH_ACTIVATE | INDICATION, NULL);
371 break; 371 break;
372 case PH_DEACTIVATE | REQUEST: 372 case PH_DEACTIVATE | REQUEST:
373 DBG(4,"B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1); 373 DBG(4, "B%d,PH_DEACTIVATE_REQUEST", bcs->channel + 1);
374 st5481B_mode(bcs, L1_MODE_NULL); 374 st5481B_mode(bcs, L1_MODE_NULL);
375 B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL); 375 B_L1L2(bcs, PH_DEACTIVATE | INDICATION, NULL);
376 break; 376 break;
diff --git a/drivers/isdn/hisax/st5481_d.c b/drivers/isdn/hisax/st5481_d.c
index db247b79e561..e88c5c71fca7 100644
--- a/drivers/isdn/hisax/st5481_d.c
+++ b/drivers/isdn/hisax/st5481_d.c
@@ -4,7 +4,7 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -32,22 +32,22 @@ static char *strL1State[] =
32 32
33static char *strL1Event[] = 33static char *strL1Event[] =
34{ 34{
35 "EV_IND_DP", 35 "EV_IND_DP",
36 "EV_IND_1", 36 "EV_IND_1",
37 "EV_IND_2", 37 "EV_IND_2",
38 "EV_IND_3", 38 "EV_IND_3",
39 "EV_IND_RSY", 39 "EV_IND_RSY",
40 "EV_IND_5", 40 "EV_IND_5",
41 "EV_IND_6", 41 "EV_IND_6",
42 "EV_IND_7", 42 "EV_IND_7",
43 "EV_IND_AP", 43 "EV_IND_AP",
44 "EV_IND_9", 44 "EV_IND_9",
45 "EV_IND_10", 45 "EV_IND_10",
46 "EV_IND_11", 46 "EV_IND_11",
47 "EV_IND_AI8", 47 "EV_IND_AI8",
48 "EV_IND_AI10", 48 "EV_IND_AI10",
49 "EV_IND_AIL", 49 "EV_IND_AIL",
50 "EV_IND_DI", 50 "EV_IND_DI",
51 "EV_PH_ACTIVATE_REQ", 51 "EV_PH_ACTIVATE_REQ",
52 "EV_PH_DEACTIVATE_REQ", 52 "EV_PH_DEACTIVATE_REQ",
53 "EV_TIMER3", 53 "EV_TIMER3",
@@ -67,7 +67,7 @@ l1_go_f3(struct FsmInst *fi, int event, void *arg)
67 67
68 if (fi->state == ST_L1_F7) 68 if (fi->state == ST_L1_F7)
69 ph_disconnect(adapter); 69 ph_disconnect(adapter);
70 70
71 FsmChangeState(fi, ST_L1_F3); 71 FsmChangeState(fi, ST_L1_F3);
72 D_L1L2(adapter, PH_DEACTIVATE | INDICATION, NULL); 72 D_L1L2(adapter, PH_DEACTIVATE | INDICATION, NULL);
73} 73}
@@ -168,11 +168,11 @@ static struct FsmNode L1FnList[] __initdata =
168}; 168};
169 169
170static __printf(2, 3) 170static __printf(2, 3)
171void l1m_debug(struct FsmInst *fi, char *fmt, ...) 171 void l1m_debug(struct FsmInst *fi, char *fmt, ...)
172{ 172{
173 va_list args; 173 va_list args;
174 char buf[256]; 174 char buf[256];
175 175
176 va_start(args, fmt); 176 va_start(args, fmt);
177 vsnprintf(buf, sizeof(buf), fmt, args); 177 vsnprintf(buf, sizeof(buf), fmt, args);
178 DBG(8, "%s", buf); 178 DBG(8, "%s", buf);
@@ -191,54 +191,54 @@ void l1m_debug(struct FsmInst *fi, char *fmt, ...)
191 191
192 L1 FRAME D_OUT_STATE USB D CHANNEL 192 L1 FRAME D_OUT_STATE USB D CHANNEL
193 -------- ----------- --- --------- 193 -------- ----------- --- ---------
194 194
195 FIXME 195 FIXME
196 196
197 -> [xx..xx] SHORT_INIT -> [7Exx..xxC1C27EFF] 197 -> [xx..xx] SHORT_INIT -> [7Exx..xxC1C27EFF]
198 SHORT_WAIT_DEN <> OUT_D_COUNTER=16 198 SHORT_WAIT_DEN <> OUT_D_COUNTER=16
199 199
200 END_OF_SHORT <- DEN_EVENT -> 7Exx 200 END_OF_SHORT <- DEN_EVENT -> 7Exx
201 xxxx 201 xxxx
202 xxxx 202 xxxx
203 xxxx 203 xxxx
204 xxxx 204 xxxx
205 xxxx 205 xxxx
206 C1C1 206 C1C1
207 7EFF 207 7EFF
208 WAIT_FOR_RESET_IDLE <- D_UNDERRUN <- (8ms) 208 WAIT_FOR_RESET_IDLE <- D_UNDERRUN <- (8ms)
209 IDLE <> Reset pipe 209 IDLE <> Reset pipe
210 210
211 211
212 212
213 Transmit long frame (>= 16 bytes of encoded data): 213 Transmit long frame (>= 16 bytes of encoded data):
214 214
215 L1 FRAME D_OUT_STATE USB D CHANNEL 215 L1 FRAME D_OUT_STATE USB D CHANNEL
216 -------- ----------- --- --------- 216 -------- ----------- --- ---------
217 217
218 -> [xx...xx] IDLE 218 -> [xx...xx] IDLE
219 WAIT_FOR_STOP <> OUT_D_COUNTER=0 219 WAIT_FOR_STOP <> OUT_D_COUNTER=0
220 WAIT_FOR_RESET <> Reset pipe 220 WAIT_FOR_RESET <> Reset pipe
221 STOP 221 STOP
222 INIT_LONG_FRAME -> [7Exx..xx] 222 INIT_LONG_FRAME -> [7Exx..xx]
223 WAIT_DEN <> OUT_D_COUNTER=16 223 WAIT_DEN <> OUT_D_COUNTER=16
224 OUT_NORMAL <- DEN_EVENT -> 7Exx 224 OUT_NORMAL <- DEN_EVENT -> 7Exx
225 END_OF_FRAME_BUSY -> [xxxx] xxxx 225 END_OF_FRAME_BUSY -> [xxxx] xxxx
226 END_OF_FRAME_NOT_BUSY -> [xxxx] xxxx 226 END_OF_FRAME_NOT_BUSY -> [xxxx] xxxx
227 -> [xxxx] xxxx 227 -> [xxxx] xxxx
228 -> [C1C2] xxxx 228 -> [C1C2] xxxx
229 -> [7EFF] xxxx 229 -> [7EFF] xxxx
230 xxxx 230 xxxx
231 xxxx 231 xxxx
232 .... 232 ....
233 xxxx 233 xxxx
234 C1C2 234 C1C2
235 7EFF 235 7EFF
236 <- D_UNDERRUN <- (> 8ms) 236 <- D_UNDERRUN <- (> 8ms)
237 WAIT_FOR_STOP <> OUT_D_COUNTER=0 237 WAIT_FOR_STOP <> OUT_D_COUNTER=0
238 WAIT_FOR_RESET <> Reset pipe 238 WAIT_FOR_RESET <> Reset pipe
239 STOP 239 STOP
240 240
241*/ 241*/
242 242
243static struct Fsm dout_fsm; 243static struct Fsm dout_fsm;
244 244
@@ -254,7 +254,7 @@ static char *strDoutState[] =
254 "ST_DOUT_NORMAL", 254 "ST_DOUT_NORMAL",
255 255
256 "ST_DOUT_WAIT_FOR_UNDERRUN", 256 "ST_DOUT_WAIT_FOR_UNDERRUN",
257 "ST_DOUT_WAIT_FOR_NOT_BUSY", 257 "ST_DOUT_WAIT_FOR_NOT_BUSY",
258 "ST_DOUT_WAIT_FOR_STOP", 258 "ST_DOUT_WAIT_FOR_STOP",
259 "ST_DOUT_WAIT_FOR_RESET", 259 "ST_DOUT_WAIT_FOR_RESET",
260}; 260};
@@ -271,11 +271,11 @@ static char *strDoutEvent[] =
271}; 271};
272 272
273static __printf(2, 3) 273static __printf(2, 3)
274void dout_debug(struct FsmInst *fi, char *fmt, ...) 274 void dout_debug(struct FsmInst *fi, char *fmt, ...)
275{ 275{
276 va_list args; 276 va_list args;
277 char buf[256]; 277 char buf[256];
278 278
279 va_start(args, fmt); 279 va_start(args, fmt);
280 vsnprintf(buf, sizeof(buf), fmt, args); 280 vsnprintf(buf, sizeof(buf), fmt, args);
281 DBG(0x2, "%s", buf); 281 DBG(0x2, "%s", buf);
@@ -313,19 +313,19 @@ static void usb_d_out(struct st5481_adapter *adapter, int buf_nr)
313 skb = d_out->tx_skb; 313 skb = d_out->tx_skb;
314 314
315 buf_size = NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT; 315 buf_size = NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT;
316 316
317 if (skb) { 317 if (skb) {
318 len = isdnhdlc_encode(&d_out->hdlc_state, 318 len = isdnhdlc_encode(&d_out->hdlc_state,
319 skb->data, skb->len, &bytes_sent, 319 skb->data, skb->len, &bytes_sent,
320 urb->transfer_buffer, buf_size); 320 urb->transfer_buffer, buf_size);
321 skb_pull(skb,bytes_sent); 321 skb_pull(skb, bytes_sent);
322 } else { 322 } else {
323 // Send flags or idle 323 // Send flags or idle
324 len = isdnhdlc_encode(&d_out->hdlc_state, 324 len = isdnhdlc_encode(&d_out->hdlc_state,
325 NULL, 0, &bytes_sent, 325 NULL, 0, &bytes_sent,
326 urb->transfer_buffer, buf_size); 326 urb->transfer_buffer, buf_size);
327 } 327 }
328 328
329 if (len < buf_size) { 329 if (len < buf_size) {
330 FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_UNDERRUN); 330 FsmChangeState(&d_out->fsm, ST_DOUT_WAIT_FOR_UNDERRUN);
331 } 331 }
@@ -354,15 +354,15 @@ static void usb_d_out(struct st5481_adapter *adapter, int buf_nr)
354 urb->dev = adapter->usb_dev; 354 urb->dev = adapter->usb_dev;
355 // Need to transmit the next buffer 2ms after the DEN_EVENT 355 // Need to transmit the next buffer 2ms after the DEN_EVENT
356 urb->transfer_flags = 0; 356 urb->transfer_flags = 0;
357 urb->start_frame = usb_get_current_frame_number(adapter->usb_dev)+2; 357 urb->start_frame = usb_get_current_frame_number(adapter->usb_dev) + 2;
358 358
359 DBG_ISO_PACKET(0x20,urb); 359 DBG_ISO_PACKET(0x20, urb);
360 360
361 if (usb_submit_urb(urb, GFP_KERNEL) < 0) { 361 if (usb_submit_urb(urb, GFP_KERNEL) < 0) {
362 // There is another URB queued up 362 // There is another URB queued up
363 urb->transfer_flags = URB_ISO_ASAP; 363 urb->transfer_flags = URB_ISO_ASAP;
364 SUBMIT_URB(urb, GFP_KERNEL); 364 SUBMIT_URB(urb, GFP_KERNEL);
365 } 365 }
366} 366}
367 367
368static void fifo_reseted(void *context) 368static void fifo_reseted(void *context)
@@ -377,7 +377,7 @@ static void usb_d_out_complete(struct urb *urb)
377 struct st5481_adapter *adapter = urb->context; 377 struct st5481_adapter *adapter = urb->context;
378 struct st5481_d_out *d_out = &adapter->d_out; 378 struct st5481_d_out *d_out = &adapter->d_out;
379 long buf_nr; 379 long buf_nr;
380 380
381 DBG(2, ""); 381 DBG(2, "");
382 382
383 buf_nr = get_buf_nr(d_out->urb, urb); 383 buf_nr = get_buf_nr(d_out->urb, urb);
@@ -385,17 +385,17 @@ static void usb_d_out_complete(struct urb *urb)
385 385
386 if (unlikely(urb->status < 0)) { 386 if (unlikely(urb->status < 0)) {
387 switch (urb->status) { 387 switch (urb->status) {
388 case -ENOENT: 388 case -ENOENT:
389 case -ESHUTDOWN: 389 case -ESHUTDOWN:
390 case -ECONNRESET: 390 case -ECONNRESET:
391 DBG(1,"urb killed status %d", urb->status); 391 DBG(1, "urb killed status %d", urb->status);
392 break; 392 break;
393 default: 393 default:
394 WARNING("urb status %d",urb->status); 394 WARNING("urb status %d", urb->status);
395 if (d_out->busy == 0) { 395 if (d_out->busy == 0) {
396 st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter); 396 st5481_usb_pipe_reset(adapter, EP_D_OUT | USB_DIR_OUT, fifo_reseted, adapter);
397 } 397 }
398 break; 398 break;
399 } 399 }
400 return; // Give up 400 return; // Give up
401 } 401 }
@@ -417,7 +417,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
417 417
418 skb = d_out->tx_skb; 418 skb = d_out->tx_skb;
419 419
420 DBG(2,"len=%d",skb->len); 420 DBG(2, "len=%d", skb->len);
421 421
422 isdnhdlc_out_init(&d_out->hdlc_state, HDLC_DCHANNEL | HDLC_BITREVERSE); 422 isdnhdlc_out_init(&d_out->hdlc_state, HDLC_DCHANNEL | HDLC_BITREVERSE);
423 423
@@ -433,7 +433,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
433 urb->transfer_buffer, 16); 433 urb->transfer_buffer, 16);
434 skb_pull(skb, bytes_sent); 434 skb_pull(skb, bytes_sent);
435 435
436 if(len < 16) 436 if (len < 16)
437 FsmChangeState(&d_out->fsm, ST_DOUT_SHORT_INIT); 437 FsmChangeState(&d_out->fsm, ST_DOUT_SHORT_INIT);
438 else 438 else
439 FsmChangeState(&d_out->fsm, ST_DOUT_LONG_INIT); 439 FsmChangeState(&d_out->fsm, ST_DOUT_LONG_INIT);
@@ -455,7 +455,7 @@ static void dout_start_xmit(struct FsmInst *fsm, int event, void *arg)
455 urb->dev = adapter->usb_dev; 455 urb->dev = adapter->usb_dev;
456 urb->transfer_flags = URB_ISO_ASAP; 456 urb->transfer_flags = URB_ISO_ASAP;
457 457
458 DBG_ISO_PACKET(0x20,urb); 458 DBG_ISO_PACKET(0x20, urb);
459 SUBMIT_URB(urb, GFP_KERNEL); 459 SUBMIT_URB(urb, GFP_KERNEL);
460} 460}
461 461
@@ -480,7 +480,7 @@ static void dout_long_enable_fifo(struct FsmInst *fsm, int event, void *arg)
480{ 480{
481 struct st5481_adapter *adapter = fsm->userdata; 481 struct st5481_adapter *adapter = fsm->userdata;
482 struct st5481_d_out *d_out = &adapter->d_out; 482 struct st5481_d_out *d_out = &adapter->d_out;
483 483
484 st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 16, NULL, NULL); 484 st5481_usb_device_ctrl_msg(adapter, OUT_D_COUNTER, 16, NULL, NULL);
485 FsmChangeState(&d_out->fsm, ST_DOUT_LONG_WAIT_DEN); 485 FsmChangeState(&d_out->fsm, ST_DOUT_LONG_WAIT_DEN);
486} 486}
@@ -619,8 +619,8 @@ static void ph_connect(struct st5481_adapter *adapter)
619 struct st5481_d_out *d_out = &adapter->d_out; 619 struct st5481_d_out *d_out = &adapter->d_out;
620 struct st5481_in *d_in = &adapter->d_in; 620 struct st5481_in *d_in = &adapter->d_in;
621 621
622 DBG(8,""); 622 DBG(8, "");
623 623
624 FsmChangeState(&d_out->fsm, ST_DOUT_NONE); 624 FsmChangeState(&d_out->fsm, ST_DOUT_NONE);
625 625
626 // st5481_usb_device_ctrl_msg(adapter, FFMSK_D, OUT_UNDERRUN, NULL, NULL); 626 // st5481_usb_device_ctrl_msg(adapter, FFMSK_D, OUT_UNDERRUN, NULL, NULL);
@@ -644,7 +644,7 @@ static void ph_connect(struct st5481_adapter *adapter)
644 */ 644 */
645static void ph_disconnect(struct st5481_adapter *adapter) 645static void ph_disconnect(struct st5481_adapter *adapter)
646{ 646{
647 DBG(8,""); 647 DBG(8, "");
648 648
649 st5481_in_mode(&adapter->d_in, L1_MODE_NULL); 649 st5481_in_mode(&adapter->d_in, L1_MODE_NULL);
650 650
@@ -661,7 +661,7 @@ static int st5481_setup_d_out(struct st5481_adapter *adapter)
661 struct usb_host_endpoint *endpoint; 661 struct usb_host_endpoint *endpoint;
662 struct st5481_d_out *d_out = &adapter->d_out; 662 struct st5481_d_out *d_out = &adapter->d_out;
663 663
664 DBG(2,""); 664 DBG(2, "");
665 665
666 intf = usb_ifnum_to_if(dev, 0); 666 intf = usb_ifnum_to_if(dev, 0);
667 if (intf) 667 if (intf)
@@ -672,10 +672,10 @@ static int st5481_setup_d_out(struct st5481_adapter *adapter)
672 // Allocate URBs and buffers for the D channel out 672 // Allocate URBs and buffers for the D channel out
673 endpoint = &altsetting->endpoint[EP_D_OUT-1]; 673 endpoint = &altsetting->endpoint[EP_D_OUT-1];
674 674
675 DBG(2,"endpoint address=%02x,packet size=%d", 675 DBG(2, "endpoint address=%02x,packet size=%d",
676 endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize)); 676 endpoint->desc.bEndpointAddress, le16_to_cpu(endpoint->desc.wMaxPacketSize));
677 677
678 return st5481_setup_isocpipes(d_out->urb, dev, 678 return st5481_setup_isocpipes(d_out->urb, dev,
679 usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress), 679 usb_sndisocpipe(dev, endpoint->desc.bEndpointAddress),
680 NUM_ISO_PACKETS_D, SIZE_ISO_PACKETS_D_OUT, 680 NUM_ISO_PACKETS_D, SIZE_ISO_PACKETS_D_OUT,
681 NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT, 681 NUM_ISO_PACKETS_D * SIZE_ISO_PACKETS_D_OUT,
@@ -686,7 +686,7 @@ static void st5481_release_d_out(struct st5481_adapter *adapter)
686{ 686{
687 struct st5481_d_out *d_out = &adapter->d_out; 687 struct st5481_d_out *d_out = &adapter->d_out;
688 688
689 DBG(2,""); 689 DBG(2, "");
690 690
691 st5481_release_isocpipes(d_out->urb); 691 st5481_release_isocpipes(d_out->urb);
692} 692}
@@ -695,7 +695,7 @@ int st5481_setup_d(struct st5481_adapter *adapter)
695{ 695{
696 int retval; 696 int retval;
697 697
698 DBG(2,""); 698 DBG(2, "");
699 699
700 retval = st5481_setup_d_out(adapter); 700 retval = st5481_setup_d_out(adapter);
701 if (retval) 701 if (retval)
@@ -726,15 +726,15 @@ int st5481_setup_d(struct st5481_adapter *adapter)
726 726
727 return 0; 727 return 0;
728 728
729 err_d_out: 729err_d_out:
730 st5481_release_d_out(adapter); 730 st5481_release_d_out(adapter);
731 err: 731err:
732 return retval; 732 return retval;
733} 733}
734 734
735void st5481_release_d(struct st5481_adapter *adapter) 735void st5481_release_d(struct st5481_adapter *adapter)
736{ 736{
737 DBG(2,""); 737 DBG(2, "");
738 738
739 st5481_release_in(&adapter->d_in); 739 st5481_release_in(&adapter->d_in);
740 st5481_release_d_out(adapter); 740 st5481_release_d_out(adapter);
@@ -766,9 +766,9 @@ int __init st5481_d_init(void)
766 766
767 return 0; 767 return 0;
768 768
769 err_l1: 769err_l1:
770 FsmFree(&l1fsm); 770 FsmFree(&l1fsm);
771 err: 771err:
772 return retval; 772 return retval;
773} 773}
774 774
diff --git a/drivers/isdn/hisax/st5481_init.c b/drivers/isdn/hisax/st5481_init.c
index 9f7fd18ff773..100296e20dc0 100644
--- a/drivers/isdn/hisax/st5481_init.c
+++ b/drivers/isdn/hisax/st5481_init.c
@@ -4,13 +4,13 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 */ 11 */
12 12
13/* 13/*
14 * TODO: 14 * TODO:
15 * 15 *
16 * b layer1 delay? 16 * b layer1 delay?
@@ -63,9 +63,9 @@ static int probe_st5481(struct usb_interface *intf,
63 int retval, i; 63 int retval, i;
64 64
65 printk(KERN_INFO "st541: found adapter VendorId %04x, ProductId %04x, LEDs %d\n", 65 printk(KERN_INFO "st541: found adapter VendorId %04x, ProductId %04x, LEDs %d\n",
66 le16_to_cpu(dev->descriptor.idVendor), 66 le16_to_cpu(dev->descriptor.idVendor),
67 le16_to_cpu(dev->descriptor.idProduct), 67 le16_to_cpu(dev->descriptor.idProduct),
68 number_of_leds); 68 number_of_leds);
69 69
70 adapter = kzalloc(sizeof(struct st5481_adapter), GFP_KERNEL); 70 adapter = kzalloc(sizeof(struct st5481_adapter), GFP_KERNEL);
71 if (!adapter) 71 if (!adapter)
@@ -105,7 +105,7 @@ static int probe_st5481(struct usb_interface *intf,
105 b_if[i] = &adapter->bcs[i].b_if; 105 b_if[i] = &adapter->bcs[i].b_if;
106 106
107 if (hisax_register(&adapter->hisax_d_if, b_if, "st5481_usb", 107 if (hisax_register(&adapter->hisax_d_if, b_if, "st5481_usb",
108 protocol) != 0) 108 protocol) != 0)
109 goto err_b1; 109 goto err_b1;
110 110
111 st5481_start(adapter); 111 st5481_start(adapter);
@@ -113,15 +113,15 @@ static int probe_st5481(struct usb_interface *intf,
113 usb_set_intfdata(intf, adapter); 113 usb_set_intfdata(intf, adapter);
114 return 0; 114 return 0;
115 115
116 err_b1: 116err_b1:
117 st5481_release_b(&adapter->bcs[1]); 117 st5481_release_b(&adapter->bcs[1]);
118 err_b: 118err_b:
119 st5481_release_b(&adapter->bcs[0]); 119 st5481_release_b(&adapter->bcs[0]);
120 err_d: 120err_d:
121 st5481_release_d(adapter); 121 st5481_release_d(adapter);
122 err_usb: 122err_usb:
123 st5481_release_usb(adapter); 123 st5481_release_usb(adapter);
124 err: 124err:
125 kfree(adapter); 125 kfree(adapter);
126 return -EIO; 126 return -EIO;
127} 127}
@@ -134,12 +134,12 @@ static void disconnect_st5481(struct usb_interface *intf)
134{ 134{
135 struct st5481_adapter *adapter = usb_get_intfdata(intf); 135 struct st5481_adapter *adapter = usb_get_intfdata(intf);
136 136
137 DBG(1,""); 137 DBG(1, "");
138 138
139 usb_set_intfdata(intf, NULL); 139 usb_set_intfdata(intf, NULL);
140 if (!adapter) 140 if (!adapter)
141 return; 141 return;
142 142
143 st5481_stop(adapter); 143 st5481_stop(adapter);
144 st5481_release_b(&adapter->bcs[1]); 144 st5481_release_b(&adapter->bcs[1]);
145 st5481_release_b(&adapter->bcs[0]); 145 st5481_release_b(&adapter->bcs[0]);
@@ -157,25 +157,25 @@ static void disconnect_st5481(struct usb_interface *intf)
157 * The last 4 bits in the Product Id is set with 4 pins on the chip. 157 * The last 4 bits in the Product Id is set with 4 pins on the chip.
158 */ 158 */
159static struct usb_device_id st5481_ids[] = { 159static struct usb_device_id st5481_ids[] = {
160 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x0) }, 160 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x0) },
161 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x1) }, 161 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x1) },
162 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x2) }, 162 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x2) },
163 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x3) }, 163 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x3) },
164 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x4) }, 164 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x4) },
165 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x5) }, 165 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x5) },
166 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x6) }, 166 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x6) },
167 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x7) }, 167 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x7) },
168 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x8) }, 168 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x8) },
169 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0x9) }, 169 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0x9) },
170 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xA) }, 170 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xA) },
171 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xB) }, 171 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xB) },
172 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xC) }, 172 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xC) },
173 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xD) }, 173 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xD) },
174 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xE) }, 174 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xE) },
175 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID+0xF) }, 175 { USB_DEVICE(ST_VENDOR_ID, ST5481_PRODUCT_ID + 0xF) },
176 { } 176 { }
177}; 177};
178MODULE_DEVICE_TABLE (usb, st5481_ids); 178MODULE_DEVICE_TABLE(usb, st5481_ids);
179 179
180static struct usb_driver st5481_usb_driver = { 180static struct usb_driver st5481_usb_driver = {
181 .name = "st5481_usb", 181 .name = "st5481_usb",
@@ -204,9 +204,9 @@ static int __init st5481_usb_init(void)
204 204
205 return 0; 205 return 0;
206 206
207 out_d_exit: 207out_d_exit:
208 st5481_d_exit(); 208 st5481_d_exit();
209 out: 209out:
210 return retval; 210 return retval;
211} 211}
212 212
diff --git a/drivers/isdn/hisax/st5481_usb.c b/drivers/isdn/hisax/st5481_usb.c
index 159e8fa00fd6..017c67ea3f4c 100644
--- a/drivers/isdn/hisax/st5481_usb.c
+++ b/drivers/isdn/hisax/st5481_usb.c
@@ -4,7 +4,7 @@
4 * Author Frode Isaksen 4 * Author Frode Isaksen
5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com> 5 * Copyright 2001 by Frode Isaksen <fisaksen@bewan.com>
6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de> 6 * 2001 by Kai Germaschewski <kai.germaschewski@gmx.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -36,13 +36,13 @@ static void usb_next_ctrl_msg(struct urb *urb,
36 } 36 }
37 37
38 if ((r_index = fifo_remove(&ctrl->msg_fifo.f)) < 0) { 38 if ((r_index = fifo_remove(&ctrl->msg_fifo.f)) < 0) {
39 test_and_clear_bit(0,&ctrl->busy); 39 test_and_clear_bit(0, &ctrl->busy);
40 return; 40 return;
41 } 41 }
42 urb->setup_packet = 42 urb->setup_packet =
43 (unsigned char *)&ctrl->msg_fifo.data[r_index]; 43 (unsigned char *)&ctrl->msg_fifo.data[r_index];
44 44
45 DBG(1,"request=0x%02x,value=0x%04x,index=%x", 45 DBG(1, "request=0x%02x,value=0x%04x,index=%x",
46 ((struct ctrl_msg *)urb->setup_packet)->dr.bRequest, 46 ((struct ctrl_msg *)urb->setup_packet)->dr.bRequest,
47 ((struct ctrl_msg *)urb->setup_packet)->dr.wValue, 47 ((struct ctrl_msg *)urb->setup_packet)->dr.wValue,
48 ((struct ctrl_msg *)urb->setup_packet)->dr.wIndex); 48 ((struct ctrl_msg *)urb->setup_packet)->dr.wIndex);
@@ -64,13 +64,13 @@ static void usb_ctrl_msg(struct st5481_adapter *adapter,
64 struct st5481_ctrl *ctrl = &adapter->ctrl; 64 struct st5481_ctrl *ctrl = &adapter->ctrl;
65 int w_index; 65 int w_index;
66 struct ctrl_msg *ctrl_msg; 66 struct ctrl_msg *ctrl_msg;
67 67
68 if ((w_index = fifo_add(&ctrl->msg_fifo.f)) < 0) { 68 if ((w_index = fifo_add(&ctrl->msg_fifo.f)) < 0) {
69 WARNING("control msg FIFO full"); 69 WARNING("control msg FIFO full");
70 return; 70 return;
71 } 71 }
72 ctrl_msg = &ctrl->msg_fifo.data[w_index]; 72 ctrl_msg = &ctrl->msg_fifo.data[w_index];
73 73
74 ctrl_msg->dr.bRequestType = requesttype; 74 ctrl_msg->dr.bRequestType = requesttype;
75 ctrl_msg->dr.bRequest = request; 75 ctrl_msg->dr.bRequest = request;
76 ctrl_msg->dr.wValue = cpu_to_le16p(&value); 76 ctrl_msg->dr.wValue = cpu_to_le16p(&value);
@@ -86,11 +86,11 @@ static void usb_ctrl_msg(struct st5481_adapter *adapter,
86 * Asynchronous endpoint 0 device request. 86 * Asynchronous endpoint 0 device request.
87 */ 87 */
88void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter, 88void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
89 u8 request, u16 value, 89 u8 request, u16 value,
90 ctrl_complete_t complete, void *context) 90 ctrl_complete_t complete, void *context)
91{ 91{
92 usb_ctrl_msg(adapter, request, 92 usb_ctrl_msg(adapter, request,
93 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 93 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
94 value, 0, complete, context); 94 value, 0, complete, context);
95} 95}
96 96
@@ -98,10 +98,10 @@ void st5481_usb_device_ctrl_msg(struct st5481_adapter *adapter,
98 * Asynchronous pipe reset (async version of usb_clear_halt). 98 * Asynchronous pipe reset (async version of usb_clear_halt).
99 */ 99 */
100void st5481_usb_pipe_reset(struct st5481_adapter *adapter, 100void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
101 u_char pipe, 101 u_char pipe,
102 ctrl_complete_t complete, void *context) 102 ctrl_complete_t complete, void *context)
103{ 103{
104 DBG(1,"pipe=%02x",pipe); 104 DBG(1, "pipe=%02x", pipe);
105 105
106 usb_ctrl_msg(adapter, 106 usb_ctrl_msg(adapter,
107 USB_REQ_CLEAR_FEATURE, USB_DIR_OUT | USB_RECIP_ENDPOINT, 107 USB_REQ_CLEAR_FEATURE, USB_DIR_OUT | USB_RECIP_ENDPOINT,
@@ -115,7 +115,7 @@ void st5481_usb_pipe_reset(struct st5481_adapter *adapter,
115 115
116void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command) 116void st5481_ph_command(struct st5481_adapter *adapter, unsigned int command)
117{ 117{
118 DBG(8,"command=%s", ST5481_CMD_string(command)); 118 DBG(8, "command=%s", ST5481_CMD_string(command));
119 119
120 st5481_usb_device_ctrl_msg(adapter, TXCI, command, NULL, NULL); 120 st5481_usb_device_ctrl_msg(adapter, TXCI, command, NULL, NULL);
121} 121}
@@ -130,33 +130,33 @@ static void usb_ctrl_complete(struct urb *urb)
130 struct st5481_adapter *adapter = urb->context; 130 struct st5481_adapter *adapter = urb->context;
131 struct st5481_ctrl *ctrl = &adapter->ctrl; 131 struct st5481_ctrl *ctrl = &adapter->ctrl;
132 struct ctrl_msg *ctrl_msg; 132 struct ctrl_msg *ctrl_msg;
133 133
134 if (unlikely(urb->status < 0)) { 134 if (unlikely(urb->status < 0)) {
135 switch (urb->status) { 135 switch (urb->status) {
136 case -ENOENT: 136 case -ENOENT:
137 case -ESHUTDOWN: 137 case -ESHUTDOWN:
138 case -ECONNRESET: 138 case -ECONNRESET:
139 DBG(1,"urb killed status %d", urb->status); 139 DBG(1, "urb killed status %d", urb->status);
140 return; // Give up 140 return; // Give up
141 default: 141 default:
142 WARNING("urb status %d",urb->status); 142 WARNING("urb status %d", urb->status);
143 break; 143 break;
144 } 144 }
145 } 145 }
146 146
147 ctrl_msg = (struct ctrl_msg *)urb->setup_packet; 147 ctrl_msg = (struct ctrl_msg *)urb->setup_packet;
148 148
149 if (ctrl_msg->dr.bRequest == USB_REQ_CLEAR_FEATURE) { 149 if (ctrl_msg->dr.bRequest == USB_REQ_CLEAR_FEATURE) {
150 /* Special case handling for pipe reset */ 150 /* Special case handling for pipe reset */
151 le16_to_cpus(&ctrl_msg->dr.wIndex); 151 le16_to_cpus(&ctrl_msg->dr.wIndex);
152 usb_reset_endpoint(adapter->usb_dev, ctrl_msg->dr.wIndex); 152 usb_reset_endpoint(adapter->usb_dev, ctrl_msg->dr.wIndex);
153 } 153 }
154 154
155 if (ctrl_msg->complete) 155 if (ctrl_msg->complete)
156 ctrl_msg->complete(ctrl_msg->context); 156 ctrl_msg->complete(ctrl_msg->context);
157 157
158 clear_bit(0, &ctrl->busy); 158 clear_bit(0, &ctrl->busy);
159 159
160 // Try to send next control message 160 // Try to send next control message
161 usb_next_ctrl_msg(urb, adapter); 161 usb_next_ctrl_msg(urb, adapter);
162 return; 162 return;
@@ -181,23 +181,23 @@ static void usb_int_complete(struct urb *urb)
181 int status; 181 int status;
182 182
183 switch (urb->status) { 183 switch (urb->status) {
184 case 0: 184 case 0:
185 /* success */ 185 /* success */
186 break; 186 break;
187 case -ECONNRESET: 187 case -ECONNRESET:
188 case -ENOENT: 188 case -ENOENT:
189 case -ESHUTDOWN: 189 case -ESHUTDOWN:
190 /* this urb is terminated, clean up */ 190 /* this urb is terminated, clean up */
191 DBG(2, "urb shutting down with status: %d", urb->status); 191 DBG(2, "urb shutting down with status: %d", urb->status);
192 return; 192 return;
193 default: 193 default:
194 WARNING("nonzero urb status received: %d", urb->status); 194 WARNING("nonzero urb status received: %d", urb->status);
195 goto exit; 195 goto exit;
196 } 196 }
197 197
198 198
199 DBG_PACKET(2, data, INT_PKT_SIZE); 199 DBG_PACKET(2, data, INT_PKT_SIZE);
200 200
201 if (urb->actual_length == 0) { 201 if (urb->actual_length == 0) {
202 goto exit; 202 goto exit;
203 } 203 }
@@ -214,7 +214,7 @@ static void usb_int_complete(struct urb *urb)
214 FsmEvent(&adapter->d_out.fsm, EV_DOUT_UNDERRUN, NULL); 214 FsmEvent(&adapter->d_out.fsm, EV_DOUT_UNDERRUN, NULL);
215 215
216 if (irqbyte & OUT_DOWN) 216 if (irqbyte & OUT_DOWN)
217;// printk("OUT_DOWN\n"); 217 ;// printk("OUT_DOWN\n");
218 218
219 irqbyte = data[MPINT]; 219 irqbyte = data[MPINT];
220 if (irqbyte & RXCI_INT) 220 if (irqbyte & RXCI_INT)
@@ -226,7 +226,7 @@ static void usb_int_complete(struct urb *urb)
226 urb->actual_length = 0; 226 urb->actual_length = 0;
227 227
228exit: 228exit:
229 status = usb_submit_urb (urb, GFP_ATOMIC); 229 status = usb_submit_urb(urb, GFP_ATOMIC);
230 if (status) 230 if (status)
231 WARNING("usb_submit_urb failed with result %d", status); 231 WARNING("usb_submit_urb failed with result %d", status);
232} 232}
@@ -246,11 +246,11 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
246 int status; 246 int status;
247 struct urb *urb; 247 struct urb *urb;
248 u8 *buf; 248 u8 *buf;
249 249
250 DBG(2,""); 250 DBG(2, "");
251 251
252 if ((status = usb_reset_configuration (dev)) < 0) { 252 if ((status = usb_reset_configuration(dev)) < 0) {
253 WARNING("reset_configuration failed,status=%d",status); 253 WARNING("reset_configuration failed,status=%d", status);
254 return status; 254 return status;
255 } 255 }
256 256
@@ -261,7 +261,7 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
261 return -ENXIO; 261 return -ENXIO;
262 262
263 // Check if the config is sane 263 // Check if the config is sane
264 if ( altsetting->desc.bNumEndpoints != 7 ) { 264 if (altsetting->desc.bNumEndpoints != 7) {
265 WARNING("expecting 7 got %d endpoints!", altsetting->desc.bNumEndpoints); 265 WARNING("expecting 7 got %d endpoints!", altsetting->desc.bNumEndpoints);
266 return -EINVAL; 266 return -EINVAL;
267 } 267 }
@@ -271,8 +271,8 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
271 altsetting->endpoint[4].desc.wMaxPacketSize = __constant_cpu_to_le16(32); 271 altsetting->endpoint[4].desc.wMaxPacketSize = __constant_cpu_to_le16(32);
272 272
273 // Use alternative setting 3 on interface 0 to have 2B+D 273 // Use alternative setting 3 on interface 0 to have 2B+D
274 if ((status = usb_set_interface (dev, 0, 3)) < 0) { 274 if ((status = usb_set_interface(dev, 0, 3)) < 0) {
275 WARNING("usb_set_interface failed,status=%d",status); 275 WARNING("usb_set_interface failed,status=%d", status);
276 return status; 276 return status;
277 } 277 }
278 278
@@ -282,36 +282,36 @@ int st5481_setup_usb(struct st5481_adapter *adapter)
282 return -ENOMEM; 282 return -ENOMEM;
283 } 283 }
284 ctrl->urb = urb; 284 ctrl->urb = urb;
285 285
286 // Fill the control URB 286 // Fill the control URB
287 usb_fill_control_urb (urb, dev, 287 usb_fill_control_urb(urb, dev,
288 usb_sndctrlpipe(dev, 0), 288 usb_sndctrlpipe(dev, 0),
289 NULL, NULL, 0, usb_ctrl_complete, adapter); 289 NULL, NULL, 0, usb_ctrl_complete, adapter);
290
290 291
291
292 fifo_init(&ctrl->msg_fifo.f, ARRAY_SIZE(ctrl->msg_fifo.data)); 292 fifo_init(&ctrl->msg_fifo.f, ARRAY_SIZE(ctrl->msg_fifo.data));
293 293
294 // Allocate URBs and buffers for interrupt endpoint 294 // Allocate URBs and buffers for interrupt endpoint
295 urb = usb_alloc_urb(0, GFP_KERNEL); 295 urb = usb_alloc_urb(0, GFP_KERNEL);
296 if (!urb) { 296 if (!urb) {
297 return -ENOMEM; 297 return -ENOMEM;
298 } 298 }
299 intr->urb = urb; 299 intr->urb = urb;
300 300
301 buf = kmalloc(INT_PKT_SIZE, GFP_KERNEL); 301 buf = kmalloc(INT_PKT_SIZE, GFP_KERNEL);
302 if (!buf) { 302 if (!buf) {
303 return -ENOMEM; 303 return -ENOMEM;
304 } 304 }
305 305
306 endpoint = &altsetting->endpoint[EP_INT-1]; 306 endpoint = &altsetting->endpoint[EP_INT-1];
307 307
308 // Fill the interrupt URB 308 // Fill the interrupt URB
309 usb_fill_int_urb(urb, dev, 309 usb_fill_int_urb(urb, dev,
310 usb_rcvintpipe(dev, endpoint->desc.bEndpointAddress), 310 usb_rcvintpipe(dev, endpoint->desc.bEndpointAddress),
311 buf, INT_PKT_SIZE, 311 buf, INT_PKT_SIZE,
312 usb_int_complete, adapter, 312 usb_int_complete, adapter,
313 endpoint->desc.bInterval); 313 endpoint->desc.bInterval);
314 314
315 return 0; 315 return 0;
316} 316}
317 317
@@ -324,7 +324,7 @@ void st5481_release_usb(struct st5481_adapter *adapter)
324 struct st5481_intr *intr = &adapter->intr; 324 struct st5481_intr *intr = &adapter->intr;
325 struct st5481_ctrl *ctrl = &adapter->ctrl; 325 struct st5481_ctrl *ctrl = &adapter->ctrl;
326 326
327 DBG(1,""); 327 DBG(1, "");
328 328
329 // Stop and free Control and Interrupt URBs 329 // Stop and free Control and Interrupt URBs
330 usb_kill_urb(ctrl->urb); 330 usb_kill_urb(ctrl->urb);
@@ -343,33 +343,33 @@ void st5481_release_usb(struct st5481_adapter *adapter)
343 */ 343 */
344void st5481_start(struct st5481_adapter *adapter) 344void st5481_start(struct st5481_adapter *adapter)
345{ 345{
346 static const u8 init_cmd_table[]={ 346 static const u8 init_cmd_table[] = {
347 SET_DEFAULT,0, 347 SET_DEFAULT, 0,
348 STT,0, 348 STT, 0,
349 SDA_MIN,0x0d, 349 SDA_MIN, 0x0d,
350 SDA_MAX,0x29, 350 SDA_MAX, 0x29,
351 SDELAY_VALUE,0x14, 351 SDELAY_VALUE, 0x14,
352 GPIO_DIR,0x01, 352 GPIO_DIR, 0x01,
353 GPIO_OUT,RED_LED, 353 GPIO_OUT, RED_LED,
354// FFCTRL_OUT_D,4, 354// FFCTRL_OUT_D,4,
355// FFCTRH_OUT_D,12, 355// FFCTRH_OUT_D,12,
356 FFCTRL_OUT_B1,6, 356 FFCTRL_OUT_B1, 6,
357 FFCTRH_OUT_B1,20, 357 FFCTRH_OUT_B1, 20,
358 FFCTRL_OUT_B2,6, 358 FFCTRL_OUT_B2, 6,
359 FFCTRH_OUT_B2,20, 359 FFCTRH_OUT_B2, 20,
360 MPMSK,RXCI_INT+DEN_INT+DCOLL_INT, 360 MPMSK, RXCI_INT + DEN_INT + DCOLL_INT,
361 0 361 0
362 }; 362 };
363 struct st5481_intr *intr = &adapter->intr; 363 struct st5481_intr *intr = &adapter->intr;
364 int i = 0; 364 int i = 0;
365 u8 request,value; 365 u8 request, value;
366 366
367 DBG(8,""); 367 DBG(8, "");
368 368
369 adapter->leds = RED_LED; 369 adapter->leds = RED_LED;
370 370
371 // Start receiving on the interrupt endpoint 371 // Start receiving on the interrupt endpoint
372 SUBMIT_URB(intr->urb, GFP_KERNEL); 372 SUBMIT_URB(intr->urb, GFP_KERNEL);
373 373
374 while ((request = init_cmd_table[i++])) { 374 while ((request = init_cmd_table[i++])) {
375 value = init_cmd_table[i++]; 375 value = init_cmd_table[i++];
@@ -383,7 +383,7 @@ void st5481_start(struct st5481_adapter *adapter)
383 */ 383 */
384void st5481_stop(struct st5481_adapter *adapter) 384void st5481_stop(struct st5481_adapter *adapter)
385{ 385{
386 DBG(8,""); 386 DBG(8, "");
387 387
388 st5481_usb_device_ctrl_msg(adapter, SET_DEFAULT, 0, NULL, NULL); 388 st5481_usb_device_ctrl_msg(adapter, SET_DEFAULT, 0, NULL, NULL);
389} 389}
@@ -394,22 +394,22 @@ void st5481_stop(struct st5481_adapter *adapter)
394 394
395static void 395static void
396fill_isoc_urb(struct urb *urb, struct usb_device *dev, 396fill_isoc_urb(struct urb *urb, struct usb_device *dev,
397 unsigned int pipe, void *buf, int num_packets, 397 unsigned int pipe, void *buf, int num_packets,
398 int packet_size, usb_complete_t complete, 398 int packet_size, usb_complete_t complete,
399 void *context) 399 void *context)
400{ 400{
401 int k; 401 int k;
402 402
403 urb->dev=dev; 403 urb->dev = dev;
404 urb->pipe=pipe; 404 urb->pipe = pipe;
405 urb->interval = 1; 405 urb->interval = 1;
406 urb->transfer_buffer=buf; 406 urb->transfer_buffer = buf;
407 urb->number_of_packets = num_packets; 407 urb->number_of_packets = num_packets;
408 urb->transfer_buffer_length=num_packets*packet_size; 408 urb->transfer_buffer_length = num_packets * packet_size;
409 urb->actual_length = 0; 409 urb->actual_length = 0;
410 urb->complete=complete; 410 urb->complete = complete;
411 urb->context=context; 411 urb->context = context;
412 urb->transfer_flags=URB_ISO_ASAP; 412 urb->transfer_flags = URB_ISO_ASAP;
413 for (k = 0; k < num_packets; k++) { 413 for (k = 0; k < num_packets; k++) {
414 urb->iso_frame_desc[k].offset = packet_size * k; 414 urb->iso_frame_desc[k].offset = packet_size * k;
415 urb->iso_frame_desc[k].length = packet_size; 415 urb->iso_frame_desc[k].length = packet_size;
@@ -418,10 +418,10 @@ fill_isoc_urb(struct urb *urb, struct usb_device *dev,
418} 418}
419 419
420int 420int
421st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev, 421st5481_setup_isocpipes(struct urb *urb[2], struct usb_device *dev,
422 unsigned int pipe, int num_packets, 422 unsigned int pipe, int num_packets,
423 int packet_size, int buf_size, 423 int packet_size, int buf_size,
424 usb_complete_t complete, void *context) 424 usb_complete_t complete, void *context)
425{ 425{
426 int j, retval; 426 int j, retval;
427 unsigned char *buf; 427 unsigned char *buf;
@@ -436,15 +436,15 @@ st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
436 buf = kmalloc(buf_size, GFP_KERNEL); 436 buf = kmalloc(buf_size, GFP_KERNEL);
437 if (!buf) 437 if (!buf)
438 goto err; 438 goto err;
439 439
440 // Fill the isochronous URB 440 // Fill the isochronous URB
441 fill_isoc_urb(urb[j], dev, pipe, buf, 441 fill_isoc_urb(urb[j], dev, pipe, buf,
442 num_packets, packet_size, complete, 442 num_packets, packet_size, complete,
443 context); 443 context);
444 } 444 }
445 return 0; 445 return 0;
446 446
447 err: 447err:
448 for (j = 0; j < 2; j++) { 448 for (j = 0; j < 2; j++) {
449 if (urb[j]) { 449 if (urb[j]) {
450 kfree(urb[j]->transfer_buffer); 450 kfree(urb[j]->transfer_buffer);
@@ -456,7 +456,7 @@ st5481_setup_isocpipes(struct urb* urb[2], struct usb_device *dev,
456 return retval; 456 return retval;
457} 457}
458 458
459void st5481_release_isocpipes(struct urb* urb[2]) 459void st5481_release_isocpipes(struct urb *urb[2])
460{ 460{
461 int j; 461 int j;
462 462
@@ -471,8 +471,8 @@ void st5481_release_isocpipes(struct urb* urb[2])
471/* 471/*
472 * Decode frames received on the B/D channel. 472 * Decode frames received on the B/D channel.
473 * Note that this function will be called continuously 473 * Note that this function will be called continuously
474 * with 64Kbit/s / 16Kbit/s of data and hence it will be 474 * with 64Kbit/s / 16Kbit/s of data and hence it will be
475 * called 50 times per second with 20 ISOC descriptors. 475 * called 50 times per second with 20 ISOC descriptors.
476 * Called at interrupt. 476 * Called at interrupt.
477 */ 477 */
478static void usb_in_complete(struct urb *urb) 478static void usb_in_complete(struct urb *urb)
@@ -484,18 +484,18 @@ static void usb_in_complete(struct urb *urb)
484 484
485 if (unlikely(urb->status < 0)) { 485 if (unlikely(urb->status < 0)) {
486 switch (urb->status) { 486 switch (urb->status) {
487 case -ENOENT: 487 case -ENOENT:
488 case -ESHUTDOWN: 488 case -ESHUTDOWN:
489 case -ECONNRESET: 489 case -ECONNRESET:
490 DBG(1,"urb killed status %d", urb->status); 490 DBG(1, "urb killed status %d", urb->status);
491 return; // Give up 491 return; // Give up
492 default: 492 default:
493 WARNING("urb status %d",urb->status); 493 WARNING("urb status %d", urb->status);
494 break; 494 break;
495 } 495 }
496 } 496 }
497 497
498 DBG_ISO_PACKET(0x80,urb); 498 DBG_ISO_PACKET(0x80, urb);
499 499
500 len = st5481_isoc_flatten(urb); 500 len = st5481_isoc_flatten(urb);
501 ptr = urb->transfer_buffer; 501 ptr = urb->transfer_buffer;
@@ -506,14 +506,14 @@ static void usb_in_complete(struct urb *urb)
506 len = 0; 506 len = 0;
507 } else { 507 } else {
508 status = isdnhdlc_decode(&in->hdlc_state, ptr, len, &count, 508 status = isdnhdlc_decode(&in->hdlc_state, ptr, len, &count,
509 in->rcvbuf, in->bufsize); 509 in->rcvbuf, in->bufsize);
510 ptr += count; 510 ptr += count;
511 len -= count; 511 len -= count;
512 } 512 }
513 513
514 if (status > 0) { 514 if (status > 0) {
515 // Good frame received 515 // Good frame received
516 DBG(4,"count=%d",status); 516 DBG(4, "count=%d", status);
517 DBG_PACKET(0x400, in->rcvbuf, status); 517 DBG_PACKET(0x400, in->rcvbuf, status);
518 if (!(skb = dev_alloc_skb(status))) { 518 if (!(skb = dev_alloc_skb(status))) {
519 WARNING("receive out of memory\n"); 519 WARNING("receive out of memory\n");
@@ -542,14 +542,14 @@ int st5481_setup_in(struct st5481_in *in)
542 struct usb_device *dev = in->adapter->usb_dev; 542 struct usb_device *dev = in->adapter->usb_dev;
543 int retval; 543 int retval;
544 544
545 DBG(4,""); 545 DBG(4, "");
546 546
547 in->rcvbuf = kmalloc(in->bufsize, GFP_KERNEL); 547 in->rcvbuf = kmalloc(in->bufsize, GFP_KERNEL);
548 retval = -ENOMEM; 548 retval = -ENOMEM;
549 if (!in->rcvbuf) 549 if (!in->rcvbuf)
550 goto err; 550 goto err;
551 551
552 retval = st5481_setup_isocpipes(in->urb, dev, 552 retval = st5481_setup_isocpipes(in->urb, dev,
553 usb_rcvisocpipe(dev, in->ep), 553 usb_rcvisocpipe(dev, in->ep),
554 in->num_packets, in->packet_size, 554 in->num_packets, in->packet_size,
555 in->num_packets * in->packet_size, 555 in->num_packets * in->packet_size,
@@ -558,51 +558,51 @@ int st5481_setup_in(struct st5481_in *in)
558 goto err_free; 558 goto err_free;
559 return 0; 559 return 0;
560 560
561 err_free: 561err_free:
562 kfree(in->rcvbuf); 562 kfree(in->rcvbuf);
563 err: 563err:
564 return retval; 564 return retval;
565} 565}
566 566
567void st5481_release_in(struct st5481_in *in) 567void st5481_release_in(struct st5481_in *in)
568{ 568{
569 DBG(2,""); 569 DBG(2, "");
570 570
571 st5481_release_isocpipes(in->urb); 571 st5481_release_isocpipes(in->urb);
572} 572}
573 573
574/* 574/*
575 * Make the transfer_buffer contiguous by 575 * Make the transfer_buffer contiguous by
576 * copying from the iso descriptors if necessary. 576 * copying from the iso descriptors if necessary.
577 */ 577 */
578static int st5481_isoc_flatten(struct urb *urb) 578static int st5481_isoc_flatten(struct urb *urb)
579{ 579{
580 struct usb_iso_packet_descriptor *pipd,*pend; 580 struct usb_iso_packet_descriptor *pipd, *pend;
581 unsigned char *src,*dst; 581 unsigned char *src, *dst;
582 unsigned int len; 582 unsigned int len;
583 583
584 if (urb->status < 0) { 584 if (urb->status < 0) {
585 return urb->status; 585 return urb->status;
586 } 586 }
587 for (pipd = &urb->iso_frame_desc[0], 587 for (pipd = &urb->iso_frame_desc[0],
588 pend = &urb->iso_frame_desc[urb->number_of_packets], 588 pend = &urb->iso_frame_desc[urb->number_of_packets],
589 dst = urb->transfer_buffer; 589 dst = urb->transfer_buffer;
590 pipd < pend; 590 pipd < pend;
591 pipd++) { 591 pipd++) {
592 592
593 if (pipd->status < 0) { 593 if (pipd->status < 0) {
594 return (pipd->status); 594 return (pipd->status);
595 } 595 }
596 596
597 len = pipd->actual_length; 597 len = pipd->actual_length;
598 pipd->actual_length = 0; 598 pipd->actual_length = 0;
599 src = urb->transfer_buffer+pipd->offset; 599 src = urb->transfer_buffer + pipd->offset;
600 600
601 if (src != dst) { 601 if (src != dst) {
602 // Need to copy since isoc buffers not full 602 // Need to copy since isoc buffers not full
603 while (len--) { 603 while (len--) {
604 *dst++ = *src++; 604 *dst++ = *src++;
605 } 605 }
606 } else { 606 } else {
607 // No need to copy, just update destination buffer 607 // No need to copy, just update destination buffer
608 dst += len; 608 dst += len;
@@ -617,7 +617,7 @@ static void st5481_start_rcv(void *context)
617 struct st5481_in *in = context; 617 struct st5481_in *in = context;
618 struct st5481_adapter *adapter = in->adapter; 618 struct st5481_adapter *adapter = in->adapter;
619 619
620 DBG(4,""); 620 DBG(4, "");
621 621
622 in->urb[0]->dev = adapter->usb_dev; 622 in->urb[0]->dev = adapter->usb_dev;
623 SUBMIT_URB(in->urb[0], GFP_KERNEL); 623 SUBMIT_URB(in->urb[0], GFP_KERNEL);
@@ -654,4 +654,3 @@ void st5481_in_mode(struct st5481_in *in, int mode)
654 0, NULL, NULL); 654 0, NULL, NULL);
655 } 655 }
656} 656}
657
diff --git a/drivers/isdn/hisax/tei.c b/drivers/isdn/hisax/tei.c
index 9b6db9c92cd8..9195f9fd628f 100644
--- a/drivers/isdn/hisax/tei.c
+++ b/drivers/isdn/hisax/tei.c
@@ -3,7 +3,7 @@
3 * Author Karsten Keil 3 * Author Karsten Keil
4 * based on the teles driver from Jan den Ouden 4 * based on the teles driver from Jan den Ouden
5 * Copyright by Karsten Keil <keil@isdn4linux.de> 5 * Copyright by Karsten Keil <keil@isdn4linux.de>
6 * 6 *
7 * This software may be used and distributed according to the terms 7 * This software may be used and distributed according to the terms
8 * of the GNU General Public License, incorporated herein by reference. 8 * of the GNU General Public License, incorporated herein by reference.
9 * 9 *
@@ -43,7 +43,7 @@ enum {
43 ST_TEI_IDVERIFY, 43 ST_TEI_IDVERIFY,
44}; 44};
45 45
46#define TEI_STATE_COUNT (ST_TEI_IDVERIFY+1) 46#define TEI_STATE_COUNT (ST_TEI_IDVERIFY + 1)
47 47
48static char *strTeiState[] = 48static char *strTeiState[] =
49{ 49{
@@ -62,7 +62,7 @@ enum {
62 EV_T202, 62 EV_T202,
63}; 63};
64 64
65#define TEI_EVENT_COUNT (EV_T202+1) 65#define TEI_EVENT_COUNT (EV_T202 + 1)
66 66
67static char *strTeiEvent[] = 67static char *strTeiEvent[] =
68{ 68{
@@ -130,14 +130,14 @@ tei_id_request(struct FsmInst *fi, int event, void *arg)
130 130
131 if (st->l2.tei != -1) { 131 if (st->l2.tei != -1) {
132 st->ma.tei_m.printdebug(&st->ma.tei_m, 132 st->ma.tei_m.printdebug(&st->ma.tei_m,
133 "assign request for already assigned tei %d", 133 "assign request for already assigned tei %d",
134 st->l2.tei); 134 st->l2.tei);
135 return; 135 return;
136 } 136 }
137 st->ma.ri = random_ri(); 137 st->ma.ri = random_ri();
138 if (st->ma.debug) 138 if (st->ma.debug)
139 st->ma.tei_m.printdebug(&st->ma.tei_m, 139 st->ma.tei_m.printdebug(&st->ma.tei_m,
140 "assign request ri %d", st->ma.ri); 140 "assign request ri %d", st->ma.ri);
141 put_tei_msg(st, ID_REQUEST, st->ma.ri, 127); 141 put_tei_msg(st, ID_REQUEST, st->ma.ri, 127);
142 FsmChangeState(&st->ma.tei_m, ST_TEI_IDREQ); 142 FsmChangeState(&st->ma.tei_m, ST_TEI_IDREQ);
143 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 1); 143 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 1);
@@ -156,11 +156,11 @@ tei_id_assign(struct FsmInst *fi, int event, void *arg)
156 tei = skb->data[4] >> 1; 156 tei = skb->data[4] >> 1;
157 if (st->ma.debug) 157 if (st->ma.debug)
158 st->ma.tei_m.printdebug(&st->ma.tei_m, 158 st->ma.tei_m.printdebug(&st->ma.tei_m,
159 "identity assign ri %d tei %d", ri, tei); 159 "identity assign ri %d tei %d", ri, tei);
160 if ((ost = findtei(st, tei))) { /* same tei is in use */ 160 if ((ost = findtei(st, tei))) { /* same tei is in use */
161 if (ri != ost->ma.ri) { 161 if (ri != ost->ma.ri) {
162 st->ma.tei_m.printdebug(&st->ma.tei_m, 162 st->ma.tei_m.printdebug(&st->ma.tei_m,
163 "possible duplicate assignment tei %d", tei); 163 "possible duplicate assignment tei %d", tei);
164 ost->l2.l2tei(ost, MDL_ERROR | RESPONSE, NULL); 164 ost->l2.l2tei(ost, MDL_ERROR | RESPONSE, NULL);
165 } 165 }
166 } else if (ri == st->ma.ri) { 166 } else if (ri == st->ma.ri) {
@@ -183,14 +183,14 @@ tei_id_test_dup(struct FsmInst *fi, int event, void *arg)
183 tei = skb->data[4] >> 1; 183 tei = skb->data[4] >> 1;
184 if (st->ma.debug) 184 if (st->ma.debug)
185 st->ma.tei_m.printdebug(&st->ma.tei_m, 185 st->ma.tei_m.printdebug(&st->ma.tei_m,
186 "foreign identity assign ri %d tei %d", ri, tei); 186 "foreign identity assign ri %d tei %d", ri, tei);
187 if ((ost = findtei(st, tei))) { /* same tei is in use */ 187 if ((ost = findtei(st, tei))) { /* same tei is in use */
188 if (ri != ost->ma.ri) { /* and it wasn't our request */ 188 if (ri != ost->ma.ri) { /* and it wasn't our request */
189 st->ma.tei_m.printdebug(&st->ma.tei_m, 189 st->ma.tei_m.printdebug(&st->ma.tei_m,
190 "possible duplicate assignment tei %d", tei); 190 "possible duplicate assignment tei %d", tei);
191 FsmEvent(&ost->ma.tei_m, EV_VERIFY, NULL); 191 FsmEvent(&ost->ma.tei_m, EV_VERIFY, NULL);
192 } 192 }
193 } 193 }
194} 194}
195 195
196static void 196static void
@@ -204,7 +204,7 @@ tei_id_denied(struct FsmInst *fi, int event, void *arg)
204 tei = skb->data[4] >> 1; 204 tei = skb->data[4] >> 1;
205 if (st->ma.debug) 205 if (st->ma.debug)
206 st->ma.tei_m.printdebug(&st->ma.tei_m, 206 st->ma.tei_m.printdebug(&st->ma.tei_m,
207 "identity denied ri %d tei %d", ri, tei); 207 "identity denied ri %d tei %d", ri, tei);
208} 208}
209 209
210static void 210static void
@@ -217,7 +217,7 @@ tei_id_chk_req(struct FsmInst *fi, int event, void *arg)
217 tei = skb->data[4] >> 1; 217 tei = skb->data[4] >> 1;
218 if (st->ma.debug) 218 if (st->ma.debug)
219 st->ma.tei_m.printdebug(&st->ma.tei_m, 219 st->ma.tei_m.printdebug(&st->ma.tei_m,
220 "identity check req tei %d", tei); 220 "identity check req tei %d", tei);
221 if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) { 221 if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) {
222 FsmDelTimer(&st->ma.t202, 4); 222 FsmDelTimer(&st->ma.t202, 4);
223 FsmChangeState(&st->ma.tei_m, ST_TEI_NOP); 223 FsmChangeState(&st->ma.tei_m, ST_TEI_NOP);
@@ -236,7 +236,7 @@ tei_id_remove(struct FsmInst *fi, int event, void *arg)
236 tei = skb->data[4] >> 1; 236 tei = skb->data[4] >> 1;
237 if (st->ma.debug) 237 if (st->ma.debug)
238 st->ma.tei_m.printdebug(&st->ma.tei_m, 238 st->ma.tei_m.printdebug(&st->ma.tei_m,
239 "identity remove tei %d", tei); 239 "identity remove tei %d", tei);
240 if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) { 240 if ((st->l2.tei != -1) && ((tei == GROUP_TEI) || (tei == st->l2.tei))) {
241 FsmDelTimer(&st->ma.t202, 5); 241 FsmDelTimer(&st->ma.t202, 5);
242 FsmChangeState(&st->ma.tei_m, ST_TEI_NOP); 242 FsmChangeState(&st->ma.tei_m, ST_TEI_NOP);
@@ -253,7 +253,7 @@ tei_id_verify(struct FsmInst *fi, int event, void *arg)
253 253
254 if (st->ma.debug) 254 if (st->ma.debug)
255 st->ma.tei_m.printdebug(&st->ma.tei_m, 255 st->ma.tei_m.printdebug(&st->ma.tei_m,
256 "id verify request for tei %d", st->l2.tei); 256 "id verify request for tei %d", st->l2.tei);
257 put_tei_msg(st, ID_VERIFY, 0, st->l2.tei); 257 put_tei_msg(st, ID_VERIFY, 0, st->l2.tei);
258 FsmChangeState(&st->ma.tei_m, ST_TEI_IDVERIFY); 258 FsmChangeState(&st->ma.tei_m, ST_TEI_IDVERIFY);
259 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 2); 259 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 2);
@@ -270,8 +270,8 @@ tei_id_req_tout(struct FsmInst *fi, int event, void *arg)
270 st->ma.ri = random_ri(); 270 st->ma.ri = random_ri();
271 if (st->ma.debug) 271 if (st->ma.debug)
272 st->ma.tei_m.printdebug(&st->ma.tei_m, 272 st->ma.tei_m.printdebug(&st->ma.tei_m,
273 "assign req(%d) ri %d", 4 - st->ma.N202, 273 "assign req(%d) ri %d", 4 - st->ma.N202,
274 st->ma.ri); 274 st->ma.ri);
275 put_tei_msg(st, ID_REQUEST, st->ma.ri, 127); 275 put_tei_msg(st, ID_REQUEST, st->ma.ri, 127);
276 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 3); 276 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 3);
277 } else { 277 } else {
@@ -292,13 +292,13 @@ tei_id_ver_tout(struct FsmInst *fi, int event, void *arg)
292 if (--st->ma.N202) { 292 if (--st->ma.N202) {
293 if (st->ma.debug) 293 if (st->ma.debug)
294 st->ma.tei_m.printdebug(&st->ma.tei_m, 294 st->ma.tei_m.printdebug(&st->ma.tei_m,
295 "id verify req(%d) for tei %d", 295 "id verify req(%d) for tei %d",
296 3 - st->ma.N202, st->l2.tei); 296 3 - st->ma.N202, st->l2.tei);
297 put_tei_msg(st, ID_VERIFY, 0, st->l2.tei); 297 put_tei_msg(st, ID_VERIFY, 0, st->l2.tei);
298 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 4); 298 FsmAddTimer(&st->ma.t202, st->ma.T202, EV_T202, NULL, 4);
299 } else { 299 } else {
300 st->ma.tei_m.printdebug(&st->ma.tei_m, 300 st->ma.tei_m.printdebug(&st->ma.tei_m,
301 "verify req for tei %d failed", st->l2.tei); 301 "verify req for tei %d failed", st->l2.tei);
302 st->l3.l3l2(st, MDL_REMOVE | REQUEST, NULL); 302 st->l3.l3l2(st, MDL_REMOVE | REQUEST, NULL);
303 cs = (struct IsdnCardState *) st->l1.hardware; 303 cs = (struct IsdnCardState *) st->l1.hardware;
304 cs->cardmsg(cs, MDL_REMOVE | REQUEST, NULL); 304 cs->cardmsg(cs, MDL_REMOVE | REQUEST, NULL);
@@ -320,25 +320,25 @@ tei_l1l2(struct PStack *st, int pr, void *arg)
320 if (pr == (PH_DATA | INDICATION)) { 320 if (pr == (PH_DATA | INDICATION)) {
321 if (skb->len < 3) { 321 if (skb->len < 3) {
322 st->ma.tei_m.printdebug(&st->ma.tei_m, 322 st->ma.tei_m.printdebug(&st->ma.tei_m,
323 "short mgr frame %ld/3", skb->len); 323 "short mgr frame %ld/3", skb->len);
324 } else if ((skb->data[0] != ((TEI_SAPI << 2) | 2)) || 324 } else if ((skb->data[0] != ((TEI_SAPI << 2) | 2)) ||
325 (skb->data[1] != ((GROUP_TEI << 1) | 1))) { 325 (skb->data[1] != ((GROUP_TEI << 1) | 1))) {
326 st->ma.tei_m.printdebug(&st->ma.tei_m, 326 st->ma.tei_m.printdebug(&st->ma.tei_m,
327 "wrong mgr sapi/tei %x/%x", 327 "wrong mgr sapi/tei %x/%x",
328 skb->data[0], skb->data[1]); 328 skb->data[0], skb->data[1]);
329 } else if ((skb->data[2] & 0xef) != UI) { 329 } else if ((skb->data[2] & 0xef) != UI) {
330 st->ma.tei_m.printdebug(&st->ma.tei_m, 330 st->ma.tei_m.printdebug(&st->ma.tei_m,
331 "mgr frame is not ui %x", skb->data[2]); 331 "mgr frame is not ui %x", skb->data[2]);
332 } else { 332 } else {
333 skb_pull(skb, 3); 333 skb_pull(skb, 3);
334 if (skb->len < 5) { 334 if (skb->len < 5) {
335 st->ma.tei_m.printdebug(&st->ma.tei_m, 335 st->ma.tei_m.printdebug(&st->ma.tei_m,
336 "short mgr frame %ld/5", skb->len); 336 "short mgr frame %ld/5", skb->len);
337 } else if (skb->data[0] != TEI_ENTITY_ID) { 337 } else if (skb->data[0] != TEI_ENTITY_ID) {
338 /* wrong management entity identifier, ignore */ 338 /* wrong management entity identifier, ignore */
339 st->ma.tei_m.printdebug(&st->ma.tei_m, 339 st->ma.tei_m.printdebug(&st->ma.tei_m,
340 "tei handler wrong entity id %x", 340 "tei handler wrong entity id %x",
341 skb->data[0]); 341 skb->data[0]);
342 } else { 342 } else {
343 mt = skb->data[3]; 343 mt = skb->data[3];
344 if (mt == ID_ASSIGNED) 344 if (mt == ID_ASSIGNED)
@@ -351,13 +351,13 @@ tei_l1l2(struct PStack *st, int pr, void *arg)
351 FsmEvent(&st->ma.tei_m, EV_REMOVE, skb); 351 FsmEvent(&st->ma.tei_m, EV_REMOVE, skb);
352 else { 352 else {
353 st->ma.tei_m.printdebug(&st->ma.tei_m, 353 st->ma.tei_m.printdebug(&st->ma.tei_m,
354 "tei handler wrong mt %x\n", mt); 354 "tei handler wrong mt %x\n", mt);
355 } 355 }
356 } 356 }
357 } 357 }
358 } else { 358 } else {
359 st->ma.tei_m.printdebug(&st->ma.tei_m, 359 st->ma.tei_m.printdebug(&st->ma.tei_m,
360 "tei handler wrong pr %x\n", pr); 360 "tei handler wrong pr %x\n", pr);
361 } 361 }
362 dev_kfree_skb(skb); 362 dev_kfree_skb(skb);
363} 363}
@@ -371,7 +371,7 @@ tei_l2tei(struct PStack *st, int pr, void *arg)
371 if (pr == (MDL_ASSIGN | INDICATION)) { 371 if (pr == (MDL_ASSIGN | INDICATION)) {
372 if (st->ma.debug) 372 if (st->ma.debug)
373 st->ma.tei_m.printdebug(&st->ma.tei_m, 373 st->ma.tei_m.printdebug(&st->ma.tei_m,
374 "fixed assign tei %d", st->l2.tei); 374 "fixed assign tei %d", st->l2.tei);
375 st->l3.l3l2(st, MDL_ASSIGN | REQUEST, (void *) (long) st->l2.tei); 375 st->l3.l3l2(st, MDL_ASSIGN | REQUEST, (void *) (long) st->l2.tei);
376 cs = (struct IsdnCardState *) st->l1.hardware; 376 cs = (struct IsdnCardState *) st->l1.hardware;
377 cs->cardmsg(cs, MDL_ASSIGN | REQUEST, NULL); 377 cs->cardmsg(cs, MDL_ASSIGN | REQUEST, NULL);
@@ -379,14 +379,14 @@ tei_l2tei(struct PStack *st, int pr, void *arg)
379 return; 379 return;
380 } 380 }
381 switch (pr) { 381 switch (pr) {
382 case (MDL_ASSIGN | INDICATION): 382 case (MDL_ASSIGN | INDICATION):
383 FsmEvent(&st->ma.tei_m, EV_IDREQ, arg); 383 FsmEvent(&st->ma.tei_m, EV_IDREQ, arg);
384 break; 384 break;
385 case (MDL_ERROR | REQUEST): 385 case (MDL_ERROR | REQUEST):
386 FsmEvent(&st->ma.tei_m, EV_VERIFY, arg); 386 FsmEvent(&st->ma.tei_m, EV_VERIFY, arg);
387 break; 387 break;
388 default: 388 default:
389 break; 389 break;
390 } 390 }
391} 391}
392 392
diff --git a/drivers/isdn/hisax/teleint.c b/drivers/isdn/hisax/teleint.c
index b0ce4ae45cbf..fa329e27cc5b 100644
--- a/drivers/isdn/hisax/teleint.c
+++ b/drivers/isdn/hisax/teleint.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -18,7 +18,7 @@
18 18
19static const char *TeleInt_revision = "$Revision: 1.16.2.5 $"; 19static const char *TeleInt_revision = "$Revision: 1.16.2.5 $";
20 20
21#define byteout(addr,val) outb(val,addr) 21#define byteout(addr, val) outb(val, addr)
22#define bytein(addr) inb(addr) 22#define bytein(addr) inb(addr)
23 23
24static inline u_char 24static inline u_char
@@ -40,14 +40,14 @@ readreg(unsigned int ale, unsigned int adr, u_char off)
40} 40}
41 41
42static inline void 42static inline void
43readfifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 43readfifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
44{ 44{
45 register u_char ret; 45 register u_char ret;
46 register int max_delay = 20000; 46 register int max_delay = 20000;
47 register int i; 47 register int i;
48 48
49 byteout(ale, off); 49 byteout(ale, off);
50 for (i = 0; i<size; i++) { 50 for (i = 0; i < size; i++) {
51 ret = HFC_BUSY & bytein(ale); 51 ret = HFC_BUSY & bytein(ale);
52 while (ret && --max_delay) 52 while (ret && --max_delay)
53 ret = HFC_BUSY & bytein(ale); 53 ret = HFC_BUSY & bytein(ale);
@@ -78,14 +78,14 @@ writereg(unsigned int ale, unsigned int adr, u_char off, u_char data)
78} 78}
79 79
80static inline void 80static inline void
81writefifo(unsigned int ale, unsigned int adr, u_char off, u_char * data, int size) 81writefifo(unsigned int ale, unsigned int adr, u_char off, u_char *data, int size)
82{ 82{
83 register u_char ret; 83 register u_char ret;
84 register int max_delay = 20000; 84 register int max_delay = 20000;
85 register int i; 85 register int i;
86 86
87 byteout(ale, off); 87 byteout(ale, off);
88 for (i = 0; i<size; i++) { 88 for (i = 0; i < size; i++) {
89 ret = HFC_BUSY & bytein(ale); 89 ret = HFC_BUSY & bytein(ale);
90 while (ret && --max_delay) 90 while (ret && --max_delay)
91 ret = HFC_BUSY & bytein(ale); 91 ret = HFC_BUSY & bytein(ale);
@@ -114,14 +114,14 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
114} 114}
115 115
116static void 116static void
117ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 117ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
118{ 118{
119 cs->hw.hfc.cip = 0; 119 cs->hw.hfc.cip = 0;
120 readfifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size); 120 readfifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size);
121} 121}
122 122
123static void 123static void
124WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 124WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
125{ 125{
126 cs->hw.hfc.cip = 0; 126 cs->hw.hfc.cip = 0;
127 writefifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size); 127 writefifo(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, 0, data, size);
@@ -163,7 +163,7 @@ TeleInt_interrupt(int intno, void *dev_id)
163 163
164 spin_lock_irqsave(&cs->lock, flags); 164 spin_lock_irqsave(&cs->lock, flags);
165 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA); 165 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA);
166 Start_ISAC: 166Start_ISAC:
167 if (val) 167 if (val)
168 isac_interrupt(cs, val); 168 isac_interrupt(cs, val);
169 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA); 169 val = readreg(cs->hw.hfc.addr | 1, cs->hw.hfc.addr, ISAC_ISTA);
@@ -183,7 +183,7 @@ TeleInt_Timer(struct IsdnCardState *cs)
183{ 183{
184 int stat = 0; 184 int stat = 0;
185 u_long flags; 185 u_long flags;
186 186
187 spin_lock_irqsave(&cs->lock, flags); 187 spin_lock_irqsave(&cs->lock, flags);
188 if (cs->bcs[0].mode) { 188 if (cs->bcs[0].mode) {
189 stat |= 1; 189 stat |= 1;
@@ -194,7 +194,7 @@ TeleInt_Timer(struct IsdnCardState *cs)
194 main_irq_hfc(&cs->bcs[1]); 194 main_irq_hfc(&cs->bcs[1]);
195 } 195 }
196 spin_unlock_irqrestore(&cs->lock, flags); 196 spin_unlock_irqrestore(&cs->lock, flags);
197 stat = HZ/100; 197 stat = HZ / 100;
198 if (!stat) 198 if (!stat)
199 stat = 1; 199 stat = 1;
200 cs->hw.hfc.timer.expires = jiffies + stat; 200 cs->hw.hfc.timer.expires = jiffies + stat;
@@ -229,34 +229,34 @@ TeleInt_card_msg(struct IsdnCardState *cs, int mt, void *arg)
229 int delay; 229 int delay;
230 230
231 switch (mt) { 231 switch (mt) {
232 case CARD_RESET: 232 case CARD_RESET:
233 spin_lock_irqsave(&cs->lock, flags); 233 spin_lock_irqsave(&cs->lock, flags);
234 reset_TeleInt(cs); 234 reset_TeleInt(cs);
235 spin_unlock_irqrestore(&cs->lock, flags); 235 spin_unlock_irqrestore(&cs->lock, flags);
236 return(0); 236 return (0);
237 case CARD_RELEASE: 237 case CARD_RELEASE:
238 release_io_TeleInt(cs); 238 release_io_TeleInt(cs);
239 return(0); 239 return (0);
240 case CARD_INIT: 240 case CARD_INIT:
241 spin_lock_irqsave(&cs->lock, flags); 241 spin_lock_irqsave(&cs->lock, flags);
242 reset_TeleInt(cs); 242 reset_TeleInt(cs);
243 inithfc(cs); 243 inithfc(cs);
244 clear_pending_isac_ints(cs); 244 clear_pending_isac_ints(cs);
245 initisac(cs); 245 initisac(cs);
246 /* Reenable all IRQ */ 246 /* Reenable all IRQ */
247 cs->writeisac(cs, ISAC_MASK, 0); 247 cs->writeisac(cs, ISAC_MASK, 0);
248 cs->writeisac(cs, ISAC_CMDR, 0x41); 248 cs->writeisac(cs, ISAC_CMDR, 0x41);
249 spin_unlock_irqrestore(&cs->lock, flags); 249 spin_unlock_irqrestore(&cs->lock, flags);
250 delay = HZ/100; 250 delay = HZ / 100;
251 if (!delay) 251 if (!delay)
252 delay = 1; 252 delay = 1;
253 cs->hw.hfc.timer.expires = jiffies + delay; 253 cs->hw.hfc.timer.expires = jiffies + delay;
254 add_timer(&cs->hw.hfc.timer); 254 add_timer(&cs->hw.hfc.timer);
255 return(0); 255 return (0);
256 case CARD_TEST: 256 case CARD_TEST:
257 return(0); 257 return (0);
258 } 258 }
259 return(0); 259 return (0);
260} 260}
261 261
262int __devinit 262int __devinit
@@ -293,34 +293,34 @@ setup_TeleInt(struct IsdnCard *card)
293 byteout(cs->hw.hfc.addr, cs->hw.hfc.addr & 0xff); 293 byteout(cs->hw.hfc.addr, cs->hw.hfc.addr & 0xff);
294 byteout(cs->hw.hfc.addr | 1, ((cs->hw.hfc.addr & 0x300) >> 8) | 0x54); 294 byteout(cs->hw.hfc.addr | 1, ((cs->hw.hfc.addr & 0x300) >> 8) | 0x54);
295 switch (cs->irq) { 295 switch (cs->irq) {
296 case 3: 296 case 3:
297 cs->hw.hfc.cirm |= HFC_INTA; 297 cs->hw.hfc.cirm |= HFC_INTA;
298 break; 298 break;
299 case 4: 299 case 4:
300 cs->hw.hfc.cirm |= HFC_INTB; 300 cs->hw.hfc.cirm |= HFC_INTB;
301 break; 301 break;
302 case 5: 302 case 5:
303 cs->hw.hfc.cirm |= HFC_INTC; 303 cs->hw.hfc.cirm |= HFC_INTC;
304 break; 304 break;
305 case 7: 305 case 7:
306 cs->hw.hfc.cirm |= HFC_INTD; 306 cs->hw.hfc.cirm |= HFC_INTD;
307 break; 307 break;
308 case 10: 308 case 10:
309 cs->hw.hfc.cirm |= HFC_INTE; 309 cs->hw.hfc.cirm |= HFC_INTE;
310 break; 310 break;
311 case 11: 311 case 11:
312 cs->hw.hfc.cirm |= HFC_INTF; 312 cs->hw.hfc.cirm |= HFC_INTF;
313 break; 313 break;
314 default: 314 default:
315 printk(KERN_WARNING "TeleInt: wrong IRQ\n"); 315 printk(KERN_WARNING "TeleInt: wrong IRQ\n");
316 release_io_TeleInt(cs); 316 release_io_TeleInt(cs);
317 return (0); 317 return (0);
318 } 318 }
319 byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.cirm); 319 byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.cirm);
320 byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.ctmt); 320 byteout(cs->hw.hfc.addr | 1, cs->hw.hfc.ctmt);
321 321
322 printk(KERN_INFO "TeleInt: defined at 0x%x IRQ %d\n", 322 printk(KERN_INFO "TeleInt: defined at 0x%x IRQ %d\n",
323 cs->hw.hfc.addr, cs->irq); 323 cs->hw.hfc.addr, cs->irq);
324 324
325 setup_isac(cs); 325 setup_isac(cs);
326 cs->readisac = &ReadISAC; 326 cs->readisac = &ReadISAC;
diff --git a/drivers/isdn/hisax/teles0.c b/drivers/isdn/hisax/teles0.c
index 3ca0bed1b88c..49b4a26f91e0 100644
--- a/drivers/isdn/hisax/teles0.c
+++ b/drivers/isdn/hisax/teles0.c
@@ -5,7 +5,7 @@
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * based on the teles driver from Jan den Ouden 6 * based on the teles driver from Jan den Ouden
7 * Copyright by Karsten Keil <keil@isdn4linux.de> 7 * Copyright by Karsten Keil <keil@isdn4linux.de>
8 * 8 *
9 * This software may be used and distributed according to the terms 9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference. 10 * of the GNU General Public License, incorporated herein by reference.
11 * 11 *
@@ -24,7 +24,7 @@
24static const char *teles0_revision = "$Revision: 2.15.2.4 $"; 24static const char *teles0_revision = "$Revision: 2.15.2.4 $";
25 25
26#define TELES_IOMEM_SIZE 0x400 26#define TELES_IOMEM_SIZE 0x400
27#define byteout(addr,val) outb(val,addr) 27#define byteout(addr, val) outb(val, addr)
28#define bytein(addr) inb(addr) 28#define bytein(addr) inb(addr)
29 29
30static inline u_char 30static inline u_char
@@ -55,7 +55,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
55} 55}
56 56
57static inline void 57static inline void
58read_fifo_isac(void __iomem *adr, u_char * data, int size) 58read_fifo_isac(void __iomem *adr, u_char *data, int size)
59{ 59{
60 register int i; 60 register int i;
61 register u_char __iomem *ad = adr + 0x100; 61 register u_char __iomem *ad = adr + 0x100;
@@ -64,7 +64,7 @@ read_fifo_isac(void __iomem *adr, u_char * data, int size)
64} 64}
65 65
66static inline void 66static inline void
67write_fifo_isac(void __iomem *adr, u_char * data, int size) 67write_fifo_isac(void __iomem *adr, u_char *data, int size)
68{ 68{
69 register int i; 69 register int i;
70 register u_char __iomem *ad = adr + 0x100; 70 register u_char __iomem *ad = adr + 0x100;
@@ -74,7 +74,7 @@ write_fifo_isac(void __iomem *adr, u_char * data, int size)
74} 74}
75 75
76static inline void 76static inline void
77read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size) 77read_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
78{ 78{
79 register int i; 79 register int i;
80 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180); 80 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
@@ -83,7 +83,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
83} 83}
84 84
85static inline void 85static inline void
86write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size) 86write_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
87{ 87{
88 int i; 88 int i;
89 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180); 89 register u_char __iomem *ad = adr + (hscx ? 0x1c0 : 0x180);
@@ -107,13 +107,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
107} 107}
108 108
109static void 109static void
110ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 110ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
111{ 111{
112 read_fifo_isac(cs->hw.teles0.membase, data, size); 112 read_fifo_isac(cs->hw.teles0.membase, data, size);
113} 113}
114 114
115static void 115static void
116WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 116WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
117{ 117{
118 write_fifo_isac(cs->hw.teles0.membase, data, size); 118 write_fifo_isac(cs->hw.teles0.membase, data, size);
119} 119}
@@ -151,11 +151,11 @@ teles0_interrupt(int intno, void *dev_id)
151 151
152 spin_lock_irqsave(&cs->lock, flags); 152 spin_lock_irqsave(&cs->lock, flags);
153 val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA); 153 val = readhscx(cs->hw.teles0.membase, 1, HSCX_ISTA);
154 Start_HSCX: 154Start_HSCX:
155 if (val) 155 if (val)
156 hscx_int_main(cs, val); 156 hscx_int_main(cs, val);
157 val = readisac(cs->hw.teles0.membase, ISAC_ISTA); 157 val = readisac(cs->hw.teles0.membase, ISAC_ISTA);
158 Start_ISAC: 158Start_ISAC:
159 if (val) 159 if (val)
160 isac_interrupt(cs, val); 160 isac_interrupt(cs, val);
161 count++; 161 count++;
@@ -197,33 +197,33 @@ reset_teles0(struct IsdnCardState *cs)
197 197
198 if (cs->hw.teles0.cfg_reg) { 198 if (cs->hw.teles0.cfg_reg) {
199 switch (cs->irq) { 199 switch (cs->irq) {
200 case 2: 200 case 2:
201 case 9: 201 case 9:
202 cfval = 0x00; 202 cfval = 0x00;
203 break; 203 break;
204 case 3: 204 case 3:
205 cfval = 0x02; 205 cfval = 0x02;
206 break; 206 break;
207 case 4: 207 case 4:
208 cfval = 0x04; 208 cfval = 0x04;
209 break; 209 break;
210 case 5: 210 case 5:
211 cfval = 0x06; 211 cfval = 0x06;
212 break; 212 break;
213 case 10: 213 case 10:
214 cfval = 0x08; 214 cfval = 0x08;
215 break; 215 break;
216 case 11: 216 case 11:
217 cfval = 0x0A; 217 cfval = 0x0A;
218 break; 218 break;
219 case 12: 219 case 12:
220 cfval = 0x0C; 220 cfval = 0x0C;
221 break; 221 break;
222 case 15: 222 case 15:
223 cfval = 0x0E; 223 cfval = 0x0E;
224 break; 224 break;
225 default: 225 default:
226 return(1); 226 return (1);
227 } 227 }
228 cfval |= ((cs->hw.teles0.phymem >> 9) & 0xF0); 228 cfval |= ((cs->hw.teles0.phymem >> 9) & 0xF0);
229 byteout(cs->hw.teles0.cfg_reg + 4, cfval); 229 byteout(cs->hw.teles0.cfg_reg + 4, cfval);
@@ -235,7 +235,7 @@ reset_teles0(struct IsdnCardState *cs)
235 HZDELAY(HZ / 5 + 1); 235 HZDELAY(HZ / 5 + 1);
236 writeb(1, cs->hw.teles0.membase + 0x80); mb(); 236 writeb(1, cs->hw.teles0.membase + 0x80); mb();
237 HZDELAY(HZ / 5 + 1); 237 HZDELAY(HZ / 5 + 1);
238 return(0); 238 return (0);
239} 239}
240 240
241static int 241static int
@@ -244,23 +244,23 @@ Teles_card_msg(struct IsdnCardState *cs, int mt, void *arg)
244 u_long flags; 244 u_long flags;
245 245
246 switch (mt) { 246 switch (mt) {
247 case CARD_RESET: 247 case CARD_RESET:
248 spin_lock_irqsave(&cs->lock, flags); 248 spin_lock_irqsave(&cs->lock, flags);
249 reset_teles0(cs); 249 reset_teles0(cs);
250 spin_unlock_irqrestore(&cs->lock, flags); 250 spin_unlock_irqrestore(&cs->lock, flags);
251 return(0); 251 return (0);
252 case CARD_RELEASE: 252 case CARD_RELEASE:
253 release_io_teles0(cs); 253 release_io_teles0(cs);
254 return(0); 254 return (0);
255 case CARD_INIT: 255 case CARD_INIT:
256 spin_lock_irqsave(&cs->lock, flags); 256 spin_lock_irqsave(&cs->lock, flags);
257 inithscxisac(cs, 3); 257 inithscxisac(cs, 3);
258 spin_unlock_irqrestore(&cs->lock, flags); 258 spin_unlock_irqrestore(&cs->lock, flags);
259 return(0); 259 return (0);
260 case CARD_TEST: 260 case CARD_TEST:
261 return(0); 261 return (0);
262 } 262 }
263 return(0); 263 return (0);
264} 264}
265 265
266int __devinit 266int __devinit
@@ -283,14 +283,14 @@ setup_teles0(struct IsdnCard *card)
283 if (card->para[1] < 0x10000) { 283 if (card->para[1] < 0x10000) {
284 card->para[1] <<= 4; 284 card->para[1] <<= 4;
285 printk(KERN_INFO 285 printk(KERN_INFO
286 "Teles0: membase configured DOSish, assuming 0x%lx\n", 286 "Teles0: membase configured DOSish, assuming 0x%lx\n",
287 (unsigned long) card->para[1]); 287 (unsigned long) card->para[1]);
288 } 288 }
289 cs->irq = card->para[0]; 289 cs->irq = card->para[0];
290 if (cs->hw.teles0.cfg_reg) { 290 if (cs->hw.teles0.cfg_reg) {
291 if (!request_region(cs->hw.teles0.cfg_reg, 8, "teles cfg")) { 291 if (!request_region(cs->hw.teles0.cfg_reg, 8, "teles cfg")) {
292 printk(KERN_WARNING 292 printk(KERN_WARNING
293 "HiSax: %s config port %x-%x already in use\n", 293 "HiSax: %s config port %x-%x already in use\n",
294 CardType[card->typ], 294 CardType[card->typ],
295 cs->hw.teles0.cfg_reg, 295 cs->hw.teles0.cfg_reg,
296 cs->hw.teles0.cfg_reg + 8); 296 cs->hw.teles0.cfg_reg + 8);
@@ -311,8 +311,8 @@ setup_teles0(struct IsdnCard *card)
311 return (0); 311 return (0);
312 } 312 }
313 val = bytein(cs->hw.teles0.cfg_reg + 2); /* 0x1e=without AB 313 val = bytein(cs->hw.teles0.cfg_reg + 2); /* 0x1e=without AB
314 * 0x1f=with AB 314 * 0x1f=with AB
315 * 0x1c 16.3 ??? 315 * 0x1c 16.3 ???
316 */ 316 */
317 if (val != 0x1e && val != 0x1f) { 317 if (val != 0x1e && val != 0x1f) {
318 printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n", 318 printk(KERN_WARNING "Teles0: 16.0 Byte at %x is %x\n",
@@ -326,10 +326,10 @@ setup_teles0(struct IsdnCard *card)
326 cs->hw.teles0.phymem = card->para[1]; 326 cs->hw.teles0.phymem = card->para[1];
327 if (!request_mem_region(cs->hw.teles0.phymem, TELES_IOMEM_SIZE, "teles iomem")) { 327 if (!request_mem_region(cs->hw.teles0.phymem, TELES_IOMEM_SIZE, "teles iomem")) {
328 printk(KERN_WARNING 328 printk(KERN_WARNING
329 "HiSax: %s memory region %lx-%lx already in use\n", 329 "HiSax: %s memory region %lx-%lx already in use\n",
330 CardType[card->typ], 330 CardType[card->typ],
331 cs->hw.teles0.phymem, 331 cs->hw.teles0.phymem,
332 cs->hw.teles0.phymem + TELES_IOMEM_SIZE); 332 cs->hw.teles0.phymem + TELES_IOMEM_SIZE);
333 if (cs->hw.teles0.cfg_reg) 333 if (cs->hw.teles0.cfg_reg)
334 release_region(cs->hw.teles0.cfg_reg, 8); 334 release_region(cs->hw.teles0.cfg_reg, 8);
335 return (0); 335 return (0);
@@ -357,7 +357,7 @@ setup_teles0(struct IsdnCard *card)
357 ISACVersion(cs, "Teles0:"); 357 ISACVersion(cs, "Teles0:");
358 if (HscxVersion(cs, "Teles0:")) { 358 if (HscxVersion(cs, "Teles0:")) {
359 printk(KERN_WARNING 359 printk(KERN_WARNING
360 "Teles0: wrong HSCX versions check IO/MEM addresses\n"); 360 "Teles0: wrong HSCX versions check IO/MEM addresses\n");
361 release_io_teles0(cs); 361 release_io_teles0(cs);
362 return (0); 362 return (0);
363 } 363 }
diff --git a/drivers/isdn/hisax/teles3.c b/drivers/isdn/hisax/teles3.c
index e9f5bb4cdffa..220b919fafc3 100644
--- a/drivers/isdn/hisax/teles3.c
+++ b/drivers/isdn/hisax/teles3.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Karsten Keil 5 * Author Karsten Keil
6 * Copyright by Karsten Keil <keil@isdn4linux.de> 6 * Copyright by Karsten Keil <keil@isdn4linux.de>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -22,7 +22,7 @@
22 22
23static const char *teles3_revision = "$Revision: 2.19.2.4 $"; 23static const char *teles3_revision = "$Revision: 2.19.2.4 $";
24 24
25#define byteout(addr,val) outb(val,addr) 25#define byteout(addr, val) outb(val, addr)
26#define bytein(addr) inb(addr) 26#define bytein(addr) inb(addr)
27 27
28static inline u_char 28static inline u_char
@@ -39,13 +39,13 @@ writereg(unsigned int adr, u_char off, u_char data)
39 39
40 40
41static inline void 41static inline void
42read_fifo(unsigned int adr, u_char * data, int size) 42read_fifo(unsigned int adr, u_char *data, int size)
43{ 43{
44 insb(adr, data, size); 44 insb(adr, data, size);
45} 45}
46 46
47static void 47static void
48write_fifo(unsigned int adr, u_char * data, int size) 48write_fifo(unsigned int adr, u_char *data, int size)
49{ 49{
50 outsb(adr, data, size); 50 outsb(adr, data, size);
51} 51}
@@ -65,13 +65,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
65} 65}
66 66
67static void 67static void
68ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 68ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
69{ 69{
70 read_fifo(cs->hw.teles3.isacfifo, data, size); 70 read_fifo(cs->hw.teles3.isacfifo, data, size);
71} 71}
72 72
73static void 73static void
74WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 74WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
75{ 75{
76 write_fifo(cs->hw.teles3.isacfifo, data, size); 76 write_fifo(cs->hw.teles3.isacfifo, data, size);
77} 77}
@@ -110,11 +110,11 @@ teles3_interrupt(int intno, void *dev_id)
110 110
111 spin_lock_irqsave(&cs->lock, flags); 111 spin_lock_irqsave(&cs->lock, flags);
112 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA); 112 val = readreg(cs->hw.teles3.hscx[1], HSCX_ISTA);
113 Start_HSCX: 113Start_HSCX:
114 if (val) 114 if (val)
115 hscx_int_main(cs, val); 115 hscx_int_main(cs, val);
116 val = readreg(cs->hw.teles3.isac, ISAC_ISTA); 116 val = readreg(cs->hw.teles3.isac, ISAC_ISTA);
117 Start_ISAC: 117Start_ISAC:
118 if (val) 118 if (val)
119 isac_interrupt(cs, val); 119 isac_interrupt(cs, val);
120 count++; 120 count++;
@@ -178,33 +178,33 @@ reset_teles3(struct IsdnCardState *cs)
178 if (cs->typ != ISDN_CTYPE_TELESPCMCIA) { 178 if (cs->typ != ISDN_CTYPE_TELESPCMCIA) {
179 if ((cs->hw.teles3.cfg_reg) && (cs->typ != ISDN_CTYPE_COMPAQ_ISA)) { 179 if ((cs->hw.teles3.cfg_reg) && (cs->typ != ISDN_CTYPE_COMPAQ_ISA)) {
180 switch (cs->irq) { 180 switch (cs->irq) {
181 case 2: 181 case 2:
182 case 9: 182 case 9:
183 irqcfg = 0x00; 183 irqcfg = 0x00;
184 break; 184 break;
185 case 3: 185 case 3:
186 irqcfg = 0x02; 186 irqcfg = 0x02;
187 break; 187 break;
188 case 4: 188 case 4:
189 irqcfg = 0x04; 189 irqcfg = 0x04;
190 break; 190 break;
191 case 5: 191 case 5:
192 irqcfg = 0x06; 192 irqcfg = 0x06;
193 break; 193 break;
194 case 10: 194 case 10:
195 irqcfg = 0x08; 195 irqcfg = 0x08;
196 break; 196 break;
197 case 11: 197 case 11:
198 irqcfg = 0x0A; 198 irqcfg = 0x0A;
199 break; 199 break;
200 case 12: 200 case 12:
201 irqcfg = 0x0C; 201 irqcfg = 0x0C;
202 break; 202 break;
203 case 15: 203 case 15:
204 irqcfg = 0x0E; 204 irqcfg = 0x0E;
205 break; 205 break;
206 default: 206 default:
207 return(1); 207 return (1);
208 } 208 }
209 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg); 209 byteout(cs->hw.teles3.cfg_reg + 4, irqcfg);
210 HZDELAY(HZ / 10 + 1); 210 HZDELAY(HZ / 10 + 1);
@@ -223,7 +223,7 @@ reset_teles3(struct IsdnCardState *cs)
223 HZDELAY(2); 223 HZDELAY(2);
224 } 224 }
225 } 225 }
226 return(0); 226 return (0);
227} 227}
228 228
229static int 229static int
@@ -232,36 +232,36 @@ Teles_card_msg(struct IsdnCardState *cs, int mt, void *arg)
232 u_long flags; 232 u_long flags;
233 233
234 switch (mt) { 234 switch (mt) {
235 case CARD_RESET: 235 case CARD_RESET:
236 spin_lock_irqsave(&cs->lock, flags); 236 spin_lock_irqsave(&cs->lock, flags);
237 reset_teles3(cs); 237 reset_teles3(cs);
238 spin_unlock_irqrestore(&cs->lock, flags); 238 spin_unlock_irqrestore(&cs->lock, flags);
239 return(0); 239 return (0);
240 case CARD_RELEASE: 240 case CARD_RELEASE:
241 release_io_teles3(cs); 241 release_io_teles3(cs);
242 return(0); 242 return (0);
243 case CARD_INIT: 243 case CARD_INIT:
244 spin_lock_irqsave(&cs->lock, flags); 244 spin_lock_irqsave(&cs->lock, flags);
245 inithscxisac(cs, 3); 245 inithscxisac(cs, 3);
246 spin_unlock_irqrestore(&cs->lock, flags); 246 spin_unlock_irqrestore(&cs->lock, flags);
247 return(0); 247 return (0);
248 case CARD_TEST: 248 case CARD_TEST:
249 return(0); 249 return (0);
250 } 250 }
251 return(0); 251 return (0);
252} 252}
253 253
254#ifdef __ISAPNP__ 254#ifdef __ISAPNP__
255 255
256static struct isapnp_device_id teles_ids[] __devinitdata = { 256static struct isapnp_device_id teles_ids[] __devinitdata = {
257 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110), 257 { ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110),
258 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110), 258 ISAPNP_VENDOR('T', 'A', 'G'), ISAPNP_FUNCTION(0x2110),
259 (unsigned long) "Teles 16.3 PnP" }, 259 (unsigned long) "Teles 16.3 PnP" },
260 { ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0), 260 { ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0),
261 ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0), 261 ISAPNP_VENDOR('C', 'T', 'X'), ISAPNP_FUNCTION(0x0),
262 (unsigned long) "Creatix 16.3 PnP" }, 262 (unsigned long) "Creatix 16.3 PnP" },
263 { ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002), 263 { ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002),
264 ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002), 264 ISAPNP_VENDOR('C', 'P', 'Q'), ISAPNP_FUNCTION(0x1002),
265 (unsigned long) "Compaq ISDN S0" }, 265 (unsigned long) "Compaq ISDN S0" },
266 { 0, } 266 { 0, }
267}; 267};
@@ -286,22 +286,22 @@ setup_teles3(struct IsdnCard *card)
286#ifdef __ISAPNP__ 286#ifdef __ISAPNP__
287 if (!card->para[1] && isapnp_present()) { 287 if (!card->para[1] && isapnp_present()) {
288 struct pnp_dev *pnp_d; 288 struct pnp_dev *pnp_d;
289 while(ipid->card_vendor) { 289 while (ipid->card_vendor) {
290 if ((pnp_c = pnp_find_card(ipid->card_vendor, 290 if ((pnp_c = pnp_find_card(ipid->card_vendor,
291 ipid->card_device, pnp_c))) { 291 ipid->card_device, pnp_c))) {
292 pnp_d = NULL; 292 pnp_d = NULL;
293 if ((pnp_d = pnp_find_dev(pnp_c, 293 if ((pnp_d = pnp_find_dev(pnp_c,
294 ipid->vendor, ipid->function, pnp_d))) { 294 ipid->vendor, ipid->function, pnp_d))) {
295 int err; 295 int err;
296 296
297 printk(KERN_INFO "HiSax: %s detected\n", 297 printk(KERN_INFO "HiSax: %s detected\n",
298 (char *)ipid->driver_data); 298 (char *)ipid->driver_data);
299 pnp_disable_dev(pnp_d); 299 pnp_disable_dev(pnp_d);
300 err = pnp_activate_dev(pnp_d); 300 err = pnp_activate_dev(pnp_d);
301 if (err<0) { 301 if (err < 0) {
302 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n", 302 printk(KERN_WARNING "%s: pnp_activate_dev ret(%d)\n",
303 __func__, err); 303 __func__, err);
304 return(0); 304 return (0);
305 } 305 }
306 card->para[3] = pnp_port_start(pnp_d, 2); 306 card->para[3] = pnp_port_start(pnp_d, 2);
307 card->para[2] = pnp_port_start(pnp_d, 1); 307 card->para[2] = pnp_port_start(pnp_d, 1);
@@ -309,9 +309,9 @@ setup_teles3(struct IsdnCard *card)
309 card->para[0] = pnp_irq(pnp_d, 0); 309 card->para[0] = pnp_irq(pnp_d, 0);
310 if (!card->para[0] || !card->para[1] || !card->para[2]) { 310 if (!card->para[0] || !card->para[1] || !card->para[2]) {
311 printk(KERN_ERR "Teles PnP:some resources are missing %ld/%lx/%lx\n", 311 printk(KERN_ERR "Teles PnP:some resources are missing %ld/%lx/%lx\n",
312 card->para[0], card->para[1], card->para[2]); 312 card->para[0], card->para[1], card->para[2]);
313 pnp_disable_dev(pnp_d); 313 pnp_disable_dev(pnp_d);
314 return(0); 314 return (0);
315 } 315 }
316 break; 316 break;
317 } else { 317 } else {
@@ -320,21 +320,21 @@ setup_teles3(struct IsdnCard *card)
320 } 320 }
321 ipid++; 321 ipid++;
322 pnp_c = NULL; 322 pnp_c = NULL;
323 } 323 }
324 if (!ipid->card_vendor) { 324 if (!ipid->card_vendor) {
325 printk(KERN_INFO "Teles PnP: no ISAPnP card found\n"); 325 printk(KERN_INFO "Teles PnP: no ISAPnP card found\n");
326 return(0); 326 return (0);
327 } 327 }
328 } 328 }
329#endif 329#endif
330 if (cs->typ == ISDN_CTYPE_16_3) { 330 if (cs->typ == ISDN_CTYPE_16_3) {
331 cs->hw.teles3.cfg_reg = card->para[1]; 331 cs->hw.teles3.cfg_reg = card->para[1];
332 switch (cs->hw.teles3.cfg_reg) { 332 switch (cs->hw.teles3.cfg_reg) {
333 case 0x180: 333 case 0x180:
334 case 0x280: 334 case 0x280:
335 case 0x380: 335 case 0x380:
336 cs->hw.teles3.cfg_reg |= 0xc00; 336 cs->hw.teles3.cfg_reg |= 0xc00;
337 break; 337 break;
338 } 338 }
339 cs->hw.teles3.isac = cs->hw.teles3.cfg_reg - 0x420; 339 cs->hw.teles3.isac = cs->hw.teles3.cfg_reg - 0x420;
340 cs->hw.teles3.hscx[0] = cs->hw.teles3.cfg_reg - 0xc20; 340 cs->hw.teles3.hscx[0] = cs->hw.teles3.cfg_reg - 0xc20;
@@ -374,9 +374,9 @@ setup_teles3(struct IsdnCard *card)
374 if (cs->typ == ISDN_CTYPE_COMPAQ_ISA) { 374 if (cs->typ == ISDN_CTYPE_COMPAQ_ISA) {
375 if (!request_region(cs->hw.teles3.cfg_reg, 1, "teles3 cfg")) { 375 if (!request_region(cs->hw.teles3.cfg_reg, 1, "teles3 cfg")) {
376 printk(KERN_WARNING 376 printk(KERN_WARNING
377 "HiSax: %s config port %x already in use\n", 377 "HiSax: %s config port %x already in use\n",
378 CardType[card->typ], 378 CardType[card->typ],
379 cs->hw.teles3.cfg_reg); 379 cs->hw.teles3.cfg_reg);
380 return (0); 380 return (0);
381 } 381 }
382 } else { 382 } else {
@@ -385,14 +385,14 @@ setup_teles3(struct IsdnCard *card)
385 "HiSax: %s config port %x-%x already in use\n", 385 "HiSax: %s config port %x-%x already in use\n",
386 CardType[card->typ], 386 CardType[card->typ],
387 cs->hw.teles3.cfg_reg, 387 cs->hw.teles3.cfg_reg,
388 cs->hw.teles3.cfg_reg + 8); 388 cs->hw.teles3.cfg_reg + 8);
389 return (0); 389 return (0);
390 } 390 }
391 } 391 }
392 } 392 }
393 if (!request_region(cs->hw.teles3.isac + 32, 32, "HiSax isac")) { 393 if (!request_region(cs->hw.teles3.isac + 32, 32, "HiSax isac")) {
394 printk(KERN_WARNING 394 printk(KERN_WARNING
395 "HiSax: %s isac ports %x-%x already in use\n", 395 "HiSax: %s isac ports %x-%x already in use\n",
396 CardType[cs->typ], 396 CardType[cs->typ],
397 cs->hw.teles3.isac + 32, 397 cs->hw.teles3.isac + 32,
398 cs->hw.teles3.isac + 64); 398 cs->hw.teles3.isac + 64);
@@ -407,7 +407,7 @@ setup_teles3(struct IsdnCard *card)
407 } 407 }
408 if (!request_region(cs->hw.teles3.hscx[0] + 32, 32, "HiSax hscx A")) { 408 if (!request_region(cs->hw.teles3.hscx[0] + 32, 32, "HiSax hscx A")) {
409 printk(KERN_WARNING 409 printk(KERN_WARNING
410 "HiSax: %s hscx A ports %x-%x already in use\n", 410 "HiSax: %s hscx A ports %x-%x already in use\n",
411 CardType[cs->typ], 411 CardType[cs->typ],
412 cs->hw.teles3.hscx[0] + 32, 412 cs->hw.teles3.hscx[0] + 32,
413 cs->hw.teles3.hscx[0] + 64); 413 cs->hw.teles3.hscx[0] + 64);
@@ -423,7 +423,7 @@ setup_teles3(struct IsdnCard *card)
423 } 423 }
424 if (!request_region(cs->hw.teles3.hscx[1] + 32, 32, "HiSax hscx B")) { 424 if (!request_region(cs->hw.teles3.hscx[1] + 32, 32, "HiSax hscx B")) {
425 printk(KERN_WARNING 425 printk(KERN_WARNING
426 "HiSax: %s hscx B ports %x-%x already in use\n", 426 "HiSax: %s hscx B ports %x-%x already in use\n",
427 CardType[cs->typ], 427 CardType[cs->typ],
428 cs->hw.teles3.hscx[1] + 32, 428 cs->hw.teles3.hscx[1] + 32,
429 cs->hw.teles3.hscx[1] + 64); 429 cs->hw.teles3.hscx[1] + 64);
diff --git a/drivers/isdn/hisax/teles_cs.c b/drivers/isdn/hisax/teles_cs.c
index 161a1938552e..bfe94284b0d5 100644
--- a/drivers/isdn/hisax/teles_cs.c
+++ b/drivers/isdn/hisax/teles_cs.c
@@ -1,20 +1,20 @@
1/* $Id: teles_cs.c,v 1.1.2.2 2004/01/25 15:07:06 keil Exp $ */ 1/* $Id: teles_cs.c,v 1.1.2.2 2004/01/25 15:07:06 keil Exp $ */
2/*====================================================================== 2/*======================================================================
3 3
4 A teles S0 PCMCIA client driver 4 A teles S0 PCMCIA client driver
5 5
6 Based on skeleton by David Hinds, dhinds@allegro.stanford.edu 6 Based on skeleton by David Hinds, dhinds@allegro.stanford.edu
7 Written by Christof Petig, christof.petig@wtal.de 7 Written by Christof Petig, christof.petig@wtal.de
8
9 Also inspired by ELSA PCMCIA driver
10 by Klaus Lichtenwalder <Lichtenwalder@ACM.org>
11
12 Extensions to new hisax_pcmcia by Karsten Keil
13 8
14 minor changes to be compatible with kernel 2.4.x 9 Also inspired by ELSA PCMCIA driver
15 by Jan.Schubert@GMX.li 10 by Klaus Lichtenwalder <Lichtenwalder@ACM.org>
16 11
17======================================================================*/ 12 Extensions to new hisax_pcmcia by Karsten Keil
13
14 minor changes to be compatible with kernel 2.4.x
15 by Jan.Schubert@GMX.li
16
17 ======================================================================*/
18 18
19#include <linux/kernel.h> 19#include <linux/kernel.h>
20#include <linux/module.h> 20#include <linux/module.h>
@@ -44,33 +44,33 @@ MODULE_LICENSE("GPL");
44static int protocol = 2; /* EURO-ISDN Default */ 44static int protocol = 2; /* EURO-ISDN Default */
45module_param(protocol, int, 0); 45module_param(protocol, int, 0);
46 46
47static int teles_cs_config(struct pcmcia_device *link) __devinit ; 47static int teles_cs_config(struct pcmcia_device *link) __devinit;
48static void teles_cs_release(struct pcmcia_device *link); 48static void teles_cs_release(struct pcmcia_device *link);
49static void teles_detach(struct pcmcia_device *p_dev) __devexit ; 49static void teles_detach(struct pcmcia_device *p_dev) __devexit;
50 50
51typedef struct local_info_t { 51typedef struct local_info_t {
52 struct pcmcia_device *p_dev; 52 struct pcmcia_device *p_dev;
53 int busy; 53 int busy;
54 int cardnr; 54 int cardnr;
55} local_info_t; 55} local_info_t;
56 56
57static int __devinit teles_probe(struct pcmcia_device *link) 57static int __devinit teles_probe(struct pcmcia_device *link)
58{ 58{
59 local_info_t *local; 59 local_info_t *local;
60 60
61 dev_dbg(&link->dev, "teles_attach()\n"); 61 dev_dbg(&link->dev, "teles_attach()\n");
62 62
63 /* Allocate space for private device-specific data */ 63 /* Allocate space for private device-specific data */
64 local = kzalloc(sizeof(local_info_t), GFP_KERNEL); 64 local = kzalloc(sizeof(local_info_t), GFP_KERNEL);
65 if (!local) return -ENOMEM; 65 if (!local) return -ENOMEM;
66 local->cardnr = -1; 66 local->cardnr = -1;
67 67
68 local->p_dev = link; 68 local->p_dev = link;
69 link->priv = local; 69 link->priv = local;
70 70
71 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO; 71 link->config_flags |= CONF_ENABLE_IRQ | CONF_AUTO_SET_IO;
72 72
73 return teles_cs_config(link); 73 return teles_cs_config(link);
74} /* teles_attach */ 74} /* teles_attach */
75 75
76static void __devexit teles_detach(struct pcmcia_device *link) 76static void __devexit teles_detach(struct pcmcia_device *link)
@@ -111,64 +111,64 @@ static int teles_cs_configcheck(struct pcmcia_device *p_dev, void *priv_data)
111 111
112static int __devinit teles_cs_config(struct pcmcia_device *link) 112static int __devinit teles_cs_config(struct pcmcia_device *link)
113{ 113{
114 int i; 114 int i;
115 IsdnCard_t icard; 115 IsdnCard_t icard;
116 116
117 dev_dbg(&link->dev, "teles_config(0x%p)\n", link); 117 dev_dbg(&link->dev, "teles_config(0x%p)\n", link);
118 118
119 i = pcmcia_loop_config(link, teles_cs_configcheck, NULL); 119 i = pcmcia_loop_config(link, teles_cs_configcheck, NULL);
120 if (i != 0) 120 if (i != 0)
121 goto cs_failed; 121 goto cs_failed;
122 122
123 if (!link->irq) 123 if (!link->irq)
124 goto cs_failed; 124 goto cs_failed;
125 125
126 i = pcmcia_enable_device(link); 126 i = pcmcia_enable_device(link);
127 if (i != 0) 127 if (i != 0)
128 goto cs_failed; 128 goto cs_failed;
129
130 icard.para[0] = link->irq;
131 icard.para[1] = link->resource[0]->start;
132 icard.protocol = protocol;
133 icard.typ = ISDN_CTYPE_TELESPCMCIA;
134
135 i = hisax_init_pcmcia(link, &(((local_info_t*)link->priv)->busy), &icard);
136 if (i < 0) {
137 printk(KERN_ERR "teles_cs: failed to initialize Teles PCMCIA %d at i/o %#x\n",
138 i, (unsigned int) link->resource[0]->start);
139 teles_cs_release(link);
140 return -ENODEV;
141 }
142 129
143 ((local_info_t*)link->priv)->cardnr = i; 130 icard.para[0] = link->irq;
144 return 0; 131 icard.para[1] = link->resource[0]->start;
132 icard.protocol = protocol;
133 icard.typ = ISDN_CTYPE_TELESPCMCIA;
134
135 i = hisax_init_pcmcia(link, &(((local_info_t *)link->priv)->busy), &icard);
136 if (i < 0) {
137 printk(KERN_ERR "teles_cs: failed to initialize Teles PCMCIA %d at i/o %#x\n",
138 i, (unsigned int) link->resource[0]->start);
139 teles_cs_release(link);
140 return -ENODEV;
141 }
142
143 ((local_info_t *)link->priv)->cardnr = i;
144 return 0;
145 145
146cs_failed: 146cs_failed:
147 teles_cs_release(link); 147 teles_cs_release(link);
148 return -ENODEV; 148 return -ENODEV;
149} /* teles_cs_config */ 149} /* teles_cs_config */
150 150
151static void teles_cs_release(struct pcmcia_device *link) 151static void teles_cs_release(struct pcmcia_device *link)
152{ 152{
153 local_info_t *local = link->priv; 153 local_info_t *local = link->priv;
154 154
155 dev_dbg(&link->dev, "teles_cs_release(0x%p)\n", link); 155 dev_dbg(&link->dev, "teles_cs_release(0x%p)\n", link);
156 156
157 if (local) { 157 if (local) {
158 if (local->cardnr >= 0) { 158 if (local->cardnr >= 0) {
159 /* no unregister function with hisax */ 159 /* no unregister function with hisax */
160 HiSax_closecard(local->cardnr); 160 HiSax_closecard(local->cardnr);
161 }
161 } 162 }
162 }
163 163
164 pcmcia_disable_device(link); 164 pcmcia_disable_device(link);
165} /* teles_cs_release */ 165} /* teles_cs_release */
166 166
167static int teles_suspend(struct pcmcia_device *link) 167static int teles_suspend(struct pcmcia_device *link)
168{ 168{
169 local_info_t *dev = link->priv; 169 local_info_t *dev = link->priv;
170 170
171 dev->busy = 1; 171 dev->busy = 1;
172 172
173 return 0; 173 return 0;
174} 174}
@@ -177,7 +177,7 @@ static int teles_resume(struct pcmcia_device *link)
177{ 177{
178 local_info_t *dev = link->priv; 178 local_info_t *dev = link->priv;
179 179
180 dev->busy = 0; 180 dev->busy = 0;
181 181
182 return 0; 182 return 0;
183} 183}
diff --git a/drivers/isdn/hisax/telespci.c b/drivers/isdn/hisax/telespci.c
index b85ceb3746ce..9c002c9dc771 100644
--- a/drivers/isdn/hisax/telespci.c
+++ b/drivers/isdn/hisax/telespci.c
@@ -6,7 +6,7 @@
6 * Karsten Keil 6 * Karsten Keil
7 * Copyright by Ton van Rosmalen 7 * Copyright by Ton van Rosmalen
8 * by Karsten Keil <keil@isdn4linux.de> 8 * by Karsten Keil <keil@isdn4linux.de>
9 * 9 *
10 * This software may be used and distributed according to the terms 10 * This software may be used and distributed according to the terms
11 * of the GNU General Public License, incorporated herein by reference. 11 * of the GNU General Public License, incorporated herein by reference.
12 * 12 *
@@ -36,9 +36,9 @@ static const char *telespci_revision = "$Revision: 2.23.2.3 $";
36#define READ_DATA_HSCX (ZORAN_PO_GID1 | ZORAN_PO_GREG1) 36#define READ_DATA_HSCX (ZORAN_PO_GID1 | ZORAN_PO_GREG1)
37#define WRITE_DATA_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG1) 37#define WRITE_DATA_HSCX (ZORAN_PO_WR | ZORAN_PO_GID1 | ZORAN_PO_GREG1)
38 38
39#define ZORAN_WAIT_NOBUSY do { \ 39#define ZORAN_WAIT_NOBUSY do { \
40 portdata = readl(adr + 0x200); \ 40 portdata = readl(adr + 0x200); \
41 } while (portdata & ZORAN_PO_RQ_PEN) 41 } while (portdata & ZORAN_PO_RQ_PEN)
42 42
43static inline u_char 43static inline u_char
44readisac(void __iomem *adr, u_char off) 44readisac(void __iomem *adr, u_char off)
@@ -46,15 +46,15 @@ readisac(void __iomem *adr, u_char off)
46 register unsigned int portdata; 46 register unsigned int portdata;
47 47
48 ZORAN_WAIT_NOBUSY; 48 ZORAN_WAIT_NOBUSY;
49 49
50 /* set address for ISAC */ 50 /* set address for ISAC */
51 writel(WRITE_ADDR_ISAC | off, adr + 0x200); 51 writel(WRITE_ADDR_ISAC | off, adr + 0x200);
52 ZORAN_WAIT_NOBUSY; 52 ZORAN_WAIT_NOBUSY;
53 53
54 /* read data from ISAC */ 54 /* read data from ISAC */
55 writel(READ_DATA_ISAC, adr + 0x200); 55 writel(READ_DATA_ISAC, adr + 0x200);
56 ZORAN_WAIT_NOBUSY; 56 ZORAN_WAIT_NOBUSY;
57 return((u_char)(portdata & ZORAN_PO_DMASK)); 57 return ((u_char)(portdata & ZORAN_PO_DMASK));
58} 58}
59 59
60static inline void 60static inline void
@@ -63,7 +63,7 @@ writeisac(void __iomem *adr, u_char off, u_char data)
63 register unsigned int portdata; 63 register unsigned int portdata;
64 64
65 ZORAN_WAIT_NOBUSY; 65 ZORAN_WAIT_NOBUSY;
66 66
67 /* set address for ISAC */ 67 /* set address for ISAC */
68 writel(WRITE_ADDR_ISAC | off, adr + 0x200); 68 writel(WRITE_ADDR_ISAC | off, adr + 0x200);
69 ZORAN_WAIT_NOBUSY; 69 ZORAN_WAIT_NOBUSY;
@@ -80,9 +80,9 @@ readhscx(void __iomem *adr, int hscx, u_char off)
80 80
81 ZORAN_WAIT_NOBUSY; 81 ZORAN_WAIT_NOBUSY;
82 /* set address for HSCX */ 82 /* set address for HSCX */
83 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200); 83 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40 : 0) + off), adr + 0x200);
84 ZORAN_WAIT_NOBUSY; 84 ZORAN_WAIT_NOBUSY;
85 85
86 /* read data from HSCX */ 86 /* read data from HSCX */
87 writel(READ_DATA_HSCX, adr + 0x200); 87 writel(READ_DATA_HSCX, adr + 0x200);
88 ZORAN_WAIT_NOBUSY; 88 ZORAN_WAIT_NOBUSY;
@@ -96,7 +96,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
96 96
97 ZORAN_WAIT_NOBUSY; 97 ZORAN_WAIT_NOBUSY;
98 /* set address for HSCX */ 98 /* set address for HSCX */
99 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40:0) + off), adr + 0x200); 99 writel(WRITE_ADDR_HSCX | ((hscx ? 0x40 : 0) + off), adr + 0x200);
100 ZORAN_WAIT_NOBUSY; 100 ZORAN_WAIT_NOBUSY;
101 101
102 /* write data to HSCX */ 102 /* write data to HSCX */
@@ -105,7 +105,7 @@ writehscx(void __iomem *adr, int hscx, u_char off, u_char data)
105} 105}
106 106
107static inline void 107static inline void
108read_fifo_isac(void __iomem *adr, u_char * data, int size) 108read_fifo_isac(void __iomem *adr, u_char *data, int size)
109{ 109{
110 register unsigned int portdata; 110 register unsigned int portdata;
111 register int i; 111 register int i;
@@ -123,7 +123,7 @@ read_fifo_isac(void __iomem *adr, u_char * data, int size)
123} 123}
124 124
125static void 125static void
126write_fifo_isac(void __iomem *adr, u_char * data, int size) 126write_fifo_isac(void __iomem *adr, u_char *data, int size)
127{ 127{
128 register unsigned int portdata; 128 register unsigned int portdata;
129 register int i; 129 register int i;
@@ -140,7 +140,7 @@ write_fifo_isac(void __iomem *adr, u_char * data, int size)
140} 140}
141 141
142static inline void 142static inline void
143read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size) 143read_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
144{ 144{
145 register unsigned int portdata; 145 register unsigned int portdata;
146 register int i; 146 register int i;
@@ -149,7 +149,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
149 /* read data from HSCX */ 149 /* read data from HSCX */
150 for (i = 0; i < size; i++) { 150 for (i = 0; i < size; i++) {
151 /* set address for HSCX fifo */ 151 /* set address for HSCX fifo */
152 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200); 152 writel(WRITE_ADDR_HSCX | (hscx ? 0x5F : 0x1F), adr + 0x200);
153 ZORAN_WAIT_NOBUSY; 153 ZORAN_WAIT_NOBUSY;
154 writel(READ_DATA_HSCX, adr + 0x200); 154 writel(READ_DATA_HSCX, adr + 0x200);
155 ZORAN_WAIT_NOBUSY; 155 ZORAN_WAIT_NOBUSY;
@@ -158,7 +158,7 @@ read_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
158} 158}
159 159
160static inline void 160static inline void
161write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size) 161write_fifo_hscx(void __iomem *adr, int hscx, u_char *data, int size)
162{ 162{
163 unsigned int portdata; 163 unsigned int portdata;
164 register int i; 164 register int i;
@@ -167,7 +167,7 @@ write_fifo_hscx(void __iomem *adr, int hscx, u_char * data, int size)
167 /* write data to HSCX */ 167 /* write data to HSCX */
168 for (i = 0; i < size; i++) { 168 for (i = 0; i < size; i++) {
169 /* set address for HSCX fifo */ 169 /* set address for HSCX fifo */
170 writel(WRITE_ADDR_HSCX |(hscx ? 0x5F:0x1F), adr + 0x200); 170 writel(WRITE_ADDR_HSCX | (hscx ? 0x5F : 0x1F), adr + 0x200);
171 ZORAN_WAIT_NOBUSY; 171 ZORAN_WAIT_NOBUSY;
172 writel(WRITE_DATA_HSCX | data[i], adr + 0x200); 172 writel(WRITE_DATA_HSCX | data[i], adr + 0x200);
173 ZORAN_WAIT_NOBUSY; 173 ZORAN_WAIT_NOBUSY;
@@ -190,13 +190,13 @@ WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
190} 190}
191 191
192static void 192static void
193ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 193ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
194{ 194{
195 read_fifo_isac(cs->hw.teles0.membase, data, size); 195 read_fifo_isac(cs->hw.teles0.membase, data, size);
196} 196}
197 197
198static void 198static void
199WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 199WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
200{ 200{
201 write_fifo_isac(cs->hw.teles0.membase, data, size); 201 write_fifo_isac(cs->hw.teles0.membase, data, size);
202} 202}
@@ -267,20 +267,20 @@ TelesPCI_card_msg(struct IsdnCardState *cs, int mt, void *arg)
267 u_long flags; 267 u_long flags;
268 268
269 switch (mt) { 269 switch (mt) {
270 case CARD_RESET: 270 case CARD_RESET:
271 return(0); 271 return (0);
272 case CARD_RELEASE: 272 case CARD_RELEASE:
273 release_io_telespci(cs); 273 release_io_telespci(cs);
274 return(0); 274 return (0);
275 case CARD_INIT: 275 case CARD_INIT:
276 spin_lock_irqsave(&cs->lock, flags); 276 spin_lock_irqsave(&cs->lock, flags);
277 inithscxisac(cs, 3); 277 inithscxisac(cs, 3);
278 spin_unlock_irqrestore(&cs->lock, flags); 278 spin_unlock_irqrestore(&cs->lock, flags);
279 return(0); 279 return (0);
280 case CARD_TEST: 280 case CARD_TEST:
281 return(0); 281 return (0);
282 } 282 }
283 return(0); 283 return (0);
284} 284}
285 285
286static struct pci_dev *dev_tel __devinitdata = NULL; 286static struct pci_dev *dev_tel __devinitdata = NULL;
@@ -300,22 +300,22 @@ setup_telespci(struct IsdnCard *card)
300 if (cs->typ != ISDN_CTYPE_TELESPCI) 300 if (cs->typ != ISDN_CTYPE_TELESPCI)
301 return (0); 301 return (0);
302 302
303 if ((dev_tel = hisax_find_pci_device (PCI_VENDOR_ID_ZORAN, PCI_DEVICE_ID_ZORAN_36120, dev_tel))) { 303 if ((dev_tel = hisax_find_pci_device(PCI_VENDOR_ID_ZORAN, PCI_DEVICE_ID_ZORAN_36120, dev_tel))) {
304 if (pci_enable_device(dev_tel)) 304 if (pci_enable_device(dev_tel))
305 return(0); 305 return (0);
306 cs->irq = dev_tel->irq; 306 cs->irq = dev_tel->irq;
307 if (!cs->irq) { 307 if (!cs->irq) {
308 printk(KERN_WARNING "Teles: No IRQ for PCI card found\n"); 308 printk(KERN_WARNING "Teles: No IRQ for PCI card found\n");
309 return(0); 309 return (0);
310 } 310 }
311 cs->hw.teles0.membase = ioremap(pci_resource_start(dev_tel, 0), 311 cs->hw.teles0.membase = ioremap(pci_resource_start(dev_tel, 0),
312 PAGE_SIZE); 312 PAGE_SIZE);
313 printk(KERN_INFO "Found: Zoran, base-address: 0x%llx, irq: 0x%x\n", 313 printk(KERN_INFO "Found: Zoran, base-address: 0x%llx, irq: 0x%x\n",
314 (unsigned long long)pci_resource_start(dev_tel, 0), 314 (unsigned long long)pci_resource_start(dev_tel, 0),
315 dev_tel->irq); 315 dev_tel->irq);
316 } else { 316 } else {
317 printk(KERN_WARNING "TelesPCI: No PCI card found\n"); 317 printk(KERN_WARNING "TelesPCI: No PCI card found\n");
318 return(0); 318 return (0);
319 } 319 }
320 320
321 /* Initialize Zoran PCI controller */ 321 /* Initialize Zoran PCI controller */
@@ -346,7 +346,7 @@ setup_telespci(struct IsdnCard *card)
346 ISACVersion(cs, "TelesPCI:"); 346 ISACVersion(cs, "TelesPCI:");
347 if (HscxVersion(cs, "TelesPCI:")) { 347 if (HscxVersion(cs, "TelesPCI:")) {
348 printk(KERN_WARNING 348 printk(KERN_WARNING
349 "TelesPCI: wrong HSCX versions check IO/MEM addresses\n"); 349 "TelesPCI: wrong HSCX versions check IO/MEM addresses\n");
350 release_io_telespci(cs); 350 release_io_telespci(cs);
351 return (0); 351 return (0);
352 } 352 }
diff --git a/drivers/isdn/hisax/w6692.c b/drivers/isdn/hisax/w6692.c
index e2cfb6f5aa42..0f0d094af85b 100644
--- a/drivers/isdn/hisax/w6692.c
+++ b/drivers/isdn/hisax/w6692.c
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Petr Novak 5 * Author Petr Novak
6 * Copyright by Petr Novak <petr.novak@i.cz> 6 * Copyright by Petr Novak <petr.novak@i.cz>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -69,33 +69,33 @@ static void
69W6692_new_ph(struct IsdnCardState *cs) 69W6692_new_ph(struct IsdnCardState *cs)
70{ 70{
71 switch (cs->dc.w6692.ph_state) { 71 switch (cs->dc.w6692.ph_state) {
72 case (W_L1CMD_RST): 72 case (W_L1CMD_RST):
73 ph_command(cs, W_L1CMD_DRC); 73 ph_command(cs, W_L1CMD_DRC);
74 l1_msg(cs, HW_RESET | INDICATION, NULL); 74 l1_msg(cs, HW_RESET | INDICATION, NULL);
75 /* fallthru */ 75 /* fallthru */
76 case (W_L1IND_CD): 76 case (W_L1IND_CD):
77 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL); 77 l1_msg(cs, HW_DEACTIVATE | CONFIRM, NULL);
78 break; 78 break;
79 case (W_L1IND_DRD): 79 case (W_L1IND_DRD):
80 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL); 80 l1_msg(cs, HW_DEACTIVATE | INDICATION, NULL);
81 break; 81 break;
82 case (W_L1IND_CE): 82 case (W_L1IND_CE):
83 l1_msg(cs, HW_POWERUP | CONFIRM, NULL); 83 l1_msg(cs, HW_POWERUP | CONFIRM, NULL);
84 break; 84 break;
85 case (W_L1IND_LD): 85 case (W_L1IND_LD):
86 l1_msg(cs, HW_RSYNC | INDICATION, NULL); 86 l1_msg(cs, HW_RSYNC | INDICATION, NULL);
87 break; 87 break;
88 case (W_L1IND_ARD): 88 case (W_L1IND_ARD):
89 l1_msg(cs, HW_INFO2 | INDICATION, NULL); 89 l1_msg(cs, HW_INFO2 | INDICATION, NULL);
90 break; 90 break;
91 case (W_L1IND_AI8): 91 case (W_L1IND_AI8):
92 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL); 92 l1_msg(cs, HW_INFO4_P8 | INDICATION, NULL);
93 break; 93 break;
94 case (W_L1IND_AI10): 94 case (W_L1IND_AI10):
95 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL); 95 l1_msg(cs, HW_INFO4_P10 | INDICATION, NULL);
96 break; 96 break;
97 default: 97 default:
98 break; 98 break;
99 } 99 }
100} 100}
101 101
@@ -122,11 +122,11 @@ W6692_bh(struct work_struct *work)
122 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event)) 122 if (test_and_clear_bit(D_XMTBUFREADY, &cs->event))
123 DChannel_proc_xmt(cs); 123 DChannel_proc_xmt(cs);
124/* 124/*
125 if (test_and_clear_bit(D_RX_MON1, &cs->event)) 125 if (test_and_clear_bit(D_RX_MON1, &cs->event))
126 arcofi_fsm(cs, ARCOFI_RX_END, NULL); 126 arcofi_fsm(cs, ARCOFI_RX_END, NULL);
127 if (test_and_clear_bit(D_TX_MON1, &cs->event)) 127 if (test_and_clear_bit(D_TX_MON1, &cs->event))
128 arcofi_fsm(cs, ARCOFI_TX_END, NULL); 128 arcofi_fsm(cs, ARCOFI_TX_END, NULL);
129 */ 129*/
130} 130}
131 131
132static void 132static void
@@ -250,7 +250,7 @@ W6692B_fill_fifo(struct BCState *bcs)
250 count = bcs->tx_skb->len; 250 count = bcs->tx_skb->len;
251 251
252 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO)) 252 if ((cs->debug & L1_DEB_HSCX) && !(cs->debug & L1_DEB_HSCX_FIFO))
253 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " ": " last "), count); 253 debugl1(cs, "W6692B_fill_fifo%s%d", (more ? " " : " last "), count);
254 254
255 ptr = bcs->tx_skb->data; 255 ptr = bcs->tx_skb->data;
256 skb_pull(bcs->tx_skb, count); 256 skb_pull(bcs->tx_skb, count);
@@ -277,7 +277,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
277 struct sk_buff *skb; 277 struct sk_buff *skb;
278 int count; 278 int count;
279 279
280 bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs+1); 280 bcs = (cs->bcs->channel == bchan) ? cs->bcs : (cs->bcs + 1);
281 val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR); 281 val = cs->BC_Read_Reg(cs, bchan, W_B_EXIR);
282 debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val); 282 debugl1(cs, "W6692B chan %d B_EXIR 0x%02X", bchan, val);
283 283
@@ -322,7 +322,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
322 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR); 322 r = cs->BC_Read_Reg(cs, bchan, W_B_STAR);
323 if (r & W_B_STAR_RDOV) { 323 if (r & W_B_STAR_RDOV) {
324 if (cs->debug & L1_DEB_WARN) 324 if (cs->debug & L1_DEB_WARN)
325 debugl1(cs, "W6692 B RDOV(RMR) mode=%d",bcs->mode); 325 debugl1(cs, "W6692 B RDOV(RMR) mode=%d", bcs->mode);
326 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT); 326 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RACK | W_B_CMDR_RRST | W_B_CMDR_RACT);
327 if (bcs->mode != L1_MODE_TRANS) 327 if (bcs->mode != L1_MODE_TRANS)
328 bcs->hw.w6692.rcvidx = 0; 328 bcs->hw.w6692.rcvidx = 0;
@@ -347,7 +347,7 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
347 W6692B_fill_fifo(bcs); 347 W6692B_fill_fifo(bcs);
348 else { 348 else {
349 /* Here we lost an TX interrupt, so 349 /* Here we lost an TX interrupt, so
350 * restart transmitting the whole frame. 350 * restart transmitting the whole frame.
351 */ 351 */
352 if (bcs->tx_skb) { 352 if (bcs->tx_skb) {
353 skb_push(bcs->tx_skb, bcs->hw.w6692.count); 353 skb_push(bcs->tx_skb, bcs->hw.w6692.count);
@@ -374,9 +374,9 @@ W6692B_interrupt(struct IsdnCardState *cs, u_char bchan)
374 W6692B_fill_fifo(bcs); 374 W6692B_fill_fifo(bcs);
375 return; 375 return;
376 } else { 376 } else {
377 if (test_bit(FLG_LLI_L1WAKEUP,&bcs->st->lli.flag) && 377 if (test_bit(FLG_LLI_L1WAKEUP, &bcs->st->lli.flag) &&
378 (PACKET_NOACK != bcs->tx_skb->pkt_type)) { 378 (PACKET_NOACK != bcs->tx_skb->pkt_type)) {
379 u_long flags; 379 u_long flags;
380 spin_lock_irqsave(&bcs->aclock, flags); 380 spin_lock_irqsave(&bcs->aclock, flags);
381 bcs->ackcnt += bcs->hw.w6692.count; 381 bcs->ackcnt += bcs->hw.w6692.count;
382 spin_unlock_irqrestore(&bcs->aclock, flags); 382 spin_unlock_irqrestore(&bcs->aclock, flags);
@@ -414,7 +414,7 @@ W6692_interrupt(int intno, void *dev_id)
414 spin_unlock_irqrestore(&cs->lock, flags); 414 spin_unlock_irqrestore(&cs->lock, flags);
415 return IRQ_NONE; 415 return IRQ_NONE;
416 } 416 }
417 StartW6692: 417StartW6692:
418 if (cs->debug & L1_DEB_ISAC) 418 if (cs->debug & L1_DEB_ISAC)
419 debugl1(cs, "W6692 ISTA %x", val); 419 debugl1(cs, "W6692 ISTA %x", val);
420 420
@@ -473,7 +473,7 @@ W6692_interrupt(int intno, void *dev_id)
473 } else 473 } else
474 schedule_event(cs, D_XMTBUFREADY); 474 schedule_event(cs, D_XMTBUFREADY);
475 } 475 }
476 afterXFR: 476afterXFR:
477 if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */ 477 if (val & (W_INT_XINT0 | W_INT_XINT1)) { /* XINT0/1 - never */
478 if (cs->debug & L1_DEB_ISAC) 478 if (cs->debug & L1_DEB_ISAC)
479 debugl1(cs, "W6692 spurious XINT!"); 479 debugl1(cs, "W6692 spurious XINT!");
@@ -564,108 +564,108 @@ W6692_l1hw(struct PStack *st, int pr, void *arg)
564 int val; 564 int val;
565 565
566 switch (pr) { 566 switch (pr) {
567 case (PH_DATA | REQUEST): 567 case (PH_DATA | REQUEST):
568 if (cs->debug & DEB_DLOG_HEX) 568 if (cs->debug & DEB_DLOG_HEX)
569 LogFrame(cs, skb->data, skb->len); 569 LogFrame(cs, skb->data, skb->len);
570 if (cs->debug & DEB_DLOG_VERBOSE) 570 if (cs->debug & DEB_DLOG_VERBOSE)
571 dlogframe(cs, skb, 0); 571 dlogframe(cs, skb, 0);
572 spin_lock_irqsave(&cs->lock, flags); 572 spin_lock_irqsave(&cs->lock, flags);
573 if (cs->tx_skb) { 573 if (cs->tx_skb) {
574 skb_queue_tail(&cs->sq, skb); 574 skb_queue_tail(&cs->sq, skb);
575#ifdef L2FRAME_DEBUG /* psa */
576 if (cs->debug & L1_DEB_LAPD)
577 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
578#endif
579 } else {
580 cs->tx_skb = skb;
581 cs->tx_cnt = 0;
582#ifdef L2FRAME_DEBUG /* psa */ 575#ifdef L2FRAME_DEBUG /* psa */
583 if (cs->debug & L1_DEB_LAPD) 576 if (cs->debug & L1_DEB_LAPD)
584 Logl2Frame(cs, skb, "PH_DATA", 0); 577 Logl2Frame(cs, skb, "PH_DATA Queued", 0);
585#endif 578#endif
586 W6692_fill_fifo(cs); 579 } else {
587 }
588 spin_unlock_irqrestore(&cs->lock, flags);
589 break;
590 case (PH_PULL | INDICATION):
591 spin_lock_irqsave(&cs->lock, flags);
592 if (cs->tx_skb) {
593 if (cs->debug & L1_DEB_WARN)
594 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
595 skb_queue_tail(&cs->sq, skb);
596 spin_unlock_irqrestore(&cs->lock, flags);
597 break;
598 }
599 if (cs->debug & DEB_DLOG_HEX)
600 LogFrame(cs, skb->data, skb->len);
601 if (cs->debug & DEB_DLOG_VERBOSE)
602 dlogframe(cs, skb, 0);
603 cs->tx_skb = skb; 580 cs->tx_skb = skb;
604 cs->tx_cnt = 0; 581 cs->tx_cnt = 0;
605#ifdef L2FRAME_DEBUG /* psa */ 582#ifdef L2FRAME_DEBUG /* psa */
606 if (cs->debug & L1_DEB_LAPD) 583 if (cs->debug & L1_DEB_LAPD)
607 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0); 584 Logl2Frame(cs, skb, "PH_DATA", 0);
608#endif 585#endif
609 W6692_fill_fifo(cs); 586 W6692_fill_fifo(cs);
587 }
588 spin_unlock_irqrestore(&cs->lock, flags);
589 break;
590 case (PH_PULL | INDICATION):
591 spin_lock_irqsave(&cs->lock, flags);
592 if (cs->tx_skb) {
593 if (cs->debug & L1_DEB_WARN)
594 debugl1(cs, " l2l1 tx_skb exist this shouldn't happen");
595 skb_queue_tail(&cs->sq, skb);
610 spin_unlock_irqrestore(&cs->lock, flags); 596 spin_unlock_irqrestore(&cs->lock, flags);
611 break; 597 break;
612 case (PH_PULL | REQUEST): 598 }
599 if (cs->debug & DEB_DLOG_HEX)
600 LogFrame(cs, skb->data, skb->len);
601 if (cs->debug & DEB_DLOG_VERBOSE)
602 dlogframe(cs, skb, 0);
603 cs->tx_skb = skb;
604 cs->tx_cnt = 0;
613#ifdef L2FRAME_DEBUG /* psa */ 605#ifdef L2FRAME_DEBUG /* psa */
614 if (cs->debug & L1_DEB_LAPD) 606 if (cs->debug & L1_DEB_LAPD)
615 debugl1(cs, "-> PH_REQUEST_PULL"); 607 Logl2Frame(cs, skb, "PH_DATA_PULLED", 0);
616#endif 608#endif
617 if (!cs->tx_skb) { 609 W6692_fill_fifo(cs);
618 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 610 spin_unlock_irqrestore(&cs->lock, flags);
619 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 611 break;
620 } else 612 case (PH_PULL | REQUEST):
621 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 613#ifdef L2FRAME_DEBUG /* psa */
622 break; 614 if (cs->debug & L1_DEB_LAPD)
623 case (HW_RESET | REQUEST): 615 debugl1(cs, "-> PH_REQUEST_PULL");
624 spin_lock_irqsave(&cs->lock, flags); 616#endif
625 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) { 617 if (!cs->tx_skb) {
626 ph_command(cs, W_L1CMD_ECK); 618 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
627 spin_unlock_irqrestore(&cs->lock, flags); 619 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
628 } else { 620 } else
629 ph_command(cs, W_L1CMD_RST); 621 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
630 cs->dc.w6692.ph_state = W_L1CMD_RST; 622 break;
631 spin_unlock_irqrestore(&cs->lock, flags); 623 case (HW_RESET | REQUEST):
632 W6692_new_ph(cs); 624 spin_lock_irqsave(&cs->lock, flags);
633 } 625 if ((cs->dc.w6692.ph_state == W_L1IND_DRD)) {
634 break;
635 case (HW_ENABLE | REQUEST):
636 spin_lock_irqsave(&cs->lock, flags);
637 ph_command(cs, W_L1CMD_ECK); 626 ph_command(cs, W_L1CMD_ECK);
638 spin_unlock_irqrestore(&cs->lock, flags); 627 spin_unlock_irqrestore(&cs->lock, flags);
639 break; 628 } else {
640 case (HW_INFO3 | REQUEST): 629 ph_command(cs, W_L1CMD_RST);
641 spin_lock_irqsave(&cs->lock, flags); 630 cs->dc.w6692.ph_state = W_L1CMD_RST;
642 ph_command(cs, W_L1CMD_AR8);
643 spin_unlock_irqrestore(&cs->lock, flags); 631 spin_unlock_irqrestore(&cs->lock, flags);
644 break; 632 W6692_new_ph(cs);
645 case (HW_TESTLOOP | REQUEST): 633 }
646 val = 0; 634 break;
647 if (1 & (long) arg) 635 case (HW_ENABLE | REQUEST):
648 val |= 0x0c; 636 spin_lock_irqsave(&cs->lock, flags);
649 if (2 & (long) arg) 637 ph_command(cs, W_L1CMD_ECK);
650 val |= 0x3; 638 spin_unlock_irqrestore(&cs->lock, flags);
651 /* !!! not implemented yet */ 639 break;
652 break; 640 case (HW_INFO3 | REQUEST):
653 case (HW_DEACTIVATE | RESPONSE): 641 spin_lock_irqsave(&cs->lock, flags);
654 skb_queue_purge(&cs->rq); 642 ph_command(cs, W_L1CMD_AR8);
655 skb_queue_purge(&cs->sq); 643 spin_unlock_irqrestore(&cs->lock, flags);
656 if (cs->tx_skb) { 644 break;
657 dev_kfree_skb_any(cs->tx_skb); 645 case (HW_TESTLOOP | REQUEST):
658 cs->tx_skb = NULL; 646 val = 0;
659 } 647 if (1 & (long) arg)
660 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags)) 648 val |= 0x0c;
661 del_timer(&cs->dbusytimer); 649 if (2 & (long) arg)
662 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags)) 650 val |= 0x3;
663 schedule_event(cs, D_CLEARBUSY); 651 /* !!! not implemented yet */
664 break; 652 break;
665 default: 653 case (HW_DEACTIVATE | RESPONSE):
666 if (cs->debug & L1_DEB_WARN) 654 skb_queue_purge(&cs->rq);
667 debugl1(cs, "W6692_l1hw unknown %04x", pr); 655 skb_queue_purge(&cs->sq);
668 break; 656 if (cs->tx_skb) {
657 dev_kfree_skb_any(cs->tx_skb);
658 cs->tx_skb = NULL;
659 }
660 if (test_and_clear_bit(FLG_DBUSY_TIMER, &cs->HW_Flags))
661 del_timer(&cs->dbusytimer);
662 if (test_and_clear_bit(FLG_L1_DBUSY, &cs->HW_Flags))
663 schedule_event(cs, D_CLEARBUSY);
664 break;
665 default:
666 if (cs->debug & L1_DEB_WARN)
667 debugl1(cs, "W6692_l1hw unknown %04x", pr);
668 break;
669 } 669 }
670} 670}
671 671
@@ -734,17 +734,17 @@ W6692Bmode(struct BCState *bcs, int mode, int bchan)
734 bcs->hw.w6692.bchan = bchan; 734 bcs->hw.w6692.bchan = bchan;
735 735
736 switch (mode) { 736 switch (mode) {
737 case (L1_MODE_NULL): 737 case (L1_MODE_NULL):
738 cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0); 738 cs->BC_Write_Reg(cs, bchan, W_B_MODE, 0);
739 break; 739 break;
740 case (L1_MODE_TRANS): 740 case (L1_MODE_TRANS):
741 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS); 741 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_MMS);
742 break; 742 break;
743 case (L1_MODE_HDLC): 743 case (L1_MODE_HDLC):
744 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF); 744 cs->BC_Write_Reg(cs, bchan, W_B_MODE, W_B_MODE_ITF);
745 cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff); 745 cs->BC_Write_Reg(cs, bchan, W_B_ADM1, 0xff);
746 cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff); 746 cs->BC_Write_Reg(cs, bchan, W_B_ADM2, 0xff);
747 break; 747 break;
748 } 748 }
749 if (mode) 749 if (mode)
750 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST | 750 cs->BC_Write_Reg(cs, bchan, W_B_CMDR, W_B_CMDR_RRST |
@@ -756,59 +756,59 @@ static void
756W6692_l2l1(struct PStack *st, int pr, void *arg) 756W6692_l2l1(struct PStack *st, int pr, void *arg)
757{ 757{
758 struct sk_buff *skb = arg; 758 struct sk_buff *skb = arg;
759 struct BCState *bcs = st->l1.bcs; 759 struct BCState *bcs = st->l1.bcs;
760 u_long flags; 760 u_long flags;
761 761
762 switch (pr) { 762 switch (pr) {
763 case (PH_DATA | REQUEST): 763 case (PH_DATA | REQUEST):
764 spin_lock_irqsave(&bcs->cs->lock, flags); 764 spin_lock_irqsave(&bcs->cs->lock, flags);
765 if (bcs->tx_skb) { 765 if (bcs->tx_skb) {
766 skb_queue_tail(&bcs->squeue, skb); 766 skb_queue_tail(&bcs->squeue, skb);
767 } else { 767 } else {
768 bcs->tx_skb = skb;
769 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
770 bcs->hw.w6692.count = 0;
771 bcs->cs->BC_Send_Data(bcs);
772 }
773 spin_unlock_irqrestore(&bcs->cs->lock, flags);
774 break;
775 case (PH_PULL | INDICATION):
776 if (bcs->tx_skb) {
777 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
778 break;
779 }
780 spin_lock_irqsave(&bcs->cs->lock, flags);
781 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
782 bcs->tx_skb = skb; 768 bcs->tx_skb = skb;
769 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
783 bcs->hw.w6692.count = 0; 770 bcs->hw.w6692.count = 0;
784 bcs->cs->BC_Send_Data(bcs); 771 bcs->cs->BC_Send_Data(bcs);
785 spin_unlock_irqrestore(&bcs->cs->lock, flags); 772 }
786 break; 773 spin_unlock_irqrestore(&bcs->cs->lock, flags);
787 case (PH_PULL | REQUEST): 774 break;
788 if (!bcs->tx_skb) { 775 case (PH_PULL | INDICATION):
789 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags); 776 if (bcs->tx_skb) {
790 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL); 777 printk(KERN_WARNING "W6692_l2l1: this shouldn't happen\n");
791 } else
792 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
793 break;
794 case (PH_ACTIVATE | REQUEST):
795 spin_lock_irqsave(&bcs->cs->lock, flags);
796 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
797 W6692Bmode(bcs, st->l1.mode, st->l1.bc);
798 spin_unlock_irqrestore(&bcs->cs->lock, flags);
799 l1_msg_b(st, pr, arg);
800 break;
801 case (PH_DEACTIVATE | REQUEST):
802 l1_msg_b(st, pr, arg);
803 break;
804 case (PH_DEACTIVATE | CONFIRM):
805 spin_lock_irqsave(&bcs->cs->lock, flags);
806 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
807 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
808 W6692Bmode(bcs, 0, st->l1.bc);
809 spin_unlock_irqrestore(&bcs->cs->lock, flags);
810 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
811 break; 778 break;
779 }
780 spin_lock_irqsave(&bcs->cs->lock, flags);
781 test_and_set_bit(BC_FLG_BUSY, &bcs->Flag);
782 bcs->tx_skb = skb;
783 bcs->hw.w6692.count = 0;
784 bcs->cs->BC_Send_Data(bcs);
785 spin_unlock_irqrestore(&bcs->cs->lock, flags);
786 break;
787 case (PH_PULL | REQUEST):
788 if (!bcs->tx_skb) {
789 test_and_clear_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
790 st->l1.l1l2(st, PH_PULL | CONFIRM, NULL);
791 } else
792 test_and_set_bit(FLG_L1_PULL_REQ, &st->l1.Flags);
793 break;
794 case (PH_ACTIVATE | REQUEST):
795 spin_lock_irqsave(&bcs->cs->lock, flags);
796 test_and_set_bit(BC_FLG_ACTIV, &bcs->Flag);
797 W6692Bmode(bcs, st->l1.mode, st->l1.bc);
798 spin_unlock_irqrestore(&bcs->cs->lock, flags);
799 l1_msg_b(st, pr, arg);
800 break;
801 case (PH_DEACTIVATE | REQUEST):
802 l1_msg_b(st, pr, arg);
803 break;
804 case (PH_DEACTIVATE | CONFIRM):
805 spin_lock_irqsave(&bcs->cs->lock, flags);
806 test_and_clear_bit(BC_FLG_ACTIV, &bcs->Flag);
807 test_and_clear_bit(BC_FLG_BUSY, &bcs->Flag);
808 W6692Bmode(bcs, 0, st->l1.bc);
809 spin_unlock_irqrestore(&bcs->cs->lock, flags);
810 st->l1.l1l2(st, PH_DEACTIVATE | CONFIRM, NULL);
811 break;
812 } 812 }
813} 813}
814 814
@@ -943,13 +943,13 @@ WriteW6692(struct IsdnCardState *cs, u_char offset, u_char value)
943} 943}
944 944
945static void 945static void
946ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size) 946ReadISACfifo(struct IsdnCardState *cs, u_char *data, int size)
947{ 947{
948 insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size); 948 insb(cs->hw.w6692.iobase + W_D_RFIFO, data, size);
949} 949}
950 950
951static void 951static void
952WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size) 952WriteISACfifo(struct IsdnCardState *cs, u_char *data, int size)
953{ 953{
954 outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size); 954 outsb(cs->hw.w6692.iobase + W_D_XFIFO, data, size);
955} 955}
@@ -970,26 +970,26 @@ static int
970w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg) 970w6692_card_msg(struct IsdnCardState *cs, int mt, void *arg)
971{ 971{
972 switch (mt) { 972 switch (mt) {
973 case CARD_RESET: 973 case CARD_RESET:
974 resetW6692(cs); 974 resetW6692(cs);
975 return (0); 975 return (0);
976 case CARD_RELEASE: 976 case CARD_RELEASE:
977 cs->writeW6692(cs, W_IMASK, 0xff); 977 cs->writeW6692(cs, W_IMASK, 0xff);
978 release_region(cs->hw.w6692.iobase, 256); 978 release_region(cs->hw.w6692.iobase, 256);
979 if (cs->subtyp == W6692_USR) { 979 if (cs->subtyp == W6692_USR) {
980 cs->writeW6692(cs, W_XDATA, 0x04); 980 cs->writeW6692(cs, W_XDATA, 0x04);
981 } 981 }
982 return (0); 982 return (0);
983 case CARD_INIT: 983 case CARD_INIT:
984 initW6692(cs, 3); 984 initW6692(cs, 3);
985 return (0); 985 return (0);
986 case CARD_TEST: 986 case CARD_TEST:
987 return (0); 987 return (0);
988 } 988 }
989 return (0); 989 return (0);
990} 990}
991 991
992static int id_idx ; 992static int id_idx;
993 993
994static struct pci_dev *dev_w6692 __devinitdata = NULL; 994static struct pci_dev *dev_w6692 __devinitdata = NULL;
995 995
@@ -1009,8 +1009,8 @@ setup_w6692(struct IsdnCard *card)
1009 1009
1010 while (id_list[id_idx].vendor_id) { 1010 while (id_list[id_idx].vendor_id) {
1011 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id, 1011 dev_w6692 = hisax_find_pci_device(id_list[id_idx].vendor_id,
1012 id_list[id_idx].device_id, 1012 id_list[id_idx].device_id,
1013 dev_w6692); 1013 dev_w6692);
1014 if (dev_w6692) { 1014 if (dev_w6692) {
1015 if (pci_enable_device(dev_w6692)) 1015 if (pci_enable_device(dev_w6692))
1016 continue; 1016 continue;
diff --git a/drivers/isdn/hisax/w6692.h b/drivers/isdn/hisax/w6692.h
index c79c81e0401f..024b04d33e43 100644
--- a/drivers/isdn/hisax/w6692.h
+++ b/drivers/isdn/hisax/w6692.h
@@ -4,7 +4,7 @@
4 * 4 *
5 * Author Petr Novak 5 * Author Petr Novak
6 * Copyright by Petr Novak <petr.novak@i.cz> 6 * Copyright by Petr Novak <petr.novak@i.cz>
7 * 7 *
8 * This software may be used and distributed according to the terms 8 * This software may be used and distributed according to the terms
9 * of the GNU General Public License, incorporated herein by reference. 9 * of the GNU General Public License, incorporated herein by reference.
10 * 10 *
@@ -18,11 +18,11 @@
18 18
19/* B-channel FIFO read/write routines */ 19/* B-channel FIFO read/write routines */
20 20
21#define READW6692BFIFO(cs,bchan,ptr,count) \ 21#define READW6692BFIFO(cs, bchan, ptr, count) \
22 insb(cs->hw.w6692.iobase+W_B_RFIFO+(bchan?0x40:0),ptr,count) 22 insb(cs->hw.w6692.iobase + W_B_RFIFO + (bchan ? 0x40 : 0), ptr, count)
23 23
24#define WRITEW6692BFIFO(cs,bchan,ptr,count) \ 24#define WRITEW6692BFIFO(cs, bchan, ptr, count) \
25 outsb(cs->hw.w6692.iobase+W_B_XFIFO+(bchan?0x40:0),ptr,count) 25 outsb(cs->hw.w6692.iobase + W_B_XFIFO + (bchan ? 0x40 : 0), ptr, count)
26 26
27/* Specifications of W6692 registers */ 27/* Specifications of W6692 registers */
28 28