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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:20:36 -0400
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/isdn/hisax/gazel.c
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'drivers/isdn/hisax/gazel.c')
-rw-r--r--drivers/isdn/hisax/gazel.c684
1 files changed, 684 insertions, 0 deletions
diff --git a/drivers/isdn/hisax/gazel.c b/drivers/isdn/hisax/gazel.c
new file mode 100644
index 000000000000..24a05a43f33e
--- /dev/null
+++ b/drivers/isdn/hisax/gazel.c
@@ -0,0 +1,684 @@
1/* $Id: gazel.c,v 2.19.2.4 2004/01/14 16:04:48 keil Exp $
2 *
3 * low level stuff for Gazel isdn cards
4 *
5 * Author BeWan Systems
6 * based on source code from Karsten Keil
7 * Copyright by BeWan Systems
8 *
9 * This software may be used and distributed according to the terms
10 * of the GNU General Public License, incorporated herein by reference.
11 *
12 */
13
14#include <linux/config.h>
15#include <linux/init.h>
16#include "hisax.h"
17#include "isac.h"
18#include "hscx.h"
19#include "isdnl1.h"
20#include "ipac.h"
21#include <linux/pci.h>
22
23extern const char *CardType[];
24const char *gazel_revision = "$Revision: 2.19.2.4 $";
25
26#define R647 1
27#define R685 2
28#define R753 3
29#define R742 4
30
31#define PLX_CNTRL 0x50 /* registre de controle PLX */
32#define RESET_GAZEL 0x4
33#define RESET_9050 0x40000000
34#define PLX_INCSR 0x4C /* registre d'IT du 9050 */
35#define INT_ISAC_EN 0x8 /* 1 = enable IT isac */
36#define INT_ISAC 0x20 /* 1 = IT isac en cours */
37#define INT_HSCX_EN 0x1 /* 1 = enable IT hscx */
38#define INT_HSCX 0x4 /* 1 = IT hscx en cours */
39#define INT_PCI_EN 0x40 /* 1 = enable IT PCI */
40#define INT_IPAC_EN 0x3 /* enable IT ipac */
41
42
43#define byteout(addr,val) outb(val,addr)
44#define bytein(addr) inb(addr)
45
46static inline u_char
47readreg(unsigned int adr, u_short off)
48{
49 return bytein(adr + off);
50}
51
52static inline void
53writereg(unsigned int adr, u_short off, u_char data)
54{
55 byteout(adr + off, data);
56}
57
58
59static inline void
60read_fifo(unsigned int adr, u_char * data, int size)
61{
62 insb(adr, data, size);
63}
64
65static void
66write_fifo(unsigned int adr, u_char * data, int size)
67{
68 outsb(adr, data, size);
69}
70
71static inline u_char
72readreg_ipac(unsigned int adr, u_short off)
73{
74 register u_char ret;
75
76 byteout(adr, off);
77 ret = bytein(adr + 4);
78 return ret;
79}
80
81static inline void
82writereg_ipac(unsigned int adr, u_short off, u_char data)
83{
84 byteout(adr, off);
85 byteout(adr + 4, data);
86}
87
88
89static inline void
90read_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
91{
92 byteout(adr, off);
93 insb(adr + 4, data, size);
94}
95
96static void
97write_fifo_ipac(unsigned int adr, u_short off, u_char * data, int size)
98{
99 byteout(adr, off);
100 outsb(adr + 4, data, size);
101}
102
103/* Interface functions */
104
105static u_char
106ReadISAC(struct IsdnCardState *cs, u_char offset)
107{
108 u_short off2 = offset;
109
110 switch (cs->subtyp) {
111 case R647:
112 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
113 case R685:
114 return (readreg(cs->hw.gazel.isac, off2));
115 case R753:
116 case R742:
117 return (readreg_ipac(cs->hw.gazel.ipac, 0x80 + off2));
118 }
119 return 0;
120}
121
122static void
123WriteISAC(struct IsdnCardState *cs, u_char offset, u_char value)
124{
125 u_short off2 = offset;
126
127 switch (cs->subtyp) {
128 case R647:
129 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
130 case R685:
131 writereg(cs->hw.gazel.isac, off2, value);
132 break;
133 case R753:
134 case R742:
135 writereg_ipac(cs->hw.gazel.ipac, 0x80 + off2, value);
136 break;
137 }
138}
139
140static void
141ReadISACfifo(struct IsdnCardState *cs, u_char * data, int size)
142{
143 switch (cs->subtyp) {
144 case R647:
145 case R685:
146 read_fifo(cs->hw.gazel.isacfifo, data, size);
147 break;
148 case R753:
149 case R742:
150 read_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
151 break;
152 }
153}
154
155static void
156WriteISACfifo(struct IsdnCardState *cs, u_char * data, int size)
157{
158 switch (cs->subtyp) {
159 case R647:
160 case R685:
161 write_fifo(cs->hw.gazel.isacfifo, data, size);
162 break;
163 case R753:
164 case R742:
165 write_fifo_ipac(cs->hw.gazel.ipac, 0x80, data, size);
166 break;
167 }
168}
169
170static void
171ReadHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
172{
173 switch (cs->subtyp) {
174 case R647:
175 case R685:
176 read_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
177 break;
178 case R753:
179 case R742:
180 read_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
181 break;
182 }
183}
184
185static void
186WriteHSCXfifo(struct IsdnCardState *cs, int hscx, u_char * data, int size)
187{
188 switch (cs->subtyp) {
189 case R647:
190 case R685:
191 write_fifo(cs->hw.gazel.hscxfifo[hscx], data, size);
192 break;
193 case R753:
194 case R742:
195 write_fifo_ipac(cs->hw.gazel.ipac, hscx * 0x40, data, size);
196 break;
197 }
198}
199
200static u_char
201ReadHSCX(struct IsdnCardState *cs, int hscx, u_char offset)
202{
203 u_short off2 = offset;
204
205 switch (cs->subtyp) {
206 case R647:
207 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
208 case R685:
209 return (readreg(cs->hw.gazel.hscx[hscx], off2));
210 case R753:
211 case R742:
212 return (readreg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2));
213 }
214 return 0;
215}
216
217static void
218WriteHSCX(struct IsdnCardState *cs, int hscx, u_char offset, u_char value)
219{
220 u_short off2 = offset;
221
222 switch (cs->subtyp) {
223 case R647:
224 off2 = ((off2 << 8 & 0xf000) | (off2 & 0xf));
225 case R685:
226 writereg(cs->hw.gazel.hscx[hscx], off2, value);
227 break;
228 case R753:
229 case R742:
230 writereg_ipac(cs->hw.gazel.ipac, hscx * 0x40 + off2, value);
231 break;
232 }
233}
234
235/*
236 * fast interrupt HSCX stuff goes here
237 */
238
239#define READHSCX(cs, nr, reg) ReadHSCX(cs, nr, reg)
240#define WRITEHSCX(cs, nr, reg, data) WriteHSCX(cs, nr, reg, data)
241#define READHSCXFIFO(cs, nr, ptr, cnt) ReadHSCXfifo(cs, nr, ptr, cnt)
242#define WRITEHSCXFIFO(cs, nr, ptr, cnt) WriteHSCXfifo(cs, nr, ptr, cnt)
243
244#include "hscx_irq.c"
245
246static irqreturn_t
247gazel_interrupt(int intno, void *dev_id, struct pt_regs *regs)
248{
249#define MAXCOUNT 5
250 struct IsdnCardState *cs = dev_id;
251 u_char valisac, valhscx;
252 int count = 0;
253 u_long flags;
254
255 spin_lock_irqsave(&cs->lock, flags);
256 do {
257 valhscx = ReadHSCX(cs, 1, HSCX_ISTA);
258 if (valhscx)
259 hscx_int_main(cs, valhscx);
260 valisac = ReadISAC(cs, ISAC_ISTA);
261 if (valisac)
262 isac_interrupt(cs, valisac);
263 count++;
264 } while ((valhscx || valisac) && (count < MAXCOUNT));
265
266 WriteHSCX(cs, 0, HSCX_MASK, 0xFF);
267 WriteHSCX(cs, 1, HSCX_MASK, 0xFF);
268 WriteISAC(cs, ISAC_MASK, 0xFF);
269 WriteISAC(cs, ISAC_MASK, 0x0);
270 WriteHSCX(cs, 0, HSCX_MASK, 0x0);
271 WriteHSCX(cs, 1, HSCX_MASK, 0x0);
272 spin_unlock_irqrestore(&cs->lock, flags);
273 return IRQ_HANDLED;
274}
275
276
277static irqreturn_t
278gazel_interrupt_ipac(int intno, void *dev_id, struct pt_regs *regs)
279{
280 struct IsdnCardState *cs = dev_id;
281 u_char ista, val;
282 int count = 0;
283 u_long flags;
284
285 spin_lock_irqsave(&cs->lock, flags);
286 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
287 do {
288 if (ista & 0x0f) {
289 val = ReadHSCX(cs, 1, HSCX_ISTA);
290 if (ista & 0x01)
291 val |= 0x01;
292 if (ista & 0x04)
293 val |= 0x02;
294 if (ista & 0x08)
295 val |= 0x04;
296 if (val) {
297 hscx_int_main(cs, val);
298 }
299 }
300 if (ista & 0x20) {
301 val = 0xfe & ReadISAC(cs, ISAC_ISTA);
302 if (val) {
303 isac_interrupt(cs, val);
304 }
305 }
306 if (ista & 0x10) {
307 val = 0x01;
308 isac_interrupt(cs, val);
309 }
310 ista = ReadISAC(cs, IPAC_ISTA - 0x80);
311 count++;
312 }
313 while ((ista & 0x3f) && (count < MAXCOUNT));
314
315 WriteISAC(cs, IPAC_MASK - 0x80, 0xFF);
316 WriteISAC(cs, IPAC_MASK - 0x80, 0xC0);
317 spin_unlock_irqrestore(&cs->lock, flags);
318 return IRQ_HANDLED;
319}
320void
321release_io_gazel(struct IsdnCardState *cs)
322{
323 unsigned int i;
324
325 switch (cs->subtyp) {
326 case R647:
327 for (i = 0x0000; i < 0xC000; i += 0x1000)
328 release_region(i + cs->hw.gazel.hscx[0], 16);
329 release_region(0xC000 + cs->hw.gazel.hscx[0], 1);
330 break;
331
332 case R685:
333 release_region(cs->hw.gazel.hscx[0], 0x100);
334 release_region(cs->hw.gazel.cfg_reg, 0x80);
335 break;
336
337 case R753:
338 release_region(cs->hw.gazel.ipac, 0x8);
339 release_region(cs->hw.gazel.cfg_reg, 0x80);
340 break;
341
342 case R742:
343 release_region(cs->hw.gazel.ipac, 8);
344 break;
345 }
346}
347
348static int
349reset_gazel(struct IsdnCardState *cs)
350{
351 unsigned long plxcntrl, addr = cs->hw.gazel.cfg_reg;
352
353 switch (cs->subtyp) {
354 case R647:
355 writereg(addr, 0, 0);
356 HZDELAY(10);
357 writereg(addr, 0, 1);
358 HZDELAY(2);
359 break;
360 case R685:
361 plxcntrl = inl(addr + PLX_CNTRL);
362 plxcntrl |= (RESET_9050 + RESET_GAZEL);
363 outl(plxcntrl, addr + PLX_CNTRL);
364 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
365 HZDELAY(4);
366 outl(plxcntrl, addr + PLX_CNTRL);
367 HZDELAY(10);
368 outb(INT_ISAC_EN + INT_HSCX_EN + INT_PCI_EN, addr + PLX_INCSR);
369 break;
370 case R753:
371 plxcntrl = inl(addr + PLX_CNTRL);
372 plxcntrl |= (RESET_9050 + RESET_GAZEL);
373 outl(plxcntrl, addr + PLX_CNTRL);
374 plxcntrl &= ~(RESET_9050 + RESET_GAZEL);
375 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
376 HZDELAY(4);
377 outl(plxcntrl, addr + PLX_CNTRL);
378 HZDELAY(10);
379 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
380 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
381 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
382 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
383 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
384 outb(INT_IPAC_EN + INT_PCI_EN, addr + PLX_INCSR);
385 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
386 break;
387 case R742:
388 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x20);
389 HZDELAY(4);
390 WriteISAC(cs, IPAC_POTA2 - 0x80, 0x00);
391 WriteISAC(cs, IPAC_ACFG - 0x80, 0xff);
392 WriteISAC(cs, IPAC_AOE - 0x80, 0x0);
393 WriteISAC(cs, IPAC_MASK - 0x80, 0xff);
394 WriteISAC(cs, IPAC_CONF - 0x80, 0x1);
395 WriteISAC(cs, IPAC_MASK - 0x80, 0xc0);
396 break;
397 }
398 return (0);
399}
400
401static int
402Gazel_card_msg(struct IsdnCardState *cs, int mt, void *arg)
403{
404 u_long flags;
405
406 switch (mt) {
407 case CARD_RESET:
408 spin_lock_irqsave(&cs->lock, flags);
409 reset_gazel(cs);
410 spin_unlock_irqrestore(&cs->lock, flags);
411 return (0);
412 case CARD_RELEASE:
413 release_io_gazel(cs);
414 return (0);
415 case CARD_INIT:
416 spin_lock_irqsave(&cs->lock, flags);
417 inithscxisac(cs, 1);
418 if ((cs->subtyp==R647)||(cs->subtyp==R685)) {
419 int i;
420 for (i=0;i<(2+MAX_WAITING_CALLS);i++) {
421 cs->bcs[i].hw.hscx.tsaxr0 = 0x1f;
422 cs->bcs[i].hw.hscx.tsaxr1 = 0x23;
423 }
424 }
425 spin_unlock_irqrestore(&cs->lock, flags);
426 return (0);
427 case CARD_TEST:
428 return (0);
429 }
430 return (0);
431}
432
433static int
434reserve_regions(struct IsdnCard *card, struct IsdnCardState *cs)
435{
436 unsigned int i, j, base = 0, adr = 0, len = 0;
437
438 switch (cs->subtyp) {
439 case R647:
440 base = cs->hw.gazel.hscx[0];
441 if (!request_region(adr = (0xC000 + base), len = 1, "gazel"))
442 goto error;
443 for (i = 0x0000; i < 0xC000; i += 0x1000) {
444 if (!request_region(adr = (i + base), len = 16, "gazel"))
445 goto error;
446 }
447 if (i != 0xC000) {
448 for (j = 0; j < i; j+= 0x1000)
449 release_region(j + base, 16);
450 release_region(0xC000 + base, 1);
451 goto error;
452 }
453 break;
454
455 case R685:
456 if (!request_region(adr = cs->hw.gazel.hscx[0], len = 0x100, "gazel"))
457 goto error;
458 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
459 release_region(cs->hw.gazel.hscx[0],0x100);
460 goto error;
461 }
462 break;
463
464 case R753:
465 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
466 goto error;
467 if (!request_region(adr = cs->hw.gazel.cfg_reg, len = 0x80, "gazel")) {
468 release_region(cs->hw.gazel.ipac, 8);
469 goto error;
470 }
471 break;
472
473 case R742:
474 if (!request_region(adr = cs->hw.gazel.ipac, len = 0x8, "gazel"))
475 goto error;
476 break;
477 }
478
479 return 0;
480
481 error:
482 printk(KERN_WARNING "Gazel: %s io ports 0x%x-0x%x already in use\n",
483 CardType[cs->typ], adr, adr + len);
484 return 1;
485}
486
487static int __init
488setup_gazelisa(struct IsdnCard *card, struct IsdnCardState *cs)
489{
490 printk(KERN_INFO "Gazel: ISA PnP card automatic recognition\n");
491 // we got an irq parameter, assume it is an ISA card
492 // R742 decodes address even in not started...
493 // R647 returns FF if not present or not started
494 // eventually needs improvment
495 if (readreg_ipac(card->para[1], IPAC_ID) == 1)
496 cs->subtyp = R742;
497 else
498 cs->subtyp = R647;
499
500 setup_isac(cs);
501 cs->hw.gazel.cfg_reg = card->para[1] + 0xC000;
502 cs->hw.gazel.ipac = card->para[1];
503 cs->hw.gazel.isac = card->para[1] + 0x8000;
504 cs->hw.gazel.hscx[0] = card->para[1];
505 cs->hw.gazel.hscx[1] = card->para[1] + 0x4000;
506 cs->irq = card->para[0];
507 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
508 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
509 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
510
511 switch (cs->subtyp) {
512 case R647:
513 printk(KERN_INFO "Gazel: Card ISA R647/R648 found\n");
514 cs->dc.isac.adf2 = 0x87;
515 printk(KERN_INFO
516 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
517 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
518 printk(KERN_INFO
519 "Gazel: hscx A:0x%X hscx B:0x%X\n",
520 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
521
522 break;
523 case R742:
524 printk(KERN_INFO "Gazel: Card ISA R742 found\n");
525 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
526 printk(KERN_INFO
527 "Gazel: config irq:%d ipac:0x%X\n",
528 cs->irq, cs->hw.gazel.ipac);
529 break;
530 }
531
532 return (0);
533}
534
535static struct pci_dev *dev_tel __initdata = NULL;
536
537static int __init
538setup_gazelpci(struct IsdnCardState *cs)
539{
540 u_int pci_ioaddr0 = 0, pci_ioaddr1 = 0;
541 u_char pci_irq = 0, found;
542 u_int nbseek, seekcard;
543
544 printk(KERN_WARNING "Gazel: PCI card automatic recognition\n");
545
546 found = 0;
547 seekcard = PCI_DEVICE_ID_PLX_R685;
548 for (nbseek = 0; nbseek < 3; nbseek++) {
549 if ((dev_tel = pci_find_device(PCI_VENDOR_ID_PLX, seekcard, dev_tel))) {
550 if (pci_enable_device(dev_tel))
551 return 1;
552 pci_irq = dev_tel->irq;
553 pci_ioaddr0 = pci_resource_start(dev_tel, 1);
554 pci_ioaddr1 = pci_resource_start(dev_tel, 2);
555 found = 1;
556 }
557 if (found)
558 break;
559 else {
560 switch (seekcard) {
561 case PCI_DEVICE_ID_PLX_R685:
562 seekcard = PCI_DEVICE_ID_PLX_R753;
563 break;
564 case PCI_DEVICE_ID_PLX_R753:
565 seekcard = PCI_DEVICE_ID_PLX_DJINN_ITOO;
566 break;
567 }
568 }
569 }
570 if (!found) {
571 printk(KERN_WARNING "Gazel: No PCI card found\n");
572 return (1);
573 }
574 if (!pci_irq) {
575 printk(KERN_WARNING "Gazel: No IRQ for PCI card found\n");
576 return 1;
577 }
578 cs->hw.gazel.pciaddr[0] = pci_ioaddr0;
579 cs->hw.gazel.pciaddr[1] = pci_ioaddr1;
580 setup_isac(cs);
581 pci_ioaddr1 &= 0xfffe;
582 cs->hw.gazel.cfg_reg = pci_ioaddr0 & 0xfffe;
583 cs->hw.gazel.ipac = pci_ioaddr1;
584 cs->hw.gazel.isac = pci_ioaddr1 + 0x80;
585 cs->hw.gazel.hscx[0] = pci_ioaddr1;
586 cs->hw.gazel.hscx[1] = pci_ioaddr1 + 0x40;
587 cs->hw.gazel.isacfifo = cs->hw.gazel.isac;
588 cs->hw.gazel.hscxfifo[0] = cs->hw.gazel.hscx[0];
589 cs->hw.gazel.hscxfifo[1] = cs->hw.gazel.hscx[1];
590 cs->irq = pci_irq;
591 cs->irq_flags |= SA_SHIRQ;
592
593 switch (seekcard) {
594 case PCI_DEVICE_ID_PLX_R685:
595 printk(KERN_INFO "Gazel: Card PCI R685 found\n");
596 cs->subtyp = R685;
597 cs->dc.isac.adf2 = 0x87;
598 printk(KERN_INFO
599 "Gazel: config irq:%d isac:0x%X cfg:0x%X\n",
600 cs->irq, cs->hw.gazel.isac, cs->hw.gazel.cfg_reg);
601 printk(KERN_INFO
602 "Gazel: hscx A:0x%X hscx B:0x%X\n",
603 cs->hw.gazel.hscx[0], cs->hw.gazel.hscx[1]);
604 break;
605 case PCI_DEVICE_ID_PLX_R753:
606 case PCI_DEVICE_ID_PLX_DJINN_ITOO:
607 printk(KERN_INFO "Gazel: Card PCI R753 found\n");
608 cs->subtyp = R753;
609 test_and_set_bit(HW_IPAC, &cs->HW_Flags);
610 printk(KERN_INFO
611 "Gazel: config irq:%d ipac:0x%X cfg:0x%X\n",
612 cs->irq, cs->hw.gazel.ipac, cs->hw.gazel.cfg_reg);
613 break;
614 }
615
616 return (0);
617}
618
619int __init
620setup_gazel(struct IsdnCard *card)
621{
622 struct IsdnCardState *cs = card->cs;
623 char tmp[64];
624 u_char val;
625
626 strcpy(tmp, gazel_revision);
627 printk(KERN_INFO "Gazel: Driver Revision %s\n", HiSax_getrev(tmp));
628
629 if (cs->typ != ISDN_CTYPE_GAZEL)
630 return (0);
631
632 if (card->para[0]) {
633 if (setup_gazelisa(card, cs))
634 return (0);
635 } else {
636
637#ifdef CONFIG_PCI
638 if (setup_gazelpci(cs))
639 return (0);
640#else
641 printk(KERN_WARNING "Gazel: Card PCI requested and NO_PCI_BIOS, unable to config\n");
642 return (0);
643#endif /* CONFIG_PCI */
644 }
645
646 if (reserve_regions(card, cs)) {
647 return (0);
648 }
649 if (reset_gazel(cs)) {
650 printk(KERN_WARNING "Gazel: wrong IRQ\n");
651 release_io_gazel(cs);
652 return (0);
653 }
654 cs->readisac = &ReadISAC;
655 cs->writeisac = &WriteISAC;
656 cs->readisacfifo = &ReadISACfifo;
657 cs->writeisacfifo = &WriteISACfifo;
658 cs->BC_Read_Reg = &ReadHSCX;
659 cs->BC_Write_Reg = &WriteHSCX;
660 cs->BC_Send_Data = &hscx_fill_fifo;
661 cs->cardmsg = &Gazel_card_msg;
662
663 switch (cs->subtyp) {
664 case R647:
665 case R685:
666 cs->irq_func = &gazel_interrupt;
667 ISACVersion(cs, "Gazel:");
668 if (HscxVersion(cs, "Gazel:")) {
669 printk(KERN_WARNING
670 "Gazel: wrong HSCX versions check IO address\n");
671 release_io_gazel(cs);
672 return (0);
673 }
674 break;
675 case R742:
676 case R753:
677 cs->irq_func = &gazel_interrupt_ipac;
678 val = ReadISAC(cs, IPAC_ID - 0x80);
679 printk(KERN_INFO "Gazel: IPAC version %x\n", val);
680 break;
681 }
682
683 return (1);
684}
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-03 08:25:11 -0500