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authorLinus Torvalds <torvalds@linux-foundation.org>2009-06-15 12:40:05 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2009-06-15 12:40:05 -0400
commit2ed0e21b30b53d3a94e204196e523e6c8f732b56 (patch)
treede2635426477d86338a9469ce09ba0626052288f /drivers/isdn/hardware/mISDN/hfcmulti.c
parent0fa213310cd8fa7a51071cdcf130e26fa56e9549 (diff)
parent9cbc1cb8cd46ce1f7645b9de249b2ce8460129bb (diff)
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1244 commits) pkt_sched: Rename PSCHED_US2NS and PSCHED_NS2US ipv4: Fix fib_trie rebalancing Bluetooth: Fix issue with uninitialized nsh.type in DTL-1 driver Bluetooth: Fix Kconfig issue with RFKILL integration PIM-SM: namespace changes ipv4: update ARPD help text net: use a deferred timer in rt_check_expire ieee802154: fix kconfig bool/tristate muckup bonding: initialization rework bonding: use is_zero_ether_addr bonding: network device names are case sensative bonding: elminate bad refcount code bonding: fix style issues bonding: fix destructor bonding: remove bonding read/write semaphore bonding: initialize before registration bonding: bond_create always called with default parameters x_tables: Convert printk to pr_err netfilter: conntrack: optional reliable conntrack event delivery list_nulls: add hlist_nulls_add_head and hlist_nulls_del ...
Diffstat (limited to 'drivers/isdn/hardware/mISDN/hfcmulti.c')
-rw-r--r--drivers/isdn/hardware/mISDN/hfcmulti.c614
1 files changed, 404 insertions, 210 deletions
diff --git a/drivers/isdn/hardware/mISDN/hfcmulti.c b/drivers/isdn/hardware/mISDN/hfcmulti.c
index 0b28141e43bf..e1dab30aed30 100644
--- a/drivers/isdn/hardware/mISDN/hfcmulti.c
+++ b/drivers/isdn/hardware/mISDN/hfcmulti.c
@@ -104,7 +104,7 @@
104 * If unsure, don't give this parameter. 104 * If unsure, don't give this parameter.
105 * 105 *
106 * dslot: 106 * dslot:
107 * NOTE: only one poll value must be given for every card. 107 * NOTE: only one dslot value must be given for every card.
108 * Also this value must be given for non-E1 cards. If omitted, the E1 108 * Also this value must be given for non-E1 cards. If omitted, the E1
109 * card has D-channel on time slot 16, which is default. 109 * card has D-channel on time slot 16, which is default.
110 * If 1..15 or 17..31, an alternate time slot is used for D-channel. 110 * If 1..15 or 17..31, an alternate time slot is used for D-channel.
@@ -139,6 +139,10 @@
139 * Selects interface with clock source for mISDN and applications. 139 * Selects interface with clock source for mISDN and applications.
140 * Set to card number starting with 1. Set to -1 to disable. 140 * Set to card number starting with 1. Set to -1 to disable.
141 * By default, the first card is used as clock source. 141 * By default, the first card is used as clock source.
142 *
143 * hwid:
144 * NOTE: only one hwid value must be given once
145 * Enable special embedded devices with XHFC controllers.
142 */ 146 */
143 147
144/* 148/*
@@ -206,6 +210,11 @@ static int clock;
206static uint timer; 210static uint timer;
207static uint clockdelay_te = CLKDEL_TE; 211static uint clockdelay_te = CLKDEL_TE;
208static uint clockdelay_nt = CLKDEL_NT; 212static uint clockdelay_nt = CLKDEL_NT;
213#define HWID_NONE 0
214#define HWID_MINIP4 1
215#define HWID_MINIP8 2
216#define HWID_MINIP16 3
217static uint hwid = HWID_NONE;
209 218
210static int HFC_cnt, Port_cnt, PCM_cnt = 99; 219static int HFC_cnt, Port_cnt, PCM_cnt = 99;
211 220
@@ -223,6 +232,7 @@ module_param_array(pcm, int, NULL, S_IRUGO | S_IWUSR);
223module_param_array(dslot, int, NULL, S_IRUGO | S_IWUSR); 232module_param_array(dslot, int, NULL, S_IRUGO | S_IWUSR);
224module_param_array(iomode, uint, NULL, S_IRUGO | S_IWUSR); 233module_param_array(iomode, uint, NULL, S_IRUGO | S_IWUSR);
225module_param_array(port, uint, NULL, S_IRUGO | S_IWUSR); 234module_param_array(port, uint, NULL, S_IRUGO | S_IWUSR);
235module_param(hwid, uint, S_IRUGO | S_IWUSR); /* The hardware ID */
226 236
227#ifdef HFC_REGISTER_DEBUG 237#ifdef HFC_REGISTER_DEBUG
228#define HFC_outb(hc, reg, val) \ 238#define HFC_outb(hc, reg, val) \
@@ -252,6 +262,10 @@ module_param_array(port, uint, NULL, S_IRUGO | S_IWUSR);
252#define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc)) 262#define HFC_wait_nodebug(hc) (hc->HFC_wait_nodebug(hc))
253#endif 263#endif
254 264
265#ifdef CONFIG_MISDN_HFCMULTI_8xx
266#include "hfc_multi_8xx.h"
267#endif
268
255/* HFC_IO_MODE_PCIMEM */ 269/* HFC_IO_MODE_PCIMEM */
256static void 270static void
257#ifdef HFC_REGISTER_DEBUG 271#ifdef HFC_REGISTER_DEBUG
@@ -261,7 +275,7 @@ HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val,
261HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val) 275HFC_outb_pcimem(struct hfc_multi *hc, u_char reg, u_char val)
262#endif 276#endif
263{ 277{
264 writeb(val, (hc->pci_membase)+reg); 278 writeb(val, hc->pci_membase + reg);
265} 279}
266static u_char 280static u_char
267#ifdef HFC_REGISTER_DEBUG 281#ifdef HFC_REGISTER_DEBUG
@@ -270,7 +284,7 @@ HFC_inb_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line)
270HFC_inb_pcimem(struct hfc_multi *hc, u_char reg) 284HFC_inb_pcimem(struct hfc_multi *hc, u_char reg)
271#endif 285#endif
272{ 286{
273 return readb((hc->pci_membase)+reg); 287 return readb(hc->pci_membase + reg);
274} 288}
275static u_short 289static u_short
276#ifdef HFC_REGISTER_DEBUG 290#ifdef HFC_REGISTER_DEBUG
@@ -279,7 +293,7 @@ HFC_inw_pcimem(struct hfc_multi *hc, u_char reg, const char *function, int line)
279HFC_inw_pcimem(struct hfc_multi *hc, u_char reg) 293HFC_inw_pcimem(struct hfc_multi *hc, u_char reg)
280#endif 294#endif
281{ 295{
282 return readw((hc->pci_membase)+reg); 296 return readw(hc->pci_membase + reg);
283} 297}
284static void 298static void
285#ifdef HFC_REGISTER_DEBUG 299#ifdef HFC_REGISTER_DEBUG
@@ -288,7 +302,8 @@ HFC_wait_pcimem(struct hfc_multi *hc, const char *function, int line)
288HFC_wait_pcimem(struct hfc_multi *hc) 302HFC_wait_pcimem(struct hfc_multi *hc)
289#endif 303#endif
290{ 304{
291 while (readb((hc->pci_membase)+R_STATUS) & V_BUSY); 305 while (readb(hc->pci_membase + R_STATUS) & V_BUSY)
306 cpu_relax();
292} 307}
293 308
294/* HFC_IO_MODE_REGIO */ 309/* HFC_IO_MODE_REGIO */
@@ -300,7 +315,7 @@ HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val,
300HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val) 315HFC_outb_regio(struct hfc_multi *hc, u_char reg, u_char val)
301#endif 316#endif
302{ 317{
303 outb(reg, (hc->pci_iobase)+4); 318 outb(reg, hc->pci_iobase + 4);
304 outb(val, hc->pci_iobase); 319 outb(val, hc->pci_iobase);
305} 320}
306static u_char 321static u_char
@@ -310,7 +325,7 @@ HFC_inb_regio(struct hfc_multi *hc, u_char reg, const char *function, int line)
310HFC_inb_regio(struct hfc_multi *hc, u_char reg) 325HFC_inb_regio(struct hfc_multi *hc, u_char reg)
311#endif 326#endif
312{ 327{
313 outb(reg, (hc->pci_iobase)+4); 328 outb(reg, hc->pci_iobase + 4);
314 return inb(hc->pci_iobase); 329 return inb(hc->pci_iobase);
315} 330}
316static u_short 331static u_short
@@ -320,7 +335,7 @@ HFC_inw_regio(struct hfc_multi *hc, u_char reg, const char *function, int line)
320HFC_inw_regio(struct hfc_multi *hc, u_char reg) 335HFC_inw_regio(struct hfc_multi *hc, u_char reg)
321#endif 336#endif
322{ 337{
323 outb(reg, (hc->pci_iobase)+4); 338 outb(reg, hc->pci_iobase + 4);
324 return inw(hc->pci_iobase); 339 return inw(hc->pci_iobase);
325} 340}
326static void 341static void
@@ -330,8 +345,9 @@ HFC_wait_regio(struct hfc_multi *hc, const char *function, int line)
330HFC_wait_regio(struct hfc_multi *hc) 345HFC_wait_regio(struct hfc_multi *hc)
331#endif 346#endif
332{ 347{
333 outb(R_STATUS, (hc->pci_iobase)+4); 348 outb(R_STATUS, hc->pci_iobase + 4);
334 while (inb(hc->pci_iobase) & V_BUSY); 349 while (inb(hc->pci_iobase) & V_BUSY)
350 cpu_relax();
335} 351}
336 352
337#ifdef HFC_REGISTER_DEBUG 353#ifdef HFC_REGISTER_DEBUG
@@ -350,14 +366,14 @@ HFC_outb_debug(struct hfc_multi *hc, u_char reg, u_char val,
350 if (regname[0] == '\0') 366 if (regname[0] == '\0')
351 strcpy(regname, "register"); 367 strcpy(regname, "register");
352 368
353 bits[7] = '0'+(!!(val&1)); 369 bits[7] = '0' + (!!(val & 1));
354 bits[6] = '0'+(!!(val&2)); 370 bits[6] = '0' + (!!(val & 2));
355 bits[5] = '0'+(!!(val&4)); 371 bits[5] = '0' + (!!(val & 4));
356 bits[4] = '0'+(!!(val&8)); 372 bits[4] = '0' + (!!(val & 8));
357 bits[3] = '0'+(!!(val&16)); 373 bits[3] = '0' + (!!(val & 16));
358 bits[2] = '0'+(!!(val&32)); 374 bits[2] = '0' + (!!(val & 32));
359 bits[1] = '0'+(!!(val&64)); 375 bits[1] = '0' + (!!(val & 64));
360 bits[0] = '0'+(!!(val&128)); 376 bits[0] = '0' + (!!(val & 128));
361 printk(KERN_DEBUG 377 printk(KERN_DEBUG
362 "HFC_outb(chip %d, %02x=%s, 0x%02x=%s); in %s() line %d\n", 378 "HFC_outb(chip %d, %02x=%s, 0x%02x=%s); in %s() line %d\n",
363 hc->id, reg, regname, val, bits, function, line); 379 hc->id, reg, regname, val, bits, function, line);
@@ -380,14 +396,14 @@ HFC_inb_debug(struct hfc_multi *hc, u_char reg, const char *function, int line)
380 if (regname[0] == '\0') 396 if (regname[0] == '\0')
381 strcpy(regname, "register"); 397 strcpy(regname, "register");
382 398
383 bits[7] = '0'+(!!(val&1)); 399 bits[7] = '0' + (!!(val & 1));
384 bits[6] = '0'+(!!(val&2)); 400 bits[6] = '0' + (!!(val & 2));
385 bits[5] = '0'+(!!(val&4)); 401 bits[5] = '0' + (!!(val & 4));
386 bits[4] = '0'+(!!(val&8)); 402 bits[4] = '0' + (!!(val & 8));
387 bits[3] = '0'+(!!(val&16)); 403 bits[3] = '0' + (!!(val & 16));
388 bits[2] = '0'+(!!(val&32)); 404 bits[2] = '0' + (!!(val & 32));
389 bits[1] = '0'+(!!(val&64)); 405 bits[1] = '0' + (!!(val & 64));
390 bits[0] = '0'+(!!(val&128)); 406 bits[0] = '0' + (!!(val & 128));
391 printk(KERN_DEBUG 407 printk(KERN_DEBUG
392 "HFC_inb(chip %d, %02x=%s) = 0x%02x=%s; in %s() line %d\n", 408 "HFC_inb(chip %d, %02x=%s) = 0x%02x=%s; in %s() line %d\n",
393 hc->id, reg, regname, val, bits, function, line); 409 hc->id, reg, regname, val, bits, function, line);
@@ -467,6 +483,7 @@ write_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len)
467 len--; 483 len--;
468 } 484 }
469} 485}
486
470/* read fifo data (REGIO) */ 487/* read fifo data (REGIO) */
471static void 488static void
472read_fifo_regio(struct hfc_multi *hc, u_char *data, int len) 489read_fifo_regio(struct hfc_multi *hc, u_char *data, int len)
@@ -512,7 +529,6 @@ read_fifo_pcimem(struct hfc_multi *hc, u_char *data, int len)
512 } 529 }
513} 530}
514 531
515
516static void 532static void
517enable_hwirq(struct hfc_multi *hc) 533enable_hwirq(struct hfc_multi *hc)
518{ 534{
@@ -928,7 +944,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
928 writel(pv, plx_acc_32); 944 writel(pv, plx_acc_32);
929 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) { 945 if (test_bit(HFC_CHIP_PCM_MASTER, &hc->chip)) {
930 pcmmaster = hc; 946 pcmmaster = hc;
931 if (hc->type == 1) { 947 if (hc->ctype == HFC_TYPE_E1) {
932 if (debug & DEBUG_HFCMULTI_PLXSD) 948 if (debug & DEBUG_HFCMULTI_PLXSD)
933 printk(KERN_DEBUG 949 printk(KERN_DEBUG
934 "Schedule SYNC_I\n"); 950 "Schedule SYNC_I\n");
@@ -949,7 +965,8 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
949 pv |= PLX_SYNC_O_EN; 965 pv |= PLX_SYNC_O_EN;
950 writel(pv, plx_acc_32); 966 writel(pv, plx_acc_32);
951 /* switch to jatt PLL, if not disabled by RX_SYNC */ 967 /* switch to jatt PLL, if not disabled by RX_SYNC */
952 if (hc->type == 1 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) { 968 if (hc->ctype == HFC_TYPE_E1
969 && !test_bit(HFC_CHIP_RX_SYNC, &hc->chip)) {
953 if (debug & DEBUG_HFCMULTI_PLXSD) 970 if (debug & DEBUG_HFCMULTI_PLXSD)
954 printk(KERN_DEBUG "Schedule jatt PLL\n"); 971 printk(KERN_DEBUG "Schedule jatt PLL\n");
955 hc->e1_resync |= 2; /* switch to jatt */ 972 hc->e1_resync |= 2; /* switch to jatt */
@@ -961,7 +978,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
961 printk(KERN_DEBUG 978 printk(KERN_DEBUG
962 "id=%d (0x%p) = PCM master syncronized " 979 "id=%d (0x%p) = PCM master syncronized "
963 "with QUARTZ\n", hc->id, hc); 980 "with QUARTZ\n", hc->id, hc);
964 if (hc->type == 1) { 981 if (hc->ctype == HFC_TYPE_E1) {
965 /* Use the crystal clock for the PCM 982 /* Use the crystal clock for the PCM
966 master card */ 983 master card */
967 if (debug & DEBUG_HFCMULTI_PLXSD) 984 if (debug & DEBUG_HFCMULTI_PLXSD)
@@ -972,7 +989,7 @@ hfcmulti_resync(struct hfc_multi *locked, struct hfc_multi *newmaster, int rm)
972 if (debug & DEBUG_HFCMULTI_PLXSD) 989 if (debug & DEBUG_HFCMULTI_PLXSD)
973 printk(KERN_DEBUG 990 printk(KERN_DEBUG
974 "QUARTZ is automatically " 991 "QUARTZ is automatically "
975 "enabled by HFC-%dS\n", hc->type); 992 "enabled by HFC-%dS\n", hc->ctype);
976 } 993 }
977 plx_acc_32 = hc->plx_membase + PLX_GPIOC; 994 plx_acc_32 = hc->plx_membase + PLX_GPIOC;
978 pv = readl(plx_acc_32); 995 pv = readl(plx_acc_32);
@@ -996,7 +1013,7 @@ plxsd_checksync(struct hfc_multi *hc, int rm)
996 if (hc->syncronized) { 1013 if (hc->syncronized) {
997 if (syncmaster == NULL) { 1014 if (syncmaster == NULL) {
998 if (debug & DEBUG_HFCMULTI_PLXSD) 1015 if (debug & DEBUG_HFCMULTI_PLXSD)
999 printk(KERN_WARNING "%s: GOT sync on card %d" 1016 printk(KERN_DEBUG "%s: GOT sync on card %d"
1000 " (id=%d)\n", __func__, hc->id + 1, 1017 " (id=%d)\n", __func__, hc->id + 1,
1001 hc->id); 1018 hc->id);
1002 hfcmulti_resync(hc, hc, rm); 1019 hfcmulti_resync(hc, hc, rm);
@@ -1004,7 +1021,7 @@ plxsd_checksync(struct hfc_multi *hc, int rm)
1004 } else { 1021 } else {
1005 if (syncmaster == hc) { 1022 if (syncmaster == hc) {
1006 if (debug & DEBUG_HFCMULTI_PLXSD) 1023 if (debug & DEBUG_HFCMULTI_PLXSD)
1007 printk(KERN_WARNING "%s: LOST sync on card %d" 1024 printk(KERN_DEBUG "%s: LOST sync on card %d"
1008 " (id=%d)\n", __func__, hc->id + 1, 1025 " (id=%d)\n", __func__, hc->id + 1,
1009 hc->id); 1026 hc->id);
1010 hfcmulti_resync(hc, NULL, rm); 1027 hfcmulti_resync(hc, NULL, rm);
@@ -1053,20 +1070,23 @@ release_io_hfcmulti(struct hfc_multi *hc)
1053 pv &= ~PLX_DSP_RES_N; 1070 pv &= ~PLX_DSP_RES_N;
1054 writel(pv, plx_acc_32); 1071 writel(pv, plx_acc_32);
1055 if (debug & DEBUG_HFCMULTI_INIT) 1072 if (debug & DEBUG_HFCMULTI_INIT)
1056 printk(KERN_WARNING "%s: PCM off: PLX_GPIO=%x\n", 1073 printk(KERN_DEBUG "%s: PCM off: PLX_GPIO=%x\n",
1057 __func__, pv); 1074 __func__, pv);
1058 spin_unlock_irqrestore(&plx_lock, plx_flags); 1075 spin_unlock_irqrestore(&plx_lock, plx_flags);
1059 } 1076 }
1060 1077
1061 /* disable memory mapped ports / io ports */ 1078 /* disable memory mapped ports / io ports */
1062 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */ 1079 test_and_clear_bit(HFC_CHIP_PLXSD, &hc->chip); /* prevent resync */
1063 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0); 1080 if (hc->pci_dev)
1081 pci_write_config_word(hc->pci_dev, PCI_COMMAND, 0);
1064 if (hc->pci_membase) 1082 if (hc->pci_membase)
1065 iounmap(hc->pci_membase); 1083 iounmap(hc->pci_membase);
1066 if (hc->plx_membase) 1084 if (hc->plx_membase)
1067 iounmap(hc->plx_membase); 1085 iounmap(hc->plx_membase);
1068 if (hc->pci_iobase) 1086 if (hc->pci_iobase)
1069 release_region(hc->pci_iobase, 8); 1087 release_region(hc->pci_iobase, 8);
1088 if (hc->xhfc_membase)
1089 iounmap((void *)hc->xhfc_membase);
1070 1090
1071 if (hc->pci_dev) { 1091 if (hc->pci_dev) {
1072 pci_disable_device(hc->pci_dev); 1092 pci_disable_device(hc->pci_dev);
@@ -1100,8 +1120,9 @@ init_chip(struct hfc_multi *hc)
1100 /* revision check */ 1120 /* revision check */
1101 if (debug & DEBUG_HFCMULTI_INIT) 1121 if (debug & DEBUG_HFCMULTI_INIT)
1102 printk(KERN_DEBUG "%s: entered\n", __func__); 1122 printk(KERN_DEBUG "%s: entered\n", __func__);
1103 val = HFC_inb(hc, R_CHIP_ID)>>4; 1123 val = HFC_inb(hc, R_CHIP_ID);
1104 if (val != 0x8 && val != 0xc && val != 0xe) { 1124 if ((val >> 4) != 0x8 && (val >> 4) != 0xc && (val >> 4) != 0xe &&
1125 (val >> 1) != 0x31) {
1105 printk(KERN_INFO "HFC_multi: unknown CHIP_ID:%x\n", (u_int)val); 1126 printk(KERN_INFO "HFC_multi: unknown CHIP_ID:%x\n", (u_int)val);
1106 err = -EIO; 1127 err = -EIO;
1107 goto out; 1128 goto out;
@@ -1109,8 +1130,9 @@ init_chip(struct hfc_multi *hc)
1109 rev = HFC_inb(hc, R_CHIP_RV); 1130 rev = HFC_inb(hc, R_CHIP_RV);
1110 printk(KERN_INFO 1131 printk(KERN_INFO
1111 "HFC_multi: detected HFC with chip ID=0x%lx revision=%ld%s\n", 1132 "HFC_multi: detected HFC with chip ID=0x%lx revision=%ld%s\n",
1112 val, rev, (rev == 0) ? " (old FIFO handling)" : ""); 1133 val, rev, (rev == 0 && (hc->ctype != HFC_TYPE_XHFC)) ?
1113 if (rev == 0) { 1134 " (old FIFO handling)" : "");
1135 if (hc->ctype != HFC_TYPE_XHFC && rev == 0) {
1114 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip); 1136 test_and_set_bit(HFC_CHIP_REVISION0, &hc->chip);
1115 printk(KERN_WARNING 1137 printk(KERN_WARNING
1116 "HFC_multi: NOTE: Your chip is revision 0, " 1138 "HFC_multi: NOTE: Your chip is revision 0, "
@@ -1152,6 +1174,12 @@ init_chip(struct hfc_multi *hc)
1152 hc->Zlen = 8000; 1174 hc->Zlen = 8000;
1153 hc->DTMFbase = 0x2000; 1175 hc->DTMFbase = 0x2000;
1154 } 1176 }
1177 if (hc->ctype == HFC_TYPE_XHFC) {
1178 hc->Flen = 0x8;
1179 hc->Zmin = 0x0;
1180 hc->Zlen = 64;
1181 hc->DTMFbase = 0x0;
1182 }
1155 hc->max_trans = poll << 1; 1183 hc->max_trans = poll << 1;
1156 if (hc->max_trans > hc->Zlen) 1184 if (hc->max_trans > hc->Zlen)
1157 hc->max_trans = hc->Zlen; 1185 hc->max_trans = hc->Zlen;
@@ -1176,7 +1204,7 @@ init_chip(struct hfc_multi *hc)
1176 writel(pv, plx_acc_32); 1204 writel(pv, plx_acc_32);
1177 spin_unlock_irqrestore(&plx_lock, plx_flags); 1205 spin_unlock_irqrestore(&plx_lock, plx_flags);
1178 if (debug & DEBUG_HFCMULTI_INIT) 1206 if (debug & DEBUG_HFCMULTI_INIT)
1179 printk(KERN_WARNING "%s: slave/term: PLX_GPIO=%x\n", 1207 printk(KERN_DEBUG "%s: slave/term: PLX_GPIO=%x\n",
1180 __func__, pv); 1208 __func__, pv);
1181 /* 1209 /*
1182 * If we are the 3rd PLXSD card or higher, we must turn 1210 * If we are the 3rd PLXSD card or higher, we must turn
@@ -1204,13 +1232,17 @@ init_chip(struct hfc_multi *hc)
1204 writel(pv, plx_acc_32); 1232 writel(pv, plx_acc_32);
1205 spin_unlock_irqrestore(&plx_lock, plx_flags); 1233 spin_unlock_irqrestore(&plx_lock, plx_flags);
1206 if (debug & DEBUG_HFCMULTI_INIT) 1234 if (debug & DEBUG_HFCMULTI_INIT)
1207 printk(KERN_WARNING "%s: term off: PLX_GPIO=%x\n", 1235 printk(KERN_DEBUG
1208 __func__, pv); 1236 "%s: term off: PLX_GPIO=%x\n",
1237 __func__, pv);
1209 } 1238 }
1210 spin_unlock_irqrestore(&HFClock, hfc_flags); 1239 spin_unlock_irqrestore(&HFClock, hfc_flags);
1211 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */ 1240 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */
1212 } 1241 }
1213 1242
1243 if (test_bit(HFC_CHIP_EMBSD, &hc->chip))
1244 hc->hw.r_pcm_md0 = V_F0_LEN; /* shift clock for DSP */
1245
1214 /* we only want the real Z2 read-pointer for revision > 0 */ 1246 /* we only want the real Z2 read-pointer for revision > 0 */
1215 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip)) 1247 if (!test_bit(HFC_CHIP_REVISION0, &hc->chip))
1216 hc->hw.r_ram_sz |= V_FZ_MD; 1248 hc->hw.r_ram_sz |= V_FZ_MD;
@@ -1234,15 +1266,24 @@ init_chip(struct hfc_multi *hc)
1234 1266
1235 /* soft reset */ 1267 /* soft reset */
1236 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl); 1268 HFC_outb(hc, R_CTRL, hc->hw.r_ctrl);
1237 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); 1269 if (hc->ctype == HFC_TYPE_XHFC)
1270 HFC_outb(hc, 0x0C /* R_FIFO_THRES */,
1271 0x11 /* 16 Bytes TX/RX */);
1272 else
1273 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz);
1238 HFC_outb(hc, R_FIFO_MD, 0); 1274 HFC_outb(hc, R_FIFO_MD, 0);
1239 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES | V_RLD_EPR; 1275 if (hc->ctype == HFC_TYPE_XHFC)
1276 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES;
1277 else
1278 hc->hw.r_cirm = V_SRES | V_HFCRES | V_PCMRES | V_STRES
1279 | V_RLD_EPR;
1240 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); 1280 HFC_outb(hc, R_CIRM, hc->hw.r_cirm);
1241 udelay(100); 1281 udelay(100);
1242 hc->hw.r_cirm = 0; 1282 hc->hw.r_cirm = 0;
1243 HFC_outb(hc, R_CIRM, hc->hw.r_cirm); 1283 HFC_outb(hc, R_CIRM, hc->hw.r_cirm);
1244 udelay(100); 1284 udelay(100);
1245 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz); 1285 if (hc->ctype != HFC_TYPE_XHFC)
1286 HFC_outb(hc, R_RAM_SZ, hc->hw.r_ram_sz);
1246 1287
1247 /* Speech Design PLX bridge pcm and sync mode */ 1288 /* Speech Design PLX bridge pcm and sync mode */
1248 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 1289 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
@@ -1254,13 +1295,13 @@ init_chip(struct hfc_multi *hc)
1254 pv |= PLX_MASTER_EN | PLX_SLAVE_EN_N; 1295 pv |= PLX_MASTER_EN | PLX_SLAVE_EN_N;
1255 pv |= PLX_SYNC_O_EN; 1296 pv |= PLX_SYNC_O_EN;
1256 if (debug & DEBUG_HFCMULTI_INIT) 1297 if (debug & DEBUG_HFCMULTI_INIT)
1257 printk(KERN_WARNING "%s: master: PLX_GPIO=%x\n", 1298 printk(KERN_DEBUG "%s: master: PLX_GPIO=%x\n",
1258 __func__, pv); 1299 __func__, pv);
1259 } else { 1300 } else {
1260 pv &= ~(PLX_MASTER_EN | PLX_SLAVE_EN_N); 1301 pv &= ~(PLX_MASTER_EN | PLX_SLAVE_EN_N);
1261 pv &= ~PLX_SYNC_O_EN; 1302 pv &= ~PLX_SYNC_O_EN;
1262 if (debug & DEBUG_HFCMULTI_INIT) 1303 if (debug & DEBUG_HFCMULTI_INIT)
1263 printk(KERN_WARNING "%s: slave: PLX_GPIO=%x\n", 1304 printk(KERN_DEBUG "%s: slave: PLX_GPIO=%x\n",
1264 __func__, pv); 1305 __func__, pv);
1265 } 1306 }
1266 writel(pv, plx_acc_32); 1307 writel(pv, plx_acc_32);
@@ -1278,13 +1319,16 @@ init_chip(struct hfc_multi *hc)
1278 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0); 1319 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0xa0);
1279 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) 1320 if (test_bit(HFC_CHIP_PLXSD, &hc->chip))
1280 HFC_outb(hc, R_PCM_MD2, V_SYNC_SRC); /* sync via SYNC_I / O */ 1321 HFC_outb(hc, R_PCM_MD2, V_SYNC_SRC); /* sync via SYNC_I / O */
1322 else if (test_bit(HFC_CHIP_EMBSD, &hc->chip))
1323 HFC_outb(hc, R_PCM_MD2, 0x10); /* V_C2O_EN */
1281 else 1324 else
1282 HFC_outb(hc, R_PCM_MD2, 0x00); /* sync from interface */ 1325 HFC_outb(hc, R_PCM_MD2, 0x00); /* sync from interface */
1283 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); 1326 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00);
1284 for (i = 0; i < 256; i++) { 1327 for (i = 0; i < 256; i++) {
1285 HFC_outb_nodebug(hc, R_SLOT, i); 1328 HFC_outb_nodebug(hc, R_SLOT, i);
1286 HFC_outb_nodebug(hc, A_SL_CFG, 0); 1329 HFC_outb_nodebug(hc, A_SL_CFG, 0);
1287 HFC_outb_nodebug(hc, A_CONF, 0); 1330 if (hc->ctype != HFC_TYPE_XHFC)
1331 HFC_outb_nodebug(hc, A_CONF, 0);
1288 hc->slot_owner[i] = -1; 1332 hc->slot_owner[i] = -1;
1289 } 1333 }
1290 1334
@@ -1296,6 +1340,9 @@ init_chip(struct hfc_multi *hc)
1296 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK); 1340 HFC_outb(hc, R_BRG_PCM_CFG, V_PCM_CLK);
1297 } 1341 }
1298 1342
1343 if (test_bit(HFC_CHIP_EMBSD, &hc->chip))
1344 HFC_outb(hc, 0x02 /* R_CLK_CFG */, 0x40 /* V_CLKO_OFF */);
1345
1299 /* B410P GPIO */ 1346 /* B410P GPIO */
1300 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { 1347 if (test_bit(HFC_CHIP_B410P, &hc->chip)) {
1301 printk(KERN_NOTICE "Setting GPIOs\n"); 1348 printk(KERN_NOTICE "Setting GPIOs\n");
@@ -1366,8 +1413,8 @@ controller_fail:
1366 writel(pv, plx_acc_32); 1413 writel(pv, plx_acc_32);
1367 spin_unlock_irqrestore(&plx_lock, plx_flags); 1414 spin_unlock_irqrestore(&plx_lock, plx_flags);
1368 if (debug & DEBUG_HFCMULTI_INIT) 1415 if (debug & DEBUG_HFCMULTI_INIT)
1369 printk(KERN_WARNING "%s: master: PLX_GPIO" 1416 printk(KERN_DEBUG "%s: master: "
1370 "=%x\n", __func__, pv); 1417 "PLX_GPIO=%x\n", __func__, pv);
1371 } 1418 }
1372 hc->hw.r_pcm_md0 |= V_PCM_MD; 1419 hc->hw.r_pcm_md0 |= V_PCM_MD;
1373 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00); 1420 HFC_outb(hc, R_PCM_MD0, hc->hw.r_pcm_md0 | 0x00);
@@ -1401,7 +1448,7 @@ controller_fail:
1401 writel(pv, plx_acc_32); 1448 writel(pv, plx_acc_32);
1402 spin_unlock_irqrestore(&plx_lock, plx_flags); 1449 spin_unlock_irqrestore(&plx_lock, plx_flags);
1403 if (debug & DEBUG_HFCMULTI_INIT) 1450 if (debug & DEBUG_HFCMULTI_INIT)
1404 printk(KERN_WARNING "%s: reset off: PLX_GPIO=%x\n", 1451 printk(KERN_DEBUG "%s: reset off: PLX_GPIO=%x\n",
1405 __func__, pv); 1452 __func__, pv);
1406 } 1453 }
1407 1454
@@ -1424,7 +1471,7 @@ controller_fail:
1424 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK; 1471 hc->hw.r_irqmsk_misc |= V_TI_IRQMSK;
1425 1472
1426 /* set E1 state machine IRQ */ 1473 /* set E1 state machine IRQ */
1427 if (hc->type == 1) 1474 if (hc->ctype == HFC_TYPE_E1)
1428 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK; 1475 hc->hw.r_irqmsk_misc |= V_STA_IRQMSK;
1429 1476
1430 /* set DTMF detection */ 1477 /* set DTMF detection */
@@ -1444,7 +1491,8 @@ controller_fail:
1444 r_conf_en = V_CONF_EN | V_ULAW; 1491 r_conf_en = V_CONF_EN | V_ULAW;
1445 else 1492 else
1446 r_conf_en = V_CONF_EN; 1493 r_conf_en = V_CONF_EN;
1447 HFC_outb(hc, R_CONF_EN, r_conf_en); 1494 if (hc->ctype != HFC_TYPE_XHFC)
1495 HFC_outb(hc, R_CONF_EN, r_conf_en);
1448 1496
1449 /* setting leds */ 1497 /* setting leds */
1450 switch (hc->leds) { 1498 switch (hc->leds) {
@@ -1468,16 +1516,23 @@ controller_fail:
1468 break; 1516 break;
1469 } 1517 }
1470 1518
1519 if (test_bit(HFC_CHIP_EMBSD, &hc->chip)) {
1520 hc->hw.r_st_sync = 0x10; /* V_AUTO_SYNCI */
1521 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync);
1522 }
1523
1471 /* set master clock */ 1524 /* set master clock */
1472 if (hc->masterclk >= 0) { 1525 if (hc->masterclk >= 0) {
1473 if (debug & DEBUG_HFCMULTI_INIT) 1526 if (debug & DEBUG_HFCMULTI_INIT)
1474 printk(KERN_DEBUG "%s: setting ST master clock " 1527 printk(KERN_DEBUG "%s: setting ST master clock "
1475 "to port %d (0..%d)\n", 1528 "to port %d (0..%d)\n",
1476 __func__, hc->masterclk, hc->ports-1); 1529 __func__, hc->masterclk, hc->ports-1);
1477 hc->hw.r_st_sync = hc->masterclk | V_AUTO_SYNC; 1530 hc->hw.r_st_sync |= (hc->masterclk | V_AUTO_SYNC);
1478 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync); 1531 HFC_outb(hc, R_ST_SYNC, hc->hw.r_st_sync);
1479 } 1532 }
1480 1533
1534
1535
1481 /* setting misc irq */ 1536 /* setting misc irq */
1482 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc); 1537 HFC_outb(hc, R_IRQMSK_MISC, hc->hw.r_irqmsk_misc);
1483 if (debug & DEBUG_HFCMULTI_INIT) 1538 if (debug & DEBUG_HFCMULTI_INIT)
@@ -1817,8 +1872,8 @@ hfcmulti_dtmf(struct hfc_multi *hc)
1817 coeff[(co<<1)|1] = mantissa; 1872 coeff[(co<<1)|1] = mantissa;
1818 } 1873 }
1819 if (debug & DEBUG_HFCMULTI_DTMF) 1874 if (debug & DEBUG_HFCMULTI_DTMF)
1820 printk("%s: DTMF ready %08x %08x %08x %08x " 1875 printk(" DTMF ready %08x %08x %08x %08x "
1821 "%08x %08x %08x %08x\n", __func__, 1876 "%08x %08x %08x %08x\n",
1822 coeff[0], coeff[1], coeff[2], coeff[3], 1877 coeff[0], coeff[1], coeff[2], coeff[3],
1823 coeff[4], coeff[5], coeff[6], coeff[7]); 1878 coeff[4], coeff[5], coeff[6], coeff[7]);
1824 hc->chan[ch].coeff_count++; 1879 hc->chan[ch].coeff_count++;
@@ -1826,7 +1881,7 @@ hfcmulti_dtmf(struct hfc_multi *hc)
1826 hc->chan[ch].coeff_count = 0; 1881 hc->chan[ch].coeff_count = 0;
1827 skb = mI_alloc_skb(512, GFP_ATOMIC); 1882 skb = mI_alloc_skb(512, GFP_ATOMIC);
1828 if (!skb) { 1883 if (!skb) {
1829 printk(KERN_WARNING "%s: No memory for skb\n", 1884 printk(KERN_DEBUG "%s: No memory for skb\n",
1830 __func__); 1885 __func__);
1831 continue; 1886 continue;
1832 } 1887 }
@@ -1929,7 +1984,7 @@ next_frame:
1929 Fspace = 1; 1984 Fspace = 1;
1930 } 1985 }
1931 /* one frame only for ST D-channels, to allow resending */ 1986 /* one frame only for ST D-channels, to allow resending */
1932 if (hc->type != 1 && dch) { 1987 if (hc->ctype != HFC_TYPE_E1 && dch) {
1933 if (f1 != f2) 1988 if (f1 != f2)
1934 Fspace = 0; 1989 Fspace = 0;
1935 } 1990 }
@@ -1945,6 +2000,9 @@ next_frame:
1945 "%d!=%d\n", __func__, hc->id + 1, temp, z2); 2000 "%d!=%d\n", __func__, hc->id + 1, temp, z2);
1946 z2 = temp; /* repeat unti Z2 is equal */ 2001 z2 = temp; /* repeat unti Z2 is equal */
1947 } 2002 }
2003 hc->chan[ch].Zfill = z1 - z2;
2004 if (hc->chan[ch].Zfill < 0)
2005 hc->chan[ch].Zfill += hc->Zlen;
1948 Zspace = z2 - z1; 2006 Zspace = z2 - z1;
1949 if (Zspace <= 0) 2007 if (Zspace <= 0)
1950 Zspace += hc->Zlen; 2008 Zspace += hc->Zlen;
@@ -1968,12 +2026,22 @@ next_frame:
1968 "slot_tx %d\n", 2026 "slot_tx %d\n",
1969 __func__, ch, slot_tx); 2027 __func__, ch, slot_tx);
1970 /* connect slot */ 2028 /* connect slot */
1971 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | 2029 if (hc->ctype == HFC_TYPE_XHFC)
1972 V_HDLC_TRP | V_IFF); 2030 HFC_outb(hc, A_CON_HDLC, 0xc0
2031 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2032 /* Enable FIFO, no interrupt */
2033 else
2034 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 |
2035 V_HDLC_TRP | V_IFF);
1973 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1); 2036 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1);
1974 HFC_wait_nodebug(hc); 2037 HFC_wait_nodebug(hc);
1975 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 | 2038 if (hc->ctype == HFC_TYPE_XHFC)
1976 V_HDLC_TRP | V_IFF); 2039 HFC_outb(hc, A_CON_HDLC, 0xc0
2040 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2041 /* Enable FIFO, no interrupt */
2042 else
2043 HFC_outb(hc, A_CON_HDLC, 0xc0 | 0x00 |
2044 V_HDLC_TRP | V_IFF);
1977 HFC_outb_nodebug(hc, R_FIFO, ch<<1); 2045 HFC_outb_nodebug(hc, R_FIFO, ch<<1);
1978 HFC_wait_nodebug(hc); 2046 HFC_wait_nodebug(hc);
1979 } 2047 }
@@ -2001,10 +2069,22 @@ next_frame:
2001 "FIFO data: channel %d slot_tx %d\n", 2069 "FIFO data: channel %d slot_tx %d\n",
2002 __func__, ch, slot_tx); 2070 __func__, ch, slot_tx);
2003 /* disconnect slot */ 2071 /* disconnect slot */
2004 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | V_HDLC_TRP | V_IFF); 2072 if (hc->ctype == HFC_TYPE_XHFC)
2073 HFC_outb(hc, A_CON_HDLC, 0x80
2074 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2075 /* Enable FIFO, no interrupt */
2076 else
2077 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 |
2078 V_HDLC_TRP | V_IFF);
2005 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1); 2079 HFC_outb_nodebug(hc, R_FIFO, ch<<1 | 1);
2006 HFC_wait_nodebug(hc); 2080 HFC_wait_nodebug(hc);
2007 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 | V_HDLC_TRP | V_IFF); 2081 if (hc->ctype == HFC_TYPE_XHFC)
2082 HFC_outb(hc, A_CON_HDLC, 0x80
2083 | 0x07 << 2 | V_HDLC_TRP | V_IFF);
2084 /* Enable FIFO, no interrupt */
2085 else
2086 HFC_outb(hc, A_CON_HDLC, 0x80 | 0x00 |
2087 V_HDLC_TRP | V_IFF);
2008 HFC_outb_nodebug(hc, R_FIFO, ch<<1); 2088 HFC_outb_nodebug(hc, R_FIFO, ch<<1);
2009 HFC_wait_nodebug(hc); 2089 HFC_wait_nodebug(hc);
2010 } 2090 }
@@ -2027,10 +2107,11 @@ next_frame:
2027 printk(KERN_DEBUG "%s(card %d): fifo(%d) has %d bytes space " 2107 printk(KERN_DEBUG "%s(card %d): fifo(%d) has %d bytes space "
2028 "left (z1=%04x, z2=%04x) sending %d of %d bytes %s\n", 2108 "left (z1=%04x, z2=%04x) sending %d of %d bytes %s\n",
2029 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i, 2109 __func__, hc->id + 1, ch, Zspace, z1, z2, ii-i, len-i,
2030 temp ? "HDLC":"TRANS"); 2110 temp ? "HDLC" : "TRANS");
2031 2111
2032 /* Have to prep the audio data */ 2112 /* Have to prep the audio data */
2033 hc->write_fifo(hc, d, ii - i); 2113 hc->write_fifo(hc, d, ii - i);
2114 hc->chan[ch].Zfill += ii - i;
2034 *idxp = ii; 2115 *idxp = ii;
2035 2116
2036 /* if not all data has been written */ 2117 /* if not all data has been written */
@@ -2226,7 +2307,7 @@ next_frame:
2226 if (dch) 2307 if (dch)
2227 recv_Dchannel(dch); 2308 recv_Dchannel(dch);
2228 else 2309 else
2229 recv_Bchannel(bch); 2310 recv_Bchannel(bch, MISDN_ID_ANY);
2230 *sp = skb; 2311 *sp = skb;
2231 again++; 2312 again++;
2232 goto next_frame; 2313 goto next_frame;
@@ -2258,7 +2339,7 @@ next_frame:
2258 "(z1=%04x, z2=%04x) TRANS\n", 2339 "(z1=%04x, z2=%04x) TRANS\n",
2259 __func__, hc->id + 1, ch, Zsize, z1, z2); 2340 __func__, hc->id + 1, ch, Zsize, z1, z2);
2260 /* only bch is transparent */ 2341 /* only bch is transparent */
2261 recv_Bchannel(bch); 2342 recv_Bchannel(bch, hc->chan[ch].Zfill);
2262 *sp = skb; 2343 *sp = skb;
2263 } 2344 }
2264} 2345}
@@ -2323,7 +2404,7 @@ handle_timer_irq(struct hfc_multi *hc)
2323 spin_unlock_irqrestore(&HFClock, flags); 2404 spin_unlock_irqrestore(&HFClock, flags);
2324 } 2405 }
2325 2406
2326 if (hc->type != 1 || hc->e1_state == 1) 2407 if (hc->ctype != HFC_TYPE_E1 || hc->e1_state == 1)
2327 for (ch = 0; ch <= 31; ch++) { 2408 for (ch = 0; ch <= 31; ch++) {
2328 if (hc->created[hc->chan[ch].port]) { 2409 if (hc->created[hc->chan[ch].port]) {
2329 hfcmulti_tx(hc, ch); 2410 hfcmulti_tx(hc, ch);
@@ -2346,7 +2427,7 @@ handle_timer_irq(struct hfc_multi *hc)
2346 } 2427 }
2347 } 2428 }
2348 } 2429 }
2349 if (hc->type == 1 && hc->created[0]) { 2430 if (hc->ctype == HFC_TYPE_E1 && hc->created[0]) {
2350 dch = hc->chan[hc->dslot].dch; 2431 dch = hc->chan[hc->dslot].dch;
2351 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dslot].cfg)) { 2432 if (test_bit(HFC_CFG_REPORT_LOS, &hc->chan[hc->dslot].cfg)) {
2352 /* LOS */ 2433 /* LOS */
@@ -2606,7 +2687,10 @@ hfcmulti_interrupt(int intno, void *dev_id)
2606 "card %d, this is no bug.\n", hc->id + 1, irqsem); 2687 "card %d, this is no bug.\n", hc->id + 1, irqsem);
2607 irqsem = hc->id + 1; 2688 irqsem = hc->id + 1;
2608#endif 2689#endif
2609 2690#ifdef CONFIG_MISDN_HFCMULTI_8xx
2691 if (hc->immap->im_cpm.cp_pbdat & hc->pb_irqmsk)
2692 goto irq_notforus;
2693#endif
2610 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 2694 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
2611 spin_lock_irqsave(&plx_lock, flags); 2695 spin_lock_irqsave(&plx_lock, flags);
2612 plx_acc = hc->plx_membase + PLX_INTCSR; 2696 plx_acc = hc->plx_membase + PLX_INTCSR;
@@ -2646,7 +2730,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2646 } 2730 }
2647 hc->irqcnt++; 2731 hc->irqcnt++;
2648 if (r_irq_statech) { 2732 if (r_irq_statech) {
2649 if (hc->type != 1) 2733 if (hc->ctype != HFC_TYPE_E1)
2650 ph_state_irq(hc, r_irq_statech); 2734 ph_state_irq(hc, r_irq_statech);
2651 } 2735 }
2652 if (status & V_EXT_IRQSTA) 2736 if (status & V_EXT_IRQSTA)
@@ -2660,7 +2744,7 @@ hfcmulti_interrupt(int intno, void *dev_id)
2660 r_irq_misc = HFC_inb_nodebug(hc, R_IRQ_MISC); 2744 r_irq_misc = HFC_inb_nodebug(hc, R_IRQ_MISC);
2661 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */ 2745 r_irq_misc &= hc->hw.r_irqmsk_misc; /* ignore disabled irqs */
2662 if (r_irq_misc & V_STA_IRQ) { 2746 if (r_irq_misc & V_STA_IRQ) {
2663 if (hc->type == 1) { 2747 if (hc->ctype == HFC_TYPE_E1) {
2664 /* state machine */ 2748 /* state machine */
2665 dch = hc->chan[hc->dslot].dch; 2749 dch = hc->chan[hc->dslot].dch;
2666 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA); 2750 e1_syncsta = HFC_inb_nodebug(hc, R_SYNC_STA);
@@ -2699,13 +2783,13 @@ hfcmulti_interrupt(int intno, void *dev_id)
2699 handle_timer_irq(hc); 2783 handle_timer_irq(hc);
2700 } 2784 }
2701 2785
2702 if (r_irq_misc & V_DTMF_IRQ) { 2786 if (r_irq_misc & V_DTMF_IRQ)
2703 hfcmulti_dtmf(hc); 2787 hfcmulti_dtmf(hc);
2704 } 2788
2705 if (r_irq_misc & V_IRQ_PROC) { 2789 if (r_irq_misc & V_IRQ_PROC) {
2706 static int irq_proc_cnt; 2790 static int irq_proc_cnt;
2707 if (!irq_proc_cnt++) 2791 if (!irq_proc_cnt++)
2708 printk(KERN_WARNING "%s: got V_IRQ_PROC -" 2792 printk(KERN_DEBUG "%s: got V_IRQ_PROC -"
2709 " this should not happen\n", __func__); 2793 " this should not happen\n", __func__);
2710 } 2794 }
2711 2795
@@ -2782,7 +2866,8 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2782 if (hc->slot_owner[oslot_tx<<1] == ch) { 2866 if (hc->slot_owner[oslot_tx<<1] == ch) {
2783 HFC_outb(hc, R_SLOT, oslot_tx << 1); 2867 HFC_outb(hc, R_SLOT, oslot_tx << 1);
2784 HFC_outb(hc, A_SL_CFG, 0); 2868 HFC_outb(hc, A_SL_CFG, 0);
2785 HFC_outb(hc, A_CONF, 0); 2869 if (hc->ctype != HFC_TYPE_XHFC)
2870 HFC_outb(hc, A_CONF, 0);
2786 hc->slot_owner[oslot_tx<<1] = -1; 2871 hc->slot_owner[oslot_tx<<1] = -1;
2787 } else { 2872 } else {
2788 if (debug & DEBUG_HFCMULTI_MODE) 2873 if (debug & DEBUG_HFCMULTI_MODE)
@@ -2835,7 +2920,9 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2835 flow_tx, routing, conf); 2920 flow_tx, routing, conf);
2836 HFC_outb(hc, R_SLOT, slot_tx << 1); 2921 HFC_outb(hc, R_SLOT, slot_tx << 1);
2837 HFC_outb(hc, A_SL_CFG, (ch<<1) | routing); 2922 HFC_outb(hc, A_SL_CFG, (ch<<1) | routing);
2838 HFC_outb(hc, A_CONF, (conf < 0) ? 0 : (conf | V_CONF_SL)); 2923 if (hc->ctype != HFC_TYPE_XHFC)
2924 HFC_outb(hc, A_CONF,
2925 (conf < 0) ? 0 : (conf | V_CONF_SL));
2839 hc->slot_owner[slot_tx << 1] = ch; 2926 hc->slot_owner[slot_tx << 1] = ch;
2840 hc->chan[ch].slot_tx = slot_tx; 2927 hc->chan[ch].slot_tx = slot_tx;
2841 hc->chan[ch].bank_tx = bank_tx; 2928 hc->chan[ch].bank_tx = bank_tx;
@@ -2852,7 +2939,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2852 else 2939 else
2853 flow_rx = 0xc0; /* ST->(FIFO,PCM) */ 2940 flow_rx = 0xc0; /* ST->(FIFO,PCM) */
2854 /* put on slot */ 2941 /* put on slot */
2855 routing = bank_rx?0x80:0xc0; /* reversed */ 2942 routing = bank_rx ? 0x80 : 0xc0; /* reversed */
2856 if (conf >= 0 || bank_rx > 1) 2943 if (conf >= 0 || bank_rx > 1)
2857 routing = 0x40; /* loop */ 2944 routing = 0x40; /* loop */
2858 if (debug & DEBUG_HFCMULTI_MODE) 2945 if (debug & DEBUG_HFCMULTI_MODE)
@@ -2885,9 +2972,9 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2885 HFC_outb(hc, A_IRQ_MSK, 0); 2972 HFC_outb(hc, A_IRQ_MSK, 0);
2886 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 2973 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
2887 HFC_wait(hc); 2974 HFC_wait(hc);
2888 if (hc->chan[ch].bch && hc->type != 1) { 2975 if (hc->chan[ch].bch && hc->ctype != HFC_TYPE_E1) {
2889 hc->hw.a_st_ctrl0[hc->chan[ch].port] &= 2976 hc->hw.a_st_ctrl0[hc->chan[ch].port] &=
2890 ((ch & 0x3) == 0)? ~V_B1_EN: ~V_B2_EN; 2977 ((ch & 0x3) == 0) ? ~V_B1_EN : ~V_B2_EN;
2891 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 2978 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
2892 /* undocumented: delay after R_ST_SEL */ 2979 /* undocumented: delay after R_ST_SEL */
2893 udelay(1); 2980 udelay(1);
@@ -2961,8 +3048,13 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2961 /* enable TX fifo */ 3048 /* enable TX fifo */
2962 HFC_outb(hc, R_FIFO, ch << 1); 3049 HFC_outb(hc, R_FIFO, ch << 1);
2963 HFC_wait(hc); 3050 HFC_wait(hc);
2964 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 | 3051 if (hc->ctype == HFC_TYPE_XHFC)
2965 V_HDLC_TRP | V_IFF); 3052 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x07 << 2 |
3053 V_HDLC_TRP | V_IFF);
3054 /* Enable FIFO, no interrupt */
3055 else
3056 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x00 |
3057 V_HDLC_TRP | V_IFF);
2966 HFC_outb(hc, A_SUBCH_CFG, 0); 3058 HFC_outb(hc, A_SUBCH_CFG, 0);
2967 HFC_outb(hc, A_IRQ_MSK, 0); 3059 HFC_outb(hc, A_IRQ_MSK, 0);
2968 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3060 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
@@ -2972,13 +3064,19 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2972 /* enable RX fifo */ 3064 /* enable RX fifo */
2973 HFC_outb(hc, R_FIFO, (ch<<1)|1); 3065 HFC_outb(hc, R_FIFO, (ch<<1)|1);
2974 HFC_wait(hc); 3066 HFC_wait(hc);
2975 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 | V_HDLC_TRP); 3067 if (hc->ctype == HFC_TYPE_XHFC)
3068 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x07 << 2 |
3069 V_HDLC_TRP);
3070 /* Enable FIFO, no interrupt*/
3071 else
3072 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x00 |
3073 V_HDLC_TRP);
2976 HFC_outb(hc, A_SUBCH_CFG, 0); 3074 HFC_outb(hc, A_SUBCH_CFG, 0);
2977 HFC_outb(hc, A_IRQ_MSK, 0); 3075 HFC_outb(hc, A_IRQ_MSK, 0);
2978 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F); 3076 HFC_outb(hc, R_INC_RES_FIFO, V_RES_F);
2979 HFC_wait(hc); 3077 HFC_wait(hc);
2980 } 3078 }
2981 if (hc->type != 1) { 3079 if (hc->ctype != HFC_TYPE_E1) {
2982 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= 3080 hc->hw.a_st_ctrl0[hc->chan[ch].port] |=
2983 ((ch & 0x3) == 0) ? V_B1_EN : V_B2_EN; 3081 ((ch & 0x3) == 0) ? V_B1_EN : V_B2_EN;
2984 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 3082 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
@@ -2999,7 +3097,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
2999 /* enable TX fifo */ 3097 /* enable TX fifo */
3000 HFC_outb(hc, R_FIFO, ch<<1); 3098 HFC_outb(hc, R_FIFO, ch<<1);
3001 HFC_wait(hc); 3099 HFC_wait(hc);
3002 if (hc->type == 1 || hc->chan[ch].bch) { 3100 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch) {
3003 /* E1 or B-channel */ 3101 /* E1 or B-channel */
3004 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04); 3102 HFC_outb(hc, A_CON_HDLC, flow_tx | 0x04);
3005 HFC_outb(hc, A_SUBCH_CFG, 0); 3103 HFC_outb(hc, A_SUBCH_CFG, 0);
@@ -3015,7 +3113,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3015 HFC_outb(hc, R_FIFO, (ch<<1)|1); 3113 HFC_outb(hc, R_FIFO, (ch<<1)|1);
3016 HFC_wait(hc); 3114 HFC_wait(hc);
3017 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04); 3115 HFC_outb(hc, A_CON_HDLC, flow_rx | 0x04);
3018 if (hc->type == 1 || hc->chan[ch].bch) 3116 if (hc->ctype == HFC_TYPE_E1 || hc->chan[ch].bch)
3019 HFC_outb(hc, A_SUBCH_CFG, 0); /* full 8 bits */ 3117 HFC_outb(hc, A_SUBCH_CFG, 0); /* full 8 bits */
3020 else 3118 else
3021 HFC_outb(hc, A_SUBCH_CFG, 2); /* 2 bits dchannel */ 3119 HFC_outb(hc, A_SUBCH_CFG, 2); /* 2 bits dchannel */
@@ -3024,7 +3122,7 @@ mode_hfcmulti(struct hfc_multi *hc, int ch, int protocol, int slot_tx,
3024 HFC_wait(hc); 3122 HFC_wait(hc);
3025 if (hc->chan[ch].bch) { 3123 if (hc->chan[ch].bch) {
3026 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags); 3124 test_and_set_bit(FLG_HDLC, &hc->chan[ch].bch->Flags);
3027 if (hc->type != 1) { 3125 if (hc->ctype != HFC_TYPE_E1) {
3028 hc->hw.a_st_ctrl0[hc->chan[ch].port] |= 3126 hc->hw.a_st_ctrl0[hc->chan[ch].port] |=
3029 ((ch&0x3) == 0) ? V_B1_EN : V_B2_EN; 3127 ((ch&0x3) == 0) ? V_B1_EN : V_B2_EN;
3030 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port); 3128 HFC_outb(hc, R_ST_SEL, hc->chan[ch].port);
@@ -3104,7 +3202,7 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3104 case HW_RESET_REQ: 3202 case HW_RESET_REQ:
3105 /* start activation */ 3203 /* start activation */
3106 spin_lock_irqsave(&hc->lock, flags); 3204 spin_lock_irqsave(&hc->lock, flags);
3107 if (hc->type == 1) { 3205 if (hc->ctype == HFC_TYPE_E1) {
3108 if (debug & DEBUG_HFCMULTI_MSG) 3206 if (debug & DEBUG_HFCMULTI_MSG)
3109 printk(KERN_DEBUG 3207 printk(KERN_DEBUG
3110 "%s: HW_RESET_REQ no BRI\n", 3208 "%s: HW_RESET_REQ no BRI\n",
@@ -3125,7 +3223,7 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3125 case HW_DEACT_REQ: 3223 case HW_DEACT_REQ:
3126 /* start deactivation */ 3224 /* start deactivation */
3127 spin_lock_irqsave(&hc->lock, flags); 3225 spin_lock_irqsave(&hc->lock, flags);
3128 if (hc->type == 1) { 3226 if (hc->ctype == HFC_TYPE_E1) {
3129 if (debug & DEBUG_HFCMULTI_MSG) 3227 if (debug & DEBUG_HFCMULTI_MSG)
3130 printk(KERN_DEBUG 3228 printk(KERN_DEBUG
3131 "%s: HW_DEACT_REQ no BRI\n", 3229 "%s: HW_DEACT_REQ no BRI\n",
@@ -3159,7 +3257,7 @@ hfcm_l1callback(struct dchannel *dch, u_int cmd)
3159 break; 3257 break;
3160 case HW_POWERUP_REQ: 3258 case HW_POWERUP_REQ:
3161 spin_lock_irqsave(&hc->lock, flags); 3259 spin_lock_irqsave(&hc->lock, flags);
3162 if (hc->type == 1) { 3260 if (hc->ctype == HFC_TYPE_E1) {
3163 if (debug & DEBUG_HFCMULTI_MSG) 3261 if (debug & DEBUG_HFCMULTI_MSG)
3164 printk(KERN_DEBUG 3262 printk(KERN_DEBUG
3165 "%s: HW_POWERUP_REQ no BRI\n", 3263 "%s: HW_POWERUP_REQ no BRI\n",
@@ -3236,7 +3334,7 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3236 __func__, hc->chan[dch->slot].port, 3334 __func__, hc->chan[dch->slot].port,
3237 hc->ports-1); 3335 hc->ports-1);
3238 /* start activation */ 3336 /* start activation */
3239 if (hc->type == 1) { 3337 if (hc->ctype == HFC_TYPE_E1) {
3240 ph_state_change(dch); 3338 ph_state_change(dch);
3241 if (debug & DEBUG_HFCMULTI_STATE) 3339 if (debug & DEBUG_HFCMULTI_STATE)
3242 printk(KERN_DEBUG 3340 printk(KERN_DEBUG
@@ -3269,7 +3367,7 @@ handle_dmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3269 __func__, hc->chan[dch->slot].port, 3367 __func__, hc->chan[dch->slot].port,
3270 hc->ports-1); 3368 hc->ports-1);
3271 /* start deactivation */ 3369 /* start deactivation */
3272 if (hc->type == 1) { 3370 if (hc->ctype == HFC_TYPE_E1) {
3273 if (debug & DEBUG_HFCMULTI_MSG) 3371 if (debug & DEBUG_HFCMULTI_MSG)
3274 printk(KERN_DEBUG 3372 printk(KERN_DEBUG
3275 "%s: PH_DEACTIVATE no BRI\n", 3373 "%s: PH_DEACTIVATE no BRI\n",
@@ -3410,9 +3508,9 @@ handle_bmsg(struct mISDNchannel *ch, struct sk_buff *skb)
3410 switch (hh->id) { 3508 switch (hh->id) {
3411 case HFC_SPL_LOOP_ON: /* set sample loop */ 3509 case HFC_SPL_LOOP_ON: /* set sample loop */
3412 if (debug & DEBUG_HFCMULTI_MSG) 3510 if (debug & DEBUG_HFCMULTI_MSG)
3413 printk(KERN_DEBUG 3511 printk(KERN_DEBUG
3414 "%s: HFC_SPL_LOOP_ON (len = %d)\n", 3512 "%s: HFC_SPL_LOOP_ON (len = %d)\n",
3415 __func__, skb->len); 3513 __func__, skb->len);
3416 ret = 0; 3514 ret = 0;
3417 break; 3515 break;
3418 case HFC_SPL_LOOP_OFF: /* set silence */ 3516 case HFC_SPL_LOOP_OFF: /* set silence */
@@ -3489,6 +3587,8 @@ channel_bctrl(struct bchannel *bch, struct mISDN_ctrl_req *cq)
3489 features->hfc_id = hc->id; 3587 features->hfc_id = hc->id;
3490 if (test_bit(HFC_CHIP_DTMF, &hc->chip)) 3588 if (test_bit(HFC_CHIP_DTMF, &hc->chip))
3491 features->hfc_dtmf = 1; 3589 features->hfc_dtmf = 1;
3590 if (test_bit(HFC_CHIP_CONF, &hc->chip))
3591 features->hfc_conf = 1;
3492 features->hfc_loops = 0; 3592 features->hfc_loops = 0;
3493 if (test_bit(HFC_CHIP_B410P, &hc->chip)) { 3593 if (test_bit(HFC_CHIP_B410P, &hc->chip)) {
3494 features->hfc_echocanhw = 1; 3594 features->hfc_echocanhw = 1;
@@ -3619,14 +3719,13 @@ ph_state_change(struct dchannel *dch)
3619 int ch, i; 3719 int ch, i;
3620 3720
3621 if (!dch) { 3721 if (!dch) {
3622 printk(KERN_WARNING "%s: ERROR given dch is NULL\n", 3722 printk(KERN_WARNING "%s: ERROR given dch is NULL\n", __func__);
3623 __func__);
3624 return; 3723 return;
3625 } 3724 }
3626 hc = dch->hw; 3725 hc = dch->hw;
3627 ch = dch->slot; 3726 ch = dch->slot;
3628 3727
3629 if (hc->type == 1) { 3728 if (hc->ctype == HFC_TYPE_E1) {
3630 if (dch->dev.D.protocol == ISDN_P_TE_E1) { 3729 if (dch->dev.D.protocol == ISDN_P_TE_E1) {
3631 if (debug & DEBUG_HFCMULTI_STATE) 3730 if (debug & DEBUG_HFCMULTI_STATE)
3632 printk(KERN_DEBUG 3731 printk(KERN_DEBUG
@@ -3641,14 +3740,15 @@ ph_state_change(struct dchannel *dch)
3641 switch (dch->state) { 3740 switch (dch->state) {
3642 case (1): 3741 case (1):
3643 if (hc->e1_state != 1) { 3742 if (hc->e1_state != 1) {
3644 for (i = 1; i <= 31; i++) { 3743 for (i = 1; i <= 31; i++) {
3645 /* reset fifos on e1 activation */ 3744 /* reset fifos on e1 activation */
3646 HFC_outb_nodebug(hc, R_FIFO, (i << 1) | 1); 3745 HFC_outb_nodebug(hc, R_FIFO,
3647 HFC_wait_nodebug(hc); 3746 (i << 1) | 1);
3648 HFC_outb_nodebug(hc, 3747 HFC_wait_nodebug(hc);
3649 R_INC_RES_FIFO, V_RES_F); 3748 HFC_outb_nodebug(hc, R_INC_RES_FIFO,
3650 HFC_wait_nodebug(hc); 3749 V_RES_F);
3651 } 3750 HFC_wait_nodebug(hc);
3751 }
3652 } 3752 }
3653 test_and_set_bit(FLG_ACTIVE, &dch->Flags); 3753 test_and_set_bit(FLG_ACTIVE, &dch->Flags);
3654 _queue_data(&dch->dev.D, PH_ACTIVATE_IND, 3754 _queue_data(&dch->dev.D, PH_ACTIVATE_IND,
@@ -3751,7 +3851,7 @@ hfcmulti_initmode(struct dchannel *dch)
3751 if (debug & DEBUG_HFCMULTI_INIT) 3851 if (debug & DEBUG_HFCMULTI_INIT)
3752 printk(KERN_DEBUG "%s: entered\n", __func__); 3852 printk(KERN_DEBUG "%s: entered\n", __func__);
3753 3853
3754 if (hc->type == 1) { 3854 if (hc->ctype == HFC_TYPE_E1) {
3755 hc->chan[hc->dslot].slot_tx = -1; 3855 hc->chan[hc->dslot].slot_tx = -1;
3756 hc->chan[hc->dslot].slot_rx = -1; 3856 hc->chan[hc->dslot].slot_rx = -1;
3757 hc->chan[hc->dslot].conf = -1; 3857 hc->chan[hc->dslot].conf = -1;
@@ -3900,6 +4000,11 @@ hfcmulti_initmode(struct dchannel *dch)
3900 } 4000 }
3901 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg)) 4001 if (!test_bit(HFC_CFG_NONCAP_TX, &hc->chan[i].cfg))
3902 hc->hw.a_st_ctrl0[pt] |= V_TX_LI; 4002 hc->hw.a_st_ctrl0[pt] |= V_TX_LI;
4003 if (hc->ctype == HFC_TYPE_XHFC) {
4004 hc->hw.a_st_ctrl0[pt] |= 0x40 /* V_ST_PU_CTRL */;
4005 HFC_outb(hc, 0x35 /* A_ST_CTRL3 */,
4006 0x7c << 1 /* V_ST_PULSE */);
4007 }
3903 /* line setup */ 4008 /* line setup */
3904 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]); 4009 HFC_outb(hc, A_ST_CTRL0, hc->hw.a_st_ctrl0[pt]);
3905 /* disable E-channel */ 4010 /* disable E-channel */
@@ -3943,12 +4048,12 @@ open_dchannel(struct hfc_multi *hc, struct dchannel *dch,
3943 return -EINVAL; 4048 return -EINVAL;
3944 if ((dch->dev.D.protocol != ISDN_P_NONE) && 4049 if ((dch->dev.D.protocol != ISDN_P_NONE) &&
3945 (dch->dev.D.protocol != rq->protocol)) { 4050 (dch->dev.D.protocol != rq->protocol)) {
3946 if (debug & DEBUG_HFCMULTI_MODE) 4051 if (debug & DEBUG_HFCMULTI_MODE)
3947 printk(KERN_WARNING "%s: change protocol %x to %x\n", 4052 printk(KERN_DEBUG "%s: change protocol %x to %x\n",
3948 __func__, dch->dev.D.protocol, rq->protocol); 4053 __func__, dch->dev.D.protocol, rq->protocol);
3949 } 4054 }
3950 if ((dch->dev.D.protocol == ISDN_P_TE_S0) 4055 if ((dch->dev.D.protocol == ISDN_P_TE_S0) &&
3951 && (rq->protocol != ISDN_P_TE_S0)) 4056 (rq->protocol != ISDN_P_TE_S0))
3952 l1_event(dch->l1, CLOSE_CHANNEL); 4057 l1_event(dch->l1, CLOSE_CHANNEL);
3953 if (dch->dev.D.protocol != rq->protocol) { 4058 if (dch->dev.D.protocol != rq->protocol) {
3954 if (rq->protocol == ISDN_P_TE_S0) { 4059 if (rq->protocol == ISDN_P_TE_S0) {
@@ -3986,7 +4091,7 @@ open_bchannel(struct hfc_multi *hc, struct dchannel *dch,
3986 return -EINVAL; 4091 return -EINVAL;
3987 if (rq->protocol == ISDN_P_NONE) 4092 if (rq->protocol == ISDN_P_NONE)
3988 return -EINVAL; 4093 return -EINVAL;
3989 if (hc->type == 1) 4094 if (hc->ctype == HFC_TYPE_E1)
3990 ch = rq->adr.channel; 4095 ch = rq->adr.channel;
3991 else 4096 else
3992 ch = (rq->adr.channel - 1) + (dch->slot - 2); 4097 ch = (rq->adr.channel - 1) + (dch->slot - 2);
@@ -4013,11 +4118,41 @@ open_bchannel(struct hfc_multi *hc, struct dchannel *dch,
4013static int 4118static int
4014channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq) 4119channel_dctrl(struct dchannel *dch, struct mISDN_ctrl_req *cq)
4015{ 4120{
4121 struct hfc_multi *hc = dch->hw;
4016 int ret = 0; 4122 int ret = 0;
4123 int wd_mode, wd_cnt;
4017 4124
4018 switch (cq->op) { 4125 switch (cq->op) {
4019 case MISDN_CTRL_GETOP: 4126 case MISDN_CTRL_GETOP:
4020 cq->op = 0; 4127 cq->op = MISDN_CTRL_HFC_OP;
4128 break;
4129 case MISDN_CTRL_HFC_WD_INIT: /* init the watchdog */
4130 wd_cnt = cq->p1 & 0xf;
4131 wd_mode = !!(cq->p1 >> 4);
4132 if (debug & DEBUG_HFCMULTI_MSG)
4133 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_INIT mode %s"
4134 ", counter 0x%x\n", __func__,
4135 wd_mode ? "AUTO" : "MANUAL", wd_cnt);
4136 /* set the watchdog timer */
4137 HFC_outb(hc, R_TI_WD, poll_timer | (wd_cnt << 4));
4138 hc->hw.r_bert_wd_md = (wd_mode ? V_AUTO_WD_RES : 0);
4139 if (hc->ctype == HFC_TYPE_XHFC)
4140 hc->hw.r_bert_wd_md |= 0x40 /* V_WD_EN */;
4141 /* init the watchdog register and reset the counter */
4142 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES);
4143 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
4144 /* enable the watchdog output for Speech-Design */
4145 HFC_outb(hc, R_GPIO_SEL, V_GPIO_SEL7);
4146 HFC_outb(hc, R_GPIO_EN1, V_GPIO_EN15);
4147 HFC_outb(hc, R_GPIO_OUT1, 0);
4148 HFC_outb(hc, R_GPIO_OUT1, V_GPIO_OUT15);
4149 }
4150 break;
4151 case MISDN_CTRL_HFC_WD_RESET: /* reset the watchdog counter */
4152 if (debug & DEBUG_HFCMULTI_MSG)
4153 printk(KERN_DEBUG "%s: MISDN_CTRL_HFC_WD_RESET\n",
4154 __func__);
4155 HFC_outb(hc, R_BERT_WD_MD, hc->hw.r_bert_wd_md | V_WD_RES);
4021 break; 4156 break;
4022 default: 4157 default:
4023 printk(KERN_WARNING "%s: unknown Op %x\n", 4158 printk(KERN_WARNING "%s: unknown Op %x\n",
@@ -4047,7 +4182,7 @@ hfcm_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
4047 switch (rq->protocol) { 4182 switch (rq->protocol) {
4048 case ISDN_P_TE_S0: 4183 case ISDN_P_TE_S0:
4049 case ISDN_P_NT_S0: 4184 case ISDN_P_NT_S0:
4050 if (hc->type == 1) { 4185 if (hc->ctype == HFC_TYPE_E1) {
4051 err = -EINVAL; 4186 err = -EINVAL;
4052 break; 4187 break;
4053 } 4188 }
@@ -4055,7 +4190,7 @@ hfcm_dctrl(struct mISDNchannel *ch, u_int cmd, void *arg)
4055 break; 4190 break;
4056 case ISDN_P_TE_E1: 4191 case ISDN_P_TE_E1:
4057 case ISDN_P_NT_E1: 4192 case ISDN_P_NT_E1:
4058 if (hc->type != 1) { 4193 if (hc->ctype != HFC_TYPE_E1) {
4059 err = -EINVAL; 4194 err = -EINVAL;
4060 break; 4195 break;
4061 } 4196 }
@@ -4122,13 +4257,13 @@ init_card(struct hfc_multi *hc)
4122 disable_hwirq(hc); 4257 disable_hwirq(hc);
4123 spin_unlock_irqrestore(&hc->lock, flags); 4258 spin_unlock_irqrestore(&hc->lock, flags);
4124 4259
4125 if (request_irq(hc->pci_dev->irq, hfcmulti_interrupt, IRQF_SHARED, 4260 if (request_irq(hc->irq, hfcmulti_interrupt, IRQF_SHARED,
4126 "HFC-multi", hc)) { 4261 "HFC-multi", hc)) {
4127 printk(KERN_WARNING "mISDN: Could not get interrupt %d.\n", 4262 printk(KERN_WARNING "mISDN: Could not get interrupt %d.\n",
4128 hc->pci_dev->irq); 4263 hc->irq);
4264 hc->irq = 0;
4129 return -EIO; 4265 return -EIO;
4130 } 4266 }
4131 hc->irq = hc->pci_dev->irq;
4132 4267
4133 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 4268 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
4134 spin_lock_irqsave(&plx_lock, plx_flags); 4269 spin_lock_irqsave(&plx_lock, plx_flags);
@@ -4187,7 +4322,7 @@ error:
4187 } 4322 }
4188 4323
4189 if (debug & DEBUG_HFCMULTI_INIT) 4324 if (debug & DEBUG_HFCMULTI_INIT)
4190 printk(KERN_WARNING "%s: free irq %d\n", __func__, hc->irq); 4325 printk(KERN_DEBUG "%s: free irq %d\n", __func__, hc->irq);
4191 if (hc->irq) { 4326 if (hc->irq) {
4192 free_irq(hc->irq, hc); 4327 free_irq(hc->irq, hc);
4193 hc->irq = 0; 4328 hc->irq = 0;
@@ -4235,6 +4370,10 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4235 hc->ledstate = 0xAFFEAFFE; 4370 hc->ledstate = 0xAFFEAFFE;
4236 hc->opticalsupport = m->opticalsupport; 4371 hc->opticalsupport = m->opticalsupport;
4237 4372
4373 hc->pci_iobase = 0;
4374 hc->pci_membase = NULL;
4375 hc->plx_membase = NULL;
4376
4238 /* set memory access methods */ 4377 /* set memory access methods */
4239 if (m->io_mode) /* use mode from card config */ 4378 if (m->io_mode) /* use mode from card config */
4240 hc->io_mode = m->io_mode; 4379 hc->io_mode = m->io_mode;
@@ -4242,44 +4381,12 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4242 case HFC_IO_MODE_PLXSD: 4381 case HFC_IO_MODE_PLXSD:
4243 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip); 4382 test_and_set_bit(HFC_CHIP_PLXSD, &hc->chip);
4244 hc->slots = 128; /* required */ 4383 hc->slots = 128; /* required */
4245 /* fall through */
4246 case HFC_IO_MODE_PCIMEM:
4247 hc->HFC_outb = HFC_outb_pcimem; 4384 hc->HFC_outb = HFC_outb_pcimem;
4248 hc->HFC_inb = HFC_inb_pcimem; 4385 hc->HFC_inb = HFC_inb_pcimem;
4249 hc->HFC_inw = HFC_inw_pcimem; 4386 hc->HFC_inw = HFC_inw_pcimem;
4250 hc->HFC_wait = HFC_wait_pcimem; 4387 hc->HFC_wait = HFC_wait_pcimem;
4251 hc->read_fifo = read_fifo_pcimem; 4388 hc->read_fifo = read_fifo_pcimem;
4252 hc->write_fifo = write_fifo_pcimem; 4389 hc->write_fifo = write_fifo_pcimem;
4253 break;
4254 case HFC_IO_MODE_REGIO:
4255 hc->HFC_outb = HFC_outb_regio;
4256 hc->HFC_inb = HFC_inb_regio;
4257 hc->HFC_inw = HFC_inw_regio;
4258 hc->HFC_wait = HFC_wait_regio;
4259 hc->read_fifo = read_fifo_regio;
4260 hc->write_fifo = write_fifo_regio;
4261 break;
4262 default:
4263 printk(KERN_WARNING "HFC-multi: Invalid IO mode.\n");
4264 pci_disable_device(hc->pci_dev);
4265 return -EIO;
4266 }
4267 hc->HFC_outb_nodebug = hc->HFC_outb;
4268 hc->HFC_inb_nodebug = hc->HFC_inb;
4269 hc->HFC_inw_nodebug = hc->HFC_inw;
4270 hc->HFC_wait_nodebug = hc->HFC_wait;
4271#ifdef HFC_REGISTER_DEBUG
4272 hc->HFC_outb = HFC_outb_debug;
4273 hc->HFC_inb = HFC_inb_debug;
4274 hc->HFC_inw = HFC_inw_debug;
4275 hc->HFC_wait = HFC_wait_debug;
4276#endif
4277 hc->pci_iobase = 0;
4278 hc->pci_membase = NULL;
4279 hc->plx_membase = NULL;
4280
4281 switch (hc->io_mode) {
4282 case HFC_IO_MODE_PLXSD:
4283 hc->plx_origmembase = hc->pci_dev->resource[0].start; 4390 hc->plx_origmembase = hc->pci_dev->resource[0].start;
4284 /* MEMBASE 1 is PLX PCI Bridge */ 4391 /* MEMBASE 1 is PLX PCI Bridge */
4285 4392
@@ -4327,6 +4434,12 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4327 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); 4434 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO);
4328 break; 4435 break;
4329 case HFC_IO_MODE_PCIMEM: 4436 case HFC_IO_MODE_PCIMEM:
4437 hc->HFC_outb = HFC_outb_pcimem;
4438 hc->HFC_inb = HFC_inb_pcimem;
4439 hc->HFC_inw = HFC_inw_pcimem;
4440 hc->HFC_wait = HFC_wait_pcimem;
4441 hc->read_fifo = read_fifo_pcimem;
4442 hc->write_fifo = write_fifo_pcimem;
4330 hc->pci_origmembase = hc->pci_dev->resource[1].start; 4443 hc->pci_origmembase = hc->pci_dev->resource[1].start;
4331 if (!hc->pci_origmembase) { 4444 if (!hc->pci_origmembase) {
4332 printk(KERN_WARNING 4445 printk(KERN_WARNING
@@ -4343,12 +4456,18 @@ setup_pci(struct hfc_multi *hc, struct pci_dev *pdev,
4343 pci_disable_device(hc->pci_dev); 4456 pci_disable_device(hc->pci_dev);
4344 return -EIO; 4457 return -EIO;
4345 } 4458 }
4346 printk(KERN_INFO "card %d: defined at MEMBASE %#lx (%#lx) IRQ %d " 4459 printk(KERN_INFO "card %d: defined at MEMBASE %#lx (%#lx) IRQ "
4347 "HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase, 4460 "%d HZ %d leds-type %d\n", hc->id, (u_long)hc->pci_membase,
4348 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds); 4461 hc->pci_origmembase, hc->pci_dev->irq, HZ, hc->leds);
4349 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO); 4462 pci_write_config_word(hc->pci_dev, PCI_COMMAND, PCI_ENA_MEMIO);
4350 break; 4463 break;
4351 case HFC_IO_MODE_REGIO: 4464 case HFC_IO_MODE_REGIO:
4465 hc->HFC_outb = HFC_outb_regio;
4466 hc->HFC_inb = HFC_inb_regio;
4467 hc->HFC_inw = HFC_inw_regio;
4468 hc->HFC_wait = HFC_wait_regio;
4469 hc->read_fifo = read_fifo_regio;
4470 hc->write_fifo = write_fifo_regio;
4352 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start; 4471 hc->pci_iobase = (u_int) hc->pci_dev->resource[0].start;
4353 if (!hc->pci_iobase) { 4472 if (!hc->pci_iobase) {
4354 printk(KERN_WARNING 4473 printk(KERN_WARNING
@@ -4430,7 +4549,7 @@ release_port(struct hfc_multi *hc, struct dchannel *dch)
4430 dch->timer.function = NULL; 4549 dch->timer.function = NULL;
4431 } 4550 }
4432 4551
4433 if (hc->type == 1) { /* E1 */ 4552 if (hc->ctype == HFC_TYPE_E1) { /* E1 */
4434 /* remove sync */ 4553 /* remove sync */
4435 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) { 4554 if (test_bit(HFC_CHIP_PLXSD, &hc->chip)) {
4436 hc->syncronized = 0; 4555 hc->syncronized = 0;
@@ -4508,7 +4627,7 @@ release_card(struct hfc_multi *hc)
4508 int ch; 4627 int ch;
4509 4628
4510 if (debug & DEBUG_HFCMULTI_INIT) 4629 if (debug & DEBUG_HFCMULTI_INIT)
4511 printk(KERN_WARNING "%s: release card (%d) entered\n", 4630 printk(KERN_DEBUG "%s: release card (%d) entered\n",
4512 __func__, hc->id); 4631 __func__, hc->id);
4513 4632
4514 /* unregister clock source */ 4633 /* unregister clock source */
@@ -4537,7 +4656,7 @@ release_card(struct hfc_multi *hc)
4537 /* release hardware & irq */ 4656 /* release hardware & irq */
4538 if (hc->irq) { 4657 if (hc->irq) {
4539 if (debug & DEBUG_HFCMULTI_INIT) 4658 if (debug & DEBUG_HFCMULTI_INIT)
4540 printk(KERN_WARNING "%s: free irq %d\n", 4659 printk(KERN_DEBUG "%s: free irq %d\n",
4541 __func__, hc->irq); 4660 __func__, hc->irq);
4542 free_irq(hc->irq, hc); 4661 free_irq(hc->irq, hc);
4543 hc->irq = 0; 4662 hc->irq = 0;
@@ -4546,17 +4665,17 @@ release_card(struct hfc_multi *hc)
4546 release_io_hfcmulti(hc); 4665 release_io_hfcmulti(hc);
4547 4666
4548 if (debug & DEBUG_HFCMULTI_INIT) 4667 if (debug & DEBUG_HFCMULTI_INIT)
4549 printk(KERN_WARNING "%s: remove instance from list\n", 4668 printk(KERN_DEBUG "%s: remove instance from list\n",
4550 __func__); 4669 __func__);
4551 list_del(&hc->list); 4670 list_del(&hc->list);
4552 4671
4553 if (debug & DEBUG_HFCMULTI_INIT) 4672 if (debug & DEBUG_HFCMULTI_INIT)
4554 printk(KERN_WARNING "%s: delete instance\n", __func__); 4673 printk(KERN_DEBUG "%s: delete instance\n", __func__);
4555 if (hc == syncmaster) 4674 if (hc == syncmaster)
4556 syncmaster = NULL; 4675 syncmaster = NULL;
4557 kfree(hc); 4676 kfree(hc);
4558 if (debug & DEBUG_HFCMULTI_INIT) 4677 if (debug & DEBUG_HFCMULTI_INIT)
4559 printk(KERN_WARNING "%s: card successfully removed\n", 4678 printk(KERN_DEBUG "%s: card successfully removed\n",
4560 __func__); 4679 __func__);
4561} 4680}
4562 4681
@@ -4579,7 +4698,7 @@ init_e1_port(struct hfc_multi *hc, struct hm_map *m)
4579 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK)); 4698 (1 << (ISDN_P_B_HDLC & ISDN_P_B_MASK));
4580 dch->dev.D.send = handle_dmsg; 4699 dch->dev.D.send = handle_dmsg;
4581 dch->dev.D.ctrl = hfcm_dctrl; 4700 dch->dev.D.ctrl = hfcm_dctrl;
4582 dch->dev.nrbchan = (hc->dslot)?30:31; 4701 dch->dev.nrbchan = (hc->dslot) ? 30 : 31;
4583 dch->slot = hc->dslot; 4702 dch->slot = hc->dslot;
4584 hc->chan[hc->dslot].dch = dch; 4703 hc->chan[hc->dslot].dch = dch;
4585 hc->chan[hc->dslot].port = 0; 4704 hc->chan[hc->dslot].port = 0;
@@ -4821,7 +4940,7 @@ init_multi_port(struct hfc_multi *hc, int pt)
4821 } 4940 }
4822 /* disable E-channel */ 4941 /* disable E-channel */
4823 if (port[Port_cnt] & 0x004) { 4942 if (port[Port_cnt] & 0x004) {
4824 if (debug & DEBUG_HFCMULTI_INIT) 4943 if (debug & DEBUG_HFCMULTI_INIT)
4825 printk(KERN_DEBUG 4944 printk(KERN_DEBUG
4826 "%s: PROTOCOL disable E-channel: " 4945 "%s: PROTOCOL disable E-channel: "
4827 "card(%d) port(%d)\n", 4946 "card(%d) port(%d)\n",
@@ -4829,9 +4948,15 @@ init_multi_port(struct hfc_multi *hc, int pt)
4829 test_and_set_bit(HFC_CFG_DIS_ECHANNEL, 4948 test_and_set_bit(HFC_CFG_DIS_ECHANNEL,
4830 &hc->chan[i + 2].cfg); 4949 &hc->chan[i + 2].cfg);
4831 } 4950 }
4832 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d", 4951 if (hc->ctype == HFC_TYPE_XHFC) {
4833 hc->type, HFC_cnt + 1, pt + 1); 4952 snprintf(name, MISDN_MAX_IDLEN - 1, "xhfc.%d-%d",
4834 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name); 4953 HFC_cnt + 1, pt + 1);
4954 ret = mISDN_register_device(&dch->dev, NULL, name);
4955 } else {
4956 snprintf(name, MISDN_MAX_IDLEN - 1, "hfc-%ds.%d-%d",
4957 hc->ctype, HFC_cnt + 1, pt + 1);
4958 ret = mISDN_register_device(&dch->dev, &hc->pci_dev->dev, name);
4959 }
4835 if (ret) 4960 if (ret)
4836 goto free_chan; 4961 goto free_chan;
4837 hc->created[pt] = 1; 4962 hc->created[pt] = 1;
@@ -4842,9 +4967,9 @@ free_chan:
4842} 4967}
4843 4968
4844static int 4969static int
4845hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent) 4970hfcmulti_init(struct hm_map *m, struct pci_dev *pdev,
4971 const struct pci_device_id *ent)
4846{ 4972{
4847 struct hm_map *m = (struct hm_map *)ent->driver_data;
4848 int ret_err = 0; 4973 int ret_err = 0;
4849 int pt; 4974 int pt;
4850 struct hfc_multi *hc; 4975 struct hfc_multi *hc;
@@ -4879,16 +5004,18 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
4879 } 5004 }
4880 spin_lock_init(&hc->lock); 5005 spin_lock_init(&hc->lock);
4881 hc->mtyp = m; 5006 hc->mtyp = m;
4882 hc->type = m->type; 5007 hc->ctype = m->type;
4883 hc->ports = m->ports; 5008 hc->ports = m->ports;
4884 hc->id = HFC_cnt; 5009 hc->id = HFC_cnt;
4885 hc->pcm = pcm[HFC_cnt]; 5010 hc->pcm = pcm[HFC_cnt];
4886 hc->io_mode = iomode[HFC_cnt]; 5011 hc->io_mode = iomode[HFC_cnt];
4887 if (dslot[HFC_cnt] < 0 && hc->type == 1) { 5012 if (dslot[HFC_cnt] < 0 && hc->ctype == HFC_TYPE_E1) {
4888 hc->dslot = 0; 5013 hc->dslot = 0;
4889 printk(KERN_INFO "HFC-E1 card has disabled D-channel, but " 5014 printk(KERN_INFO "HFC-E1 card has disabled D-channel, but "
4890 "31 B-channels\n"); 5015 "31 B-channels\n");
4891 } if (dslot[HFC_cnt] > 0 && dslot[HFC_cnt] < 32 && hc->type == 1) { 5016 }
5017 if (dslot[HFC_cnt] > 0 && dslot[HFC_cnt] < 32
5018 && hc->ctype == HFC_TYPE_E1) {
4892 hc->dslot = dslot[HFC_cnt]; 5019 hc->dslot = dslot[HFC_cnt];
4893 printk(KERN_INFO "HFC-E1 card has alternating D-channel on " 5020 printk(KERN_INFO "HFC-E1 card has alternating D-channel on "
4894 "time slot %d\n", dslot[HFC_cnt]); 5021 "time slot %d\n", dslot[HFC_cnt]);
@@ -4910,8 +5037,11 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
4910 for (i = 0; i < (poll >> 1); i++) 5037 for (i = 0; i < (poll >> 1); i++)
4911 hc->silence_data[i] = hc->silence; 5038 hc->silence_data[i] = hc->silence;
4912 5039
4913 if (!(type[HFC_cnt] & 0x200)) 5040 if (hc->ctype != HFC_TYPE_XHFC) {
4914 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip); 5041 if (!(type[HFC_cnt] & 0x200))
5042 test_and_set_bit(HFC_CHIP_DTMF, &hc->chip);
5043 test_and_set_bit(HFC_CHIP_CONF, &hc->chip);
5044 }
4915 5045
4916 if (type[HFC_cnt] & 0x800) 5046 if (type[HFC_cnt] & 0x800)
4917 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip); 5047 test_and_set_bit(HFC_CHIP_PCM_SLAVE, &hc->chip);
@@ -4935,8 +5065,18 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
4935 printk(KERN_NOTICE "Watchdog enabled\n"); 5065 printk(KERN_NOTICE "Watchdog enabled\n");
4936 } 5066 }
4937 5067
4938 /* setup pci, hc->slots may change due to PLXSD */ 5068 if (pdev && ent)
4939 ret_err = setup_pci(hc, pdev, ent); 5069 /* setup pci, hc->slots may change due to PLXSD */
5070 ret_err = setup_pci(hc, pdev, ent);
5071 else
5072#ifdef CONFIG_MISDN_HFCMULTI_8xx
5073 ret_err = setup_embedded(hc, m);
5074#else
5075 {
5076 printk(KERN_WARNING "Embedded IO Mode not selected\n");
5077 ret_err = -EIO;
5078 }
5079#endif
4940 if (ret_err) { 5080 if (ret_err) {
4941 if (hc == syncmaster) 5081 if (hc == syncmaster)
4942 syncmaster = NULL; 5082 syncmaster = NULL;
@@ -4944,7 +5084,17 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
4944 return ret_err; 5084 return ret_err;
4945 } 5085 }
4946 5086
4947 /* crate channels */ 5087 hc->HFC_outb_nodebug = hc->HFC_outb;
5088 hc->HFC_inb_nodebug = hc->HFC_inb;
5089 hc->HFC_inw_nodebug = hc->HFC_inw;
5090 hc->HFC_wait_nodebug = hc->HFC_wait;
5091#ifdef HFC_REGISTER_DEBUG
5092 hc->HFC_outb = HFC_outb_debug;
5093 hc->HFC_inb = HFC_inb_debug;
5094 hc->HFC_inw = HFC_inw_debug;
5095 hc->HFC_wait = HFC_wait_debug;
5096#endif
5097 /* create channels */
4948 for (pt = 0; pt < hc->ports; pt++) { 5098 for (pt = 0; pt < hc->ports; pt++) {
4949 if (Port_cnt >= MAX_PORTS) { 5099 if (Port_cnt >= MAX_PORTS) {
4950 printk(KERN_ERR "too many ports (max=%d).\n", 5100 printk(KERN_ERR "too many ports (max=%d).\n",
@@ -4952,7 +5102,7 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
4952 ret_err = -EINVAL; 5102 ret_err = -EINVAL;
4953 goto free_card; 5103 goto free_card;
4954 } 5104 }
4955 if (hc->type == 1) 5105 if (hc->ctype == HFC_TYPE_E1)
4956 ret_err = init_e1_port(hc, m); 5106 ret_err = init_e1_port(hc, m);
4957 else 5107 else
4958 ret_err = init_multi_port(hc, pt); 5108 ret_err = init_multi_port(hc, pt);
@@ -5036,6 +5186,7 @@ hfcmulti_init(struct pci_dev *pdev, const struct pci_device_id *ent)
5036 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc); 5186 hc->iclock = mISDN_register_clock("HFCMulti", 0, clockctl, hc);
5037 5187
5038 /* initialize hardware */ 5188 /* initialize hardware */
5189 hc->irq = (m->irq) ? : hc->pci_dev->irq;
5039 ret_err = init_card(hc); 5190 ret_err = init_card(hc);
5040 if (ret_err) { 5191 if (ret_err) {
5041 printk(KERN_ERR "init card returns %d\n", ret_err); 5192 printk(KERN_ERR "init card returns %d\n", ret_err);
@@ -5074,7 +5225,7 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5074 spin_unlock_irqrestore(&HFClock, flags); 5225 spin_unlock_irqrestore(&HFClock, flags);
5075 } else { 5226 } else {
5076 if (debug) 5227 if (debug)
5077 printk(KERN_WARNING "%s: drvdata allready removed\n", 5228 printk(KERN_DEBUG "%s: drvdata allready removed\n",
5078 __func__); 5229 __func__);
5079 } 5230 }
5080} 5231}
@@ -5086,45 +5237,48 @@ static void __devexit hfc_remove_pci(struct pci_dev *pdev)
5086#define VENDOR_PRIM "PrimuX" 5237#define VENDOR_PRIM "PrimuX"
5087 5238
5088static const struct hm_map hfcm_map[] = { 5239static const struct hm_map hfcm_map[] = {
5089/*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0}, 5240/*0*/ {VENDOR_BN, "HFC-1S Card (mini PCI)", 4, 1, 1, 3, 0, DIP_4S, 0, 0},
5090/*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0}, 5241/*1*/ {VENDOR_BN, "HFC-2S Card", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5091/*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0}, 5242/*2*/ {VENDOR_BN, "HFC-2S Card (mini PCI)", 4, 2, 1, 3, 0, DIP_4S, 0, 0},
5092/*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0}, 5243/*3*/ {VENDOR_BN, "HFC-4S Card", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5093/*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0}, 5244/*4*/ {VENDOR_BN, "HFC-4S Card (mini PCI)", 4, 4, 1, 2, 0, 0, 0, 0},
5094/*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0}, 5245/*5*/ {VENDOR_CCD, "HFC-4S Eval (old)", 4, 4, 0, 0, 0, 0, 0, 0},
5095/*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0}, 5246/*6*/ {VENDOR_CCD, "HFC-4S IOB4ST", 4, 4, 1, 2, 0, DIP_4S, 0, 0},
5096/*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0}, 5247/*7*/ {VENDOR_CCD, "HFC-4S", 4, 4, 1, 2, 0, 0, 0, 0},
5097/*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO}, 5248/*8*/ {VENDOR_DIG, "HFC-4S Card", 4, 4, 0, 2, 0, 0, HFC_IO_MODE_REGIO, 0},
5098/*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0}, 5249/*9*/ {VENDOR_CCD, "HFC-4S Swyx 4xS0 SX2 QuadBri", 4, 4, 1, 2, 0, 0, 0, 0},
5099/*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0}, 5250/*10*/ {VENDOR_JH, "HFC-4S (junghanns 2.0)", 4, 4, 1, 2, 0, 0, 0, 0},
5100/*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0}, 5251/*11*/ {VENDOR_PRIM, "HFC-2S Primux Card", 4, 2, 0, 0, 0, 0, 0, 0},
5101 5252
5102/*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0}, 5253/*12*/ {VENDOR_BN, "HFC-8S Card", 8, 8, 1, 0, 0, 0, 0, 0},
5103/*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S, 5254/*13*/ {VENDOR_BN, "HFC-8S Card (+)", 8, 8, 1, 8, 0, DIP_8S,
5104 HFC_IO_MODE_REGIO}, 5255 HFC_IO_MODE_REGIO, 0},
5105/*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0}, 5256/*14*/ {VENDOR_CCD, "HFC-8S Eval (old)", 8, 8, 0, 0, 0, 0, 0, 0},
5106/*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0}, 5257/*15*/ {VENDOR_CCD, "HFC-8S IOB4ST Recording", 8, 8, 1, 0, 0, 0, 0, 0},
5107 5258
5108/*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0}, 5259/*16*/ {VENDOR_CCD, "HFC-8S IOB8ST", 8, 8, 1, 0, 0, 0, 0, 0},
5109/*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0}, 5260/*17*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5110/*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0}, 5261/*18*/ {VENDOR_CCD, "HFC-8S", 8, 8, 1, 0, 0, 0, 0, 0},
5111 5262
5112/*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0}, 5263/*19*/ {VENDOR_BN, "HFC-E1 Card", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5113/*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0}, 5264/*20*/ {VENDOR_BN, "HFC-E1 Card (mini PCI)", 1, 1, 0, 1, 0, 0, 0, 0},
5114/*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0}, 5265/*21*/ {VENDOR_BN, "HFC-E1+ Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5115/*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0}, 5266/*22*/ {VENDOR_BN, "HFC-E1 Card (Dual)", 1, 1, 0, 1, 0, DIP_E1, 0, 0},
5116 5267
5117/*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0}, 5268/*23*/ {VENDOR_CCD, "HFC-E1 Eval (old)", 1, 1, 0, 0, 0, 0, 0, 0},
5118/*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0}, 5269/*24*/ {VENDOR_CCD, "HFC-E1 IOB1E1", 1, 1, 0, 1, 0, 0, 0, 0},
5119/*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0}, 5270/*25*/ {VENDOR_CCD, "HFC-E1", 1, 1, 0, 1, 0, 0, 0, 0},
5120 5271
5121/*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0, 5272/*26*/ {VENDOR_CCD, "HFC-4S Speech Design", 4, 4, 0, 0, 0, 0,
5122 HFC_IO_MODE_PLXSD}, 5273 HFC_IO_MODE_PLXSD, 0},
5123/*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0, 5274/*27*/ {VENDOR_CCD, "HFC-E1 Speech Design", 1, 1, 0, 0, 0, 0,
5124 HFC_IO_MODE_PLXSD}, 5275 HFC_IO_MODE_PLXSD, 0},
5125/*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0}, 5276/*28*/ {VENDOR_CCD, "HFC-4S OpenVox", 4, 4, 1, 0, 0, 0, 0, 0},
5126/*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0}, 5277/*29*/ {VENDOR_CCD, "HFC-2S OpenVox", 4, 2, 1, 0, 0, 0, 0, 0},
5127/*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0}, 5278/*30*/ {VENDOR_CCD, "HFC-8S OpenVox", 8, 8, 1, 0, 0, 0, 0, 0},
5279/*31*/ {VENDOR_CCD, "XHFC-4S Speech Design", 5, 4, 0, 0, 0, 0,
5280 HFC_IO_MODE_EMBSD, XHFC_IRQ},
5281/*32*/ {VENDOR_JH, "HFC-8S (junghanns)", 8, 8, 1, 0, 0, 0, 0, 0},
5128}; 5282};
5129 5283
5130#undef H 5284#undef H
@@ -5178,6 +5332,8 @@ static struct pci_device_id hfmultipci_ids[] __devinitdata = {
5178 PCI_SUBDEVICE_ID_CCD_HFC8S, 0, 0, H(18)}, /* 8S */ 5332 PCI_SUBDEVICE_ID_CCD_HFC8S, 0, 0, H(18)}, /* 8S */
5179 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD, 5333 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5180 PCI_SUBDEVICE_ID_CCD_OV8S, 0, 0, H(30)}, /* OpenVox 8 */ 5334 PCI_SUBDEVICE_ID_CCD_OV8S, 0, 0, H(30)}, /* OpenVox 8 */
5335 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_VENDOR_ID_CCD,
5336 PCI_SUBDEVICE_ID_CCD_JH8S, 0, 0, H(32)}, /* Junganns 8S */
5181 5337
5182 5338
5183 /* Cards with HFC-E1 Chip */ 5339 /* Cards with HFC-E1 Chip */
@@ -5201,6 +5357,10 @@ static struct pci_device_id hfmultipci_ids[] __devinitdata = {
5201 PCI_SUBDEVICE_ID_CCD_SPD4S, 0, 0, H(26)}, /* PLX PCI Bridge */ 5357 PCI_SUBDEVICE_ID_CCD_SPD4S, 0, 0, H(26)}, /* PLX PCI Bridge */
5202 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD, 5358 { PCI_VENDOR_ID_PLX, PCI_DEVICE_ID_PLX_9030, PCI_VENDOR_ID_CCD,
5203 PCI_SUBDEVICE_ID_CCD_SPDE1, 0, 0, H(27)}, /* PLX PCI Bridge */ 5359 PCI_SUBDEVICE_ID_CCD_SPDE1, 0, 0, H(27)}, /* PLX PCI Bridge */
5360
5361 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFCE1, PCI_VENDOR_ID_CCD,
5362 PCI_SUBDEVICE_ID_CCD_JHSE1, 0, 0, H(25)}, /* Junghanns E1 */
5363
5204 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_ANY_ID, PCI_ANY_ID, 5364 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC4S, PCI_ANY_ID, PCI_ANY_ID,
5205 0, 0, 0}, 5365 0, 0, 0},
5206 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_ANY_ID, PCI_ANY_ID, 5366 { PCI_VENDOR_ID_CCD, PCI_DEVICE_ID_CCD_HFC8S, PCI_ANY_ID, PCI_ANY_ID,
@@ -5231,7 +5391,7 @@ hfcmulti_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
5231 "Please contact the driver maintainer for support.\n"); 5391 "Please contact the driver maintainer for support.\n");
5232 return -ENODEV; 5392 return -ENODEV;
5233 } 5393 }
5234 ret = hfcmulti_init(pdev, ent); 5394 ret = hfcmulti_init(m, pdev, ent);
5235 if (ret) 5395 if (ret)
5236 return ret; 5396 return ret;
5237 HFC_cnt++; 5397 HFC_cnt++;
@@ -5261,6 +5421,8 @@ static int __init
5261HFCmulti_init(void) 5421HFCmulti_init(void)
5262{ 5422{
5263 int err; 5423 int err;
5424 int i, xhfc = 0;
5425 struct hm_map m;
5264 5426
5265 printk(KERN_INFO "mISDN: HFC-multi driver %s\n", HFC_MULTI_VERSION); 5427 printk(KERN_INFO "mISDN: HFC-multi driver %s\n", HFC_MULTI_VERSION);
5266 5428
@@ -5308,11 +5470,43 @@ HFCmulti_init(void)
5308 if (!clock) 5470 if (!clock)
5309 clock = 1; 5471 clock = 1;
5310 5472
5473 /* Register the embedded devices.
5474 * This should be done before the PCI cards registration */
5475 switch (hwid) {
5476 case HWID_MINIP4:
5477 xhfc = 1;
5478 m = hfcm_map[31];
5479 break;
5480 case HWID_MINIP8:
5481 xhfc = 2;
5482 m = hfcm_map[31];
5483 break;
5484 case HWID_MINIP16:
5485 xhfc = 4;
5486 m = hfcm_map[31];
5487 break;
5488 default:
5489 xhfc = 0;
5490 }
5491
5492 for (i = 0; i < xhfc; ++i) {
5493 err = hfcmulti_init(&m, NULL, NULL);
5494 if (err) {
5495 printk(KERN_ERR "error registering embedded driver: "
5496 "%x\n", err);
5497 return -err;
5498 }
5499 HFC_cnt++;
5500 printk(KERN_INFO "%d devices registered\n", HFC_cnt);
5501 }
5502
5503 /* Register the PCI cards */
5311 err = pci_register_driver(&hfcmultipci_driver); 5504 err = pci_register_driver(&hfcmultipci_driver);
5312 if (err < 0) { 5505 if (err < 0) {
5313 printk(KERN_ERR "error registering pci driver: %x\n", err); 5506 printk(KERN_ERR "error registering pci driver: %x\n", err);
5314 return err; 5507 return err;
5315 } 5508 }
5509
5316 return 0; 5510 return 0;
5317} 5511}
5318 5512