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authorHeiko Stuebner <heiko@sntech.de>2013-04-04 01:53:45 -0400
committerKukjin Kim <kgene.kim@samsung.com>2013-04-04 01:56:08 -0400
commitbd7c0da2c1590ea292052b873f93d2c1dbbf7d28 (patch)
treeb1939b087051f61fd83859e787cf80f3bac23120 /drivers/irqchip
parent1ebc7e83b1cc58edae3f371ac9cf1614e0d3b345 (diff)
irqchip: s3c24xx: add irq_set_type callback for basic interrupt types
Enables post-init setting of the desired typehandler for the interrupt. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Acked-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-s3c24xx.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/drivers/irqchip/irq-s3c24xx.c b/drivers/irqchip/irq-s3c24xx.c
index a565eb8def30..7cba4f0090f2 100644
--- a/drivers/irqchip/irq-s3c24xx.c
+++ b/drivers/irqchip/irq-s3c24xx.c
@@ -123,6 +123,28 @@ static inline void s3c_irq_ack(struct irq_data *data)
123 __raw_writel(bitval, intc->reg_intpnd); 123 __raw_writel(bitval, intc->reg_intpnd);
124} 124}
125 125
126static int s3c_irq_type(struct irq_data *data, unsigned int type)
127{
128 switch (type) {
129 case IRQ_TYPE_NONE:
130 break;
131 case IRQ_TYPE_EDGE_RISING:
132 case IRQ_TYPE_EDGE_FALLING:
133 case IRQ_TYPE_EDGE_BOTH:
134 irq_set_handler(data->irq, handle_edge_irq);
135 break;
136 case IRQ_TYPE_LEVEL_LOW:
137 case IRQ_TYPE_LEVEL_HIGH:
138 irq_set_handler(data->irq, handle_level_irq);
139 break;
140 default:
141 pr_err("No such irq type %d", type);
142 return -EINVAL;
143 }
144
145 return 0;
146}
147
126static int s3c_irqext_type_set(void __iomem *gpcon_reg, 148static int s3c_irqext_type_set(void __iomem *gpcon_reg,
127 void __iomem *extint_reg, 149 void __iomem *extint_reg,
128 unsigned long gpcon_offset, 150 unsigned long gpcon_offset,
@@ -228,6 +250,7 @@ static struct irq_chip s3c_irq_chip = {
228 .irq_ack = s3c_irq_ack, 250 .irq_ack = s3c_irq_ack,
229 .irq_mask = s3c_irq_mask, 251 .irq_mask = s3c_irq_mask,
230 .irq_unmask = s3c_irq_unmask, 252 .irq_unmask = s3c_irq_unmask,
253 .irq_set_type = s3c_irq_type,
231 .irq_set_wake = s3c_irq_wake 254 .irq_set_wake = s3c_irq_wake
232}; 255};
233 256
@@ -236,6 +259,7 @@ static struct irq_chip s3c_irq_level_chip = {
236 .irq_mask = s3c_irq_mask, 259 .irq_mask = s3c_irq_mask,
237 .irq_unmask = s3c_irq_unmask, 260 .irq_unmask = s3c_irq_unmask,
238 .irq_ack = s3c_irq_ack, 261 .irq_ack = s3c_irq_ack,
262 .irq_set_type = s3c_irq_type,
239}; 263};
240 264
241static struct irq_chip s3c_irqext_chip = { 265static struct irq_chip s3c_irqext_chip = {