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authorOlof Johansson <olof@lixom.net>2013-12-29 16:26:13 -0500
committerOlof Johansson <olof@lixom.net>2013-12-29 16:26:13 -0500
commit9d6b65e945d9604230fce4a7c3a2ad6c7a62c7f5 (patch)
tree853d8ad09eeddcf7117eceb13144528bf50562a3 /drivers/irqchip
parenta7fb16fad69bf05488ece74988331a5b38c35369 (diff)
parentce70af18801fd8dac6e9f85308294948916e84d6 (diff)
Merge tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/drivers
From Simon Horman: Renesas ARM based SoC IRQC Driver Updates for v3.14 * Simplify irq_set_type() method * Enable mask on suspend * Use lazy disable * tag 'renesas-irqc-for-v3.14' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: irq-renesas-irqc: simplify irq_set_type() method irqchip: renesas-irqc: Enable mask on suspend irqchip: renesas-irqc: Use lazy disable Signed-off-by: Olof Johansson <olof@lixom.net>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-renesas-irqc.c21
1 files changed, 8 insertions, 13 deletions
diff --git a/drivers/irqchip/irq-renesas-irqc.c b/drivers/irqchip/irq-renesas-irqc.c
index 2f404ba61c6c..8777065012a5 100644
--- a/drivers/irqchip/irq-renesas-irqc.c
+++ b/drivers/irqchip/irq-renesas-irqc.c
@@ -81,15 +81,12 @@ static void irqc_irq_disable(struct irq_data *d)
81 iowrite32(BIT(hw_irq), p->cpu_int_base + IRQC_EN_STS); 81 iowrite32(BIT(hw_irq), p->cpu_int_base + IRQC_EN_STS);
82} 82}
83 83
84#define INTC_IRQ_SENSE_VALID 0x10
85#define INTC_IRQ_SENSE(x) (x + INTC_IRQ_SENSE_VALID)
86
87static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = { 84static unsigned char irqc_sense[IRQ_TYPE_SENSE_MASK + 1] = {
88 [IRQ_TYPE_LEVEL_LOW] = INTC_IRQ_SENSE(0x01), 85 [IRQ_TYPE_LEVEL_LOW] = 0x01,
89 [IRQ_TYPE_LEVEL_HIGH] = INTC_IRQ_SENSE(0x02), 86 [IRQ_TYPE_LEVEL_HIGH] = 0x02,
90 [IRQ_TYPE_EDGE_FALLING] = INTC_IRQ_SENSE(0x04), /* Synchronous */ 87 [IRQ_TYPE_EDGE_FALLING] = 0x04, /* Synchronous */
91 [IRQ_TYPE_EDGE_RISING] = INTC_IRQ_SENSE(0x08), /* Synchronous */ 88 [IRQ_TYPE_EDGE_RISING] = 0x08, /* Synchronous */
92 [IRQ_TYPE_EDGE_BOTH] = INTC_IRQ_SENSE(0x0c), /* Synchronous */ 89 [IRQ_TYPE_EDGE_BOTH] = 0x0c, /* Synchronous */
93}; 90};
94 91
95static int irqc_irq_set_type(struct irq_data *d, unsigned int type) 92static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
@@ -101,12 +98,12 @@ static int irqc_irq_set_type(struct irq_data *d, unsigned int type)
101 98
102 irqc_dbg(&p->irq[hw_irq], "sense"); 99 irqc_dbg(&p->irq[hw_irq], "sense");
103 100
104 if (!(value & INTC_IRQ_SENSE_VALID)) 101 if (!value)
105 return -EINVAL; 102 return -EINVAL;
106 103
107 tmp = ioread32(p->iomem + IRQC_CONFIG(hw_irq)); 104 tmp = ioread32(p->iomem + IRQC_CONFIG(hw_irq));
108 tmp &= ~0x3f; 105 tmp &= ~0x3f;
109 tmp |= value ^ INTC_IRQ_SENSE_VALID; 106 tmp |= value;
110 iowrite32(tmp, p->iomem + IRQC_CONFIG(hw_irq)); 107 iowrite32(tmp, p->iomem + IRQC_CONFIG(hw_irq));
111 return 0; 108 return 0;
112} 109}
@@ -212,10 +209,8 @@ static int irqc_probe(struct platform_device *pdev)
212 irq_chip->name = name; 209 irq_chip->name = name;
213 irq_chip->irq_mask = irqc_irq_disable; 210 irq_chip->irq_mask = irqc_irq_disable;
214 irq_chip->irq_unmask = irqc_irq_enable; 211 irq_chip->irq_unmask = irqc_irq_enable;
215 irq_chip->irq_enable = irqc_irq_enable;
216 irq_chip->irq_disable = irqc_irq_disable;
217 irq_chip->irq_set_type = irqc_irq_set_type; 212 irq_chip->irq_set_type = irqc_irq_set_type;
218 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE; 213 irq_chip->flags = IRQCHIP_SKIP_SET_WAKE | IRQCHIP_MASK_ON_SUSPEND;
219 214
220 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node, 215 p->irq_domain = irq_domain_add_simple(pdev->dev.of_node,
221 p->number_of_irqs, 216 p->number_of_irqs,