Merge tag 'v3.13-rc5' into next

Linux 3.13-rc5

* tag 'v3.13-rc5': (231 commits)
  Linux 3.13-rc5
  aio: clean up and fix aio_setup_ring page mapping
  aio/migratepages: make aio migrate pages sane
  aio: fix kioctx leak introduced by "aio: Fix a trinity splat"
  Don't set the INITRD_COMPRESS environment variable automatically
  mm: fix build of split ptlock code
  pstore: Don't allow high traffic options on fragile devices
  mm: do not allocate page->ptl dynamically, if spinlock_t fits to long
  mm: page_alloc: revert NUMA aspect of fair allocation policy
  Revert "mm: page_alloc: exclude unreclaimable allocations from zone fairness policy"
  mm: Fix NULL pointer dereference in madvise(MADV_WILLNEED) support
  qla2xxx: Fix scsi_host leak on qlt_lport_register callback failure
  target: Remove extra percpu_ref_init
  arm64: ptrace: avoid using HW_BREAKPOINT_EMPTY for disabled events
  ARC: Allow conditional multiple inclusion of uapi/asm/unistd.h
  target/file: Update hw_max_sectors based on current block_size
  iser-target: Move INIT_WORK setup into isert_create_device_ib_res
  iscsi-target: Fix incorrect np->np_thread NULL assignment
  mm/hugetlb: check for pte NULL pointer in __page_check_address()
  fix build with make 3.80
  ...

Conflicts:
	drivers/usb/phy/Kconfig

1 files changed, 5 insertions, 3 deletions

diff --git a/drivers/irqchip/irq-renesas-intc-irqpin.c b/drivers/irqchip/irq-renesas-intc-irqpin.c
index 82cec63a9011..3ee78f02e5d7 100644
--- a/drivers/irqchip/irq-renesas-intc-irqpin.c
+++ b/drivers/irqchip/irq-renesas-intc-irqpin.c
@@ -149,8 +149,9 @@ static void intc_irqpin_read_modify_write(struct intc_irqpin_priv *p,
 static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p,
                                          int irq, int do_mask)
 {
-        int bitfield_width = 4; /* PRIO assumed to have fixed bitfield width */
-        int shift = (7 - irq) * bitfield_width; /* PRIO assumed to be 32-bit */
+        /* The PRIO register is assumed to be 32-bit with fixed 4-bit fields. */
+        int bitfield_width = 4;
+        int shift = 32 - (irq + 1) * bitfield_width;
 
         intc_irqpin_read_modify_write(p, INTC_IRQPIN_REG_PRIO,
                                       shift, bitfield_width,
@@ -159,8 +160,9 @@ static void intc_irqpin_mask_unmask_prio(struct intc_irqpin_priv *p,
 
 static int intc_irqpin_set_sense(struct intc_irqpin_priv *p, int irq, int value)
 {
+        /* The SENSE register is assumed to be 32-bit. */
         int bitfield_width = p->config.sense_bitfield_width;
-        int shift = (7 - irq) * bitfield_width; /* SENSE assumed to be 32-bit */
+        int shift = 32 - (irq + 1) * bitfield_width;
 
         dev_dbg(&p->pdev->dev, "sense irq = %d, mode = %d\n", irq, value);