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authorLinus Walleij <linus.walleij@linaro.org>2013-10-04 09:15:35 -0400
committerLinus Walleij <linus.walleij@linaro.org>2014-01-03 16:26:13 -0500
commitbdd272cbb97a66cf83061d22cfd19beb7267943a (patch)
treeb43334bc0f1b3f76404c4841088a25bc44cd1d28 /drivers/irqchip
parentfe989145447341bff1ed68bd8aaee12ea860d461 (diff)
irqchip: versatile FPGA: support cascaded interrupts from DT
The Versatile FPGA interrupt controller supports cascading interrupts, i.e. that its output is connected to the input of another interrupt controller. This makes it possible to pass a parent interrupt from the device tree and print it in the boot log if applicable. Acked-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'drivers/irqchip')
-rw-r--r--drivers/irqchip/irq-versatile-fpga.c15
1 files changed, 13 insertions, 2 deletions
diff --git a/drivers/irqchip/irq-versatile-fpga.c b/drivers/irqchip/irq-versatile-fpga.c
index 47a52ab580d8..3ae2bb8d9cf2 100644
--- a/drivers/irqchip/irq-versatile-fpga.c
+++ b/drivers/irqchip/irq-versatile-fpga.c
@@ -9,6 +9,7 @@
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/of.h> 10#include <linux/of.h>
11#include <linux/of_address.h> 11#include <linux/of_address.h>
12#include <linux/of_irq.h>
12 13
13#include <asm/exception.h> 14#include <asm/exception.h>
14#include <asm/mach/irq.h> 15#include <asm/mach/irq.h>
@@ -167,8 +168,12 @@ void __init fpga_irq_init(void __iomem *base, const char *name, int irq_start,
167 f->used_irqs++; 168 f->used_irqs++;
168 } 169 }
169 170
170 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs\n", 171 pr_info("FPGA IRQ chip %d \"%s\" @ %p, %u irqs",
171 fpga_irq_id, name, base, f->used_irqs); 172 fpga_irq_id, name, base, f->used_irqs);
173 if (parent_irq != -1)
174 pr_cont(", parent IRQ: %d\n", parent_irq);
175 else
176 pr_cont("\n");
172 177
173 fpga_irq_id++; 178 fpga_irq_id++;
174} 179}
@@ -180,6 +185,7 @@ int __init fpga_irq_of_init(struct device_node *node,
180 void __iomem *base; 185 void __iomem *base;
181 u32 clear_mask; 186 u32 clear_mask;
182 u32 valid_mask; 187 u32 valid_mask;
188 int parent_irq;
183 189
184 if (WARN_ON(!node)) 190 if (WARN_ON(!node))
185 return -ENODEV; 191 return -ENODEV;
@@ -193,7 +199,12 @@ int __init fpga_irq_of_init(struct device_node *node,
193 if (of_property_read_u32(node, "valid-mask", &valid_mask)) 199 if (of_property_read_u32(node, "valid-mask", &valid_mask))
194 valid_mask = 0; 200 valid_mask = 0;
195 201
196 fpga_irq_init(base, node->name, 0, -1, valid_mask, node); 202 /* Some chips are cascaded from a parent IRQ */
203 parent_irq = irq_of_parse_and_map(node, 0);
204 if (!parent_irq)
205 parent_irq = -1;
206
207 fpga_irq_init(base, node->name, 0, parent_irq, valid_mask, node);
197 208
198 writel(clear_mask, base + IRQ_ENABLE_CLEAR); 209 writel(clear_mask, base + IRQ_ENABLE_CLEAR);
199 writel(clear_mask, base + FIQ_ENABLE_CLEAR); 210 writel(clear_mask, base + FIQ_ENABLE_CLEAR);