ACPICA: Update DMAR table definitions.

This patch updates DMAR table header definitions as such enhancement
has been made in ACPICA upstream already.  It ports that change to
the Linux source to reduce source code differences between Linux and
ACPICA upstream.

Build test done on x86-64 machine with the following configs enabled:
  CONFIG_DMAR_TABLE
  CONFIG_IRQ_REMAP
  CONFIG_INTEL_IOMMU

This patch does not affect the generation of the Linux kernel binary.

[rjw: Changelog]
Signed-off-by: Lv Zheng <lv.zheng@intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>

1 files changed, 4 insertions, 4 deletions

diff --git a/drivers/iommu/intel_irq_remapping.c b/drivers/iommu/intel_irq_remapping.c
index f71673dbb23d..ab86902fd9ff 100644
--- a/drivers/iommu/intel_irq_remapping.c
+++ b/drivers/iommu/intel_irq_remapping.c
@@ -686,12 +686,12 @@ static void ir_parse_one_hpet_scope(struct acpi_dmar_device_scope *scope,
                  * Access PCI directly due to the PCI
                  * subsystem isn't initialized yet.
                  */
-                bus = read_pci_config_byte(bus, path->dev, path->fn,
+                bus = read_pci_config_byte(bus, path->device, path->function,
                                            PCI_SECONDARY_BUS);
                 path++;
         }
         ir_hpet[ir_hpet_num].bus   = bus;
-        ir_hpet[ir_hpet_num].devfn = PCI_DEVFN(path->dev, path->fn);
+        ir_hpet[ir_hpet_num].devfn = PCI_DEVFN(path->device, path->function);
         ir_hpet[ir_hpet_num].iommu = iommu;
         ir_hpet[ir_hpet_num].id    = scope->enumeration_id;
         ir_hpet_num++;
@@ -714,13 +714,13 @@ static void ir_parse_one_ioapic_scope(struct acpi_dmar_device_scope *scope,
                  * Access PCI directly due to the PCI
                  * subsystem isn't initialized yet.
                  */
-                bus = read_pci_config_byte(bus, path->dev, path->fn,
+                bus = read_pci_config_byte(bus, path->device, path->function,
                                            PCI_SECONDARY_BUS);
                 path++;
         }
 
         ir_ioapic[ir_ioapic_num].bus   = bus;
-        ir_ioapic[ir_ioapic_num].devfn = PCI_DEVFN(path->dev, path->fn);
+        ir_ioapic[ir_ioapic_num].devfn = PCI_DEVFN(path->device, path->function);
         ir_ioapic[ir_ioapic_num].iommu = iommu;
         ir_ioapic[ir_ioapic_num].id    = scope->enumeration_id;
         ir_ioapic_num++;