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authorJoerg Roedel <joerg.roedel@amd.com>2012-04-12 06:49:26 -0400
committerJoerg Roedel <joerg.roedel@amd.com>2012-04-12 06:49:26 -0400
commita3b93121430c7b46c2895a7744261be107ccdf7f (patch)
treefcd1609527275d098e69a79ceedf22094cff5de1 /drivers/iommu/amd_iommu.c
parent0034102808e0dbbf3a2394b82b1bb40b5778de9e (diff)
iommu/amd: Check for the right TLP prefix bit
Unfortunatly the PRI spec changed and moved the TLP-prefix-required bit to a different location. This patch makes the necessary change in the AMD IOMMU driver. Regressions are not expected because all hardware implementing the PRI capability sets this bit to zero anyway. Cc: stable@vger.kernel.org # v3.3 Signed-off-by: Joerg Roedel <joerg.roedel@amd.com>
Diffstat (limited to 'drivers/iommu/amd_iommu.c')
-rw-r--r--drivers/iommu/amd_iommu.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index a5bee8e2dfce..08f3eecb87a2 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -2035,20 +2035,20 @@ out_err:
2035} 2035}
2036 2036
2037/* FIXME: Move this to PCI code */ 2037/* FIXME: Move this to PCI code */
2038#define PCI_PRI_TLP_OFF (1 << 2) 2038#define PCI_PRI_TLP_OFF (1 << 15)
2039 2039
2040bool pci_pri_tlp_required(struct pci_dev *pdev) 2040bool pci_pri_tlp_required(struct pci_dev *pdev)
2041{ 2041{
2042 u16 control; 2042 u16 status;
2043 int pos; 2043 int pos;
2044 2044
2045 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI); 2045 pos = pci_find_ext_capability(pdev, PCI_EXT_CAP_ID_PRI);
2046 if (!pos) 2046 if (!pos)
2047 return false; 2047 return false;
2048 2048
2049 pci_read_config_word(pdev, pos + PCI_PRI_CTRL, &control); 2049 pci_read_config_word(pdev, pos + PCI_PRI_STATUS, &status);
2050 2050
2051 return (control & PCI_PRI_TLP_OFF) ? true : false; 2051 return (status & PCI_PRI_TLP_OFF) ? true : false;
2052} 2052}
2053 2053
2054/* 2054/*