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authorLinus Torvalds <torvalds@linux-foundation.org>2010-05-13 10:28:43 -0400
committerLinus Torvalds <torvalds@linux-foundation.org>2010-05-13 10:28:43 -0400
commitaa86f26bd81a46985f1b32e513638d1c36cf3104 (patch)
tree86a3e978f511536ba2a12740b58392f3d3e13e11 /drivers/input/touchscreen
parentbe835674b55324c1abe973b15343c3663910c620 (diff)
parent3843384a055496dfed3c93ae883d964d8290fdab (diff)
Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/dtor/input: Input: ad7877 - keep dma rx buffers in seperate cache lines Input: psmouse - reset all types of mice before reconnecting Input: elantech - use all 3 bytes when checking version Input: iforce - fix Guillemot Jet Leader 3D entry Input: iforce - add Guillemot Jet Leader Force Feedback
Diffstat (limited to 'drivers/input/touchscreen')
-rw-r--r--drivers/input/touchscreen/ad7877.c15
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/input/touchscreen/ad7877.c b/drivers/input/touchscreen/ad7877.c
index e019d53d1ab4..0d2d7e54b465 100644
--- a/drivers/input/touchscreen/ad7877.c
+++ b/drivers/input/touchscreen/ad7877.c
@@ -156,9 +156,14 @@ struct ser_req {
156 u16 reset; 156 u16 reset;
157 u16 ref_on; 157 u16 ref_on;
158 u16 command; 158 u16 command;
159 u16 sample;
160 struct spi_message msg; 159 struct spi_message msg;
161 struct spi_transfer xfer[6]; 160 struct spi_transfer xfer[6];
161
162 /*
163 * DMA (thus cache coherency maintenance) requires the
164 * transfer buffers to live in their own cache lines.
165 */
166 u16 sample ____cacheline_aligned;
162}; 167};
163 168
164struct ad7877 { 169struct ad7877 {
@@ -182,8 +187,6 @@ struct ad7877 {
182 u8 averaging; 187 u8 averaging;
183 u8 pen_down_acc_interval; 188 u8 pen_down_acc_interval;
184 189
185 u16 conversion_data[AD7877_NR_SENSE];
186
187 struct spi_transfer xfer[AD7877_NR_SENSE + 2]; 190 struct spi_transfer xfer[AD7877_NR_SENSE + 2];
188 struct spi_message msg; 191 struct spi_message msg;
189 192
@@ -195,6 +198,12 @@ struct ad7877 {
195 spinlock_t lock; 198 spinlock_t lock;
196 struct timer_list timer; /* P: lock */ 199 struct timer_list timer; /* P: lock */
197 unsigned pending:1; /* P: lock */ 200 unsigned pending:1; /* P: lock */
201
202 /*
203 * DMA (thus cache coherency maintenance) requires the
204 * transfer buffers to live in their own cache lines.
205 */
206 u16 conversion_data[AD7877_NR_SENSE] ____cacheline_aligned;
198}; 207};
199 208
200static int gpio3; 209static int gpio3;