diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
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committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/input/serio/i8042.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/input/serio/i8042.h')
-rw-r--r-- | drivers/input/serio/i8042.h | 133 |
1 files changed, 133 insertions, 0 deletions
diff --git a/drivers/input/serio/i8042.h b/drivers/input/serio/i8042.h new file mode 100644 index 000000000000..13835039a2a7 --- /dev/null +++ b/drivers/input/serio/i8042.h | |||
@@ -0,0 +1,133 @@ | |||
1 | #ifndef _I8042_H | ||
2 | #define _I8042_H | ||
3 | |||
4 | #include <linux/config.h> | ||
5 | |||
6 | /* | ||
7 | * Copyright (c) 1999-2002 Vojtech Pavlik | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License version 2 as published by | ||
11 | * the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | /* | ||
15 | * Arch-dependent inline functions and defines. | ||
16 | */ | ||
17 | |||
18 | #if defined(CONFIG_MACH_JAZZ) | ||
19 | #include "i8042-jazzio.h" | ||
20 | #elif defined(CONFIG_SGI_IP22) | ||
21 | #include "i8042-ip22io.h" | ||
22 | #elif defined(CONFIG_PPC) | ||
23 | #include "i8042-ppcio.h" | ||
24 | #elif defined(CONFIG_SPARC32) || defined(CONFIG_SPARC64) | ||
25 | #include "i8042-sparcio.h" | ||
26 | #elif defined(CONFIG_X86) || defined(CONFIG_IA64) | ||
27 | #include "i8042-x86ia64io.h" | ||
28 | #else | ||
29 | #include "i8042-io.h" | ||
30 | #endif | ||
31 | |||
32 | /* | ||
33 | * This is in 50us units, the time we wait for the i8042 to react. This | ||
34 | * has to be long enough for the i8042 itself to timeout on sending a byte | ||
35 | * to a non-existent mouse. | ||
36 | */ | ||
37 | |||
38 | #define I8042_CTL_TIMEOUT 10000 | ||
39 | |||
40 | /* | ||
41 | * When the device isn't opened and it's interrupts aren't used, we poll it at | ||
42 | * regular intervals to see if any characters arrived. If yes, we can start | ||
43 | * probing for any mouse / keyboard connected. This is the period of the | ||
44 | * polling. | ||
45 | */ | ||
46 | |||
47 | #define I8042_POLL_PERIOD HZ/20 | ||
48 | |||
49 | /* | ||
50 | * Status register bits. | ||
51 | */ | ||
52 | |||
53 | #define I8042_STR_PARITY 0x80 | ||
54 | #define I8042_STR_TIMEOUT 0x40 | ||
55 | #define I8042_STR_AUXDATA 0x20 | ||
56 | #define I8042_STR_KEYLOCK 0x10 | ||
57 | #define I8042_STR_CMDDAT 0x08 | ||
58 | #define I8042_STR_MUXERR 0x04 | ||
59 | #define I8042_STR_IBF 0x02 | ||
60 | #define I8042_STR_OBF 0x01 | ||
61 | |||
62 | /* | ||
63 | * Control register bits. | ||
64 | */ | ||
65 | |||
66 | #define I8042_CTR_KBDINT 0x01 | ||
67 | #define I8042_CTR_AUXINT 0x02 | ||
68 | #define I8042_CTR_IGNKEYLOCK 0x08 | ||
69 | #define I8042_CTR_KBDDIS 0x10 | ||
70 | #define I8042_CTR_AUXDIS 0x20 | ||
71 | #define I8042_CTR_XLATE 0x40 | ||
72 | |||
73 | /* | ||
74 | * Commands. | ||
75 | */ | ||
76 | |||
77 | #define I8042_CMD_CTL_RCTR 0x0120 | ||
78 | #define I8042_CMD_CTL_WCTR 0x1060 | ||
79 | #define I8042_CMD_CTL_TEST 0x01aa | ||
80 | |||
81 | #define I8042_CMD_KBD_DISABLE 0x00ad | ||
82 | #define I8042_CMD_KBD_ENABLE 0x00ae | ||
83 | #define I8042_CMD_KBD_TEST 0x01ab | ||
84 | #define I8042_CMD_KBD_LOOP 0x11d2 | ||
85 | |||
86 | #define I8042_CMD_AUX_DISABLE 0x00a7 | ||
87 | #define I8042_CMD_AUX_ENABLE 0x00a8 | ||
88 | #define I8042_CMD_AUX_TEST 0x01a9 | ||
89 | #define I8042_CMD_AUX_SEND 0x10d4 | ||
90 | #define I8042_CMD_AUX_LOOP 0x11d3 | ||
91 | |||
92 | #define I8042_CMD_MUX_PFX 0x0090 | ||
93 | #define I8042_CMD_MUX_SEND 0x1090 | ||
94 | |||
95 | /* | ||
96 | * Return codes. | ||
97 | */ | ||
98 | |||
99 | #define I8042_RET_CTL_TEST 0x55 | ||
100 | |||
101 | /* | ||
102 | * Expected maximum internal i8042 buffer size. This is used for flushing | ||
103 | * the i8042 buffers. | ||
104 | */ | ||
105 | |||
106 | #define I8042_BUFFER_SIZE 16 | ||
107 | |||
108 | /* | ||
109 | * Number of AUX ports on controllers supporting active multiplexing | ||
110 | * specification | ||
111 | */ | ||
112 | |||
113 | #define I8042_NUM_MUX_PORTS 4 | ||
114 | |||
115 | /* | ||
116 | * Debug. | ||
117 | */ | ||
118 | |||
119 | #ifdef DEBUG | ||
120 | static unsigned long i8042_start_time; | ||
121 | #define dbg_init() do { i8042_start_time = jiffies; } while (0) | ||
122 | #define dbg(format, arg...) \ | ||
123 | do { \ | ||
124 | if (i8042_debug) \ | ||
125 | printk(KERN_DEBUG __FILE__ ": " format " [%d]\n" , \ | ||
126 | ## arg, (int) (jiffies - i8042_start_time)); \ | ||
127 | } while (0) | ||
128 | #else | ||
129 | #define dbg_init() do { } while (0) | ||
130 | #define dbg(format, arg...) do {} while (0) | ||
131 | #endif | ||
132 | |||
133 | #endif /* _I8042_H */ | ||