Merge tag 'v3.17-rc3' into next

Sync with mainline to bring in Chrome EC changes.

2 files changed, 12 insertions, 12 deletions

diff --git a/drivers/input/misc/sirfsoc-onkey.c b/drivers/input/misc/sirfsoc-onkey.c
index e4104f9b2e6d..fed5102e1802 100644
--- a/drivers/input/misc/sirfsoc-onkey.c
+++ b/drivers/input/misc/sirfsoc-onkey.c
@@ -213,7 +213,7 @@ static struct platform_driver sirfsoc_pwrc_driver = {
 
 module_platform_driver(sirfsoc_pwrc_driver);
 
-MODULE_LICENSE("GPLv2");
+MODULE_LICENSE("GPL v2");
 MODULE_AUTHOR("Binghua Duan <Binghua.Duan@csr.com>, Xianglong Du <Xianglong.Du@csr.com>");
 MODULE_DESCRIPTION("CSR Prima2 PWRC Driver");
 MODULE_ALIAS("platform:sirfsoc-pwrc");
diff --git a/drivers/input/misc/sparcspkr.c b/drivers/input/misc/sparcspkr.c
index 65fd3150919b..179ff1cd6f6b 100644
--- a/drivers/input/misc/sparcspkr.c
+++ b/drivers/input/misc/sparcspkr.c
@@ -86,13 +86,13 @@ static int bbc_spkr_event(struct input_dev *dev, unsigned int type, unsigned int
         spin_lock_irqsave(&state->lock, flags);
 
         if (count) {
-                outb(0x01,                 info->regs + 0);
-                outb(0x00,                 info->regs + 2);
-                outb((count >> 16) & 0xff, info->regs + 3);
-                outb((count >>  8) & 0xff, info->regs + 4);
-                outb(0x00,                 info->regs + 5);
+                sbus_writeb(0x01,                 info->regs + 0);
+                sbus_writeb(0x00,                 info->regs + 2);
+                sbus_writeb((count >> 16) & 0xff, info->regs + 3);
+                sbus_writeb((count >>  8) & 0xff, info->regs + 4);
+                sbus_writeb(0x00,                 info->regs + 5);
         } else {
-                outb(0x00,                 info->regs + 0);
+                sbus_writeb(0x00,                 info->regs + 0);
         }
 
         spin_unlock_irqrestore(&state->lock, flags);
@@ -123,15 +123,15 @@ static int grover_spkr_event(struct input_dev *dev, unsigned int type, unsigned
 
         if (count) {
                 /* enable counter 2 */
-                outb(inb(info->enable_reg) | 3, info->enable_reg);
+                sbus_writeb(sbus_readb(info->enable_reg) | 3, info->enable_reg);
                 /* set command for counter 2, 2 byte write */
-                outb(0xB6, info->freq_regs + 1);
+                sbus_writeb(0xB6, info->freq_regs + 1);
                 /* select desired HZ */
-                outb(count & 0xff, info->freq_regs + 0);
-                outb((count >> 8) & 0xff, info->freq_regs + 0);
+                sbus_writeb(count & 0xff, info->freq_regs + 0);
+                sbus_writeb((count >> 8) & 0xff, info->freq_regs + 0);
         } else {
                 /* disable counter 2 */
-                outb(inb_p(info->enable_reg) & 0xFC, info->enable_reg);
+                sbus_writeb(sbus_readb(info->enable_reg) & 0xFC, info->enable_reg);
         }
 
         spin_unlock_irqrestore(&state->lock, flags);