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authorShridhar Rasal <srasal@nvidia.com>2012-02-03 03:27:30 -0500
committerDmitry Torokhov <dmitry.torokhov@gmail.com>2012-02-03 03:29:06 -0500
commit023cea0ecfa2df034096c3f4afa796a0b2d1188a (patch)
tree5a17176ee7f8cfe276dc79c9d15601aebb47a73f /drivers/input/keyboard/tegra-kbc.c
parent8491ee1093c476ea3a9a19ab8593d8531cab40f7 (diff)
Input: tegra-kbc - allow skipping setting up some of GPIO pins
Allow marking some of GPIO pins as ignored to to avoid continuously generating KBC input events. Signed-off-by: Shridhar Rasal <srasal@nvidia.com> Signed-off-by: Dmitry Torokhov <dtor@mail.ru>
Diffstat (limited to 'drivers/input/keyboard/tegra-kbc.c')
-rw-r--r--drivers/input/keyboard/tegra-kbc.c34
1 files changed, 27 insertions, 7 deletions
diff --git a/drivers/input/keyboard/tegra-kbc.c b/drivers/input/keyboard/tegra-kbc.c
index b307a46ecef1..dc19432c665b 100644
--- a/drivers/input/keyboard/tegra-kbc.c
+++ b/drivers/input/keyboard/tegra-kbc.c
@@ -468,10 +468,18 @@ static void tegra_kbc_config_pins(struct tegra_kbc *kbc)
468 row_cfg &= ~r_mask; 468 row_cfg &= ~r_mask;
469 col_cfg &= ~c_mask; 469 col_cfg &= ~c_mask;
470 470
471 if (pdata->pin_cfg[i].is_row) 471 switch (pdata->pin_cfg[i].type) {
472 case PIN_CFG_ROW:
472 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft; 473 row_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << r_shft;
473 else 474 break;
475
476 case PIN_CFG_COL:
474 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft; 477 col_cfg |= ((pdata->pin_cfg[i].num << 1) | 1) << c_shft;
478 break;
479
480 case PIN_CFG_IGNORE:
481 break;
482 }
475 483
476 writel(row_cfg, kbc->mmio + r_offs); 484 writel(row_cfg, kbc->mmio + r_offs);
477 writel(col_cfg, kbc->mmio + c_offs); 485 writel(col_cfg, kbc->mmio + c_offs);
@@ -576,7 +584,8 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
576 for (i = 0; i < KBC_MAX_GPIO; i++) { 584 for (i = 0; i < KBC_MAX_GPIO; i++) {
577 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i]; 585 const struct tegra_kbc_pin_cfg *pin_cfg = &pdata->pin_cfg[i];
578 586
579 if (pin_cfg->is_row) { 587 switch (pin_cfg->type) {
588 case PIN_CFG_ROW:
580 if (pin_cfg->num >= KBC_MAX_ROW) { 589 if (pin_cfg->num >= KBC_MAX_ROW) {
581 dev_err(dev, 590 dev_err(dev,
582 "pin_cfg[%d]: invalid row number %d\n", 591 "pin_cfg[%d]: invalid row number %d\n",
@@ -584,13 +593,25 @@ tegra_kbc_check_pin_cfg(const struct tegra_kbc_platform_data *pdata,
584 return false; 593 return false;
585 } 594 }
586 (*num_rows)++; 595 (*num_rows)++;
587 } else { 596 break;
597
598 case PIN_CFG_COL:
588 if (pin_cfg->num >= KBC_MAX_COL) { 599 if (pin_cfg->num >= KBC_MAX_COL) {
589 dev_err(dev, 600 dev_err(dev,
590 "pin_cfg[%d]: invalid column number %d\n", 601 "pin_cfg[%d]: invalid column number %d\n",
591 i, pin_cfg->num); 602 i, pin_cfg->num);
592 return false; 603 return false;
593 } 604 }
605 break;
606
607 case PIN_CFG_IGNORE:
608 break;
609
610 default:
611 dev_err(dev,
612 "pin_cfg[%d]: invalid entry type %d\n",
613 pin_cfg->type, pin_cfg->num);
614 return false;
594 } 615 }
595 } 616 }
596 617
@@ -607,7 +628,6 @@ tegra_kbc_dt_parse_pdata(struct platform_device *pdev)
607 if (!np) 628 if (!np)
608 return NULL; 629 return NULL;
609 630
610 pdata = kzalloc(sizeof(*pdata), GFP_KERNEL);
611 if (!pdata) 631 if (!pdata)
612 return NULL; 632 return NULL;
613 633
@@ -629,12 +649,12 @@ tegra_kbc_dt_parse_pdata(struct platform_device *pdev)
629 */ 649 */
630 for (i = 0; i < KBC_MAX_ROW; i++) { 650 for (i = 0; i < KBC_MAX_ROW; i++) {
631 pdata->pin_cfg[i].num = i; 651 pdata->pin_cfg[i].num = i;
632 pdata->pin_cfg[i].is_row = true; 652 pdata->pin_cfg[i].type = PIN_CFG_ROW;
633 } 653 }
634 654
635 for (i = 0; i < KBC_MAX_COL; i++) { 655 for (i = 0; i < KBC_MAX_COL; i++) {
636 pdata->pin_cfg[KBC_MAX_ROW + i].num = i; 656 pdata->pin_cfg[KBC_MAX_ROW + i].num = i;
637 pdata->pin_cfg[KBC_MAX_ROW + i].is_row = false; 657 pdata->pin_cfg[KBC_MAX_ROW + i].type = PIN_CFG_COL;
638 } 658 }
639 659
640 return pdata; 660 return pdata;