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authorChien Tung <chien.tin.tung@intel.com>2009-04-27 16:30:35 -0400
committerRoland Dreier <rolandd@cisco.com>2009-04-27 16:30:35 -0400
commit923223776b53013443d062a87e0a3d57d6513f04 (patch)
treed1823410e4a78a6d5cf68b3969afe914b3f22adf /drivers/infiniband
parente998c25bc29f2b409b39fa63dad3df499982a887 (diff)
RDMA/nes: Set trace length to 1 inch for SFP_D
With updated PHY firmware for SFP_D, setting the trace length to 1 inch for SFP_D provides a more stable link. Signed-off-by: Chien Tung <chien.tin.tung@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband')
-rw-r--r--drivers/infiniband/hw/nes/nes_hw.c3
1 files changed, 2 insertions, 1 deletions
diff --git a/drivers/infiniband/hw/nes/nes_hw.c b/drivers/infiniband/hw/nes/nes_hw.c
index 2aa021655e33..b832a7b814a2 100644
--- a/drivers/infiniband/hw/nes/nes_hw.c
+++ b/drivers/infiniband/hw/nes/nes_hw.c
@@ -1371,13 +1371,14 @@ int nes_init_phy(struct nes_device *nesdev)
1371 if (phy_type == NES_PHY_TYPE_ARGUS) { 1371 if (phy_type == NES_PHY_TYPE_ARGUS) {
1372 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x000C); 1372 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x000C);
1373 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0008); 1373 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0008);
1374 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0001);
1374 } else { 1375 } else {
1375 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x0004); 1376 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc302, 0x0004);
1376 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0038); 1377 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc319, 0x0038);
1378 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0013);
1377 } 1379 }
1378 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc31a, 0x0098); 1380 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xc31a, 0x0098);
1379 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0026, 0x0E00); 1381 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0026, 0x0E00);
1380 nes_write_10G_phy_reg(nesdev, phy_index, 0x3, 0x0027, 0x0001);
1381 1382
1382 /* setup LEDs */ 1383 /* setup LEDs */
1383 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd006, 0x0007); 1384 nes_write_10G_phy_reg(nesdev, phy_index, 0x1, 0xd006, 0x0007);