diff options
author | Jack Morgenstein <jackm@mellanox.co.il> | 2005-12-09 19:40:14 -0500 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2005-12-09 19:40:14 -0500 |
commit | 44b5b0303327cfb23f135b95b2fe5436c81ed27c (patch) | |
tree | 7f1dcdaf798dbd99cd2b43709e992e3a12c015a6 /drivers/infiniband | |
parent | 6aa2e4e8063114bd7cea8616dd5848d3c64b4c36 (diff) |
IB/mthca: don't change driver's copy of attributes if modify QP fails
Only change the driver's copy of the QP attributes in modify QP after
checking the modify QP command completed successfully.
Signed-off-by: Jack Morgenstein <jackm@mellanox.co.il>
Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband')
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_qp.c | 11 |
1 files changed, 6 insertions, 5 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c index 84056a8b794e..3543299ecb15 100644 --- a/drivers/infiniband/hw/mthca/mthca_qp.c +++ b/drivers/infiniband/hw/mthca/mthca_qp.c | |||
@@ -764,8 +764,6 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask) | |||
764 | qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RWE | | 764 | qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RWE | |
765 | MTHCA_QP_OPTPAR_RRE | | 765 | MTHCA_QP_OPTPAR_RRE | |
766 | MTHCA_QP_OPTPAR_RAE); | 766 | MTHCA_QP_OPTPAR_RAE); |
767 | |||
768 | qp->atomic_rd_en = attr->qp_access_flags; | ||
769 | } | 767 | } |
770 | 768 | ||
771 | if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { | 769 | if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { |
@@ -801,8 +799,6 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask) | |||
801 | cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); | 799 | cpu_to_be32(fls(attr->max_dest_rd_atomic - 1) << 21); |
802 | 800 | ||
803 | qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RRA_MAX); | 801 | qp_param->opt_param_mask |= cpu_to_be32(MTHCA_QP_OPTPAR_RRA_MAX); |
804 | |||
805 | qp->resp_depth = attr->max_dest_rd_atomic; | ||
806 | } | 802 | } |
807 | 803 | ||
808 | qp_context->params2 |= cpu_to_be32(MTHCA_QP_BIT_RSC); | 804 | qp_context->params2 |= cpu_to_be32(MTHCA_QP_BIT_RSC); |
@@ -844,8 +840,13 @@ int mthca_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr, int attr_mask) | |||
844 | err = -EINVAL; | 840 | err = -EINVAL; |
845 | } | 841 | } |
846 | 842 | ||
847 | if (!err) | 843 | if (!err) { |
848 | qp->state = new_state; | 844 | qp->state = new_state; |
845 | if (attr_mask & IB_QP_ACCESS_FLAGS) | ||
846 | qp->atomic_rd_en = attr->qp_access_flags; | ||
847 | if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) | ||
848 | qp->resp_depth = attr->max_dest_rd_atomic; | ||
849 | } | ||
849 | 850 | ||
850 | mthca_free_mailbox(dev, mailbox); | 851 | mthca_free_mailbox(dev, mailbox); |
851 | 852 | ||