diff options
author | Jes Sorensen <Jes.Sorensen@redhat.com> | 2014-10-05 10:33:25 -0400 |
---|---|---|
committer | Roland Dreier <roland@purestorage.com> | 2014-10-10 12:43:01 -0400 |
commit | 05df78059b3b991036666de9ee124d5cbd9e375d (patch) | |
tree | 6cf645256572bee0250b33deb83a323c57d969ab /drivers/infiniband | |
parent | de12348535a93535c408de396d3505541ca5e0d6 (diff) |
RDMA/ocrdma: Save the bit environment, spare unncessary parenthesis
Parenthesis around constants serves no purpose, save the bits!
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband')
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma_sli.h | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h index c5212612f37f..4e036480c1a8 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h +++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h | |||
@@ -101,7 +101,7 @@ enum { | |||
101 | QTYPE_MCCQ = 3 | 101 | QTYPE_MCCQ = 3 |
102 | }; | 102 | }; |
103 | 103 | ||
104 | #define OCRDMA_MAX_SGID (8) | 104 | #define OCRDMA_MAX_SGID 8 |
105 | 105 | ||
106 | #define OCRDMA_MAX_QP 2048 | 106 | #define OCRDMA_MAX_QP 2048 |
107 | #define OCRDMA_MAX_CQ 2048 | 107 | #define OCRDMA_MAX_CQ 2048 |
@@ -126,33 +126,33 @@ enum { | |||
126 | #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */ | 126 | #define OCRDMA_DB_CQ_RING_ID_EXT_MASK 0x0C00 /* bits 10-11 of qid at 12-11 */ |
127 | /* qid #2 msbits at 12-11 */ | 127 | /* qid #2 msbits at 12-11 */ |
128 | #define OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT 0x1 | 128 | #define OCRDMA_DB_CQ_RING_ID_EXT_MASK_SHIFT 0x1 |
129 | #define OCRDMA_DB_CQ_NUM_POPPED_SHIFT (16) /* bits 16 - 28 */ | 129 | #define OCRDMA_DB_CQ_NUM_POPPED_SHIFT 16 /* bits 16 - 28 */ |
130 | /* Rearm bit */ | 130 | /* Rearm bit */ |
131 | #define OCRDMA_DB_CQ_REARM_SHIFT (29) /* bit 29 */ | 131 | #define OCRDMA_DB_CQ_REARM_SHIFT 29 /* bit 29 */ |
132 | /* solicited bit */ | 132 | /* solicited bit */ |
133 | #define OCRDMA_DB_CQ_SOLICIT_SHIFT (31) /* bit 31 */ | 133 | #define OCRDMA_DB_CQ_SOLICIT_SHIFT 31 /* bit 31 */ |
134 | 134 | ||
135 | #define OCRDMA_EQ_ID_MASK 0x1FF /* bits 0 - 8 */ | 135 | #define OCRDMA_EQ_ID_MASK 0x1FF /* bits 0 - 8 */ |
136 | #define OCRDMA_EQ_ID_EXT_MASK 0x3e00 /* bits 9-13 */ | 136 | #define OCRDMA_EQ_ID_EXT_MASK 0x3e00 /* bits 9-13 */ |
137 | #define OCRDMA_EQ_ID_EXT_MASK_SHIFT (2) /* qid bits 9-13 at 11-15 */ | 137 | #define OCRDMA_EQ_ID_EXT_MASK_SHIFT 2 /* qid bits 9-13 at 11-15 */ |
138 | 138 | ||
139 | /* Clear the interrupt for this eq */ | 139 | /* Clear the interrupt for this eq */ |
140 | #define OCRDMA_EQ_CLR_SHIFT (9) /* bit 9 */ | 140 | #define OCRDMA_EQ_CLR_SHIFT 9 /* bit 9 */ |
141 | /* Must be 1 */ | 141 | /* Must be 1 */ |
142 | #define OCRDMA_EQ_TYPE_SHIFT (10) /* bit 10 */ | 142 | #define OCRDMA_EQ_TYPE_SHIFT 10 /* bit 10 */ |
143 | /* Number of event entries processed */ | 143 | /* Number of event entries processed */ |
144 | #define OCRDMA_NUM_EQE_SHIFT (16) /* bits 16 - 28 */ | 144 | #define OCRDMA_NUM_EQE_SHIFT 16 /* bits 16 - 28 */ |
145 | /* Rearm bit */ | 145 | /* Rearm bit */ |
146 | #define OCRDMA_REARM_SHIFT (29) /* bit 29 */ | 146 | #define OCRDMA_REARM_SHIFT 29 /* bit 29 */ |
147 | 147 | ||
148 | #define OCRDMA_MQ_ID_MASK 0x7FF /* bits 0 - 10 */ | 148 | #define OCRDMA_MQ_ID_MASK 0x7FF /* bits 0 - 10 */ |
149 | /* Number of entries posted */ | 149 | /* Number of entries posted */ |
150 | #define OCRDMA_MQ_NUM_MQE_SHIFT (16) /* bits 16 - 29 */ | 150 | #define OCRDMA_MQ_NUM_MQE_SHIFT 16 /* bits 16 - 29 */ |
151 | 151 | ||
152 | #define OCRDMA_MIN_HPAGE_SIZE (4096) | 152 | #define OCRDMA_MIN_HPAGE_SIZE 4096 |
153 | 153 | ||
154 | #define OCRDMA_MIN_Q_PAGE_SIZE (4096) | 154 | #define OCRDMA_MIN_Q_PAGE_SIZE 4096 |
155 | #define OCRDMA_MAX_Q_PAGES (8) | 155 | #define OCRDMA_MAX_Q_PAGES 8 |
156 | 156 | ||
157 | #define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C | 157 | #define OCRDMA_SLI_ASIC_ID_OFFSET 0x9C |
158 | #define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF | 158 | #define OCRDMA_SLI_ASIC_REV_MASK 0x000000FF |
@@ -168,14 +168,14 @@ enum { | |||
168 | # 6: 256K Bytes | 168 | # 6: 256K Bytes |
169 | # 7: 512K Bytes | 169 | # 7: 512K Bytes |
170 | */ | 170 | */ |
171 | #define OCRDMA_MAX_Q_PAGE_SIZE_CNT (8) | 171 | #define OCRDMA_MAX_Q_PAGE_SIZE_CNT 8 |
172 | #define OCRDMA_Q_PAGE_BASE_SIZE (OCRDMA_MIN_Q_PAGE_SIZE * OCRDMA_MAX_Q_PAGES) | 172 | #define OCRDMA_Q_PAGE_BASE_SIZE (OCRDMA_MIN_Q_PAGE_SIZE * OCRDMA_MAX_Q_PAGES) |
173 | 173 | ||
174 | #define MAX_OCRDMA_QP_PAGES (8) | 174 | #define MAX_OCRDMA_QP_PAGES 8 |
175 | #define OCRDMA_MAX_WQE_MEM_SIZE (MAX_OCRDMA_QP_PAGES * OCRDMA_MIN_HQ_PAGE_SIZE) | 175 | #define OCRDMA_MAX_WQE_MEM_SIZE (MAX_OCRDMA_QP_PAGES * OCRDMA_MIN_HQ_PAGE_SIZE) |
176 | 176 | ||
177 | #define OCRDMA_CREATE_CQ_MAX_PAGES (4) | 177 | #define OCRDMA_CREATE_CQ_MAX_PAGES 4 |
178 | #define OCRDMA_DPP_CQE_SIZE (4) | 178 | #define OCRDMA_DPP_CQE_SIZE 4 |
179 | 179 | ||
180 | #define OCRDMA_GEN2_MAX_CQE 1024 | 180 | #define OCRDMA_GEN2_MAX_CQE 1024 |
181 | #define OCRDMA_GEN2_CQ_PAGE_SIZE 4096 | 181 | #define OCRDMA_GEN2_CQ_PAGE_SIZE 4096 |
@@ -290,7 +290,7 @@ struct ocrdma_pa { | |||
290 | u32 hi; | 290 | u32 hi; |
291 | }; | 291 | }; |
292 | 292 | ||
293 | #define MAX_OCRDMA_EQ_PAGES (8) | 293 | #define MAX_OCRDMA_EQ_PAGES 8 |
294 | struct ocrdma_create_eq_req { | 294 | struct ocrdma_create_eq_req { |
295 | struct ocrdma_mbx_hdr req; | 295 | struct ocrdma_mbx_hdr req; |
296 | u32 num_pages; | 296 | u32 num_pages; |
@@ -312,7 +312,7 @@ struct ocrdma_create_eq_rsp { | |||
312 | u32 vector_eqid; | 312 | u32 vector_eqid; |
313 | }; | 313 | }; |
314 | 314 | ||
315 | #define OCRDMA_EQ_MINOR_OTHER (0x1) | 315 | #define OCRDMA_EQ_MINOR_OTHER 0x1 |
316 | 316 | ||
317 | enum { | 317 | enum { |
318 | OCRDMA_MCQE_STATUS_SHIFT = 0, | 318 | OCRDMA_MCQE_STATUS_SHIFT = 0, |