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authorMichael S. Tsirkin <mst@mellanox.co.il>2006-05-18 11:32:54 -0400
committerRoland Dreier <rolandd@cisco.com>2006-05-18 14:37:03 -0400
commit23f3bc0f2c1e26215b671499c07047c325d54d9c (patch)
treea76e595b413de71d7f6fae1d959566447e1f6c5e /drivers/infiniband
parent0cb4fe8d2658dc0bd1accfbb74ee288a9d6788f4 (diff)
IB/mthca: Fix posting lists of 256 receive requests for Tavor
If we post a list of length 256 exactly, nreq in doorbell gets set to 256 which is wrong: it should be encoded by 0. This is because we only zero it out on the next WR, which may not be there. The solution is to ring the doorbell after posting a WQE, not before posting the next one. Signed-off-by: Michael S. Tsirkin <mst@mellanox.co.il> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_qp.c35
1 files changed, 18 insertions, 17 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_qp.c b/drivers/infiniband/hw/mthca/mthca_qp.c
index 19765f6f8d58..07c13be07a4a 100644
--- a/drivers/infiniband/hw/mthca/mthca_qp.c
+++ b/drivers/infiniband/hw/mthca/mthca_qp.c
@@ -1727,23 +1727,7 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
1727 1727
1728 ind = qp->rq.next_ind; 1728 ind = qp->rq.next_ind;
1729 1729
1730 for (nreq = 0; wr; ++nreq, wr = wr->next) { 1730 for (nreq = 0; wr; wr = wr->next) {
1731 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
1732 nreq = 0;
1733
1734 doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0);
1735 doorbell[1] = cpu_to_be32(qp->qpn << 8);
1736
1737 wmb();
1738
1739 mthca_write64(doorbell,
1740 dev->kar + MTHCA_RECEIVE_DOORBELL,
1741 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
1742
1743 qp->rq.head += MTHCA_TAVOR_MAX_WQES_PER_RECV_DB;
1744 size0 = 0;
1745 }
1746
1747 if (mthca_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) { 1731 if (mthca_wq_overflow(&qp->rq, nreq, qp->ibqp.recv_cq)) {
1748 mthca_err(dev, "RQ %06x full (%u head, %u tail," 1732 mthca_err(dev, "RQ %06x full (%u head, %u tail,"
1749 " %d max, %d nreq)\n", qp->qpn, 1733 " %d max, %d nreq)\n", qp->qpn,
@@ -1797,6 +1781,23 @@ int mthca_tavor_post_receive(struct ib_qp *ibqp, struct ib_recv_wr *wr,
1797 ++ind; 1781 ++ind;
1798 if (unlikely(ind >= qp->rq.max)) 1782 if (unlikely(ind >= qp->rq.max))
1799 ind -= qp->rq.max; 1783 ind -= qp->rq.max;
1784
1785 ++nreq;
1786 if (unlikely(nreq == MTHCA_TAVOR_MAX_WQES_PER_RECV_DB)) {
1787 nreq = 0;
1788
1789 doorbell[0] = cpu_to_be32((qp->rq.next_ind << qp->rq.wqe_shift) | size0);
1790 doorbell[1] = cpu_to_be32(qp->qpn << 8);
1791
1792 wmb();
1793
1794 mthca_write64(doorbell,
1795 dev->kar + MTHCA_RECEIVE_DOORBELL,
1796 MTHCA_GET_DOORBELL_LOCK(&dev->doorbell_lock));
1797
1798 qp->rq.head += MTHCA_TAVOR_MAX_WQES_PER_RECV_DB;
1799 size0 = 0;
1800 }
1800 } 1801 }
1801 1802
1802out: 1803out: