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authorRoland Dreier <rolandd@cisco.com>2005-10-24 13:55:29 -0400
committerRoland Dreier <rolandd@cisco.com>2005-10-24 13:55:29 -0400
commitec329a135974f1c400214dab02f09584d4beeba9 (patch)
tree235be754f76f4e7d51975d2434f226cfc75cdd08 /drivers/infiniband
parentbbf207860931b6a033d0fbcd170ae2332c0d8216 (diff)
parent5d7edb3c1a01310725d86f0d83fb3be45685dc82 (diff)
Manual merge of for-linus to upstream (fix conflicts in drivers/infiniband/core/ucm.c)
Diffstat (limited to 'drivers/infiniband')
-rw-r--r--drivers/infiniband/core/cm.c1
-rw-r--r--drivers/infiniband/core/sa_query.c1
-rw-r--r--drivers/infiniband/core/ucm.c1
-rw-r--r--drivers/infiniband/core/uverbs_main.c7
-rw-r--r--drivers/infiniband/hw/mthca/mthca_eq.c21
5 files changed, 21 insertions, 10 deletions
diff --git a/drivers/infiniband/core/cm.c b/drivers/infiniband/core/cm.c
index 6f747debca90..3fe6f4754fa8 100644
--- a/drivers/infiniband/core/cm.c
+++ b/drivers/infiniband/core/cm.c
@@ -3338,6 +3338,7 @@ static void __exit ib_cm_cleanup(void)
3338 flush_workqueue(cm.wq); 3338 flush_workqueue(cm.wq);
3339 destroy_workqueue(cm.wq); 3339 destroy_workqueue(cm.wq);
3340 ib_unregister_client(&cm_client); 3340 ib_unregister_client(&cm_client);
3341 idr_destroy(&cm.local_id_table);
3341} 3342}
3342 3343
3343module_init(ib_cm_init); 3344module_init(ib_cm_init);
diff --git a/drivers/infiniband/core/sa_query.c b/drivers/infiniband/core/sa_query.c
index a2c4234ca8a3..0e5ef97f7637 100644
--- a/drivers/infiniband/core/sa_query.c
+++ b/drivers/infiniband/core/sa_query.c
@@ -993,6 +993,7 @@ static int __init ib_sa_init(void)
993static void __exit ib_sa_cleanup(void) 993static void __exit ib_sa_cleanup(void)
994{ 994{
995 ib_unregister_client(&sa_client); 995 ib_unregister_client(&sa_client);
996 idr_destroy(&query_idr);
996} 997}
997 998
998module_init(ib_sa_init); 999module_init(ib_sa_init);
diff --git a/drivers/infiniband/core/ucm.c b/drivers/infiniband/core/ucm.c
index 02ca642089bd..28477565ecba 100644
--- a/drivers/infiniband/core/ucm.c
+++ b/drivers/infiniband/core/ucm.c
@@ -1450,6 +1450,7 @@ static void __exit ib_ucm_cleanup(void)
1450 ib_unregister_client(&ucm_client); 1450 ib_unregister_client(&ucm_client);
1451 class_unregister(&ucm_class); 1451 class_unregister(&ucm_class);
1452 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES); 1452 unregister_chrdev_region(IB_UCM_BASE_DEV, IB_UCM_MAX_DEVICES);
1453 idr_destroy(&ctx_id_table);
1453} 1454}
1454 1455
1455module_init(ib_ucm_init); 1456module_init(ib_ucm_init);
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index ef2312a9ea76..251c752a7ae6 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -802,6 +802,13 @@ static void __exit ib_uverbs_cleanup(void)
802 unregister_filesystem(&uverbs_event_fs); 802 unregister_filesystem(&uverbs_event_fs);
803 class_unregister(&uverbs_class); 803 class_unregister(&uverbs_class);
804 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES); 804 unregister_chrdev_region(IB_UVERBS_BASE_DEV, IB_UVERBS_MAX_DEVICES);
805 idr_destroy(&ib_uverbs_pd_idr);
806 idr_destroy(&ib_uverbs_mr_idr);
807 idr_destroy(&ib_uverbs_mw_idr);
808 idr_destroy(&ib_uverbs_ah_idr);
809 idr_destroy(&ib_uverbs_cq_idr);
810 idr_destroy(&ib_uverbs_qp_idr);
811 idr_destroy(&ib_uverbs_srq_idr);
805} 812}
806 813
807module_init(ib_uverbs_init); 814module_init(ib_uverbs_init);
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c
index f2afdc6c7e60..e5a047a6dbeb 100644
--- a/drivers/infiniband/hw/mthca/mthca_eq.c
+++ b/drivers/infiniband/hw/mthca/mthca_eq.c
@@ -411,20 +411,21 @@ static irqreturn_t mthca_tavor_interrupt(int irq, void *dev_ptr, struct pt_regs
411 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); 411 writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);
412 412
413 ecr = readl(dev->eq_regs.tavor.ecr_base + 4); 413 ecr = readl(dev->eq_regs.tavor.ecr_base + 4);
414 if (ecr) { 414 if (!ecr)
415 writel(ecr, dev->eq_regs.tavor.ecr_base + 415 return IRQ_NONE;
416 MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4);
417 416
418 for (i = 0; i < MTHCA_NUM_EQ; ++i) 417 writel(ecr, dev->eq_regs.tavor.ecr_base +
419 if (ecr & dev->eq_table.eq[i].eqn_mask && 418 MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4);
420 mthca_eq_int(dev, &dev->eq_table.eq[i])) { 419
420 for (i = 0; i < MTHCA_NUM_EQ; ++i)
421 if (ecr & dev->eq_table.eq[i].eqn_mask) {
422 if (mthca_eq_int(dev, &dev->eq_table.eq[i]))
421 tavor_set_eq_ci(dev, &dev->eq_table.eq[i], 423 tavor_set_eq_ci(dev, &dev->eq_table.eq[i],
422 dev->eq_table.eq[i].cons_index); 424 dev->eq_table.eq[i].cons_index);
423 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); 425 tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn);
424 } 426 }
425 }
426 427
427 return IRQ_RETVAL(ecr); 428 return IRQ_HANDLED;
428} 429}
429 430
430static irqreturn_t mthca_tavor_msi_x_interrupt(int irq, void *eq_ptr, 431static irqreturn_t mthca_tavor_msi_x_interrupt(int irq, void *eq_ptr,