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authorShirley Ma <mashirle@us.ibm.com>2008-04-23 14:55:45 -0400
committerRoland Dreier <rolandd@cisco.com>2008-04-23 14:55:45 -0400
commitbc7b3a36ba02e4053ca38653e6a753082d9add03 (patch)
tree28fe1daa7cab6c7cab71bbc7af22ee6ca7746323 /drivers/infiniband/ulp/ipoib/ipoib.h
parentbc5698f3ecc9587e1edb343a2878f8d228c49e0e (diff)
IPoIB: Handle 4K IB MTU for UD (datagram) mode
This patch enables IPoIB to use 4K UD messages (when the underlying device and fabrics support a 4K MTU) by using two scatter buffers when PAGE_SIZE is less than or equal to thhe HCA IB MTU size. The first buffer is for IPoIB header + GRH header, and the second buffer is the IPoIB payload, which is 4K-4. Signed-off-by: Shirley Ma <xma@us.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/ulp/ipoib/ipoib.h')
-rw-r--r--drivers/infiniband/ulp/ipoib/ipoib.h20
1 files changed, 16 insertions, 4 deletions
diff --git a/drivers/infiniband/ulp/ipoib/ipoib.h b/drivers/infiniband/ulp/ipoib/ipoib.h
index 73b2b176ad0e..f1f142dc64b1 100644
--- a/drivers/infiniband/ulp/ipoib/ipoib.h
+++ b/drivers/infiniband/ulp/ipoib/ipoib.h
@@ -56,11 +56,11 @@
56/* constants */ 56/* constants */
57 57
58enum { 58enum {
59 IPOIB_PACKET_SIZE = 2048,
60 IPOIB_BUF_SIZE = IPOIB_PACKET_SIZE + IB_GRH_BYTES,
61
62 IPOIB_ENCAP_LEN = 4, 59 IPOIB_ENCAP_LEN = 4,
63 60
61 IPOIB_UD_HEAD_SIZE = IB_GRH_BYTES + IPOIB_ENCAP_LEN,
62 IPOIB_UD_RX_SG = 2, /* max buffer needed for 4K mtu */
63
64 IPOIB_CM_MTU = 0x10000 - 0x10, /* padding to align header to 16 */ 64 IPOIB_CM_MTU = 0x10000 - 0x10, /* padding to align header to 16 */
65 IPOIB_CM_BUF_SIZE = IPOIB_CM_MTU + IPOIB_ENCAP_LEN, 65 IPOIB_CM_BUF_SIZE = IPOIB_CM_MTU + IPOIB_ENCAP_LEN,
66 IPOIB_CM_HEAD_SIZE = IPOIB_CM_BUF_SIZE % PAGE_SIZE, 66 IPOIB_CM_HEAD_SIZE = IPOIB_CM_BUF_SIZE % PAGE_SIZE,
@@ -139,7 +139,7 @@ struct ipoib_mcast {
139 139
140struct ipoib_rx_buf { 140struct ipoib_rx_buf {
141 struct sk_buff *skb; 141 struct sk_buff *skb;
142 u64 mapping; 142 u64 mapping[IPOIB_UD_RX_SG];
143}; 143};
144 144
145struct ipoib_tx_buf { 145struct ipoib_tx_buf {
@@ -294,6 +294,7 @@ struct ipoib_dev_priv {
294 294
295 unsigned int admin_mtu; 295 unsigned int admin_mtu;
296 unsigned int mcast_mtu; 296 unsigned int mcast_mtu;
297 unsigned int max_ib_mtu;
297 298
298 struct ipoib_rx_buf *rx_ring; 299 struct ipoib_rx_buf *rx_ring;
299 300
@@ -305,6 +306,9 @@ struct ipoib_dev_priv {
305 struct ib_send_wr tx_wr; 306 struct ib_send_wr tx_wr;
306 unsigned tx_outstanding; 307 unsigned tx_outstanding;
307 308
309 struct ib_recv_wr rx_wr;
310 struct ib_sge rx_sge[IPOIB_UD_RX_SG];
311
308 struct ib_wc ibwc[IPOIB_NUM_WC]; 312 struct ib_wc ibwc[IPOIB_NUM_WC];
309 313
310 struct list_head dead_ahs; 314 struct list_head dead_ahs;
@@ -366,6 +370,14 @@ struct ipoib_neigh {
366 struct list_head list; 370 struct list_head list;
367}; 371};
368 372
373#define IPOIB_UD_MTU(ib_mtu) (ib_mtu - IPOIB_ENCAP_LEN)
374#define IPOIB_UD_BUF_SIZE(ib_mtu) (ib_mtu + IB_GRH_BYTES)
375
376static inline int ipoib_ud_need_sg(unsigned int ib_mtu)
377{
378 return IPOIB_UD_BUF_SIZE(ib_mtu) > PAGE_SIZE;
379}
380
369/* 381/*
370 * We stash a pointer to our private neighbour information after our 382 * We stash a pointer to our private neighbour information after our
371 * hardware address in neigh->ha. The ALIGN() expression here makes 383 * hardware address in neigh->ha. The ALIGN() expression here makes