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authorHoang-Nam Nguyen <hnguyen@de.ibm.com>2007-07-12 11:53:47 -0400
committerRoland Dreier <rolandd@cisco.com>2007-07-17 21:37:40 -0400
commit2b94397adc68c2f0f851539884cc426e03444a26 (patch)
treef510f23f62efea31f1de472c6a384d55f593b6be /drivers/infiniband/hw
parent187c72e31f92791ec70395b80aa9883f2edad97f (diff)
IB/ehca: Fix warnings issued by checkpatch.pl
Run the existing ehca code through checkpatch.pl and clean up the worst of the coding style violations. Signed-off-by: Joachim Fenkes <fenkes@de.ibm.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw')
-rw-r--r--drivers/infiniband/hw/ehca/ehca_av.c2
-rw-r--r--drivers/infiniband/hw/ehca/ehca_classes.h4
-rw-r--r--drivers/infiniband/hw/ehca/ehca_classes_pSeries.h156
-rw-r--r--drivers/infiniband/hw/ehca/ehca_cq.c2
-rw-r--r--drivers/infiniband/hw/ehca/ehca_eq.c3
-rw-r--r--drivers/infiniband/hw/ehca/ehca_hca.c28
-rw-r--r--drivers/infiniband/hw/ehca/ehca_irq.c56
-rw-r--r--drivers/infiniband/hw/ehca/ehca_iverbs.h7
-rw-r--r--drivers/infiniband/hw/ehca/ehca_main.c21
-rw-r--r--drivers/infiniband/hw/ehca/ehca_mrmw.c59
-rw-r--r--drivers/infiniband/hw/ehca/ehca_mrmw.h7
-rw-r--r--drivers/infiniband/hw/ehca/ehca_qes.h22
-rw-r--r--drivers/infiniband/hw/ehca/ehca_qp.c39
-rw-r--r--drivers/infiniband/hw/ehca/ehca_reqs.c15
-rw-r--r--drivers/infiniband/hw/ehca/ehca_tools.h28
-rw-r--r--drivers/infiniband/hw/ehca/ehca_uverbs.c10
-rw-r--r--drivers/infiniband/hw/ehca/hcp_if.c8
-rw-r--r--drivers/infiniband/hw/ehca/hcp_phyp.c2
-rw-r--r--drivers/infiniband/hw/ehca/hipz_fns_core.h4
-rw-r--r--drivers/infiniband/hw/ehca/hipz_hw.h24
-rw-r--r--drivers/infiniband/hw/ehca/ipz_pt_fn.c2
-rw-r--r--drivers/infiniband/hw/ehca/ipz_pt_fn.h4
22 files changed, 261 insertions, 242 deletions
diff --git a/drivers/infiniband/hw/ehca/ehca_av.c b/drivers/infiniband/hw/ehca/ehca_av.c
index 3cd6bf3402d1..e53a97af1260 100644
--- a/drivers/infiniband/hw/ehca/ehca_av.c
+++ b/drivers/infiniband/hw/ehca/ehca_av.c
@@ -79,7 +79,7 @@ struct ib_ah *ehca_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
79 av->av.ipd = (ah_mult > 0) ? 79 av->av.ipd = (ah_mult > 0) ?
80 ((ehca_mult - 1) / ah_mult) : 0; 80 ((ehca_mult - 1) / ah_mult) : 0;
81 } else 81 } else
82 av->av.ipd = ehca_static_rate; 82 av->av.ipd = ehca_static_rate;
83 83
84 av->av.lnh = ah_attr->ah_flags; 84 av->av.lnh = ah_attr->ah_flags;
85 av->av.grh.word_0 = EHCA_BMASK_SET(GRH_IPVERSION_MASK, 6); 85 av->av.grh.word_0 = EHCA_BMASK_SET(GRH_IPVERSION_MASK, 6);
diff --git a/drivers/infiniband/hw/ehca/ehca_classes.h b/drivers/infiniband/hw/ehca/ehca_classes.h
index 5e00202dc779..043e4fb23fb0 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes.h
@@ -208,7 +208,7 @@ struct ehca_mr {
208 u32 num_hwpages; /* number of hw pages to form MR */ 208 u32 num_hwpages; /* number of hw pages to form MR */
209 int acl; /* ACL (stored here for usage in reregister) */ 209 int acl; /* ACL (stored here for usage in reregister) */
210 u64 *start; /* virtual start address (stored here for */ 210 u64 *start; /* virtual start address (stored here for */
211 /* usage in reregister) */ 211 /* usage in reregister) */
212 u64 size; /* size (stored here for usage in reregister) */ 212 u64 size; /* size (stored here for usage in reregister) */
213 u32 fmr_page_size; /* page size for FMR */ 213 u32 fmr_page_size; /* page size for FMR */
214 u32 fmr_max_pages; /* max pages for FMR */ 214 u32 fmr_max_pages; /* max pages for FMR */
@@ -391,6 +391,6 @@ struct ehca_alloc_qp_parms {
391 391
392int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp); 392int ehca_cq_assign_qp(struct ehca_cq *cq, struct ehca_qp *qp);
393int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num); 393int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int qp_num);
394struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int qp_num); 394struct ehca_qp *ehca_cq_get_qp(struct ehca_cq *cq, int qp_num);
395 395
396#endif 396#endif
diff --git a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h b/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h
index fb3df5c271e7..1798e6466bd0 100644
--- a/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h
+++ b/drivers/infiniband/hw/ehca/ehca_classes_pSeries.h
@@ -154,83 +154,83 @@ struct hcp_modify_qp_control_block {
154 u32 reserved_70_127[58]; /* 70 */ 154 u32 reserved_70_127[58]; /* 70 */
155}; 155};
156 156
157#define MQPCB_MASK_QKEY EHCA_BMASK_IBM(0,0) 157#define MQPCB_MASK_QKEY EHCA_BMASK_IBM( 0, 0)
158#define MQPCB_MASK_SEND_PSN EHCA_BMASK_IBM(2,2) 158#define MQPCB_MASK_SEND_PSN EHCA_BMASK_IBM( 2, 2)
159#define MQPCB_MASK_RECEIVE_PSN EHCA_BMASK_IBM(3,3) 159#define MQPCB_MASK_RECEIVE_PSN EHCA_BMASK_IBM( 3, 3)
160#define MQPCB_MASK_PRIM_PHYS_PORT EHCA_BMASK_IBM(4,4) 160#define MQPCB_MASK_PRIM_PHYS_PORT EHCA_BMASK_IBM( 4, 4)
161#define MQPCB_PRIM_PHYS_PORT EHCA_BMASK_IBM(24,31) 161#define MQPCB_PRIM_PHYS_PORT EHCA_BMASK_IBM(24, 31)
162#define MQPCB_MASK_ALT_PHYS_PORT EHCA_BMASK_IBM(5,5) 162#define MQPCB_MASK_ALT_PHYS_PORT EHCA_BMASK_IBM( 5, 5)
163#define MQPCB_MASK_PRIM_P_KEY_IDX EHCA_BMASK_IBM(6,6) 163#define MQPCB_MASK_PRIM_P_KEY_IDX EHCA_BMASK_IBM( 6, 6)
164#define MQPCB_PRIM_P_KEY_IDX EHCA_BMASK_IBM(24,31) 164#define MQPCB_PRIM_P_KEY_IDX EHCA_BMASK_IBM(24, 31)
165#define MQPCB_MASK_ALT_P_KEY_IDX EHCA_BMASK_IBM(7,7) 165#define MQPCB_MASK_ALT_P_KEY_IDX EHCA_BMASK_IBM( 7, 7)
166#define MQPCB_MASK_RDMA_ATOMIC_CTRL EHCA_BMASK_IBM(8,8) 166#define MQPCB_MASK_RDMA_ATOMIC_CTRL EHCA_BMASK_IBM( 8, 8)
167#define MQPCB_MASK_QP_STATE EHCA_BMASK_IBM(9,9) 167#define MQPCB_MASK_QP_STATE EHCA_BMASK_IBM( 9, 9)
168#define MQPCB_QP_STATE EHCA_BMASK_IBM(24,31) 168#define MQPCB_QP_STATE EHCA_BMASK_IBM(24, 31)
169#define MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES EHCA_BMASK_IBM(11,11) 169#define MQPCB_MASK_RDMA_NR_ATOMIC_RESP_RES EHCA_BMASK_IBM(11, 11)
170#define MQPCB_MASK_PATH_MIGRATION_STATE EHCA_BMASK_IBM(12,12) 170#define MQPCB_MASK_PATH_MIGRATION_STATE EHCA_BMASK_IBM(12, 12)
171#define MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP EHCA_BMASK_IBM(13,13) 171#define MQPCB_MASK_RDMA_ATOMIC_OUTST_DEST_QP EHCA_BMASK_IBM(13, 13)
172#define MQPCB_MASK_DEST_QP_NR EHCA_BMASK_IBM(14,14) 172#define MQPCB_MASK_DEST_QP_NR EHCA_BMASK_IBM(14, 14)
173#define MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD EHCA_BMASK_IBM(15,15) 173#define MQPCB_MASK_MIN_RNR_NAK_TIMER_FIELD EHCA_BMASK_IBM(15, 15)
174#define MQPCB_MASK_SERVICE_LEVEL EHCA_BMASK_IBM(16,16) 174#define MQPCB_MASK_SERVICE_LEVEL EHCA_BMASK_IBM(16, 16)
175#define MQPCB_MASK_SEND_GRH_FLAG EHCA_BMASK_IBM(17,17) 175#define MQPCB_MASK_SEND_GRH_FLAG EHCA_BMASK_IBM(17, 17)
176#define MQPCB_MASK_RETRY_COUNT EHCA_BMASK_IBM(18,18) 176#define MQPCB_MASK_RETRY_COUNT EHCA_BMASK_IBM(18, 18)
177#define MQPCB_MASK_TIMEOUT EHCA_BMASK_IBM(19,19) 177#define MQPCB_MASK_TIMEOUT EHCA_BMASK_IBM(19, 19)
178#define MQPCB_MASK_PATH_MTU EHCA_BMASK_IBM(20,20) 178#define MQPCB_MASK_PATH_MTU EHCA_BMASK_IBM(20, 20)
179#define MQPCB_PATH_MTU EHCA_BMASK_IBM(24,31) 179#define MQPCB_PATH_MTU EHCA_BMASK_IBM(24, 31)
180#define MQPCB_MASK_MAX_STATIC_RATE EHCA_BMASK_IBM(21,21) 180#define MQPCB_MASK_MAX_STATIC_RATE EHCA_BMASK_IBM(21, 21)
181#define MQPCB_MAX_STATIC_RATE EHCA_BMASK_IBM(24,31) 181#define MQPCB_MAX_STATIC_RATE EHCA_BMASK_IBM(24, 31)
182#define MQPCB_MASK_DLID EHCA_BMASK_IBM(22,22) 182#define MQPCB_MASK_DLID EHCA_BMASK_IBM(22, 22)
183#define MQPCB_DLID EHCA_BMASK_IBM(16,31) 183#define MQPCB_DLID EHCA_BMASK_IBM(16, 31)
184#define MQPCB_MASK_RNR_RETRY_COUNT EHCA_BMASK_IBM(23,23) 184#define MQPCB_MASK_RNR_RETRY_COUNT EHCA_BMASK_IBM(23, 23)
185#define MQPCB_RNR_RETRY_COUNT EHCA_BMASK_IBM(29,31) 185#define MQPCB_RNR_RETRY_COUNT EHCA_BMASK_IBM(29, 31)
186#define MQPCB_MASK_SOURCE_PATH_BITS EHCA_BMASK_IBM(24,24) 186#define MQPCB_MASK_SOURCE_PATH_BITS EHCA_BMASK_IBM(24, 24)
187#define MQPCB_SOURCE_PATH_BITS EHCA_BMASK_IBM(25,31) 187#define MQPCB_SOURCE_PATH_BITS EHCA_BMASK_IBM(25, 31)
188#define MQPCB_MASK_TRAFFIC_CLASS EHCA_BMASK_IBM(25,25) 188#define MQPCB_MASK_TRAFFIC_CLASS EHCA_BMASK_IBM(25, 25)
189#define MQPCB_TRAFFIC_CLASS EHCA_BMASK_IBM(24,31) 189#define MQPCB_TRAFFIC_CLASS EHCA_BMASK_IBM(24, 31)
190#define MQPCB_MASK_HOP_LIMIT EHCA_BMASK_IBM(26,26) 190#define MQPCB_MASK_HOP_LIMIT EHCA_BMASK_IBM(26, 26)
191#define MQPCB_HOP_LIMIT EHCA_BMASK_IBM(24,31) 191#define MQPCB_HOP_LIMIT EHCA_BMASK_IBM(24, 31)
192#define MQPCB_MASK_SOURCE_GID_IDX EHCA_BMASK_IBM(27,27) 192#define MQPCB_MASK_SOURCE_GID_IDX EHCA_BMASK_IBM(27, 27)
193#define MQPCB_SOURCE_GID_IDX EHCA_BMASK_IBM(24,31) 193#define MQPCB_SOURCE_GID_IDX EHCA_BMASK_IBM(24, 31)
194#define MQPCB_MASK_FLOW_LABEL EHCA_BMASK_IBM(28,28) 194#define MQPCB_MASK_FLOW_LABEL EHCA_BMASK_IBM(28, 28)
195#define MQPCB_FLOW_LABEL EHCA_BMASK_IBM(12,31) 195#define MQPCB_FLOW_LABEL EHCA_BMASK_IBM(12, 31)
196#define MQPCB_MASK_DEST_GID EHCA_BMASK_IBM(30,30) 196#define MQPCB_MASK_DEST_GID EHCA_BMASK_IBM(30, 30)
197#define MQPCB_MASK_SERVICE_LEVEL_AL EHCA_BMASK_IBM(31,31) 197#define MQPCB_MASK_SERVICE_LEVEL_AL EHCA_BMASK_IBM(31, 31)
198#define MQPCB_SERVICE_LEVEL_AL EHCA_BMASK_IBM(28,31) 198#define MQPCB_SERVICE_LEVEL_AL EHCA_BMASK_IBM(28, 31)
199#define MQPCB_MASK_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(32,32) 199#define MQPCB_MASK_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(32, 32)
200#define MQPCB_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(31,31) 200#define MQPCB_SEND_GRH_FLAG_AL EHCA_BMASK_IBM(31, 31)
201#define MQPCB_MASK_RETRY_COUNT_AL EHCA_BMASK_IBM(33,33) 201#define MQPCB_MASK_RETRY_COUNT_AL EHCA_BMASK_IBM(33, 33)
202#define MQPCB_RETRY_COUNT_AL EHCA_BMASK_IBM(29,31) 202#define MQPCB_RETRY_COUNT_AL EHCA_BMASK_IBM(29, 31)
203#define MQPCB_MASK_TIMEOUT_AL EHCA_BMASK_IBM(34,34) 203#define MQPCB_MASK_TIMEOUT_AL EHCA_BMASK_IBM(34, 34)
204#define MQPCB_TIMEOUT_AL EHCA_BMASK_IBM(27,31) 204#define MQPCB_TIMEOUT_AL EHCA_BMASK_IBM(27, 31)
205#define MQPCB_MASK_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(35,35) 205#define MQPCB_MASK_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(35, 35)
206#define MQPCB_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(24,31) 206#define MQPCB_MAX_STATIC_RATE_AL EHCA_BMASK_IBM(24, 31)
207#define MQPCB_MASK_DLID_AL EHCA_BMASK_IBM(36,36) 207#define MQPCB_MASK_DLID_AL EHCA_BMASK_IBM(36, 36)
208#define MQPCB_DLID_AL EHCA_BMASK_IBM(16,31) 208#define MQPCB_DLID_AL EHCA_BMASK_IBM(16, 31)
209#define MQPCB_MASK_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(37,37) 209#define MQPCB_MASK_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(37, 37)
210#define MQPCB_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(29,31) 210#define MQPCB_RNR_RETRY_COUNT_AL EHCA_BMASK_IBM(29, 31)
211#define MQPCB_MASK_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(38,38) 211#define MQPCB_MASK_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(38, 38)
212#define MQPCB_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(25,31) 212#define MQPCB_SOURCE_PATH_BITS_AL EHCA_BMASK_IBM(25, 31)
213#define MQPCB_MASK_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(39,39) 213#define MQPCB_MASK_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(39, 39)
214#define MQPCB_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(24,31) 214#define MQPCB_TRAFFIC_CLASS_AL EHCA_BMASK_IBM(24, 31)
215#define MQPCB_MASK_HOP_LIMIT_AL EHCA_BMASK_IBM(40,40) 215#define MQPCB_MASK_HOP_LIMIT_AL EHCA_BMASK_IBM(40, 40)
216#define MQPCB_HOP_LIMIT_AL EHCA_BMASK_IBM(24,31) 216#define MQPCB_HOP_LIMIT_AL EHCA_BMASK_IBM(24, 31)
217#define MQPCB_MASK_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(41,41) 217#define MQPCB_MASK_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(41, 41)
218#define MQPCB_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(24,31) 218#define MQPCB_SOURCE_GID_IDX_AL EHCA_BMASK_IBM(24, 31)
219#define MQPCB_MASK_FLOW_LABEL_AL EHCA_BMASK_IBM(42,42) 219#define MQPCB_MASK_FLOW_LABEL_AL EHCA_BMASK_IBM(42, 42)
220#define MQPCB_FLOW_LABEL_AL EHCA_BMASK_IBM(12,31) 220#define MQPCB_FLOW_LABEL_AL EHCA_BMASK_IBM(12, 31)
221#define MQPCB_MASK_DEST_GID_AL EHCA_BMASK_IBM(44,44) 221#define MQPCB_MASK_DEST_GID_AL EHCA_BMASK_IBM(44, 44)
222#define MQPCB_MASK_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(45,45) 222#define MQPCB_MASK_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(45, 45)
223#define MQPCB_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(16,31) 223#define MQPCB_MAX_NR_OUTST_SEND_WR EHCA_BMASK_IBM(16, 31)
224#define MQPCB_MASK_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(46,46) 224#define MQPCB_MASK_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(46, 46)
225#define MQPCB_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(16,31) 225#define MQPCB_MAX_NR_OUTST_RECV_WR EHCA_BMASK_IBM(16, 31)
226#define MQPCB_MASK_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(47,47) 226#define MQPCB_MASK_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(47, 47)
227#define MQPCB_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(31,31) 227#define MQPCB_DISABLE_ETE_CREDIT_CHECK EHCA_BMASK_IBM(31, 31)
228#define MQPCB_QP_NUMBER EHCA_BMASK_IBM(8,31) 228#define MQPCB_QP_NUMBER EHCA_BMASK_IBM( 8, 31)
229#define MQPCB_MASK_QP_ENABLE EHCA_BMASK_IBM(48,48) 229#define MQPCB_MASK_QP_ENABLE EHCA_BMASK_IBM(48, 48)
230#define MQPCB_QP_ENABLE EHCA_BMASK_IBM(31,31) 230#define MQPCB_QP_ENABLE EHCA_BMASK_IBM(31, 31)
231#define MQPCB_MASK_CURR_SRQ_LIMIT EHCA_BMASK_IBM(49,49) 231#define MQPCB_MASK_CURR_SRQ_LIMIT EHCA_BMASK_IBM(49, 49)
232#define MQPCB_CURR_SRQ_LIMIT EHCA_BMASK_IBM(16,31) 232#define MQPCB_CURR_SRQ_LIMIT EHCA_BMASK_IBM(16, 31)
233#define MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG EHCA_BMASK_IBM(50,50) 233#define MQPCB_MASK_QP_AFF_ASYN_EV_LOG_REG EHCA_BMASK_IBM(50, 50)
234#define MQPCB_MASK_SHARED_RQ_HNDL EHCA_BMASK_IBM(51,51) 234#define MQPCB_MASK_SHARED_RQ_HNDL EHCA_BMASK_IBM(51, 51)
235 235
236#endif /* __EHCA_CLASSES_PSERIES_H__ */ 236#endif /* __EHCA_CLASSES_PSERIES_H__ */
diff --git a/drivers/infiniband/hw/ehca/ehca_cq.c b/drivers/infiniband/hw/ehca/ehca_cq.c
index 01d4a148bd71..9e87883b561a 100644
--- a/drivers/infiniband/hw/ehca/ehca_cq.c
+++ b/drivers/infiniband/hw/ehca/ehca_cq.c
@@ -97,7 +97,7 @@ int ehca_cq_unassign_qp(struct ehca_cq *cq, unsigned int real_qp_num)
97 return ret; 97 return ret;
98} 98}
99 99
100struct ehca_qp* ehca_cq_get_qp(struct ehca_cq *cq, int real_qp_num) 100struct ehca_qp *ehca_cq_get_qp(struct ehca_cq *cq, int real_qp_num)
101{ 101{
102 struct ehca_qp *ret = NULL; 102 struct ehca_qp *ret = NULL;
103 unsigned int key = real_qp_num & (QP_HASHTAB_LEN-1); 103 unsigned int key = real_qp_num & (QP_HASHTAB_LEN-1);
diff --git a/drivers/infiniband/hw/ehca/ehca_eq.c b/drivers/infiniband/hw/ehca/ehca_eq.c
index 4961eb88827c..4825975f88cf 100644
--- a/drivers/infiniband/hw/ehca/ehca_eq.c
+++ b/drivers/infiniband/hw/ehca/ehca_eq.c
@@ -96,7 +96,8 @@ int ehca_create_eq(struct ehca_shca *shca,
96 for (i = 0; i < nr_pages; i++) { 96 for (i = 0; i < nr_pages; i++) {
97 u64 rpage; 97 u64 rpage;
98 98
99 if (!(vpage = ipz_qpageit_get_inc(&eq->ipz_queue))) { 99 vpage = ipz_qpageit_get_inc(&eq->ipz_queue);
100 if (!vpage) {
100 ret = H_RESOURCE; 101 ret = H_RESOURCE;
101 goto create_eq_exit2; 102 goto create_eq_exit2;
102 } 103 }
diff --git a/drivers/infiniband/hw/ehca/ehca_hca.c b/drivers/infiniband/hw/ehca/ehca_hca.c
index bbd3c6a5822f..fc19ef9fd963 100644
--- a/drivers/infiniband/hw/ehca/ehca_hca.c
+++ b/drivers/infiniband/hw/ehca/ehca_hca.c
@@ -127,6 +127,7 @@ int ehca_query_port(struct ib_device *ibdev,
127 u8 port, struct ib_port_attr *props) 127 u8 port, struct ib_port_attr *props)
128{ 128{
129 int ret = 0; 129 int ret = 0;
130 u64 h_ret;
130 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca, 131 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca,
131 ib_device); 132 ib_device);
132 struct hipz_query_port *rblock; 133 struct hipz_query_port *rblock;
@@ -137,7 +138,8 @@ int ehca_query_port(struct ib_device *ibdev,
137 return -ENOMEM; 138 return -ENOMEM;
138 } 139 }
139 140
140 if (hipz_h_query_port(shca->ipz_hca_handle, port, rblock) != H_SUCCESS) { 141 h_ret = hipz_h_query_port(shca->ipz_hca_handle, port, rblock);
142 if (h_ret != H_SUCCESS) {
141 ehca_err(&shca->ib_device, "Can't query port properties"); 143 ehca_err(&shca->ib_device, "Can't query port properties");
142 ret = -EINVAL; 144 ret = -EINVAL;
143 goto query_port1; 145 goto query_port1;
@@ -197,6 +199,7 @@ int ehca_query_sma_attr(struct ehca_shca *shca,
197 u8 port, struct ehca_sma_attr *attr) 199 u8 port, struct ehca_sma_attr *attr)
198{ 200{
199 int ret = 0; 201 int ret = 0;
202 u64 h_ret;
200 struct hipz_query_port *rblock; 203 struct hipz_query_port *rblock;
201 204
202 rblock = ehca_alloc_fw_ctrlblock(GFP_ATOMIC); 205 rblock = ehca_alloc_fw_ctrlblock(GFP_ATOMIC);
@@ -205,7 +208,8 @@ int ehca_query_sma_attr(struct ehca_shca *shca,
205 return -ENOMEM; 208 return -ENOMEM;
206 } 209 }
207 210
208 if (hipz_h_query_port(shca->ipz_hca_handle, port, rblock) != H_SUCCESS) { 211 h_ret = hipz_h_query_port(shca->ipz_hca_handle, port, rblock);
212 if (h_ret != H_SUCCESS) {
209 ehca_err(&shca->ib_device, "Can't query port properties"); 213 ehca_err(&shca->ib_device, "Can't query port properties");
210 ret = -EINVAL; 214 ret = -EINVAL;
211 goto query_sma_attr1; 215 goto query_sma_attr1;
@@ -230,9 +234,11 @@ query_sma_attr1:
230int ehca_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey) 234int ehca_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
231{ 235{
232 int ret = 0; 236 int ret = 0;
233 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca, ib_device); 237 u64 h_ret;
238 struct ehca_shca *shca;
234 struct hipz_query_port *rblock; 239 struct hipz_query_port *rblock;
235 240
241 shca = container_of(ibdev, struct ehca_shca, ib_device);
236 if (index > 16) { 242 if (index > 16) {
237 ehca_err(&shca->ib_device, "Invalid index: %x.", index); 243 ehca_err(&shca->ib_device, "Invalid index: %x.", index);
238 return -EINVAL; 244 return -EINVAL;
@@ -244,7 +250,8 @@ int ehca_query_pkey(struct ib_device *ibdev, u8 port, u16 index, u16 *pkey)
244 return -ENOMEM; 250 return -ENOMEM;
245 } 251 }
246 252
247 if (hipz_h_query_port(shca->ipz_hca_handle, port, rblock) != H_SUCCESS) { 253 h_ret = hipz_h_query_port(shca->ipz_hca_handle, port, rblock);
254 if (h_ret != H_SUCCESS) {
248 ehca_err(&shca->ib_device, "Can't query port properties"); 255 ehca_err(&shca->ib_device, "Can't query port properties");
249 ret = -EINVAL; 256 ret = -EINVAL;
250 goto query_pkey1; 257 goto query_pkey1;
@@ -262,6 +269,7 @@ int ehca_query_gid(struct ib_device *ibdev, u8 port,
262 int index, union ib_gid *gid) 269 int index, union ib_gid *gid)
263{ 270{
264 int ret = 0; 271 int ret = 0;
272 u64 h_ret;
265 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca, 273 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca,
266 ib_device); 274 ib_device);
267 struct hipz_query_port *rblock; 275 struct hipz_query_port *rblock;
@@ -277,7 +285,8 @@ int ehca_query_gid(struct ib_device *ibdev, u8 port,
277 return -ENOMEM; 285 return -ENOMEM;
278 } 286 }
279 287
280 if (hipz_h_query_port(shca->ipz_hca_handle, port, rblock) != H_SUCCESS) { 288 h_ret = hipz_h_query_port(shca->ipz_hca_handle, port, rblock);
289 if (h_ret != H_SUCCESS) {
281 ehca_err(&shca->ib_device, "Can't query port properties"); 290 ehca_err(&shca->ib_device, "Can't query port properties");
282 ret = -EINVAL; 291 ret = -EINVAL;
283 goto query_gid1; 292 goto query_gid1;
@@ -302,11 +311,12 @@ int ehca_modify_port(struct ib_device *ibdev,
302 struct ib_port_modify *props) 311 struct ib_port_modify *props)
303{ 312{
304 int ret = 0; 313 int ret = 0;
305 struct ehca_shca *shca = container_of(ibdev, struct ehca_shca, ib_device); 314 struct ehca_shca *shca;
306 struct hipz_query_port *rblock; 315 struct hipz_query_port *rblock;
307 u32 cap; 316 u32 cap;
308 u64 hret; 317 u64 hret;
309 318
319 shca = container_of(ibdev, struct ehca_shca, ib_device);
310 if ((props->set_port_cap_mask | props->clr_port_cap_mask) 320 if ((props->set_port_cap_mask | props->clr_port_cap_mask)
311 & ~allowed_port_caps) { 321 & ~allowed_port_caps) {
312 ehca_err(&shca->ib_device, "Non-changeable bits set in masks " 322 ehca_err(&shca->ib_device, "Non-changeable bits set in masks "
@@ -325,7 +335,8 @@ int ehca_modify_port(struct ib_device *ibdev,
325 goto modify_port1; 335 goto modify_port1;
326 } 336 }
327 337
328 if (hipz_h_query_port(shca->ipz_hca_handle, port, rblock) != H_SUCCESS) { 338 hret = hipz_h_query_port(shca->ipz_hca_handle, port, rblock);
339 if (hret != H_SUCCESS) {
329 ehca_err(&shca->ib_device, "Can't query port properties"); 340 ehca_err(&shca->ib_device, "Can't query port properties");
330 ret = -EINVAL; 341 ret = -EINVAL;
331 goto modify_port2; 342 goto modify_port2;
@@ -337,7 +348,8 @@ int ehca_modify_port(struct ib_device *ibdev,
337 hret = hipz_h_modify_port(shca->ipz_hca_handle, port, 348 hret = hipz_h_modify_port(shca->ipz_hca_handle, port,
338 cap, props->init_type, port_modify_mask); 349 cap, props->init_type, port_modify_mask);
339 if (hret != H_SUCCESS) { 350 if (hret != H_SUCCESS) {
340 ehca_err(&shca->ib_device, "Modify port failed hret=%lx", hret); 351 ehca_err(&shca->ib_device, "Modify port failed hret=%lx",
352 hret);
341 ret = -EINVAL; 353 ret = -EINVAL;
342 } 354 }
343 355
diff --git a/drivers/infiniband/hw/ehca/ehca_irq.c b/drivers/infiniband/hw/ehca/ehca_irq.c
index 96eba3830754..4fb01fcb63ae 100644
--- a/drivers/infiniband/hw/ehca/ehca_irq.c
+++ b/drivers/infiniband/hw/ehca/ehca_irq.c
@@ -49,26 +49,26 @@
49#include "hipz_fns.h" 49#include "hipz_fns.h"
50#include "ipz_pt_fn.h" 50#include "ipz_pt_fn.h"
51 51
52#define EQE_COMPLETION_EVENT EHCA_BMASK_IBM(1,1) 52#define EQE_COMPLETION_EVENT EHCA_BMASK_IBM( 1, 1)
53#define EQE_CQ_QP_NUMBER EHCA_BMASK_IBM(8,31) 53#define EQE_CQ_QP_NUMBER EHCA_BMASK_IBM( 8, 31)
54#define EQE_EE_IDENTIFIER EHCA_BMASK_IBM(2,7) 54#define EQE_EE_IDENTIFIER EHCA_BMASK_IBM( 2, 7)
55#define EQE_CQ_NUMBER EHCA_BMASK_IBM(8,31) 55#define EQE_CQ_NUMBER EHCA_BMASK_IBM( 8, 31)
56#define EQE_QP_NUMBER EHCA_BMASK_IBM(8,31) 56#define EQE_QP_NUMBER EHCA_BMASK_IBM( 8, 31)
57#define EQE_QP_TOKEN EHCA_BMASK_IBM(32,63) 57#define EQE_QP_TOKEN EHCA_BMASK_IBM(32, 63)
58#define EQE_CQ_TOKEN EHCA_BMASK_IBM(32,63) 58#define EQE_CQ_TOKEN EHCA_BMASK_IBM(32, 63)
59 59
60#define NEQE_COMPLETION_EVENT EHCA_BMASK_IBM(1,1) 60#define NEQE_COMPLETION_EVENT EHCA_BMASK_IBM( 1, 1)
61#define NEQE_EVENT_CODE EHCA_BMASK_IBM(2,7) 61#define NEQE_EVENT_CODE EHCA_BMASK_IBM( 2, 7)
62#define NEQE_PORT_NUMBER EHCA_BMASK_IBM(8,15) 62#define NEQE_PORT_NUMBER EHCA_BMASK_IBM( 8, 15)
63#define NEQE_PORT_AVAILABILITY EHCA_BMASK_IBM(16,16) 63#define NEQE_PORT_AVAILABILITY EHCA_BMASK_IBM(16, 16)
64#define NEQE_DISRUPTIVE EHCA_BMASK_IBM(16,16) 64#define NEQE_DISRUPTIVE EHCA_BMASK_IBM(16, 16)
65 65
66#define ERROR_DATA_LENGTH EHCA_BMASK_IBM(52,63) 66#define ERROR_DATA_LENGTH EHCA_BMASK_IBM(52, 63)
67#define ERROR_DATA_TYPE EHCA_BMASK_IBM(0,7) 67#define ERROR_DATA_TYPE EHCA_BMASK_IBM( 0, 7)
68 68
69static void queue_comp_task(struct ehca_cq *__cq); 69static void queue_comp_task(struct ehca_cq *__cq);
70 70
71static struct ehca_comp_pool* pool; 71static struct ehca_comp_pool *pool;
72#ifdef CONFIG_HOTPLUG_CPU 72#ifdef CONFIG_HOTPLUG_CPU
73static struct notifier_block comp_pool_callback_nb; 73static struct notifier_block comp_pool_callback_nb;
74#endif 74#endif
@@ -85,8 +85,8 @@ static inline void comp_event_callback(struct ehca_cq *cq)
85 return; 85 return;
86} 86}
87 87
88static void print_error_data(struct ehca_shca * shca, void* data, 88static void print_error_data(struct ehca_shca *shca, void *data,
89 u64* rblock, int length) 89 u64 *rblock, int length)
90{ 90{
91 u64 type = EHCA_BMASK_GET(ERROR_DATA_TYPE, rblock[2]); 91 u64 type = EHCA_BMASK_GET(ERROR_DATA_TYPE, rblock[2]);
92 u64 resource = rblock[1]; 92 u64 resource = rblock[1];
@@ -94,7 +94,7 @@ static void print_error_data(struct ehca_shca * shca, void* data,
94 switch (type) { 94 switch (type) {
95 case 0x1: /* Queue Pair */ 95 case 0x1: /* Queue Pair */
96 { 96 {
97 struct ehca_qp *qp = (struct ehca_qp*)data; 97 struct ehca_qp *qp = (struct ehca_qp *)data;
98 98
99 /* only print error data if AER is set */ 99 /* only print error data if AER is set */
100 if (rblock[6] == 0) 100 if (rblock[6] == 0)
@@ -107,7 +107,7 @@ static void print_error_data(struct ehca_shca * shca, void* data,
107 } 107 }
108 case 0x4: /* Completion Queue */ 108 case 0x4: /* Completion Queue */
109 { 109 {
110 struct ehca_cq *cq = (struct ehca_cq*)data; 110 struct ehca_cq *cq = (struct ehca_cq *)data;
111 111
112 ehca_err(&shca->ib_device, 112 ehca_err(&shca->ib_device,
113 "CQ 0x%x (resource=%lx) has errors.", 113 "CQ 0x%x (resource=%lx) has errors.",
@@ -572,7 +572,7 @@ void ehca_tasklet_eq(unsigned long data)
572 ehca_process_eq((struct ehca_shca*)data, 1); 572 ehca_process_eq((struct ehca_shca*)data, 1);
573} 573}
574 574
575static inline int find_next_online_cpu(struct ehca_comp_pool* pool) 575static inline int find_next_online_cpu(struct ehca_comp_pool *pool)
576{ 576{
577 int cpu; 577 int cpu;
578 unsigned long flags; 578 unsigned long flags;
@@ -636,7 +636,7 @@ static void queue_comp_task(struct ehca_cq *__cq)
636 __queue_comp_task(__cq, cct); 636 __queue_comp_task(__cq, cct);
637} 637}
638 638
639static void run_comp_task(struct ehca_cpu_comp_task* cct) 639static void run_comp_task(struct ehca_cpu_comp_task *cct)
640{ 640{
641 struct ehca_cq *cq; 641 struct ehca_cq *cq;
642 unsigned long flags; 642 unsigned long flags;
@@ -666,12 +666,12 @@ static void run_comp_task(struct ehca_cpu_comp_task* cct)
666 666
667static int comp_task(void *__cct) 667static int comp_task(void *__cct)
668{ 668{
669 struct ehca_cpu_comp_task* cct = __cct; 669 struct ehca_cpu_comp_task *cct = __cct;
670 int cql_empty; 670 int cql_empty;
671 DECLARE_WAITQUEUE(wait, current); 671 DECLARE_WAITQUEUE(wait, current);
672 672
673 set_current_state(TASK_INTERRUPTIBLE); 673 set_current_state(TASK_INTERRUPTIBLE);
674 while(!kthread_should_stop()) { 674 while (!kthread_should_stop()) {
675 add_wait_queue(&cct->wait_queue, &wait); 675 add_wait_queue(&cct->wait_queue, &wait);
676 676
677 spin_lock_irq(&cct->task_lock); 677 spin_lock_irq(&cct->task_lock);
@@ -745,7 +745,7 @@ static void take_over_work(struct ehca_comp_pool *pool,
745 745
746 list_splice_init(&cct->cq_list, &list); 746 list_splice_init(&cct->cq_list, &list);
747 747
748 while(!list_empty(&list)) { 748 while (!list_empty(&list)) {
749 cq = list_entry(cct->cq_list.next, struct ehca_cq, entry); 749 cq = list_entry(cct->cq_list.next, struct ehca_cq, entry);
750 750
751 list_del(&cq->entry); 751 list_del(&cq->entry);
@@ -768,7 +768,7 @@ static int comp_pool_callback(struct notifier_block *nfb,
768 case CPU_UP_PREPARE: 768 case CPU_UP_PREPARE:
769 case CPU_UP_PREPARE_FROZEN: 769 case CPU_UP_PREPARE_FROZEN:
770 ehca_gen_dbg("CPU: %x (CPU_PREPARE)", cpu); 770 ehca_gen_dbg("CPU: %x (CPU_PREPARE)", cpu);
771 if(!create_comp_task(pool, cpu)) { 771 if (!create_comp_task(pool, cpu)) {
772 ehca_gen_err("Can't create comp_task for cpu: %x", cpu); 772 ehca_gen_err("Can't create comp_task for cpu: %x", cpu);
773 return NOTIFY_BAD; 773 return NOTIFY_BAD;
774 } 774 }
@@ -838,7 +838,7 @@ int ehca_create_comp_pool(void)
838 838
839#ifdef CONFIG_HOTPLUG_CPU 839#ifdef CONFIG_HOTPLUG_CPU
840 comp_pool_callback_nb.notifier_call = comp_pool_callback; 840 comp_pool_callback_nb.notifier_call = comp_pool_callback;
841 comp_pool_callback_nb.priority =0; 841 comp_pool_callback_nb.priority = 0;
842 register_cpu_notifier(&comp_pool_callback_nb); 842 register_cpu_notifier(&comp_pool_callback_nb);
843#endif 843#endif
844 844
diff --git a/drivers/infiniband/hw/ehca/ehca_iverbs.h b/drivers/infiniband/hw/ehca/ehca_iverbs.h
index 77aeca6a2c2f..dce503bb7d6b 100644
--- a/drivers/infiniband/hw/ehca/ehca_iverbs.h
+++ b/drivers/infiniband/hw/ehca/ehca_iverbs.h
@@ -81,8 +81,9 @@ struct ib_mr *ehca_reg_phys_mr(struct ib_pd *pd,
81 int num_phys_buf, 81 int num_phys_buf,
82 int mr_access_flags, u64 *iova_start); 82 int mr_access_flags, u64 *iova_start);
83 83
84struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64 virt, 84struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
85 int mr_access_flags, struct ib_udata *udata); 85 u64 virt, int mr_access_flags,
86 struct ib_udata *udata);
86 87
87int ehca_rereg_phys_mr(struct ib_mr *mr, 88int ehca_rereg_phys_mr(struct ib_mr *mr,
88 int mr_rereg_mask, 89 int mr_rereg_mask,
@@ -192,7 +193,7 @@ void ehca_poll_eqs(unsigned long data);
192void *ehca_alloc_fw_ctrlblock(gfp_t flags); 193void *ehca_alloc_fw_ctrlblock(gfp_t flags);
193void ehca_free_fw_ctrlblock(void *ptr); 194void ehca_free_fw_ctrlblock(void *ptr);
194#else 195#else
195#define ehca_alloc_fw_ctrlblock(flags) ((void *) get_zeroed_page(flags)) 196#define ehca_alloc_fw_ctrlblock(flags) ((void *)get_zeroed_page(flags))
196#define ehca_free_fw_ctrlblock(ptr) free_page((unsigned long)(ptr)) 197#define ehca_free_fw_ctrlblock(ptr) free_page((unsigned long)(ptr))
197#endif 198#endif
198 199
diff --git a/drivers/infiniband/hw/ehca/ehca_main.c b/drivers/infiniband/hw/ehca/ehca_main.c
index 203d01f87c30..36377c6db3d4 100644
--- a/drivers/infiniband/hw/ehca/ehca_main.c
+++ b/drivers/infiniband/hw/ehca/ehca_main.c
@@ -107,7 +107,7 @@ static DEFINE_SPINLOCK(shca_list_lock);
107static struct timer_list poll_eqs_timer; 107static struct timer_list poll_eqs_timer;
108 108
109#ifdef CONFIG_PPC_64K_PAGES 109#ifdef CONFIG_PPC_64K_PAGES
110static struct kmem_cache *ctblk_cache = NULL; 110static struct kmem_cache *ctblk_cache;
111 111
112void *ehca_alloc_fw_ctrlblock(gfp_t flags) 112void *ehca_alloc_fw_ctrlblock(gfp_t flags)
113{ 113{
@@ -200,8 +200,8 @@ static void ehca_destroy_slab_caches(void)
200#endif 200#endif
201} 201}
202 202
203#define EHCA_HCAAVER EHCA_BMASK_IBM(32,39) 203#define EHCA_HCAAVER EHCA_BMASK_IBM(32, 39)
204#define EHCA_REVID EHCA_BMASK_IBM(40,63) 204#define EHCA_REVID EHCA_BMASK_IBM(40, 63)
205 205
206static struct cap_descr { 206static struct cap_descr {
207 u64 mask; 207 u64 mask;
@@ -295,7 +295,7 @@ int ehca_sense_attributes(struct ehca_shca *shca)
295 if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap)) 295 if (EHCA_BMASK_GET(hca_cap_descr[i].mask, shca->hca_cap))
296 ehca_gen_dbg(" %s", hca_cap_descr[i].descr); 296 ehca_gen_dbg(" %s", hca_cap_descr[i].descr);
297 297
298 port = (struct hipz_query_port *) rblock; 298 port = (struct hipz_query_port *)rblock;
299 h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port); 299 h_ret = hipz_h_query_port(shca->ipz_hca_handle, 1, port);
300 if (h_ret != H_SUCCESS) { 300 if (h_ret != H_SUCCESS) {
301 ehca_gen_err("Cannot query port properties. h_ret=%lx", 301 ehca_gen_err("Cannot query port properties. h_ret=%lx",
@@ -444,7 +444,7 @@ static int ehca_create_aqp1(struct ehca_shca *shca, u32 port)
444 return -EPERM; 444 return -EPERM;
445 } 445 }
446 446
447 ibcq = ib_create_cq(&shca->ib_device, NULL, NULL, (void*)(-1), 10, 0); 447 ibcq = ib_create_cq(&shca->ib_device, NULL, NULL, (void *)(-1), 10, 0);
448 if (IS_ERR(ibcq)) { 448 if (IS_ERR(ibcq)) {
449 ehca_err(&shca->ib_device, "Cannot create AQP1 CQ."); 449 ehca_err(&shca->ib_device, "Cannot create AQP1 CQ.");
450 return PTR_ERR(ibcq); 450 return PTR_ERR(ibcq);
@@ -671,7 +671,7 @@ static int __devinit ehca_probe(struct ibmebus_dev *dev,
671 } 671 }
672 672
673 /* create internal protection domain */ 673 /* create internal protection domain */
674 ibpd = ehca_alloc_pd(&shca->ib_device, (void*)(-1), NULL); 674 ibpd = ehca_alloc_pd(&shca->ib_device, (void *)(-1), NULL);
675 if (IS_ERR(ibpd)) { 675 if (IS_ERR(ibpd)) {
676 ehca_err(&shca->ib_device, "Cannot create internal PD."); 676 ehca_err(&shca->ib_device, "Cannot create internal PD.");
677 ret = PTR_ERR(ibpd); 677 ret = PTR_ERR(ibpd);
@@ -868,18 +868,21 @@ int __init ehca_module_init(void)
868 printk(KERN_INFO "eHCA Infiniband Device Driver " 868 printk(KERN_INFO "eHCA Infiniband Device Driver "
869 "(Rel.: SVNEHCA_0023)\n"); 869 "(Rel.: SVNEHCA_0023)\n");
870 870
871 if ((ret = ehca_create_comp_pool())) { 871 ret = ehca_create_comp_pool();
872 if (ret) {
872 ehca_gen_err("Cannot create comp pool."); 873 ehca_gen_err("Cannot create comp pool.");
873 return ret; 874 return ret;
874 } 875 }
875 876
876 if ((ret = ehca_create_slab_caches())) { 877 ret = ehca_create_slab_caches();
878 if (ret) {
877 ehca_gen_err("Cannot create SLAB caches"); 879 ehca_gen_err("Cannot create SLAB caches");
878 ret = -ENOMEM; 880 ret = -ENOMEM;
879 goto module_init1; 881 goto module_init1;
880 } 882 }
881 883
882 if ((ret = ibmebus_register_driver(&ehca_driver))) { 884 ret = ibmebus_register_driver(&ehca_driver);
885 if (ret) {
883 ehca_gen_err("Cannot register eHCA device driver"); 886 ehca_gen_err("Cannot register eHCA device driver");
884 ret = -EINVAL; 887 ret = -EINVAL;
885 goto module_init2; 888 goto module_init2;
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.c b/drivers/infiniband/hw/ehca/ehca_mrmw.c
index 93c26ccfc3c5..6262c5462d50 100644
--- a/drivers/infiniband/hw/ehca/ehca_mrmw.c
+++ b/drivers/infiniband/hw/ehca/ehca_mrmw.c
@@ -61,9 +61,9 @@ static struct ehca_mr *ehca_mr_new(void)
61 struct ehca_mr *me; 61 struct ehca_mr *me;
62 62
63 me = kmem_cache_zalloc(mr_cache, GFP_KERNEL); 63 me = kmem_cache_zalloc(mr_cache, GFP_KERNEL);
64 if (me) { 64 if (me)
65 spin_lock_init(&me->mrlock); 65 spin_lock_init(&me->mrlock);
66 } else 66 else
67 ehca_gen_err("alloc failed"); 67 ehca_gen_err("alloc failed");
68 68
69 return me; 69 return me;
@@ -79,9 +79,9 @@ static struct ehca_mw *ehca_mw_new(void)
79 struct ehca_mw *me; 79 struct ehca_mw *me;
80 80
81 me = kmem_cache_zalloc(mw_cache, GFP_KERNEL); 81 me = kmem_cache_zalloc(mw_cache, GFP_KERNEL);
82 if (me) { 82 if (me)
83 spin_lock_init(&me->mwlock); 83 spin_lock_init(&me->mwlock);
84 } else 84 else
85 ehca_gen_err("alloc failed"); 85 ehca_gen_err("alloc failed");
86 86
87 return me; 87 return me;
@@ -111,7 +111,7 @@ struct ib_mr *ehca_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
111 goto get_dma_mr_exit0; 111 goto get_dma_mr_exit0;
112 } 112 }
113 113
114 ret = ehca_reg_maxmr(shca, e_maxmr, (u64*)KERNELBASE, 114 ret = ehca_reg_maxmr(shca, e_maxmr, (u64 *)KERNELBASE,
115 mr_access_flags, e_pd, 115 mr_access_flags, e_pd,
116 &e_maxmr->ib.ib_mr.lkey, 116 &e_maxmr->ib.ib_mr.lkey,
117 &e_maxmr->ib.ib_mr.rkey); 117 &e_maxmr->ib.ib_mr.rkey);
@@ -246,8 +246,9 @@ reg_phys_mr_exit0:
246 246
247/*----------------------------------------------------------------------*/ 247/*----------------------------------------------------------------------*/
248 248
249struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64 virt, 249struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length,
250 int mr_access_flags, struct ib_udata *udata) 250 u64 virt, int mr_access_flags,
251 struct ib_udata *udata)
251{ 252{
252 struct ib_mr *ib_mr; 253 struct ib_mr *ib_mr;
253 struct ehca_mr *e_mr; 254 struct ehca_mr *e_mr;
@@ -295,7 +296,7 @@ struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64 virt
295 e_mr->umem = ib_umem_get(pd->uobject->context, start, length, 296 e_mr->umem = ib_umem_get(pd->uobject->context, start, length,
296 mr_access_flags); 297 mr_access_flags);
297 if (IS_ERR(e_mr->umem)) { 298 if (IS_ERR(e_mr->umem)) {
298 ib_mr = (void *) e_mr->umem; 299 ib_mr = (void *)e_mr->umem;
299 goto reg_user_mr_exit1; 300 goto reg_user_mr_exit1;
300 } 301 }
301 302
@@ -322,8 +323,9 @@ struct ib_mr *ehca_reg_user_mr(struct ib_pd *pd, u64 start, u64 length, u64 virt
322 (&e_mr->umem->chunk_list), 323 (&e_mr->umem->chunk_list),
323 list); 324 list);
324 325
325 ret = ehca_reg_mr(shca, e_mr, (u64*) virt, length, mr_access_flags, e_pd, 326 ret = ehca_reg_mr(shca, e_mr, (u64 *)virt, length, mr_access_flags,
326 &pginfo, &e_mr->ib.ib_mr.lkey, &e_mr->ib.ib_mr.rkey); 327 e_pd, &pginfo, &e_mr->ib.ib_mr.lkey,
328 &e_mr->ib.ib_mr.rkey);
327 if (ret) { 329 if (ret) {
328 ib_mr = ERR_PTR(ret); 330 ib_mr = ERR_PTR(ret);
329 goto reg_user_mr_exit2; 331 goto reg_user_mr_exit2;
@@ -420,7 +422,7 @@ int ehca_rereg_phys_mr(struct ib_mr *mr,
420 goto rereg_phys_mr_exit0; 422 goto rereg_phys_mr_exit0;
421 } 423 }
422 if (!phys_buf_array || num_phys_buf <= 0) { 424 if (!phys_buf_array || num_phys_buf <= 0) {
423 ehca_err(mr->device, "bad input values: mr_rereg_mask=%x" 425 ehca_err(mr->device, "bad input values mr_rereg_mask=%x"
424 " phys_buf_array=%p num_phys_buf=%x", 426 " phys_buf_array=%p num_phys_buf=%x",
425 mr_rereg_mask, phys_buf_array, num_phys_buf); 427 mr_rereg_mask, phys_buf_array, num_phys_buf);
426 ret = -EINVAL; 428 ret = -EINVAL;
@@ -444,10 +446,10 @@ int ehca_rereg_phys_mr(struct ib_mr *mr,
444 446
445 /* set requested values dependent on rereg request */ 447 /* set requested values dependent on rereg request */
446 spin_lock_irqsave(&e_mr->mrlock, sl_flags); 448 spin_lock_irqsave(&e_mr->mrlock, sl_flags);
447 new_start = e_mr->start; /* new == old address */ 449 new_start = e_mr->start;
448 new_size = e_mr->size; /* new == old length */ 450 new_size = e_mr->size;
449 new_acl = e_mr->acl; /* new == old access control */ 451 new_acl = e_mr->acl;
450 new_pd = container_of(mr->pd,struct ehca_pd,ib_pd); /*new == old PD*/ 452 new_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
451 453
452 if (mr_rereg_mask & IB_MR_REREG_TRANS) { 454 if (mr_rereg_mask & IB_MR_REREG_TRANS) {
453 new_start = iova_start; /* change address */ 455 new_start = iova_start; /* change address */
@@ -517,7 +519,7 @@ int ehca_query_mr(struct ib_mr *mr, struct ib_mr_attr *mr_attr)
517 struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd); 519 struct ehca_pd *my_pd = container_of(mr->pd, struct ehca_pd, ib_pd);
518 u32 cur_pid = current->tgid; 520 u32 cur_pid = current->tgid;
519 unsigned long sl_flags; 521 unsigned long sl_flags;
520 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 522 struct ehca_mr_hipzout_parms hipzout;
521 523
522 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context && 524 if (my_pd->ib_pd.uobject && my_pd->ib_pd.uobject->context &&
523 (my_pd->ownpid != cur_pid)) { 525 (my_pd->ownpid != cur_pid)) {
@@ -629,7 +631,7 @@ struct ib_mw *ehca_alloc_mw(struct ib_pd *pd)
629 struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd); 631 struct ehca_pd *e_pd = container_of(pd, struct ehca_pd, ib_pd);
630 struct ehca_shca *shca = 632 struct ehca_shca *shca =
631 container_of(pd->device, struct ehca_shca, ib_device); 633 container_of(pd->device, struct ehca_shca, ib_device);
632 struct ehca_mw_hipzout_parms hipzout = {{0},0}; 634 struct ehca_mw_hipzout_parms hipzout;
633 635
634 e_mw = ehca_mw_new(); 636 e_mw = ehca_mw_new();
635 if (!e_mw) { 637 if (!e_mw) {
@@ -826,7 +828,7 @@ int ehca_map_phys_fmr(struct ib_fmr *fmr,
826 EHCA_PAGESIZE); 828 EHCA_PAGESIZE);
827 pginfo.u.fmr.fmr_pgsize = e_fmr->fmr_page_size; 829 pginfo.u.fmr.fmr_pgsize = e_fmr->fmr_page_size;
828 830
829 ret = ehca_rereg_mr(shca, e_fmr, (u64*)iova, 831 ret = ehca_rereg_mr(shca, e_fmr, (u64 *)iova,
830 list_len * e_fmr->fmr_page_size, 832 list_len * e_fmr->fmr_page_size,
831 e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey); 833 e_fmr->acl, e_pd, &pginfo, &tmp_lkey, &tmp_rkey);
832 if (ret) 834 if (ret)
@@ -841,8 +843,7 @@ int ehca_map_phys_fmr(struct ib_fmr *fmr,
841map_phys_fmr_exit0: 843map_phys_fmr_exit0:
842 if (ret) 844 if (ret)
843 ehca_err(fmr->device, "ret=%x fmr=%p page_list=%p list_len=%x " 845 ehca_err(fmr->device, "ret=%x fmr=%p page_list=%p list_len=%x "
844 "iova=%lx", 846 "iova=%lx", ret, fmr, page_list, list_len, iova);
845 ret, fmr, page_list, list_len, iova);
846 return ret; 847 return ret;
847} /* end ehca_map_phys_fmr() */ 848} /* end ehca_map_phys_fmr() */
848 849
@@ -960,12 +961,12 @@ int ehca_reg_mr(struct ehca_shca *shca,
960 int ret; 961 int ret;
961 u64 h_ret; 962 u64 h_ret;
962 u32 hipz_acl; 963 u32 hipz_acl;
963 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 964 struct ehca_mr_hipzout_parms hipzout;
964 965
965 ehca_mrmw_map_acl(acl, &hipz_acl); 966 ehca_mrmw_map_acl(acl, &hipz_acl);
966 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl); 967 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
967 if (ehca_use_hp_mr == 1) 968 if (ehca_use_hp_mr == 1)
968 hipz_acl |= 0x00000001; 969 hipz_acl |= 0x00000001;
969 970
970 h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr, 971 h_ret = hipz_h_alloc_resource_mr(shca->ipz_hca_handle, e_mr,
971 (u64)iova_start, size, hipz_acl, 972 (u64)iova_start, size, hipz_acl,
@@ -1127,7 +1128,7 @@ inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
1127 u64 *kpage; 1128 u64 *kpage;
1128 u64 rpage; 1129 u64 rpage;
1129 struct ehca_mr_pginfo pginfo_save; 1130 struct ehca_mr_pginfo pginfo_save;
1130 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 1131 struct ehca_mr_hipzout_parms hipzout;
1131 1132
1132 ehca_mrmw_map_acl(acl, &hipz_acl); 1133 ehca_mrmw_map_acl(acl, &hipz_acl);
1133 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl); 1134 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
@@ -1167,7 +1168,7 @@ inline int ehca_rereg_mr_rereg1(struct ehca_shca *shca,
1167 "(Rereg1), h_ret=%lx e_mr=%p", h_ret, e_mr); 1168 "(Rereg1), h_ret=%lx e_mr=%p", h_ret, e_mr);
1168 *pginfo = pginfo_save; 1169 *pginfo = pginfo_save;
1169 ret = -EAGAIN; 1170 ret = -EAGAIN;
1170 } else if ((u64*)hipzout.vaddr != iova_start) { 1171 } else if ((u64 *)hipzout.vaddr != iova_start) {
1171 ehca_err(&shca->ib_device, "PHYP changed iova_start in " 1172 ehca_err(&shca->ib_device, "PHYP changed iova_start in "
1172 "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p " 1173 "rereg_pmr, iova_start=%p iova_start_out=%lx e_mr=%p "
1173 "mr_handle=%lx lkey=%x lkey_out=%x", iova_start, 1174 "mr_handle=%lx lkey=%x lkey_out=%x", iova_start,
@@ -1305,7 +1306,7 @@ int ehca_unmap_one_fmr(struct ehca_shca *shca,
1305 struct ehca_mr save_fmr; 1306 struct ehca_mr save_fmr;
1306 u32 tmp_lkey, tmp_rkey; 1307 u32 tmp_lkey, tmp_rkey;
1307 struct ehca_mr_pginfo pginfo; 1308 struct ehca_mr_pginfo pginfo;
1308 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 1309 struct ehca_mr_hipzout_parms hipzout;
1309 struct ehca_mr save_mr; 1310 struct ehca_mr save_mr;
1310 1311
1311 if (e_fmr->fmr_max_pages <= MAX_RPAGES) { 1312 if (e_fmr->fmr_max_pages <= MAX_RPAGES) {
@@ -1397,7 +1398,7 @@ int ehca_reg_smr(struct ehca_shca *shca,
1397 int ret = 0; 1398 int ret = 0;
1398 u64 h_ret; 1399 u64 h_ret;
1399 u32 hipz_acl; 1400 u32 hipz_acl;
1400 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 1401 struct ehca_mr_hipzout_parms hipzout;
1401 1402
1402 ehca_mrmw_map_acl(acl, &hipz_acl); 1403 ehca_mrmw_map_acl(acl, &hipz_acl);
1403 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl); 1404 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
@@ -1462,7 +1463,7 @@ int ehca_reg_internal_maxmr(
1462 1463
1463 /* register internal max-MR on HCA */ 1464 /* register internal max-MR on HCA */
1464 size_maxmr = (u64)high_memory - PAGE_OFFSET; 1465 size_maxmr = (u64)high_memory - PAGE_OFFSET;
1465 iova_start = (u64*)KERNELBASE; 1466 iova_start = (u64 *)KERNELBASE;
1466 ib_pbuf.addr = 0; 1467 ib_pbuf.addr = 0;
1467 ib_pbuf.size = size_maxmr; 1468 ib_pbuf.size = size_maxmr;
1468 num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr, 1469 num_kpages = NUM_CHUNKS(((u64)iova_start % PAGE_SIZE) + size_maxmr,
@@ -1519,7 +1520,7 @@ int ehca_reg_maxmr(struct ehca_shca *shca,
1519 u64 h_ret; 1520 u64 h_ret;
1520 struct ehca_mr *e_origmr = shca->maxmr; 1521 struct ehca_mr *e_origmr = shca->maxmr;
1521 u32 hipz_acl; 1522 u32 hipz_acl;
1522 struct ehca_mr_hipzout_parms hipzout = {{0},0,0,0,0,0}; 1523 struct ehca_mr_hipzout_parms hipzout;
1523 1524
1524 ehca_mrmw_map_acl(acl, &hipz_acl); 1525 ehca_mrmw_map_acl(acl, &hipz_acl);
1525 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl); 1526 ehca_mrmw_set_pgsize_hipz_acl(&hipz_acl);
@@ -1865,7 +1866,7 @@ int ehca_mr_is_maxmr(u64 size,
1865{ 1866{
1866 /* a MR is treated as max-MR only if it fits following: */ 1867 /* a MR is treated as max-MR only if it fits following: */
1867 if ((size == ((u64)high_memory - PAGE_OFFSET)) && 1868 if ((size == ((u64)high_memory - PAGE_OFFSET)) &&
1868 (iova_start == (void*)KERNELBASE)) { 1869 (iova_start == (void *)KERNELBASE)) {
1869 ehca_gen_dbg("this is a max-MR"); 1870 ehca_gen_dbg("this is a max-MR");
1870 return 1; 1871 return 1;
1871 } else 1872 } else
diff --git a/drivers/infiniband/hw/ehca/ehca_mrmw.h b/drivers/infiniband/hw/ehca/ehca_mrmw.h
index fb69eded3b48..24f13fe3708b 100644
--- a/drivers/infiniband/hw/ehca/ehca_mrmw.h
+++ b/drivers/infiniband/hw/ehca/ehca_mrmw.h
@@ -101,15 +101,10 @@ int ehca_fmr_check_page_list(struct ehca_mr *e_fmr,
101 u64 *page_list, 101 u64 *page_list,
102 int list_len); 102 int list_len);
103 103
104int ehca_set_pagebuf(struct ehca_mr *e_mr, 104int ehca_set_pagebuf(struct ehca_mr_pginfo *pginfo,
105 struct ehca_mr_pginfo *pginfo,
106 u32 number, 105 u32 number,
107 u64 *kpage); 106 u64 *kpage);
108 107
109int ehca_set_pagebuf_1(struct ehca_mr *e_mr,
110 struct ehca_mr_pginfo *pginfo,
111 u64 *rpage);
112
113int ehca_mr_is_maxmr(u64 size, 108int ehca_mr_is_maxmr(u64 size,
114 u64 *iova_start); 109 u64 *iova_start);
115 110
diff --git a/drivers/infiniband/hw/ehca/ehca_qes.h b/drivers/infiniband/hw/ehca/ehca_qes.h
index 8707d297ce4c..818803057ebf 100644
--- a/drivers/infiniband/hw/ehca/ehca_qes.h
+++ b/drivers/infiniband/hw/ehca/ehca_qes.h
@@ -53,13 +53,13 @@ struct ehca_vsgentry {
53 u32 length; 53 u32 length;
54}; 54};
55 55
56#define GRH_FLAG_MASK EHCA_BMASK_IBM(7,7) 56#define GRH_FLAG_MASK EHCA_BMASK_IBM( 7, 7)
57#define GRH_IPVERSION_MASK EHCA_BMASK_IBM(0,3) 57#define GRH_IPVERSION_MASK EHCA_BMASK_IBM( 0, 3)
58#define GRH_TCLASS_MASK EHCA_BMASK_IBM(4,12) 58#define GRH_TCLASS_MASK EHCA_BMASK_IBM( 4, 12)
59#define GRH_FLOWLABEL_MASK EHCA_BMASK_IBM(13,31) 59#define GRH_FLOWLABEL_MASK EHCA_BMASK_IBM(13, 31)
60#define GRH_PAYLEN_MASK EHCA_BMASK_IBM(32,47) 60#define GRH_PAYLEN_MASK EHCA_BMASK_IBM(32, 47)
61#define GRH_NEXTHEADER_MASK EHCA_BMASK_IBM(48,55) 61#define GRH_NEXTHEADER_MASK EHCA_BMASK_IBM(48, 55)
62#define GRH_HOPLIMIT_MASK EHCA_BMASK_IBM(56,63) 62#define GRH_HOPLIMIT_MASK EHCA_BMASK_IBM(56, 63)
63 63
64/* 64/*
65 * Unreliable Datagram Address Vector Format 65 * Unreliable Datagram Address Vector Format
@@ -206,10 +206,10 @@ struct ehca_wqe {
206 206
207}; 207};
208 208
209#define WC_SEND_RECEIVE EHCA_BMASK_IBM(0,0) 209#define WC_SEND_RECEIVE EHCA_BMASK_IBM(0, 0)
210#define WC_IMM_DATA EHCA_BMASK_IBM(1,1) 210#define WC_IMM_DATA EHCA_BMASK_IBM(1, 1)
211#define WC_GRH_PRESENT EHCA_BMASK_IBM(2,2) 211#define WC_GRH_PRESENT EHCA_BMASK_IBM(2, 2)
212#define WC_SE_BIT EHCA_BMASK_IBM(3,3) 212#define WC_SE_BIT EHCA_BMASK_IBM(3, 3)
213#define WC_STATUS_ERROR_BIT 0x80000000 213#define WC_STATUS_ERROR_BIT 0x80000000
214#define WC_STATUS_REMOTE_ERROR_FLAGS 0x0000F800 214#define WC_STATUS_REMOTE_ERROR_FLAGS 0x0000F800
215#define WC_STATUS_PURGE_BIT 0x10 215#define WC_STATUS_PURGE_BIT 0x10
diff --git a/drivers/infiniband/hw/ehca/ehca_qp.c b/drivers/infiniband/hw/ehca/ehca_qp.c
index 74671250303f..48e9ceacd6fa 100644
--- a/drivers/infiniband/hw/ehca/ehca_qp.c
+++ b/drivers/infiniband/hw/ehca/ehca_qp.c
@@ -602,10 +602,10 @@ struct ehca_qp *internal_create_qp(struct ib_pd *pd,
602 /* UD circumvention */ 602 /* UD circumvention */
603 parms.act_nr_send_sges -= 2; 603 parms.act_nr_send_sges -= 2;
604 parms.act_nr_recv_sges -= 2; 604 parms.act_nr_recv_sges -= 2;
605 swqe_size = offsetof(struct ehca_wqe, 605 swqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
606 u.ud_av.sg_list[parms.act_nr_send_sges]); 606 parms.act_nr_send_sges]);
607 rwqe_size = offsetof(struct ehca_wqe, 607 rwqe_size = offsetof(struct ehca_wqe, u.ud_av.sg_list[
608 u.ud_av.sg_list[parms.act_nr_recv_sges]); 608 parms.act_nr_recv_sges]);
609 } 609 }
610 610
611 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) { 611 if (IB_QPT_GSI == qp_type || IB_QPT_SMI == qp_type) {
@@ -690,8 +690,8 @@ struct ehca_qp *internal_create_qp(struct ib_pd *pd,
690 if (my_qp->send_cq) { 690 if (my_qp->send_cq) {
691 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp); 691 ret = ehca_cq_assign_qp(my_qp->send_cq, my_qp);
692 if (ret) { 692 if (ret) {
693 ehca_err(pd->device, "Couldn't assign qp to send_cq ret=%x", 693 ehca_err(pd->device,
694 ret); 694 "Couldn't assign qp to send_cq ret=%x", ret);
695 goto create_qp_exit4; 695 goto create_qp_exit4;
696 } 696 }
697 } 697 }
@@ -749,7 +749,7 @@ struct ib_qp *ehca_create_qp(struct ib_pd *pd,
749 struct ehca_qp *ret; 749 struct ehca_qp *ret;
750 750
751 ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0); 751 ret = internal_create_qp(pd, qp_init_attr, NULL, udata, 0);
752 return IS_ERR(ret) ? (struct ib_qp *) ret : &ret->ib_qp; 752 return IS_ERR(ret) ? (struct ib_qp *)ret : &ret->ib_qp;
753} 753}
754 754
755int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp, 755int internal_destroy_qp(struct ib_device *dev, struct ehca_qp *my_qp,
@@ -780,7 +780,7 @@ struct ib_srq *ehca_create_srq(struct ib_pd *pd,
780 780
781 my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1); 781 my_qp = internal_create_qp(pd, &qp_init_attr, srq_init_attr, udata, 1);
782 if (IS_ERR(my_qp)) 782 if (IS_ERR(my_qp))
783 return (struct ib_srq *) my_qp; 783 return (struct ib_srq *)my_qp;
784 784
785 /* copy back return values */ 785 /* copy back return values */
786 srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr; 786 srq_init_attr->attr.max_wr = qp_init_attr.cap.max_recv_wr;
@@ -875,7 +875,7 @@ static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
875 my_qp, qp_num, h_ret); 875 my_qp, qp_num, h_ret);
876 return ehca2ib_return_code(h_ret); 876 return ehca2ib_return_code(h_ret);
877 } 877 }
878 bad_send_wqe_p = (void*)((u64)bad_send_wqe_p & (~(1L<<63))); 878 bad_send_wqe_p = (void *)((u64)bad_send_wqe_p & (~(1L << 63)));
879 ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p", 879 ehca_dbg(&shca->ib_device, "qp_num=%x bad_send_wqe_p=%p",
880 qp_num, bad_send_wqe_p); 880 qp_num, bad_send_wqe_p);
881 /* convert wqe pointer to vadr */ 881 /* convert wqe pointer to vadr */
@@ -890,7 +890,7 @@ static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
890 } 890 }
891 891
892 /* loop sets wqe's purge bit */ 892 /* loop sets wqe's purge bit */
893 wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs); 893 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
894 *bad_wqe_cnt = 0; 894 *bad_wqe_cnt = 0;
895 while (wqe->optype != 0xff && wqe->wqef != 0xff) { 895 while (wqe->optype != 0xff && wqe->wqef != 0xff) {
896 if (ehca_debug_level) 896 if (ehca_debug_level)
@@ -898,7 +898,7 @@ static int prepare_sqe_rts(struct ehca_qp *my_qp, struct ehca_shca *shca,
898 wqe->nr_of_data_seg = 0; /* suppress data access */ 898 wqe->nr_of_data_seg = 0; /* suppress data access */
899 wqe->wqef = WQEF_PURGE; /* WQE to be purged */ 899 wqe->wqef = WQEF_PURGE; /* WQE to be purged */
900 q_ofs = ipz_queue_advance_offset(squeue, q_ofs); 900 q_ofs = ipz_queue_advance_offset(squeue, q_ofs);
901 wqe = (struct ehca_wqe*)ipz_qeit_calc(squeue, q_ofs); 901 wqe = (struct ehca_wqe *)ipz_qeit_calc(squeue, q_ofs);
902 *bad_wqe_cnt = (*bad_wqe_cnt)+1; 902 *bad_wqe_cnt = (*bad_wqe_cnt)+1;
903 } 903 }
904 /* 904 /*
@@ -1003,7 +1003,7 @@ static int internal_modify_qp(struct ib_qp *ibqp,
1003 goto modify_qp_exit1; 1003 goto modify_qp_exit1;
1004 } 1004 }
1005 1005
1006 ehca_dbg(ibqp->device,"ehca_qp=%p qp_num=%x current qp_state=%x " 1006 ehca_dbg(ibqp->device, "ehca_qp=%p qp_num=%x current qp_state=%x "
1007 "new qp_state=%x attribute_mask=%x", 1007 "new qp_state=%x attribute_mask=%x",
1008 my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask); 1008 my_qp, ibqp->qp_num, qp_cur_state, attr->qp_state, attr_mask);
1009 1009
@@ -1019,7 +1019,8 @@ static int internal_modify_qp(struct ib_qp *ibqp,
1019 goto modify_qp_exit1; 1019 goto modify_qp_exit1;
1020 } 1020 }
1021 1021
1022 if ((mqpcb->qp_state = ib2ehca_qp_state(qp_new_state))) 1022 mqpcb->qp_state = ib2ehca_qp_state(qp_new_state);
1023 if (mqpcb->qp_state)
1023 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1); 1024 update_mask = EHCA_BMASK_SET(MQPCB_MASK_QP_STATE, 1);
1024 else { 1025 else {
1025 ret = -EINVAL; 1026 ret = -EINVAL;
@@ -1077,7 +1078,7 @@ static int internal_modify_qp(struct ib_qp *ibqp,
1077 spin_lock_irqsave(&my_qp->spinlock_s, flags); 1078 spin_lock_irqsave(&my_qp->spinlock_s, flags);
1078 squeue_locked = 1; 1079 squeue_locked = 1;
1079 /* mark next free wqe */ 1080 /* mark next free wqe */
1080 wqe = (struct ehca_wqe*) 1081 wqe = (struct ehca_wqe *)
1081 ipz_qeit_get(&my_qp->ipz_squeue); 1082 ipz_qeit_get(&my_qp->ipz_squeue);
1082 wqe->optype = wqe->wqef = 0xff; 1083 wqe->optype = wqe->wqef = 0xff;
1083 ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p", 1084 ehca_dbg(ibqp->device, "qp_num=%x next_free_wqe=%p",
@@ -1312,7 +1313,7 @@ static int internal_modify_qp(struct ib_qp *ibqp,
1312 if (h_ret != H_SUCCESS) { 1313 if (h_ret != H_SUCCESS) {
1313 ret = ehca2ib_return_code(h_ret); 1314 ret = ehca2ib_return_code(h_ret);
1314 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx " 1315 ehca_err(ibqp->device, "hipz_h_modify_qp() failed rc=%lx "
1315 "ehca_qp=%p qp_num=%x",h_ret, my_qp, ibqp->qp_num); 1316 "ehca_qp=%p qp_num=%x", h_ret, my_qp, ibqp->qp_num);
1316 goto modify_qp_exit2; 1317 goto modify_qp_exit2;
1317 } 1318 }
1318 1319
@@ -1411,7 +1412,7 @@ int ehca_query_qp(struct ib_qp *qp,
1411 } 1412 }
1412 1413
1413 if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) { 1414 if (qp_attr_mask & QP_ATTR_QUERY_NOT_SUPPORTED) {
1414 ehca_err(qp->device,"Invalid attribute mask " 1415 ehca_err(qp->device, "Invalid attribute mask "
1415 "ehca_qp=%p qp_num=%x qp_attr_mask=%x ", 1416 "ehca_qp=%p qp_num=%x qp_attr_mask=%x ",
1416 my_qp, qp->qp_num, qp_attr_mask); 1417 my_qp, qp->qp_num, qp_attr_mask);
1417 return -EINVAL; 1418 return -EINVAL;
@@ -1419,7 +1420,7 @@ int ehca_query_qp(struct ib_qp *qp,
1419 1420
1420 qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL); 1421 qpcb = ehca_alloc_fw_ctrlblock(GFP_KERNEL);
1421 if (!qpcb) { 1422 if (!qpcb) {
1422 ehca_err(qp->device,"Out of memory for qpcb " 1423 ehca_err(qp->device, "Out of memory for qpcb "
1423 "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num); 1424 "ehca_qp=%p qp_num=%x", my_qp, qp->qp_num);
1424 return -ENOMEM; 1425 return -ENOMEM;
1425 } 1426 }
@@ -1431,7 +1432,7 @@ int ehca_query_qp(struct ib_qp *qp,
1431 1432
1432 if (h_ret != H_SUCCESS) { 1433 if (h_ret != H_SUCCESS) {
1433 ret = ehca2ib_return_code(h_ret); 1434 ret = ehca2ib_return_code(h_ret);
1434 ehca_err(qp->device,"hipz_h_query_qp() failed " 1435 ehca_err(qp->device, "hipz_h_query_qp() failed "
1435 "ehca_qp=%p qp_num=%x h_ret=%lx", 1436 "ehca_qp=%p qp_num=%x h_ret=%lx",
1436 my_qp, qp->qp_num, h_ret); 1437 my_qp, qp->qp_num, h_ret);
1437 goto query_qp_exit1; 1438 goto query_qp_exit1;
@@ -1442,7 +1443,7 @@ int ehca_query_qp(struct ib_qp *qp,
1442 1443
1443 if (qp_attr->cur_qp_state == -EINVAL) { 1444 if (qp_attr->cur_qp_state == -EINVAL) {
1444 ret = -EINVAL; 1445 ret = -EINVAL;
1445 ehca_err(qp->device,"Got invalid ehca_qp_state=%x " 1446 ehca_err(qp->device, "Got invalid ehca_qp_state=%x "
1446 "ehca_qp=%p qp_num=%x", 1447 "ehca_qp=%p qp_num=%x",
1447 qpcb->qp_state, my_qp, qp->qp_num); 1448 qpcb->qp_state, my_qp, qp->qp_num);
1448 goto query_qp_exit1; 1449 goto query_qp_exit1;
diff --git a/drivers/infiniband/hw/ehca/ehca_reqs.c b/drivers/infiniband/hw/ehca/ehca_reqs.c
index 61da65e6e5e0..94eed70fedf5 100644
--- a/drivers/infiniband/hw/ehca/ehca_reqs.c
+++ b/drivers/infiniband/hw/ehca/ehca_reqs.c
@@ -79,7 +79,8 @@ static inline int ehca_write_rwqe(struct ipz_queue *ipz_rqueue,
79 } 79 }
80 80
81 if (ehca_debug_level) { 81 if (ehca_debug_level) {
82 ehca_gen_dbg("RECEIVE WQE written into ipz_rqueue=%p", ipz_rqueue); 82 ehca_gen_dbg("RECEIVE WQE written into ipz_rqueue=%p",
83 ipz_rqueue);
83 ehca_dmp( wqe_p, 16*(6 + wqe_p->nr_of_data_seg), "recv wqe"); 84 ehca_dmp( wqe_p, 16*(6 + wqe_p->nr_of_data_seg), "recv wqe");
84 } 85 }
85 86
@@ -99,7 +100,7 @@ static void trace_send_wr_ud(const struct ib_send_wr *send_wr)
99 struct ib_mad_hdr *mad_hdr = send_wr->wr.ud.mad_hdr; 100 struct ib_mad_hdr *mad_hdr = send_wr->wr.ud.mad_hdr;
100 struct ib_sge *sge = send_wr->sg_list; 101 struct ib_sge *sge = send_wr->sg_list;
101 ehca_gen_dbg("send_wr#%x wr_id=%lx num_sge=%x " 102 ehca_gen_dbg("send_wr#%x wr_id=%lx num_sge=%x "
102 "send_flags=%x opcode=%x",idx, send_wr->wr_id, 103 "send_flags=%x opcode=%x", idx, send_wr->wr_id,
103 send_wr->num_sge, send_wr->send_flags, 104 send_wr->num_sge, send_wr->send_flags,
104 send_wr->opcode); 105 send_wr->opcode);
105 if (mad_hdr) { 106 if (mad_hdr) {
@@ -116,7 +117,7 @@ static void trace_send_wr_ud(const struct ib_send_wr *send_wr)
116 mad_hdr->attr_mod); 117 mad_hdr->attr_mod);
117 } 118 }
118 for (j = 0; j < send_wr->num_sge; j++) { 119 for (j = 0; j < send_wr->num_sge; j++) {
119 u8 *data = (u8 *) abs_to_virt(sge->addr); 120 u8 *data = (u8 *)abs_to_virt(sge->addr);
120 ehca_gen_dbg("send_wr#%x sge#%x addr=%p length=%x " 121 ehca_gen_dbg("send_wr#%x sge#%x addr=%p length=%x "
121 "lkey=%x", 122 "lkey=%x",
122 idx, j, data, sge->length, sge->lkey); 123 idx, j, data, sge->length, sge->lkey);
@@ -534,9 +535,11 @@ poll_cq_one_read_cqe:
534 535
535 cqe_count++; 536 cqe_count++;
536 if (unlikely(cqe->status & WC_STATUS_PURGE_BIT)) { 537 if (unlikely(cqe->status & WC_STATUS_PURGE_BIT)) {
537 struct ehca_qp *qp=ehca_cq_get_qp(my_cq, cqe->local_qp_number); 538 struct ehca_qp *qp;
538 int purgeflag; 539 int purgeflag;
539 unsigned long flags; 540 unsigned long flags;
541
542 qp = ehca_cq_get_qp(my_cq, cqe->local_qp_number);
540 if (!qp) { 543 if (!qp) {
541 ehca_err(cq->device, "cq_num=%x qp_num=%x " 544 ehca_err(cq->device, "cq_num=%x qp_num=%x "
542 "could not find qp -> ignore cqe", 545 "could not find qp -> ignore cqe",
@@ -551,8 +554,8 @@ poll_cq_one_read_cqe:
551 spin_unlock_irqrestore(&qp->spinlock_s, flags); 554 spin_unlock_irqrestore(&qp->spinlock_s, flags);
552 555
553 if (purgeflag) { 556 if (purgeflag) {
554 ehca_dbg(cq->device, "Got CQE with purged bit qp_num=%x " 557 ehca_dbg(cq->device,
555 "src_qp=%x", 558 "Got CQE with purged bit qp_num=%x src_qp=%x",
556 cqe->local_qp_number, cqe->remote_qp_number); 559 cqe->local_qp_number, cqe->remote_qp_number);
557 if (ehca_debug_level) 560 if (ehca_debug_level)
558 ehca_dmp(cqe, 64, "qp_num=%x src_qp=%x", 561 ehca_dmp(cqe, 64, "qp_num=%x src_qp=%x",
diff --git a/drivers/infiniband/hw/ehca/ehca_tools.h b/drivers/infiniband/hw/ehca/ehca_tools.h
index fd8238b32153..678b81391861 100644
--- a/drivers/infiniband/hw/ehca/ehca_tools.h
+++ b/drivers/infiniband/hw/ehca/ehca_tools.h
@@ -93,14 +93,14 @@ extern int ehca_debug_level;
93#define ehca_gen_dbg(format, arg...) \ 93#define ehca_gen_dbg(format, arg...) \
94 do { \ 94 do { \
95 if (unlikely(ehca_debug_level)) \ 95 if (unlikely(ehca_debug_level)) \
96 printk(KERN_DEBUG "PU%04x EHCA_DBG:%s " format "\n",\ 96 printk(KERN_DEBUG "PU%04x EHCA_DBG:%s " format "\n", \
97 get_paca()->paca_index, __FUNCTION__, ## arg); \ 97 get_paca()->paca_index, __FUNCTION__, ## arg); \
98 } while (0) 98 } while (0)
99 99
100#define ehca_gen_warn(format, arg...) \ 100#define ehca_gen_warn(format, arg...) \
101 do { \ 101 do { \
102 if (unlikely(ehca_debug_level)) \ 102 if (unlikely(ehca_debug_level)) \
103 printk(KERN_INFO "PU%04x EHCA_WARN:%s " format "\n",\ 103 printk(KERN_INFO "PU%04x EHCA_WARN:%s " format "\n", \
104 get_paca()->paca_index, __FUNCTION__, ## arg); \ 104 get_paca()->paca_index, __FUNCTION__, ## arg); \
105 } while (0) 105 } while (0)
106 106
@@ -114,12 +114,12 @@ extern int ehca_debug_level;
114 * <format string> adr=X ofs=Y <8 bytes hex> <8 bytes hex> 114 * <format string> adr=X ofs=Y <8 bytes hex> <8 bytes hex>
115 */ 115 */
116#define ehca_dmp(adr, len, format, args...) \ 116#define ehca_dmp(adr, len, format, args...) \
117 do { \ 117 do { \
118 unsigned int x; \ 118 unsigned int x; \
119 unsigned int l = (unsigned int)(len); \ 119 unsigned int l = (unsigned int)(len); \
120 unsigned char *deb = (unsigned char*)(adr); \ 120 unsigned char *deb = (unsigned char *)(adr); \
121 for (x = 0; x < l; x += 16) { \ 121 for (x = 0; x < l; x += 16) { \
122 printk("EHCA_DMP:%s " format \ 122 printk(KERN_INFO "EHCA_DMP:%s " format \
123 " adr=%p ofs=%04x %016lx %016lx\n", \ 123 " adr=%p ofs=%04x %016lx %016lx\n", \
124 __FUNCTION__, ##args, deb, x, \ 124 __FUNCTION__, ##args, deb, x, \
125 *((u64 *)&deb[0]), *((u64 *)&deb[8])); \ 125 *((u64 *)&deb[0]), *((u64 *)&deb[8])); \
@@ -128,16 +128,16 @@ extern int ehca_debug_level;
128 } while (0) 128 } while (0)
129 129
130/* define a bitmask, little endian version */ 130/* define a bitmask, little endian version */
131#define EHCA_BMASK(pos,length) (((pos)<<16)+(length)) 131#define EHCA_BMASK(pos, length) (((pos) << 16) + (length))
132 132
133/* define a bitmask, the ibm way... */ 133/* define a bitmask, the ibm way... */
134#define EHCA_BMASK_IBM(from,to) (((63-to)<<16)+((to)-(from)+1)) 134#define EHCA_BMASK_IBM(from, to) (((63 - to) << 16) + ((to) - (from) + 1))
135 135
136/* internal function, don't use */ 136/* internal function, don't use */
137#define EHCA_BMASK_SHIFTPOS(mask) (((mask)>>16)&0xffff) 137#define EHCA_BMASK_SHIFTPOS(mask) (((mask) >> 16) & 0xffff)
138 138
139/* internal function, don't use */ 139/* internal function, don't use */
140#define EHCA_BMASK_MASK(mask) (0xffffffffffffffffULL >> ((64-(mask))&0xffff)) 140#define EHCA_BMASK_MASK(mask) (~0ULL >> ((64 - (mask)) & 0xffff))
141 141
142/** 142/**
143 * EHCA_BMASK_SET - return value shifted and masked by mask 143 * EHCA_BMASK_SET - return value shifted and masked by mask
@@ -145,14 +145,14 @@ extern int ehca_debug_level;
145 * variable&=~EHCA_BMASK_SET(MY_MASK,-1) clears the bits from the mask 145 * variable&=~EHCA_BMASK_SET(MY_MASK,-1) clears the bits from the mask
146 * in variable 146 * in variable
147 */ 147 */
148#define EHCA_BMASK_SET(mask,value) \ 148#define EHCA_BMASK_SET(mask, value) \
149 ((EHCA_BMASK_MASK(mask) & ((u64)(value)))<<EHCA_BMASK_SHIFTPOS(mask)) 149 ((EHCA_BMASK_MASK(mask) & ((u64)(value))) << EHCA_BMASK_SHIFTPOS(mask))
150 150
151/** 151/**
152 * EHCA_BMASK_GET - extract a parameter from value by mask 152 * EHCA_BMASK_GET - extract a parameter from value by mask
153 */ 153 */
154#define EHCA_BMASK_GET(mask,value) \ 154#define EHCA_BMASK_GET(mask, value) \
155 (EHCA_BMASK_MASK(mask)& (((u64)(value))>>EHCA_BMASK_SHIFTPOS(mask))) 155 (EHCA_BMASK_MASK(mask) & (((u64)(value)) >> EHCA_BMASK_SHIFTPOS(mask)))
156 156
157 157
158/* Converts ehca to ib return code */ 158/* Converts ehca to ib return code */
diff --git a/drivers/infiniband/hw/ehca/ehca_uverbs.c b/drivers/infiniband/hw/ehca/ehca_uverbs.c
index 3031b3bb56f9..05c415744e3b 100644
--- a/drivers/infiniband/hw/ehca/ehca_uverbs.c
+++ b/drivers/infiniband/hw/ehca/ehca_uverbs.c
@@ -70,7 +70,7 @@ int ehca_dealloc_ucontext(struct ib_ucontext *context)
70 70
71static void ehca_mm_open(struct vm_area_struct *vma) 71static void ehca_mm_open(struct vm_area_struct *vma)
72{ 72{
73 u32 *count = (u32*)vma->vm_private_data; 73 u32 *count = (u32 *)vma->vm_private_data;
74 if (!count) { 74 if (!count) {
75 ehca_gen_err("Invalid vma struct vm_start=%lx vm_end=%lx", 75 ehca_gen_err("Invalid vma struct vm_start=%lx vm_end=%lx",
76 vma->vm_start, vma->vm_end); 76 vma->vm_start, vma->vm_end);
@@ -86,7 +86,7 @@ static void ehca_mm_open(struct vm_area_struct *vma)
86 86
87static void ehca_mm_close(struct vm_area_struct *vma) 87static void ehca_mm_close(struct vm_area_struct *vma)
88{ 88{
89 u32 *count = (u32*)vma->vm_private_data; 89 u32 *count = (u32 *)vma->vm_private_data;
90 if (!count) { 90 if (!count) {
91 ehca_gen_err("Invalid vma struct vm_start=%lx vm_end=%lx", 91 ehca_gen_err("Invalid vma struct vm_start=%lx vm_end=%lx",
92 vma->vm_start, vma->vm_end); 92 vma->vm_start, vma->vm_end);
@@ -215,7 +215,8 @@ static int ehca_mmap_qp(struct vm_area_struct *vma, struct ehca_qp *qp,
215 case 2: /* qp rqueue_addr */ 215 case 2: /* qp rqueue_addr */
216 ehca_dbg(qp->ib_qp.device, "qp_num=%x rqueue", 216 ehca_dbg(qp->ib_qp.device, "qp_num=%x rqueue",
217 qp->ib_qp.qp_num); 217 qp->ib_qp.qp_num);
218 ret = ehca_mmap_queue(vma, &qp->ipz_rqueue, &qp->mm_count_rqueue); 218 ret = ehca_mmap_queue(vma, &qp->ipz_rqueue,
219 &qp->mm_count_rqueue);
219 if (unlikely(ret)) { 220 if (unlikely(ret)) {
220 ehca_err(qp->ib_qp.device, 221 ehca_err(qp->ib_qp.device,
221 "ehca_mmap_queue(rq) failed rc=%x qp_num=%x", 222 "ehca_mmap_queue(rq) failed rc=%x qp_num=%x",
@@ -227,7 +228,8 @@ static int ehca_mmap_qp(struct vm_area_struct *vma, struct ehca_qp *qp,
227 case 3: /* qp squeue_addr */ 228 case 3: /* qp squeue_addr */
228 ehca_dbg(qp->ib_qp.device, "qp_num=%x squeue", 229 ehca_dbg(qp->ib_qp.device, "qp_num=%x squeue",
229 qp->ib_qp.qp_num); 230 qp->ib_qp.qp_num);
230 ret = ehca_mmap_queue(vma, &qp->ipz_squeue, &qp->mm_count_squeue); 231 ret = ehca_mmap_queue(vma, &qp->ipz_squeue,
232 &qp->mm_count_squeue);
231 if (unlikely(ret)) { 233 if (unlikely(ret)) {
232 ehca_err(qp->ib_qp.device, 234 ehca_err(qp->ib_qp.device,
233 "ehca_mmap_queue(sq) failed rc=%x qp_num=%x", 235 "ehca_mmap_queue(sq) failed rc=%x qp_num=%x",
diff --git a/drivers/infiniband/hw/ehca/hcp_if.c b/drivers/infiniband/hw/ehca/hcp_if.c
index 4776a8b0feec..3394e05f4b4f 100644
--- a/drivers/infiniband/hw/ehca/hcp_if.c
+++ b/drivers/infiniband/hw/ehca/hcp_if.c
@@ -501,8 +501,8 @@ u64 hipz_h_register_rpage_qp(const struct ipz_adapter_handle adapter_handle,
501 return H_PARAMETER; 501 return H_PARAMETER;
502 } 502 }
503 503
504 return hipz_h_register_rpage(adapter_handle,pagesize,queue_type, 504 return hipz_h_register_rpage(adapter_handle, pagesize, queue_type,
505 qp_handle.handle,logical_address_of_page, 505 qp_handle.handle, logical_address_of_page,
506 count); 506 count);
507} 507}
508 508
@@ -522,9 +522,9 @@ u64 hipz_h_disable_and_get_wqe(const struct ipz_adapter_handle adapter_handle,
522 qp_handle.handle, /* r6 */ 522 qp_handle.handle, /* r6 */
523 0, 0, 0, 0, 0, 0); 523 0, 0, 0, 0, 0, 0);
524 if (log_addr_next_sq_wqe2processed) 524 if (log_addr_next_sq_wqe2processed)
525 *log_addr_next_sq_wqe2processed = (void*)outs[0]; 525 *log_addr_next_sq_wqe2processed = (void *)outs[0];
526 if (log_addr_next_rq_wqe2processed) 526 if (log_addr_next_rq_wqe2processed)
527 *log_addr_next_rq_wqe2processed = (void*)outs[1]; 527 *log_addr_next_rq_wqe2processed = (void *)outs[1];
528 528
529 return ret; 529 return ret;
530} 530}
diff --git a/drivers/infiniband/hw/ehca/hcp_phyp.c b/drivers/infiniband/hw/ehca/hcp_phyp.c
index 0b1a4772c78a..214821095cb1 100644
--- a/drivers/infiniband/hw/ehca/hcp_phyp.c
+++ b/drivers/infiniband/hw/ehca/hcp_phyp.c
@@ -50,7 +50,7 @@ int hcall_map_page(u64 physaddr, u64 *mapaddr)
50 50
51int hcall_unmap_page(u64 mapaddr) 51int hcall_unmap_page(u64 mapaddr)
52{ 52{
53 iounmap((volatile void __iomem*)mapaddr); 53 iounmap((volatile void __iomem *) mapaddr);
54 return 0; 54 return 0;
55} 55}
56 56
diff --git a/drivers/infiniband/hw/ehca/hipz_fns_core.h b/drivers/infiniband/hw/ehca/hipz_fns_core.h
index 20898a153446..868735fd3187 100644
--- a/drivers/infiniband/hw/ehca/hipz_fns_core.h
+++ b/drivers/infiniband/hw/ehca/hipz_fns_core.h
@@ -53,10 +53,10 @@
53#define hipz_galpa_load_cq(gal, offset) \ 53#define hipz_galpa_load_cq(gal, offset) \
54 hipz_galpa_load(gal, CQTEMM_OFFSET(offset)) 54 hipz_galpa_load(gal, CQTEMM_OFFSET(offset))
55 55
56#define hipz_galpa_store_qp(gal,offset, value) \ 56#define hipz_galpa_store_qp(gal, offset, value) \
57 hipz_galpa_store(gal, QPTEMM_OFFSET(offset), value) 57 hipz_galpa_store(gal, QPTEMM_OFFSET(offset), value)
58#define hipz_galpa_load_qp(gal, offset) \ 58#define hipz_galpa_load_qp(gal, offset) \
59 hipz_galpa_load(gal,QPTEMM_OFFSET(offset)) 59 hipz_galpa_load(gal, QPTEMM_OFFSET(offset))
60 60
61static inline void hipz_update_sqa(struct ehca_qp *qp, u16 nr_wqes) 61static inline void hipz_update_sqa(struct ehca_qp *qp, u16 nr_wqes)
62{ 62{
diff --git a/drivers/infiniband/hw/ehca/hipz_hw.h b/drivers/infiniband/hw/ehca/hipz_hw.h
index dad6dea5636b..d9739e554515 100644
--- a/drivers/infiniband/hw/ehca/hipz_hw.h
+++ b/drivers/infiniband/hw/ehca/hipz_hw.h
@@ -161,11 +161,11 @@ struct hipz_qptemm {
161/* 0x1000 */ 161/* 0x1000 */
162}; 162};
163 163
164#define QPX_SQADDER EHCA_BMASK_IBM(48,63) 164#define QPX_SQADDER EHCA_BMASK_IBM(48, 63)
165#define QPX_RQADDER EHCA_BMASK_IBM(48,63) 165#define QPX_RQADDER EHCA_BMASK_IBM(48, 63)
166#define QPX_AAELOG_RESET_SRQ_LIMIT EHCA_BMASK_IBM(3,3) 166#define QPX_AAELOG_RESET_SRQ_LIMIT EHCA_BMASK_IBM(3, 3)
167 167
168#define QPTEMM_OFFSET(x) offsetof(struct hipz_qptemm,x) 168#define QPTEMM_OFFSET(x) offsetof(struct hipz_qptemm, x)
169 169
170/* MRMWPT Entry Memory Map */ 170/* MRMWPT Entry Memory Map */
171struct hipz_mrmwmm { 171struct hipz_mrmwmm {
@@ -187,7 +187,7 @@ struct hipz_mrmwmm {
187 187
188}; 188};
189 189
190#define MRMWMM_OFFSET(x) offsetof(struct hipz_mrmwmm,x) 190#define MRMWMM_OFFSET(x) offsetof(struct hipz_mrmwmm, x)
191 191
192struct hipz_qpedmm { 192struct hipz_qpedmm {
193 /* 0x00 */ 193 /* 0x00 */
@@ -238,7 +238,7 @@ struct hipz_qpedmm {
238 u64 qpedx_rrva3; 238 u64 qpedx_rrva3;
239}; 239};
240 240
241#define QPEDMM_OFFSET(x) offsetof(struct hipz_qpedmm,x) 241#define QPEDMM_OFFSET(x) offsetof(struct hipz_qpedmm, x)
242 242
243/* CQ Table Entry Memory Map */ 243/* CQ Table Entry Memory Map */
244struct hipz_cqtemm { 244struct hipz_cqtemm {
@@ -263,12 +263,12 @@ struct hipz_cqtemm {
263/* 0x1000 */ 263/* 0x1000 */
264}; 264};
265 265
266#define CQX_FEC_CQE_CNT EHCA_BMASK_IBM(32,63) 266#define CQX_FEC_CQE_CNT EHCA_BMASK_IBM(32, 63)
267#define CQX_FECADDER EHCA_BMASK_IBM(32,63) 267#define CQX_FECADDER EHCA_BMASK_IBM(32, 63)
268#define CQX_N0_GENERATE_SOLICITED_COMP_EVENT EHCA_BMASK_IBM(0,0) 268#define CQX_N0_GENERATE_SOLICITED_COMP_EVENT EHCA_BMASK_IBM(0, 0)
269#define CQX_N1_GENERATE_COMP_EVENT EHCA_BMASK_IBM(0,0) 269#define CQX_N1_GENERATE_COMP_EVENT EHCA_BMASK_IBM(0, 0)
270 270
271#define CQTEMM_OFFSET(x) offsetof(struct hipz_cqtemm,x) 271#define CQTEMM_OFFSET(x) offsetof(struct hipz_cqtemm, x)
272 272
273/* EQ Table Entry Memory Map */ 273/* EQ Table Entry Memory Map */
274struct hipz_eqtemm { 274struct hipz_eqtemm {
@@ -293,7 +293,7 @@ struct hipz_eqtemm {
293 293
294}; 294};
295 295
296#define EQTEMM_OFFSET(x) offsetof(struct hipz_eqtemm,x) 296#define EQTEMM_OFFSET(x) offsetof(struct hipz_eqtemm, x)
297 297
298/* access control defines for MR/MW */ 298/* access control defines for MR/MW */
299#define HIPZ_ACCESSCTRL_L_WRITE 0x00800000 299#define HIPZ_ACCESSCTRL_L_WRITE 0x00800000
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.c b/drivers/infiniband/hw/ehca/ipz_pt_fn.c
index bf7a40088f61..9606f13ed092 100644
--- a/drivers/infiniband/hw/ehca/ipz_pt_fn.c
+++ b/drivers/infiniband/hw/ehca/ipz_pt_fn.c
@@ -114,7 +114,7 @@ int ipz_queue_ctor(struct ipz_queue *queue,
114 */ 114 */
115 f = 0; 115 f = 0;
116 while (f < nr_of_pages) { 116 while (f < nr_of_pages) {
117 u8 *kpage = (u8*)get_zeroed_page(GFP_KERNEL); 117 u8 *kpage = (u8 *)get_zeroed_page(GFP_KERNEL);
118 int k; 118 int k;
119 if (!kpage) 119 if (!kpage)
120 goto ipz_queue_ctor_exit0; /*NOMEM*/ 120 goto ipz_queue_ctor_exit0; /*NOMEM*/
diff --git a/drivers/infiniband/hw/ehca/ipz_pt_fn.h b/drivers/infiniband/hw/ehca/ipz_pt_fn.h
index 007f0882fd40..39a4f64aff41 100644
--- a/drivers/infiniband/hw/ehca/ipz_pt_fn.h
+++ b/drivers/infiniband/hw/ehca/ipz_pt_fn.h
@@ -240,7 +240,7 @@ void *ipz_qeit_eq_get_inc(struct ipz_queue *queue);
240static inline void *ipz_eqit_eq_get_inc_valid(struct ipz_queue *queue) 240static inline void *ipz_eqit_eq_get_inc_valid(struct ipz_queue *queue)
241{ 241{
242 void *ret = ipz_qeit_get(queue); 242 void *ret = ipz_qeit_get(queue);
243 u32 qe = *(u8 *) ret; 243 u32 qe = *(u8 *)ret;
244 if ((qe >> 7) != (queue->toggle_state & 1)) 244 if ((qe >> 7) != (queue->toggle_state & 1))
245 return NULL; 245 return NULL;
246 ipz_qeit_eq_get_inc(queue); /* this is a good one */ 246 ipz_qeit_eq_get_inc(queue); /* this is a good one */
@@ -250,7 +250,7 @@ static inline void *ipz_eqit_eq_get_inc_valid(struct ipz_queue *queue)
250static inline void *ipz_eqit_eq_peek_valid(struct ipz_queue *queue) 250static inline void *ipz_eqit_eq_peek_valid(struct ipz_queue *queue)
251{ 251{
252 void *ret = ipz_qeit_get(queue); 252 void *ret = ipz_qeit_get(queue);
253 u32 qe = *(u8 *) ret; 253 u32 qe = *(u8 *)ret;
254 if ((qe >> 7) != (queue->toggle_state & 1)) 254 if ((qe >> 7) != (queue->toggle_state & 1))
255 return NULL; 255 return NULL;
256 return ret; 256 return ret;