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authorMike Marciniszyn <mike.marciniszyn@qlogic.com>2011-01-10 20:42:21 -0500
committerRoland Dreier <rolandd@cisco.com>2011-01-10 20:42:21 -0500
commit19ede2e422496b2a064b9b22823c6afb66ff927b (patch)
tree5d440053d4662acd8f9a5dac227156878bd99db2 /drivers/infiniband/hw/qib/qib_iba7322.c
parentaa7374ac19ca08715693b0a2d9f88f479af3ea7c (diff)
IB/qib: Fix interrupt mitigation
For SusieQ we need to write to the interrupt timer register before updating the header queue head with interrupt count. This is to ensure that the timer is enabled properly and a receive available interrupt is delivered. Otherwise this interrupt can be lost if the receiver header/eager queues are full before the timer is enabled. Signed-off-by: Mike Marciniszyn <mike.marciniszyn@qlogic.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/qib/qib_iba7322.c')
-rw-r--r--drivers/infiniband/hw/qib/qib_iba7322.c10
1 files changed, 7 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index a9c8c7235fcd..9bc6d0835e30 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -2823,7 +2823,6 @@ static irqreturn_t qib_7322intr(int irq, void *data)
2823 ctxtrbits &= ~rmask; 2823 ctxtrbits &= ~rmask;
2824 if (dd->rcd[i]) { 2824 if (dd->rcd[i]) {
2825 qib_kreceive(dd->rcd[i], NULL, &npkts); 2825 qib_kreceive(dd->rcd[i], NULL, &npkts);
2826 adjust_rcv_timeout(dd->rcd[i], npkts);
2827 } 2826 }
2828 } 2827 }
2829 rmask <<= 1; 2828 rmask <<= 1;
@@ -2873,7 +2872,6 @@ static irqreturn_t qib_7322pintr(int irq, void *data)
2873 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt); 2872 (1ULL << QIB_I_RCVURG_LSB)) << rcd->ctxt);
2874 2873
2875 qib_kreceive(rcd, NULL, &npkts); 2874 qib_kreceive(rcd, NULL, &npkts);
2876 adjust_rcv_timeout(rcd, npkts);
2877 2875
2878 return IRQ_HANDLED; 2876 return IRQ_HANDLED;
2879} 2877}
@@ -4047,8 +4045,14 @@ static int qib_7322_set_ib_table(struct qib_pportdata *ppd, int which, void *t)
4047} 4045}
4048 4046
4049static void qib_update_7322_usrhead(struct qib_ctxtdata *rcd, u64 hd, 4047static void qib_update_7322_usrhead(struct qib_ctxtdata *rcd, u64 hd,
4050 u32 updegr, u32 egrhd) 4048 u32 updegr, u32 egrhd, u32 npkts)
4051{ 4049{
4050 /*
4051 * Need to write timeout register before updating rcvhdrhead to ensure
4052 * that the timer is enabled on reception of a packet.
4053 */
4054 if (hd >> IBA7322_HDRHEAD_PKTINT_SHIFT)
4055 adjust_rcv_timeout(rcd, npkts);
4052 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); 4056 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt);
4053 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt); 4057 qib_write_ureg(rcd->dd, ur_rcvhdrhead, hd, rcd->ctxt);
4054 if (updegr) 4058 if (updegr)