diff options
author | Naresh Gottumukkala <bgottumukkala@emulex.com> | 2013-08-26 05:57:50 -0400 |
---|---|---|
committer | Roland Dreier <roland@purestorage.com> | 2013-09-03 00:18:45 -0400 |
commit | 84b105db593e735b8304815c913f7eea222a0600 (patch) | |
tree | bde8eccfff995dab2be1bdd65b8b1a1213523ce6 /drivers/infiniband/hw/ocrdma | |
parent | 38754397152e0e9ab0d2854064ef0ff4deabdd7e (diff) |
RDMA/ocrdma: Fill PVID in UMC case
In UMC case, driver needs to fill PVID in the address vector
template for UD traffic.
Signed-off-by: Naresh Gottumukkala <bgottumukkala@emulex.com>
Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/ocrdma')
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma.h | 1 | ||||
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma_ah.c | 2 | ||||
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma_hw.c | 32 | ||||
-rw-r--r-- | drivers/infiniband/hw/ocrdma/ocrdma_sli.h | 18 |
4 files changed, 50 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma.h b/drivers/infiniband/hw/ocrdma/ocrdma.h index fde8fb097a8c..adc11d14f878 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma.h +++ b/drivers/infiniband/hw/ocrdma/ocrdma.h | |||
@@ -170,6 +170,7 @@ struct ocrdma_dev { | |||
170 | struct rcu_head rcu; | 170 | struct rcu_head rcu; |
171 | int id; | 171 | int id; |
172 | u64 stag_arr[OCRDMA_MAX_STAG]; | 172 | u64 stag_arr[OCRDMA_MAX_STAG]; |
173 | u16 pvid; | ||
173 | }; | 174 | }; |
174 | 175 | ||
175 | struct ocrdma_cq { | 176 | struct ocrdma_cq { |
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_ah.c b/drivers/infiniband/hw/ocrdma/ocrdma_ah.c index df9e73758afb..ee499d942257 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma_ah.c +++ b/drivers/infiniband/hw/ocrdma/ocrdma_ah.c | |||
@@ -50,6 +50,8 @@ static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah, | |||
50 | ah->sgid_index = attr->grh.sgid_index; | 50 | ah->sgid_index = attr->grh.sgid_index; |
51 | 51 | ||
52 | vlan_tag = rdma_get_vlan_id(&attr->grh.dgid); | 52 | vlan_tag = rdma_get_vlan_id(&attr->grh.dgid); |
53 | if (!vlan_tag || (vlan_tag > 0xFFF)) | ||
54 | vlan_tag = dev->pvid; | ||
53 | if (vlan_tag && (vlan_tag < 0x1000)) { | 55 | if (vlan_tag && (vlan_tag < 0x1000)) { |
54 | eth.eth_type = cpu_to_be16(0x8100); | 56 | eth.eth_type = cpu_to_be16(0x8100); |
55 | eth.roce_eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE); | 57 | eth.roce_eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE); |
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c index ea3d7237596a..acf5441857ac 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c +++ b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c | |||
@@ -544,7 +544,10 @@ static int ocrdma_mbx_create_mq(struct ocrdma_dev *dev, | |||
544 | cmd->cqid_pages = num_pages; | 544 | cmd->cqid_pages = num_pages; |
545 | cmd->cqid_pages |= (cq->id << OCRDMA_CREATE_MQ_CQ_ID_SHIFT); | 545 | cmd->cqid_pages |= (cq->id << OCRDMA_CREATE_MQ_CQ_ID_SHIFT); |
546 | cmd->async_cqid_valid = OCRDMA_CREATE_MQ_ASYNC_CQ_VALID; | 546 | cmd->async_cqid_valid = OCRDMA_CREATE_MQ_ASYNC_CQ_VALID; |
547 | cmd->async_event_bitmap = Bit(20); | 547 | |
548 | cmd->async_event_bitmap = Bit(OCRDMA_ASYNC_GRP5_EVE_CODE); | ||
549 | cmd->async_event_bitmap |= Bit(OCRDMA_ASYNC_RDMA_EVE_CODE); | ||
550 | |||
548 | cmd->async_cqid_ringsize = cq->id; | 551 | cmd->async_cqid_ringsize = cq->id; |
549 | cmd->async_cqid_ringsize |= (ocrdma_encoded_q_len(mq->len) << | 552 | cmd->async_cqid_ringsize |= (ocrdma_encoded_q_len(mq->len) << |
550 | OCRDMA_CREATE_MQ_RING_SIZE_SHIFT); | 553 | OCRDMA_CREATE_MQ_RING_SIZE_SHIFT); |
@@ -727,6 +730,29 @@ static void ocrdma_dispatch_ibevent(struct ocrdma_dev *dev, | |||
727 | 730 | ||
728 | } | 731 | } |
729 | 732 | ||
733 | static void ocrdma_process_grp5_aync(struct ocrdma_dev *dev, | ||
734 | struct ocrdma_ae_mcqe *cqe) | ||
735 | { | ||
736 | struct ocrdma_ae_pvid_mcqe *evt; | ||
737 | int type = (cqe->valid_ae_event & OCRDMA_AE_MCQE_EVENT_TYPE_MASK) >> | ||
738 | OCRDMA_AE_MCQE_EVENT_TYPE_SHIFT; | ||
739 | |||
740 | switch (type) { | ||
741 | case OCRDMA_ASYNC_EVENT_PVID_STATE: | ||
742 | evt = (struct ocrdma_ae_pvid_mcqe *)cqe; | ||
743 | if ((evt->tag_enabled & OCRDMA_AE_PVID_MCQE_ENABLED_MASK) >> | ||
744 | OCRDMA_AE_PVID_MCQE_ENABLED_SHIFT) | ||
745 | dev->pvid = ((evt->tag_enabled & | ||
746 | OCRDMA_AE_PVID_MCQE_TAG_MASK) >> | ||
747 | OCRDMA_AE_PVID_MCQE_TAG_SHIFT); | ||
748 | break; | ||
749 | default: | ||
750 | /* Not interested evts. */ | ||
751 | break; | ||
752 | } | ||
753 | } | ||
754 | |||
755 | |||
730 | static void ocrdma_process_acqe(struct ocrdma_dev *dev, void *ae_cqe) | 756 | static void ocrdma_process_acqe(struct ocrdma_dev *dev, void *ae_cqe) |
731 | { | 757 | { |
732 | /* async CQE processing */ | 758 | /* async CQE processing */ |
@@ -734,8 +760,10 @@ static void ocrdma_process_acqe(struct ocrdma_dev *dev, void *ae_cqe) | |||
734 | u32 evt_code = (cqe->valid_ae_event & OCRDMA_AE_MCQE_EVENT_CODE_MASK) >> | 760 | u32 evt_code = (cqe->valid_ae_event & OCRDMA_AE_MCQE_EVENT_CODE_MASK) >> |
735 | OCRDMA_AE_MCQE_EVENT_CODE_SHIFT; | 761 | OCRDMA_AE_MCQE_EVENT_CODE_SHIFT; |
736 | 762 | ||
737 | if (evt_code == OCRDMA_ASYNC_EVE_CODE) | 763 | if (evt_code == OCRDMA_ASYNC_RDMA_EVE_CODE) |
738 | ocrdma_dispatch_ibevent(dev, cqe); | 764 | ocrdma_dispatch_ibevent(dev, cqe); |
765 | else if (evt_code == OCRDMA_ASYNC_GRP5_EVE_CODE) | ||
766 | ocrdma_process_grp5_aync(dev, cqe); | ||
739 | else | 767 | else |
740 | pr_err("%s(%d) invalid evt code=0x%x\n", __func__, | 768 | pr_err("%s(%d) invalid evt code=0x%x\n", __func__, |
741 | dev->id, evt_code); | 769 | dev->id, evt_code); |
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h index 9e975d888449..9f9570ec3c2e 100644 --- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h +++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h | |||
@@ -339,6 +339,20 @@ struct ocrdma_ae_mcqe { | |||
339 | }; | 339 | }; |
340 | 340 | ||
341 | enum { | 341 | enum { |
342 | OCRDMA_AE_PVID_MCQE_ENABLED_SHIFT = 0, | ||
343 | OCRDMA_AE_PVID_MCQE_ENABLED_MASK = 0xFF, | ||
344 | OCRDMA_AE_PVID_MCQE_TAG_SHIFT = 16, | ||
345 | OCRDMA_AE_PVID_MCQE_TAG_MASK = 0xFFFF << OCRDMA_AE_PVID_MCQE_TAG_SHIFT | ||
346 | }; | ||
347 | |||
348 | struct ocrdma_ae_pvid_mcqe { | ||
349 | u32 tag_enabled; | ||
350 | u32 event_tag; | ||
351 | u32 rsvd1; | ||
352 | u32 rsvd2; | ||
353 | }; | ||
354 | |||
355 | enum { | ||
342 | OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT = 16, | 356 | OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT = 16, |
343 | OCRDMA_AE_MPA_MCQE_REQ_ID_MASK = 0xFFFF << | 357 | OCRDMA_AE_MPA_MCQE_REQ_ID_MASK = 0xFFFF << |
344 | OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT, | 358 | OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT, |
@@ -388,7 +402,9 @@ struct ocrdma_ae_qp_mcqe { | |||
388 | u32 valid_ae_event; | 402 | u32 valid_ae_event; |
389 | }; | 403 | }; |
390 | 404 | ||
391 | #define OCRDMA_ASYNC_EVE_CODE 0x14 | 405 | #define OCRDMA_ASYNC_RDMA_EVE_CODE 0x14 |
406 | #define OCRDMA_ASYNC_GRP5_EVE_CODE 0x5 | ||
407 | #define OCRDMA_ASYNC_EVENT_PVID_STATE 0x3 | ||
392 | 408 | ||
393 | enum OCRDMA_ASYNC_EVENT_TYPE { | 409 | enum OCRDMA_ASYNC_EVENT_TYPE { |
394 | OCRDMA_CQ_ERROR = 0x00, | 410 | OCRDMA_CQ_ERROR = 0x00, |