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authorNaresh Gottumukkala <bgottumukkala@emulex.com>2013-08-07 03:22:36 -0400
committerRoland Dreier <roland@purestorage.com>2013-08-12 13:59:44 -0400
commit7b9b1a596e0f37b463dfe3bc36b6d035c7450ca0 (patch)
tree7d60fd348a86f9ee21c19270c2900c8ce65f5610 /drivers/infiniband/hw/ocrdma
parent057729cb234754d12e0b2a361c2fc85c6363cbf6 (diff)
RDMA/ocrdma: Remove __packed
1) Remove __packed for structures. 2) Align and pad all ABI structure to 64 bit boundaries instead of using __packed. Signed-off-by: Naresh Gottumukkala <bgottumukkala@emulex.com> Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/infiniband/hw/ocrdma')
-rw-r--r--drivers/infiniband/hw/ocrdma/ocrdma_abi.h31
-rw-r--r--drivers/infiniband/hw/ocrdma/ocrdma_sli.h133
2 files changed, 84 insertions, 80 deletions
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_abi.h b/drivers/infiniband/hw/ocrdma/ocrdma_abi.h
index 517ab20b727c..e5ea9a9776a4 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_abi.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_abi.h
@@ -28,6 +28,8 @@
28#ifndef __OCRDMA_ABI_H__ 28#ifndef __OCRDMA_ABI_H__
29#define __OCRDMA_ABI_H__ 29#define __OCRDMA_ABI_H__
30 30
31/* user kernel communication data structures. */
32
31struct ocrdma_alloc_ucontext_resp { 33struct ocrdma_alloc_ucontext_resp {
32 u32 dev_id; 34 u32 dev_id;
33 u32 wqe_size; 35 u32 wqe_size;
@@ -35,16 +37,16 @@ struct ocrdma_alloc_ucontext_resp {
35 u32 dpp_wqe_size; 37 u32 dpp_wqe_size;
36 u64 ah_tbl_page; 38 u64 ah_tbl_page;
37 u32 ah_tbl_len; 39 u32 ah_tbl_len;
38 u32 rsvd;
39 u8 fw_ver[32];
40 u32 rqe_size; 40 u32 rqe_size;
41 u8 fw_ver[32];
42 /* for future use/new features in progress */
41 u64 rsvd1; 43 u64 rsvd1;
42} __packed; 44 u64 rsvd2;
45};
43 46
44/* user kernel communication data structures. */
45struct ocrdma_alloc_pd_ureq { 47struct ocrdma_alloc_pd_ureq {
46 u64 rsvd1; 48 u64 rsvd1;
47} __packed; 49};
48 50
49struct ocrdma_alloc_pd_uresp { 51struct ocrdma_alloc_pd_uresp {
50 u32 id; 52 u32 id;
@@ -52,12 +54,12 @@ struct ocrdma_alloc_pd_uresp {
52 u32 dpp_page_addr_hi; 54 u32 dpp_page_addr_hi;
53 u32 dpp_page_addr_lo; 55 u32 dpp_page_addr_lo;
54 u64 rsvd1; 56 u64 rsvd1;
55} __packed; 57};
56 58
57struct ocrdma_create_cq_ureq { 59struct ocrdma_create_cq_ureq {
58 u32 dpp_cq; 60 u32 dpp_cq;
59 u32 rsvd; 61 u32 rsvd; /* pad */
60} __packed; 62};
61 63
62#define MAX_CQ_PAGES 8 64#define MAX_CQ_PAGES 8
63struct ocrdma_create_cq_uresp { 65struct ocrdma_create_cq_uresp {
@@ -69,9 +71,10 @@ struct ocrdma_create_cq_uresp {
69 u64 db_page_addr; 71 u64 db_page_addr;
70 u32 db_page_size; 72 u32 db_page_size;
71 u32 phase_change; 73 u32 phase_change;
74 /* for future use/new features in progress */
72 u64 rsvd1; 75 u64 rsvd1;
73 u64 rsvd2; 76 u64 rsvd2;
74} __packed; 77};
75 78
76#define MAX_QP_PAGES 8 79#define MAX_QP_PAGES 8
77#define MAX_UD_AV_PAGES 8 80#define MAX_UD_AV_PAGES 8
@@ -80,14 +83,14 @@ struct ocrdma_create_qp_ureq {
80 u8 enable_dpp_cq; 83 u8 enable_dpp_cq;
81 u8 rsvd; 84 u8 rsvd;
82 u16 dpp_cq_id; 85 u16 dpp_cq_id;
83 u32 rsvd1; 86 u32 rsvd1; /* pad */
84}; 87};
85 88
86struct ocrdma_create_qp_uresp { 89struct ocrdma_create_qp_uresp {
87 u16 qp_id; 90 u16 qp_id;
88 u16 sq_dbid; 91 u16 sq_dbid;
89 u16 rq_dbid; 92 u16 rq_dbid;
90 u16 resv0; 93 u16 resv0; /* pad */
91 u32 sq_page_size; 94 u32 sq_page_size;
92 u32 rq_page_size; 95 u32 rq_page_size;
93 u32 num_sq_pages; 96 u32 num_sq_pages;
@@ -98,19 +101,19 @@ struct ocrdma_create_qp_uresp {
98 u32 db_page_size; 101 u32 db_page_size;
99 u32 dpp_credit; 102 u32 dpp_credit;
100 u32 dpp_offset; 103 u32 dpp_offset;
101 u32 rsvd1;
102 u32 num_wqe_allocated; 104 u32 num_wqe_allocated;
103 u32 num_rqe_allocated; 105 u32 num_rqe_allocated;
104 u32 db_sq_offset; 106 u32 db_sq_offset;
105 u32 db_rq_offset; 107 u32 db_rq_offset;
106 u32 db_shift; 108 u32 db_shift;
109 u64 rsvd1;
107 u64 rsvd2; 110 u64 rsvd2;
108 u64 rsvd3; 111 u64 rsvd3;
109} __packed; 112} __packed;
110 113
111struct ocrdma_create_srq_uresp { 114struct ocrdma_create_srq_uresp {
112 u16 rq_dbid; 115 u16 rq_dbid;
113 u16 resv0; 116 u16 resv0; /* pad */
114 u32 resv1; 117 u32 resv1;
115 118
116 u32 rq_page_size; 119 u32 rq_page_size;
@@ -126,6 +129,6 @@ struct ocrdma_create_srq_uresp {
126 129
127 u64 rsvd2; 130 u64 rsvd2;
128 u64 rsvd3; 131 u64 rsvd3;
129} __packed; 132};
130 133
131#endif /* __OCRDMA_ABI_H__ */ 134#endif /* __OCRDMA_ABI_H__ */
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
index 36b062da2aea..96a962982417 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
@@ -177,7 +177,7 @@ struct ocrdma_mbx_hdr {
177 u32 timeout; /* in seconds */ 177 u32 timeout; /* in seconds */
178 u32 cmd_len; 178 u32 cmd_len;
179 u32 rsvd_version; 179 u32 rsvd_version;
180} __packed; 180};
181 181
182enum { 182enum {
183 OCRDMA_MBX_RSP_OPCODE_SHIFT = 0, 183 OCRDMA_MBX_RSP_OPCODE_SHIFT = 0,
@@ -197,7 +197,7 @@ struct ocrdma_mbx_rsp {
197 u32 status; 197 u32 status;
198 u32 rsp_len; 198 u32 rsp_len;
199 u32 add_rsp_len; 199 u32 add_rsp_len;
200} __packed; 200};
201 201
202enum { 202enum {
203 OCRDMA_MQE_EMBEDDED = 1, 203 OCRDMA_MQE_EMBEDDED = 1,
@@ -208,7 +208,7 @@ struct ocrdma_mqe_sge {
208 u32 pa_lo; 208 u32 pa_lo;
209 u32 pa_hi; 209 u32 pa_hi;
210 u32 len; 210 u32 len;
211} __packed; 211};
212 212
213enum { 213enum {
214 OCRDMA_MQE_HDR_EMB_SHIFT = 0, 214 OCRDMA_MQE_HDR_EMB_SHIFT = 0,
@@ -225,12 +225,12 @@ struct ocrdma_mqe_hdr {
225 u32 tag_lo; 225 u32 tag_lo;
226 u32 tag_hi; 226 u32 tag_hi;
227 u32 rsvd3; 227 u32 rsvd3;
228} __packed; 228};
229 229
230struct ocrdma_mqe_emb_cmd { 230struct ocrdma_mqe_emb_cmd {
231 struct ocrdma_mbx_hdr mch; 231 struct ocrdma_mbx_hdr mch;
232 u8 pyld[220]; 232 u8 pyld[220];
233} __packed; 233};
234 234
235struct ocrdma_mqe { 235struct ocrdma_mqe {
236 struct ocrdma_mqe_hdr hdr; 236 struct ocrdma_mqe_hdr hdr;
@@ -242,7 +242,7 @@ struct ocrdma_mqe {
242 u8 cmd[236]; 242 u8 cmd[236];
243 struct ocrdma_mbx_rsp rsp; 243 struct ocrdma_mbx_rsp rsp;
244 } u; 244 } u;
245} __packed; 245};
246 246
247#define OCRDMA_EQ_LEN 4096 247#define OCRDMA_EQ_LEN 4096
248#define OCRDMA_MQ_CQ_LEN 256 248#define OCRDMA_MQ_CQ_LEN 256
@@ -259,12 +259,12 @@ struct ocrdma_mqe {
259struct ocrdma_delete_q_req { 259struct ocrdma_delete_q_req {
260 struct ocrdma_mbx_hdr req; 260 struct ocrdma_mbx_hdr req;
261 u32 id; 261 u32 id;
262} __packed; 262};
263 263
264struct ocrdma_pa { 264struct ocrdma_pa {
265 u32 lo; 265 u32 lo;
266 u32 hi; 266 u32 hi;
267} __packed; 267};
268 268
269#define MAX_OCRDMA_EQ_PAGES (8) 269#define MAX_OCRDMA_EQ_PAGES (8)
270struct ocrdma_create_eq_req { 270struct ocrdma_create_eq_req {
@@ -275,7 +275,7 @@ struct ocrdma_create_eq_req {
275 u32 delay; 275 u32 delay;
276 u32 rsvd; 276 u32 rsvd;
277 struct ocrdma_pa pa[MAX_OCRDMA_EQ_PAGES]; 277 struct ocrdma_pa pa[MAX_OCRDMA_EQ_PAGES];
278} __packed; 278};
279 279
280enum { 280enum {
281 OCRDMA_CREATE_EQ_VALID = Bit(29), 281 OCRDMA_CREATE_EQ_VALID = Bit(29),
@@ -310,7 +310,7 @@ struct ocrdma_mcqe {
310 u32 tag_lo; 310 u32 tag_lo;
311 u32 tag_hi; 311 u32 tag_hi;
312 u32 valid_ae_cmpl_cons; 312 u32 valid_ae_cmpl_cons;
313} __packed; 313};
314 314
315enum { 315enum {
316 OCRDMA_AE_MCQE_QPVALID = Bit(31), 316 OCRDMA_AE_MCQE_QPVALID = Bit(31),
@@ -332,7 +332,7 @@ struct ocrdma_ae_mcqe {
332 u32 cqvalid_cqid; 332 u32 cqvalid_cqid;
333 u32 evt_tag; 333 u32 evt_tag;
334 u32 valid_ae_event; 334 u32 valid_ae_event;
335} __packed; 335};
336 336
337enum { 337enum {
338 OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT = 16, 338 OCRDMA_AE_MPA_MCQE_REQ_ID_SHIFT = 16,
@@ -356,7 +356,7 @@ struct ocrdma_ae_mpa_mcqe {
356 u32 w1; 356 u32 w1;
357 u32 w2; 357 u32 w2;
358 u32 valid_ae_event; 358 u32 valid_ae_event;
359} __packed; 359};
360 360
361enum { 361enum {
362 OCRDMA_AE_QP_MCQE_NEW_QP_STATE_SHIFT = 0, 362 OCRDMA_AE_QP_MCQE_NEW_QP_STATE_SHIFT = 0,
@@ -382,7 +382,7 @@ struct ocrdma_ae_qp_mcqe {
382 u32 w1; 382 u32 w1;
383 u32 w2; 383 u32 w2;
384 u32 valid_ae_event; 384 u32 valid_ae_event;
385} __packed; 385};
386 386
387#define OCRDMA_ASYNC_EVE_CODE 0x14 387#define OCRDMA_ASYNC_EVE_CODE 0x14
388 388
@@ -487,7 +487,8 @@ struct ocrdma_mbx_query_config {
487 u32 max_ird_ord_per_qp; 487 u32 max_ird_ord_per_qp;
488 u32 max_shared_ird_ord; 488 u32 max_shared_ird_ord;
489 u32 max_mr; 489 u32 max_mr;
490 u64 max_mr_size; 490 u32 max_mr_size_lo;
491 u32 max_mr_size_hi;
491 u32 max_num_mr_pbl; 492 u32 max_num_mr_pbl;
492 u32 max_mw; 493 u32 max_mw;
493 u32 max_fmr; 494 u32 max_fmr;
@@ -502,14 +503,14 @@ struct ocrdma_mbx_query_config {
502 u32 max_wqes_rqes_per_q; 503 u32 max_wqes_rqes_per_q;
503 u32 max_cq_cqes_per_cq; 504 u32 max_cq_cqes_per_cq;
504 u32 max_srq_rqe_sge; 505 u32 max_srq_rqe_sge;
505} __packed; 506};
506 507
507struct ocrdma_fw_ver_rsp { 508struct ocrdma_fw_ver_rsp {
508 struct ocrdma_mqe_hdr hdr; 509 struct ocrdma_mqe_hdr hdr;
509 struct ocrdma_mbx_rsp rsp; 510 struct ocrdma_mbx_rsp rsp;
510 511
511 u8 running_ver[32]; 512 u8 running_ver[32];
512} __packed; 513};
513 514
514struct ocrdma_fw_conf_rsp { 515struct ocrdma_fw_conf_rsp {
515 struct ocrdma_mqe_hdr hdr; 516 struct ocrdma_mqe_hdr hdr;
@@ -535,7 +536,7 @@ struct ocrdma_fw_conf_rsp {
535 u32 base_eqid; 536 u32 base_eqid;
536 u32 max_eq; 537 u32 max_eq;
537 538
538} __packed; 539};
539 540
540enum { 541enum {
541 OCRDMA_FN_MODE_RDMA = 0x4 542 OCRDMA_FN_MODE_RDMA = 0x4
@@ -584,7 +585,7 @@ struct ocrdma_create_cq_cmd {
584struct ocrdma_create_cq { 585struct ocrdma_create_cq {
585 struct ocrdma_mqe_hdr hdr; 586 struct ocrdma_mqe_hdr hdr;
586 struct ocrdma_create_cq_cmd cmd; 587 struct ocrdma_create_cq_cmd cmd;
587} __packed; 588};
588 589
589enum { 590enum {
590 OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK = 0xFFFF 591 OCRDMA_CREATE_CQ_RSP_CQ_ID_MASK = 0xFFFF
@@ -593,12 +594,12 @@ enum {
593struct ocrdma_create_cq_cmd_rsp { 594struct ocrdma_create_cq_cmd_rsp {
594 struct ocrdma_mbx_rsp rsp; 595 struct ocrdma_mbx_rsp rsp;
595 u32 cq_id; 596 u32 cq_id;
596} __packed; 597};
597 598
598struct ocrdma_create_cq_rsp { 599struct ocrdma_create_cq_rsp {
599 struct ocrdma_mqe_hdr hdr; 600 struct ocrdma_mqe_hdr hdr;
600 struct ocrdma_create_cq_cmd_rsp rsp; 601 struct ocrdma_create_cq_cmd_rsp rsp;
601} __packed; 602};
602 603
603enum { 604enum {
604 OCRDMA_CREATE_MQ_V0_CQ_ID_SHIFT = 22, 605 OCRDMA_CREATE_MQ_V0_CQ_ID_SHIFT = 22,
@@ -617,12 +618,12 @@ struct ocrdma_create_mq_req {
617 u32 async_cqid_valid; 618 u32 async_cqid_valid;
618 u32 rsvd; 619 u32 rsvd;
619 struct ocrdma_pa pa[8]; 620 struct ocrdma_pa pa[8];
620} __packed; 621};
621 622
622struct ocrdma_create_mq_rsp { 623struct ocrdma_create_mq_rsp {
623 struct ocrdma_mbx_rsp rsp; 624 struct ocrdma_mbx_rsp rsp;
624 u32 id; 625 u32 id;
625} __packed; 626};
626 627
627enum { 628enum {
628 OCRDMA_DESTROY_CQ_QID_SHIFT = 0, 629 OCRDMA_DESTROY_CQ_QID_SHIFT = 0,
@@ -637,12 +638,12 @@ struct ocrdma_destroy_cq {
637 struct ocrdma_mbx_hdr req; 638 struct ocrdma_mbx_hdr req;
638 639
639 u32 bypass_flush_qid; 640 u32 bypass_flush_qid;
640} __packed; 641};
641 642
642struct ocrdma_destroy_cq_rsp { 643struct ocrdma_destroy_cq_rsp {
643 struct ocrdma_mqe_hdr hdr; 644 struct ocrdma_mqe_hdr hdr;
644 struct ocrdma_mbx_rsp rsp; 645 struct ocrdma_mbx_rsp rsp;
645} __packed; 646};
646 647
647enum { 648enum {
648 OCRDMA_QPT_GSI = 1, 649 OCRDMA_QPT_GSI = 1,
@@ -766,7 +767,7 @@ struct ocrdma_create_qp_req {
766 u32 dpp_credits_cqid; 767 u32 dpp_credits_cqid;
767 u32 rpir_lkey; 768 u32 rpir_lkey;
768 struct ocrdma_pa ird_addr[MAX_OCRDMA_IRD_PAGES]; 769 struct ocrdma_pa ird_addr[MAX_OCRDMA_IRD_PAGES];
769} __packed; 770};
770 771
771enum { 772enum {
772 OCRDMA_CREATE_QP_RSP_QP_ID_SHIFT = 0, 773 OCRDMA_CREATE_QP_RSP_QP_ID_SHIFT = 0,
@@ -820,18 +821,18 @@ struct ocrdma_create_qp_rsp {
820 u32 max_ord_ird; 821 u32 max_ord_ird;
821 u32 sq_rq_id; 822 u32 sq_rq_id;
822 u32 dpp_response; 823 u32 dpp_response;
823} __packed; 824};
824 825
825struct ocrdma_destroy_qp { 826struct ocrdma_destroy_qp {
826 struct ocrdma_mqe_hdr hdr; 827 struct ocrdma_mqe_hdr hdr;
827 struct ocrdma_mbx_hdr req; 828 struct ocrdma_mbx_hdr req;
828 u32 qp_id; 829 u32 qp_id;
829} __packed; 830};
830 831
831struct ocrdma_destroy_qp_rsp { 832struct ocrdma_destroy_qp_rsp {
832 struct ocrdma_mqe_hdr hdr; 833 struct ocrdma_mqe_hdr hdr;
833 struct ocrdma_mbx_rsp rsp; 834 struct ocrdma_mbx_rsp rsp;
834} __packed; 835};
835 836
836enum { 837enum {
837 OCRDMA_MODIFY_QP_ID_SHIFT = 0, 838 OCRDMA_MODIFY_QP_ID_SHIFT = 0,
@@ -975,7 +976,7 @@ struct ocrdma_qp_params {
975 u32 dmac_b0_to_b3; 976 u32 dmac_b0_to_b3;
976 u32 vlan_dmac_b4_to_b5; 977 u32 vlan_dmac_b4_to_b5;
977 u32 qkey; 978 u32 qkey;
978} __packed; 979};
979 980
980 981
981struct ocrdma_modify_qp { 982struct ocrdma_modify_qp {
@@ -986,7 +987,7 @@ struct ocrdma_modify_qp {
986 u32 flags; 987 u32 flags;
987 u32 rdma_flags; 988 u32 rdma_flags;
988 u32 num_outstanding_atomic_rd; 989 u32 num_outstanding_atomic_rd;
989} __packed; 990};
990 991
991enum { 992enum {
992 OCRDMA_MODIFY_QP_RSP_MAX_RQE_SHIFT = 0, 993 OCRDMA_MODIFY_QP_RSP_MAX_RQE_SHIFT = 0,
@@ -1007,7 +1008,7 @@ struct ocrdma_modify_qp_rsp {
1007 1008
1008 u32 max_wqe_rqe; 1009 u32 max_wqe_rqe;
1009 u32 max_ord_ird; 1010 u32 max_ord_ird;
1010} __packed; 1011};
1011 1012
1012struct ocrdma_query_qp { 1013struct ocrdma_query_qp {
1013 struct ocrdma_mqe_hdr hdr; 1014 struct ocrdma_mqe_hdr hdr;
@@ -1016,13 +1017,13 @@ struct ocrdma_query_qp {
1016#define OCRDMA_QUERY_UP_QP_ID_SHIFT 0 1017#define OCRDMA_QUERY_UP_QP_ID_SHIFT 0
1017#define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF 1018#define OCRDMA_QUERY_UP_QP_ID_MASK 0xFFFFFF
1018 u32 qp_id; 1019 u32 qp_id;
1019} __packed; 1020};
1020 1021
1021struct ocrdma_query_qp_rsp { 1022struct ocrdma_query_qp_rsp {
1022 struct ocrdma_mqe_hdr hdr; 1023 struct ocrdma_mqe_hdr hdr;
1023 struct ocrdma_mbx_rsp rsp; 1024 struct ocrdma_mbx_rsp rsp;
1024 struct ocrdma_qp_params params; 1025 struct ocrdma_qp_params params;
1025} __packed; 1026};
1026 1027
1027enum { 1028enum {
1028 OCRDMA_CREATE_SRQ_PD_ID_SHIFT = 0, 1029 OCRDMA_CREATE_SRQ_PD_ID_SHIFT = 0,
@@ -1051,7 +1052,7 @@ struct ocrdma_create_srq {
1051 u32 max_sge_rqe; 1052 u32 max_sge_rqe;
1052 u32 pages_rqe_sz; 1053 u32 pages_rqe_sz;
1053 struct ocrdma_pa rq_addr[MAX_OCRDMA_SRQ_PAGES]; 1054 struct ocrdma_pa rq_addr[MAX_OCRDMA_SRQ_PAGES];
1054} __packed; 1055};
1055 1056
1056enum { 1057enum {
1057 OCRDMA_CREATE_SRQ_RSP_SRQ_ID_SHIFT = 0, 1058 OCRDMA_CREATE_SRQ_RSP_SRQ_ID_SHIFT = 0,
@@ -1070,7 +1071,7 @@ struct ocrdma_create_srq_rsp {
1070 1071
1071 u32 id; 1072 u32 id;
1072 u32 max_sge_rqe_allocated; 1073 u32 max_sge_rqe_allocated;
1073} __packed; 1074};
1074 1075
1075enum { 1076enum {
1076 OCRDMA_MODIFY_SRQ_ID_SHIFT = 0, 1077 OCRDMA_MODIFY_SRQ_ID_SHIFT = 0,
@@ -1089,7 +1090,7 @@ struct ocrdma_modify_srq {
1089 1090
1090 u32 id; 1091 u32 id;
1091 u32 limit_max_rqe; 1092 u32 limit_max_rqe;
1092} __packed; 1093};
1093 1094
1094enum { 1095enum {
1095 OCRDMA_QUERY_SRQ_ID_SHIFT = 0, 1096 OCRDMA_QUERY_SRQ_ID_SHIFT = 0,
@@ -1101,7 +1102,7 @@ struct ocrdma_query_srq {
1101 struct ocrdma_mbx_rsp req; 1102 struct ocrdma_mbx_rsp req;
1102 1103
1103 u32 id; 1104 u32 id;
1104} __packed; 1105};
1105 1106
1106enum { 1107enum {
1107 OCRDMA_QUERY_SRQ_RSP_PD_ID_SHIFT = 0, 1108 OCRDMA_QUERY_SRQ_RSP_PD_ID_SHIFT = 0,
@@ -1123,7 +1124,7 @@ struct ocrdma_query_srq_rsp {
1123 1124
1124 u32 max_rqe_pdid; 1125 u32 max_rqe_pdid;
1125 u32 srq_lmt_max_sge; 1126 u32 srq_lmt_max_sge;
1126} __packed; 1127};
1127 1128
1128enum { 1129enum {
1129 OCRDMA_DESTROY_SRQ_ID_SHIFT = 0, 1130 OCRDMA_DESTROY_SRQ_ID_SHIFT = 0,
@@ -1135,7 +1136,7 @@ struct ocrdma_destroy_srq {
1135 struct ocrdma_mbx_rsp req; 1136 struct ocrdma_mbx_rsp req;
1136 1137
1137 u32 id; 1138 u32 id;
1138} __packed; 1139};
1139 1140
1140enum { 1141enum {
1141 OCRDMA_ALLOC_PD_ENABLE_DPP = BIT(16), 1142 OCRDMA_ALLOC_PD_ENABLE_DPP = BIT(16),
@@ -1147,7 +1148,7 @@ struct ocrdma_alloc_pd {
1147 struct ocrdma_mqe_hdr hdr; 1148 struct ocrdma_mqe_hdr hdr;
1148 struct ocrdma_mbx_hdr req; 1149 struct ocrdma_mbx_hdr req;
1149 u32 enable_dpp_rsvd; 1150 u32 enable_dpp_rsvd;
1150} __packed; 1151};
1151 1152
1152enum { 1153enum {
1153 OCRDMA_ALLOC_PD_RSP_DPP = Bit(16), 1154 OCRDMA_ALLOC_PD_RSP_DPP = Bit(16),
@@ -1159,18 +1160,18 @@ struct ocrdma_alloc_pd_rsp {
1159 struct ocrdma_mqe_hdr hdr; 1160 struct ocrdma_mqe_hdr hdr;
1160 struct ocrdma_mbx_rsp rsp; 1161 struct ocrdma_mbx_rsp rsp;
1161 u32 dpp_page_pdid; 1162 u32 dpp_page_pdid;
1162} __packed; 1163};
1163 1164
1164struct ocrdma_dealloc_pd { 1165struct ocrdma_dealloc_pd {
1165 struct ocrdma_mqe_hdr hdr; 1166 struct ocrdma_mqe_hdr hdr;
1166 struct ocrdma_mbx_hdr req; 1167 struct ocrdma_mbx_hdr req;
1167 u32 id; 1168 u32 id;
1168} __packed; 1169};
1169 1170
1170struct ocrdma_dealloc_pd_rsp { 1171struct ocrdma_dealloc_pd_rsp {
1171 struct ocrdma_mqe_hdr hdr; 1172 struct ocrdma_mqe_hdr hdr;
1172 struct ocrdma_mbx_rsp rsp; 1173 struct ocrdma_mbx_rsp rsp;
1173} __packed; 1174};
1174 1175
1175enum { 1176enum {
1176 OCRDMA_ADDR_CHECK_ENABLE = 1, 1177 OCRDMA_ADDR_CHECK_ENABLE = 1,
@@ -1206,7 +1207,7 @@ struct ocrdma_alloc_lkey {
1206 1207
1207 u32 pdid; 1208 u32 pdid;
1208 u32 pbl_sz_flags; 1209 u32 pbl_sz_flags;
1209} __packed; 1210};
1210 1211
1211struct ocrdma_alloc_lkey_rsp { 1212struct ocrdma_alloc_lkey_rsp {
1212 struct ocrdma_mqe_hdr hdr; 1213 struct ocrdma_mqe_hdr hdr;
@@ -1214,7 +1215,7 @@ struct ocrdma_alloc_lkey_rsp {
1214 1215
1215 u32 lrkey; 1216 u32 lrkey;
1216 u32 num_pbl_rsvd; 1217 u32 num_pbl_rsvd;
1217} __packed; 1218};
1218 1219
1219struct ocrdma_dealloc_lkey { 1220struct ocrdma_dealloc_lkey {
1220 struct ocrdma_mqe_hdr hdr; 1221 struct ocrdma_mqe_hdr hdr;
@@ -1222,12 +1223,12 @@ struct ocrdma_dealloc_lkey {
1222 1223
1223 u32 lkey; 1224 u32 lkey;
1224 u32 rsvd_frmr; 1225 u32 rsvd_frmr;
1225} __packed; 1226};
1226 1227
1227struct ocrdma_dealloc_lkey_rsp { 1228struct ocrdma_dealloc_lkey_rsp {
1228 struct ocrdma_mqe_hdr hdr; 1229 struct ocrdma_mqe_hdr hdr;
1229 struct ocrdma_mbx_rsp rsp; 1230 struct ocrdma_mbx_rsp rsp;
1230} __packed; 1231};
1231 1232
1232#define MAX_OCRDMA_NSMR_PBL (u32)22 1233#define MAX_OCRDMA_NSMR_PBL (u32)22
1233#define MAX_OCRDMA_PBL_SIZE 65536 1234#define MAX_OCRDMA_PBL_SIZE 65536
@@ -1283,7 +1284,7 @@ struct ocrdma_reg_nsmr {
1283 u32 va_loaddr; 1284 u32 va_loaddr;
1284 u32 va_hiaddr; 1285 u32 va_hiaddr;
1285 struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL]; 1286 struct ocrdma_pa pbl[MAX_OCRDMA_NSMR_PBL];
1286} __packed; 1287};
1287 1288
1288enum { 1289enum {
1289 OCRDMA_REG_NSMR_CONT_PBL_SHIFT = 0, 1290 OCRDMA_REG_NSMR_CONT_PBL_SHIFT = 0,
@@ -1310,7 +1311,7 @@ struct ocrdma_reg_nsmr_cont {
1310struct ocrdma_pbe { 1311struct ocrdma_pbe {
1311 u32 pa_hi; 1312 u32 pa_hi;
1312 u32 pa_lo; 1313 u32 pa_lo;
1313} __packed; 1314};
1314 1315
1315enum { 1316enum {
1316 OCRDMA_REG_NSMR_RSP_NUM_PBL_SHIFT = 16, 1317 OCRDMA_REG_NSMR_RSP_NUM_PBL_SHIFT = 16,
@@ -1322,7 +1323,7 @@ struct ocrdma_reg_nsmr_rsp {
1322 1323
1323 u32 lrkey; 1324 u32 lrkey;
1324 u32 num_pbl; 1325 u32 num_pbl;
1325} __packed; 1326};
1326 1327
1327enum { 1328enum {
1328 OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_SHIFT = 0, 1329 OCRDMA_REG_NSMR_CONT_RSP_LRKEY_INDEX_SHIFT = 0,
@@ -1342,7 +1343,7 @@ struct ocrdma_reg_nsmr_cont_rsp {
1342 1343
1343 u32 lrkey_key_index; 1344 u32 lrkey_key_index;
1344 u32 num_pbl; 1345 u32 num_pbl;
1345} __packed; 1346};
1346 1347
1347enum { 1348enum {
1348 OCRDMA_ALLOC_MW_PD_ID_SHIFT = 0, 1349 OCRDMA_ALLOC_MW_PD_ID_SHIFT = 0,
@@ -1354,7 +1355,7 @@ struct ocrdma_alloc_mw {
1354 struct ocrdma_mbx_hdr req; 1355 struct ocrdma_mbx_hdr req;
1355 1356
1356 u32 pdid; 1357 u32 pdid;
1357} __packed; 1358};
1358 1359
1359enum { 1360enum {
1360 OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_SHIFT = 0, 1361 OCRDMA_ALLOC_MW_RSP_LRKEY_INDEX_SHIFT = 0,
@@ -1366,7 +1367,7 @@ struct ocrdma_alloc_mw_rsp {
1366 struct ocrdma_mbx_rsp rsp; 1367 struct ocrdma_mbx_rsp rsp;
1367 1368
1368 u32 lrkey_index; 1369 u32 lrkey_index;
1369} __packed; 1370};
1370 1371
1371struct ocrdma_attach_mcast { 1372struct ocrdma_attach_mcast {
1372 struct ocrdma_mqe_hdr hdr; 1373 struct ocrdma_mqe_hdr hdr;
@@ -1375,12 +1376,12 @@ struct ocrdma_attach_mcast {
1375 u8 mgid[16]; 1376 u8 mgid[16];
1376 u32 mac_b0_to_b3; 1377 u32 mac_b0_to_b3;
1377 u32 vlan_mac_b4_to_b5; 1378 u32 vlan_mac_b4_to_b5;
1378} __packed; 1379};
1379 1380
1380struct ocrdma_attach_mcast_rsp { 1381struct ocrdma_attach_mcast_rsp {
1381 struct ocrdma_mqe_hdr hdr; 1382 struct ocrdma_mqe_hdr hdr;
1382 struct ocrdma_mbx_rsp rsp; 1383 struct ocrdma_mbx_rsp rsp;
1383} __packed; 1384};
1384 1385
1385struct ocrdma_detach_mcast { 1386struct ocrdma_detach_mcast {
1386 struct ocrdma_mqe_hdr hdr; 1387 struct ocrdma_mqe_hdr hdr;
@@ -1389,12 +1390,12 @@ struct ocrdma_detach_mcast {
1389 u8 mgid[16]; 1390 u8 mgid[16];
1390 u32 mac_b0_to_b3; 1391 u32 mac_b0_to_b3;
1391 u32 vlan_mac_b4_to_b5; 1392 u32 vlan_mac_b4_to_b5;
1392} __packed; 1393};
1393 1394
1394struct ocrdma_detach_mcast_rsp { 1395struct ocrdma_detach_mcast_rsp {
1395 struct ocrdma_mqe_hdr hdr; 1396 struct ocrdma_mqe_hdr hdr;
1396 struct ocrdma_mbx_rsp rsp; 1397 struct ocrdma_mbx_rsp rsp;
1397} __packed; 1398};
1398 1399
1399enum { 1400enum {
1400 OCRDMA_CREATE_AH_NUM_PAGES_SHIFT = 19, 1401 OCRDMA_CREATE_AH_NUM_PAGES_SHIFT = 19,
@@ -1418,24 +1419,24 @@ struct ocrdma_create_ah_tbl {
1418 1419
1419 u32 ah_conf; 1420 u32 ah_conf;
1420 struct ocrdma_pa tbl_addr[8]; 1421 struct ocrdma_pa tbl_addr[8];
1421} __packed; 1422};
1422 1423
1423struct ocrdma_create_ah_tbl_rsp { 1424struct ocrdma_create_ah_tbl_rsp {
1424 struct ocrdma_mqe_hdr hdr; 1425 struct ocrdma_mqe_hdr hdr;
1425 struct ocrdma_mbx_rsp rsp; 1426 struct ocrdma_mbx_rsp rsp;
1426 u32 ahid; 1427 u32 ahid;
1427} __packed; 1428};
1428 1429
1429struct ocrdma_delete_ah_tbl { 1430struct ocrdma_delete_ah_tbl {
1430 struct ocrdma_mqe_hdr hdr; 1431 struct ocrdma_mqe_hdr hdr;
1431 struct ocrdma_mbx_hdr req; 1432 struct ocrdma_mbx_hdr req;
1432 u32 ahid; 1433 u32 ahid;
1433} __packed; 1434};
1434 1435
1435struct ocrdma_delete_ah_tbl_rsp { 1436struct ocrdma_delete_ah_tbl_rsp {
1436 struct ocrdma_mqe_hdr hdr; 1437 struct ocrdma_mqe_hdr hdr;
1437 struct ocrdma_mbx_rsp rsp; 1438 struct ocrdma_mbx_rsp rsp;
1438} __packed; 1439};
1439 1440
1440enum { 1441enum {
1441 OCRDMA_EQE_VALID_SHIFT = 0, 1442 OCRDMA_EQE_VALID_SHIFT = 0,
@@ -1448,7 +1449,7 @@ enum {
1448 1449
1449struct ocrdma_eqe { 1450struct ocrdma_eqe {
1450 u32 id_valid; 1451 u32 id_valid;
1451} __packed; 1452};
1452 1453
1453enum OCRDMA_CQE_STATUS { 1454enum OCRDMA_CQE_STATUS {
1454 OCRDMA_CQE_SUCCESS = 0, 1455 OCRDMA_CQE_SUCCESS = 0,
@@ -1532,14 +1533,14 @@ struct ocrdma_cqe {
1532 } cmn; 1533 } cmn;
1533 }; 1534 };
1534 u32 flags_status_srcqpn; /* w3 */ 1535 u32 flags_status_srcqpn; /* w3 */
1535} __packed; 1536};
1536 1537
1537struct ocrdma_sge { 1538struct ocrdma_sge {
1538 u32 addr_hi; 1539 u32 addr_hi;
1539 u32 addr_lo; 1540 u32 addr_lo;
1540 u32 lrkey; 1541 u32 lrkey;
1541 u32 len; 1542 u32 len;
1542} __packed; 1543};
1543 1544
1544enum { 1545enum {
1545 OCRDMA_FLAG_SIG = 0x1, 1546 OCRDMA_FLAG_SIG = 0x1,
@@ -1600,14 +1601,14 @@ struct ocrdma_hdr_wqe {
1600 u32 lkey; 1601 u32 lkey;
1601 }; 1602 };
1602 u32 total_len; 1603 u32 total_len;
1603} __packed; 1604};
1604 1605
1605struct ocrdma_ewqe_ud_hdr { 1606struct ocrdma_ewqe_ud_hdr {
1606 u32 rsvd_dest_qpn; 1607 u32 rsvd_dest_qpn;
1607 u32 qkey; 1608 u32 qkey;
1608 u32 rsvd_ahid; 1609 u32 rsvd_ahid;
1609 u32 rsvd; 1610 u32 rsvd;
1610} __packed; 1611};
1611 1612
1612struct ocrdma_eth_basic { 1613struct ocrdma_eth_basic {
1613 u8 dmac[6]; 1614 u8 dmac[6];