diff options
author | Roland Dreier <rolandd@cisco.com> | 2005-10-23 15:57:19 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2005-10-23 19:38:39 -0400 |
commit | 75eeec2f3fd9e8a16777219ebf1bf8395845faa7 (patch) | |
tree | 347883a070001786aafdbf284d8d6971ab44dbff /drivers/infiniband/hw/mthca | |
parent | 8d3b35914aa54232b27e6a2b57d84092aadc5e86 (diff) |
[PATCH] ib: mthca: Always re-arm EQs in mthca_tavor_interrupt()
We should always re-arm an event queue's interrupt in
mthca_tavor_interrupt() if the corresponding bit is set in the event cause
register (ECR), even if we didn't find any entries in the EQ. If we don't,
then there's a window where we miss an EQ entry and then get stuck because
we don't get another EQ event.
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/infiniband/hw/mthca')
-rw-r--r-- | drivers/infiniband/hw/mthca/mthca_eq.c | 21 |
1 files changed, 11 insertions, 10 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_eq.c b/drivers/infiniband/hw/mthca/mthca_eq.c index c81fa8e975ef..8dfafda5ed24 100644 --- a/drivers/infiniband/hw/mthca/mthca_eq.c +++ b/drivers/infiniband/hw/mthca/mthca_eq.c | |||
@@ -396,20 +396,21 @@ static irqreturn_t mthca_tavor_interrupt(int irq, void *dev_ptr, struct pt_regs | |||
396 | writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); | 396 | writel(dev->eq_table.clr_mask, dev->eq_table.clr_int); |
397 | 397 | ||
398 | ecr = readl(dev->eq_regs.tavor.ecr_base + 4); | 398 | ecr = readl(dev->eq_regs.tavor.ecr_base + 4); |
399 | if (ecr) { | 399 | if (!ecr) |
400 | writel(ecr, dev->eq_regs.tavor.ecr_base + | 400 | return IRQ_NONE; |
401 | MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4); | ||
402 | 401 | ||
403 | for (i = 0; i < MTHCA_NUM_EQ; ++i) | 402 | writel(ecr, dev->eq_regs.tavor.ecr_base + |
404 | if (ecr & dev->eq_table.eq[i].eqn_mask && | 403 | MTHCA_ECR_CLR_BASE - MTHCA_ECR_BASE + 4); |
405 | mthca_eq_int(dev, &dev->eq_table.eq[i])) { | 404 | |
405 | for (i = 0; i < MTHCA_NUM_EQ; ++i) | ||
406 | if (ecr & dev->eq_table.eq[i].eqn_mask) { | ||
407 | if (mthca_eq_int(dev, &dev->eq_table.eq[i])) | ||
406 | tavor_set_eq_ci(dev, &dev->eq_table.eq[i], | 408 | tavor_set_eq_ci(dev, &dev->eq_table.eq[i], |
407 | dev->eq_table.eq[i].cons_index); | 409 | dev->eq_table.eq[i].cons_index); |
408 | tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); | 410 | tavor_eq_req_not(dev, dev->eq_table.eq[i].eqn); |
409 | } | 411 | } |
410 | } | ||
411 | 412 | ||
412 | return IRQ_RETVAL(ecr); | 413 | return IRQ_HANDLED; |
413 | } | 414 | } |
414 | 415 | ||
415 | static irqreturn_t mthca_tavor_msi_x_interrupt(int irq, void *eq_ptr, | 416 | static irqreturn_t mthca_tavor_msi_x_interrupt(int irq, void *eq_ptr, |