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authorRoland Dreier <roland@topspin.com>2005-04-16 18:26:24 -0400
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 18:26:24 -0400
commit44ea66879d5638cfed5b5ecf628badfd8ec26f36 (patch)
tree987bb5368a8e4a058cffc2eef4752d7cca4335e5 /drivers/infiniband/hw/mthca/mthca_mr.c
parentddb934e0eead2feadc7467b1f7bf9c81aa241232 (diff)
[PATCH] IB/mthca: fix MTT allocation in mem-free mode
Fix bug in MTT allocation in mem-free mode. I misunderstood the MTT size value returned by the firmware -- it is really the size of a single MTT entry, since mem-free mode does not segment the MTT as the original firmware did. This meant that our MTT addresses ended up being off by a factor of 8. This meant that our MTT allocations might overlap, and so we could overwrite and corrupt earlier memory regions when writing new MTT entries. We fix this by always using our 64-byte MTT segment size. This allows some simplification of the code as well, since there's no reason to put the MTT segment size in a variable -- we can always use our enum value directly. Signed-off-by: Roland Dreier <roland@topspin.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_mr.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_mr.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_mr.c b/drivers/infiniband/hw/mthca/mthca_mr.c
index 66656379ea7b..5cde296b4065 100644
--- a/drivers/infiniband/hw/mthca/mthca_mr.c
+++ b/drivers/infiniband/hw/mthca/mthca_mr.c
@@ -263,7 +263,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
263 goto err_out_mpt_free; 263 goto err_out_mpt_free;
264 } 264 }
265 265
266 for (i = dev->limits.mtt_seg_size / 8, mr->order = 0; 266 for (i = MTHCA_MTT_SEG_SIZE / 8, mr->order = 0;
267 i < list_len; 267 i < list_len;
268 i <<= 1, ++mr->order) 268 i <<= 1, ++mr->order)
269 ; /* nothing */ 269 ; /* nothing */
@@ -286,7 +286,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
286 mtt_entry = MAILBOX_ALIGN(mailbox); 286 mtt_entry = MAILBOX_ALIGN(mailbox);
287 287
288 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base + 288 mtt_entry[0] = cpu_to_be64(dev->mr_table.mtt_base +
289 mr->first_seg * dev->limits.mtt_seg_size); 289 mr->first_seg * MTHCA_MTT_SEG_SIZE);
290 mtt_entry[1] = 0; 290 mtt_entry[1] = 0;
291 for (i = 0; i < list_len; ++i) 291 for (i = 0; i < list_len; ++i)
292 mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] | 292 mtt_entry[i + 2] = cpu_to_be64(buffer_list[i] |
@@ -330,7 +330,7 @@ int mthca_mr_alloc_phys(struct mthca_dev *dev, u32 pd,
330 memset(&mpt_entry->lkey, 0, 330 memset(&mpt_entry->lkey, 0,
331 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey)); 331 sizeof *mpt_entry - offsetof(struct mthca_mpt_entry, lkey));
332 mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base + 332 mpt_entry->mtt_seg = cpu_to_be64(dev->mr_table.mtt_base +
333 mr->first_seg * dev->limits.mtt_seg_size); 333 mr->first_seg * MTHCA_MTT_SEG_SIZE);
334 334
335 if (0) { 335 if (0) {
336 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey); 336 mthca_dbg(dev, "Dumping MPT entry %08x:\n", mr->ibmr.lkey);