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authorSean Hefty <sean.hefty@intel.com>2005-08-14 00:05:57 -0400
committerRoland Dreier <rolandd@cisco.com>2005-08-26 23:37:35 -0400
commit97f52eb438be7caebe026421545619d8a0c1398a (patch)
tree1085acb833b691e9cc7ef607e4b4ac8cbd81e03f /drivers/infiniband/hw/mthca/mthca_cq.c
parent92a6b34bf4d0d11c54b2a6bdd6240f98cb326200 (diff)
[PATCH] IB: sparse endianness cleanup
Fix sparse warnings. Use __be* where appropriate. Signed-off-by: Sean Hefty <sean.hefty@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_cq.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cq.c89
1 files changed, 44 insertions, 45 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cq.c b/drivers/infiniband/hw/mthca/mthca_cq.c
index bd7807cec50c..907867d1f2e0 100644
--- a/drivers/infiniband/hw/mthca/mthca_cq.c
+++ b/drivers/infiniband/hw/mthca/mthca_cq.c
@@ -57,21 +57,21 @@ enum {
57 * Must be packed because start is 64 bits but only aligned to 32 bits. 57 * Must be packed because start is 64 bits but only aligned to 32 bits.
58 */ 58 */
59struct mthca_cq_context { 59struct mthca_cq_context {
60 u32 flags; 60 __be32 flags;
61 u64 start; 61 __be64 start;
62 u32 logsize_usrpage; 62 __be32 logsize_usrpage;
63 u32 error_eqn; /* Tavor only */ 63 __be32 error_eqn; /* Tavor only */
64 u32 comp_eqn; 64 __be32 comp_eqn;
65 u32 pd; 65 __be32 pd;
66 u32 lkey; 66 __be32 lkey;
67 u32 last_notified_index; 67 __be32 last_notified_index;
68 u32 solicit_producer_index; 68 __be32 solicit_producer_index;
69 u32 consumer_index; 69 __be32 consumer_index;
70 u32 producer_index; 70 __be32 producer_index;
71 u32 cqn; 71 __be32 cqn;
72 u32 ci_db; /* Arbel only */ 72 __be32 ci_db; /* Arbel only */
73 u32 state_db; /* Arbel only */ 73 __be32 state_db; /* Arbel only */
74 u32 reserved; 74 u32 reserved;
75} __attribute__((packed)); 75} __attribute__((packed));
76 76
77#define MTHCA_CQ_STATUS_OK ( 0 << 28) 77#define MTHCA_CQ_STATUS_OK ( 0 << 28)
@@ -110,31 +110,31 @@ enum {
110}; 110};
111 111
112struct mthca_cqe { 112struct mthca_cqe {
113 u32 my_qpn; 113 __be32 my_qpn;
114 u32 my_ee; 114 __be32 my_ee;
115 u32 rqpn; 115 __be32 rqpn;
116 u16 sl_g_mlpath; 116 __be16 sl_g_mlpath;
117 u16 rlid; 117 __be16 rlid;
118 u32 imm_etype_pkey_eec; 118 __be32 imm_etype_pkey_eec;
119 u32 byte_cnt; 119 __be32 byte_cnt;
120 u32 wqe; 120 __be32 wqe;
121 u8 opcode; 121 u8 opcode;
122 u8 is_send; 122 u8 is_send;
123 u8 reserved; 123 u8 reserved;
124 u8 owner; 124 u8 owner;
125}; 125};
126 126
127struct mthca_err_cqe { 127struct mthca_err_cqe {
128 u32 my_qpn; 128 __be32 my_qpn;
129 u32 reserved1[3]; 129 u32 reserved1[3];
130 u8 syndrome; 130 u8 syndrome;
131 u8 reserved2; 131 u8 reserved2;
132 u16 db_cnt; 132 __be16 db_cnt;
133 u32 reserved3; 133 u32 reserved3;
134 u32 wqe; 134 __be32 wqe;
135 u8 opcode; 135 u8 opcode;
136 u8 reserved4[2]; 136 u8 reserved4[2];
137 u8 owner; 137 u8 owner;
138}; 138};
139 139
140#define MTHCA_CQ_ENTRY_OWNER_SW (0 << 7) 140#define MTHCA_CQ_ENTRY_OWNER_SW (0 << 7)
@@ -193,7 +193,7 @@ static void dump_cqe(struct mthca_dev *dev, void *cqe_ptr)
193static inline void update_cons_index(struct mthca_dev *dev, struct mthca_cq *cq, 193static inline void update_cons_index(struct mthca_dev *dev, struct mthca_cq *cq,
194 int incr) 194 int incr)
195{ 195{
196 u32 doorbell[2]; 196 __be32 doorbell[2];
197 197
198 if (mthca_is_memfree(dev)) { 198 if (mthca_is_memfree(dev)) {
199 *cq->set_ci_db = cpu_to_be32(cq->cons_index); 199 *cq->set_ci_db = cpu_to_be32(cq->cons_index);
@@ -293,7 +293,7 @@ static int handle_error_cqe(struct mthca_dev *dev, struct mthca_cq *cq,
293{ 293{
294 int err; 294 int err;
295 int dbd; 295 int dbd;
296 u32 new_wqe; 296 __be32 new_wqe;
297 297
298 if (cqe->syndrome == SYNDROME_LOCAL_QP_OP_ERR) { 298 if (cqe->syndrome == SYNDROME_LOCAL_QP_OP_ERR) {
299 mthca_dbg(dev, "local QP operation err " 299 mthca_dbg(dev, "local QP operation err "
@@ -586,13 +586,13 @@ int mthca_poll_cq(struct ib_cq *ibcq, int num_entries,
586 586
587int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify) 587int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify)
588{ 588{
589 u32 doorbell[2]; 589 __be32 doorbell[2];
590 590
591 doorbell[0] = cpu_to_be32((notify == IB_CQ_SOLICITED ? 591 doorbell[0] = cpu_to_be32((notify == IB_CQ_SOLICITED ?
592 MTHCA_TAVOR_CQ_DB_REQ_NOT_SOL : 592 MTHCA_TAVOR_CQ_DB_REQ_NOT_SOL :
593 MTHCA_TAVOR_CQ_DB_REQ_NOT) | 593 MTHCA_TAVOR_CQ_DB_REQ_NOT) |
594 to_mcq(cq)->cqn); 594 to_mcq(cq)->cqn);
595 doorbell[1] = 0xffffffff; 595 doorbell[1] = (__force __be32) 0xffffffff;
596 596
597 mthca_write64(doorbell, 597 mthca_write64(doorbell,
598 to_mdev(cq->device)->kar + MTHCA_CQ_DOORBELL, 598 to_mdev(cq->device)->kar + MTHCA_CQ_DOORBELL,
@@ -604,9 +604,9 @@ int mthca_tavor_arm_cq(struct ib_cq *cq, enum ib_cq_notify notify)
604int mthca_arbel_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify notify) 604int mthca_arbel_arm_cq(struct ib_cq *ibcq, enum ib_cq_notify notify)
605{ 605{
606 struct mthca_cq *cq = to_mcq(ibcq); 606 struct mthca_cq *cq = to_mcq(ibcq);
607 u32 doorbell[2]; 607 __be32 doorbell[2];
608 u32 sn; 608 u32 sn;
609 u32 ci; 609 __be32 ci;
610 610
611 sn = cq->arm_sn & 3; 611 sn = cq->arm_sn & 3;
612 ci = cpu_to_be32(cq->cons_index); 612 ci = cpu_to_be32(cq->cons_index);
@@ -813,7 +813,6 @@ int mthca_init_cq(struct mthca_dev *dev, int nent,
813 cq_context->flags = cpu_to_be32(MTHCA_CQ_STATUS_OK | 813 cq_context->flags = cpu_to_be32(MTHCA_CQ_STATUS_OK |
814 MTHCA_CQ_STATE_DISARMED | 814 MTHCA_CQ_STATE_DISARMED |
815 MTHCA_CQ_FLAG_TR); 815 MTHCA_CQ_FLAG_TR);
816 cq_context->start = cpu_to_be64(0);
817 cq_context->logsize_usrpage = cpu_to_be32((ffs(nent) - 1) << 24); 816 cq_context->logsize_usrpage = cpu_to_be32((ffs(nent) - 1) << 24);
818 if (ctx) 817 if (ctx)
819 cq_context->logsize_usrpage |= cpu_to_be32(ctx->uar.index); 818 cq_context->logsize_usrpage |= cpu_to_be32(ctx->uar.index);
@@ -906,7 +905,7 @@ void mthca_free_cq(struct mthca_dev *dev,
906 mthca_warn(dev, "HW2SW_CQ returned status 0x%02x\n", status); 905 mthca_warn(dev, "HW2SW_CQ returned status 0x%02x\n", status);
907 906
908 if (0) { 907 if (0) {
909 u32 *ctx = mailbox->buf; 908 __be32 *ctx = mailbox->buf;
910 int j; 909 int j;
911 910
912 printk(KERN_ERR "context for CQN %x (cons index %x, next sw %d)\n", 911 printk(KERN_ERR "context for CQN %x (cons index %x, next sw %d)\n",