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authorRoland Dreier <rolandd@cisco.com>2006-02-10 21:02:44 -0500
committerRoland Dreier <rolandd@cisco.com>2006-02-10 21:02:44 -0500
commitf295c79b6766b25fe8c1aad88211c54d1caa7e0b (patch)
tree116e8255895a00c133637b3b7aa9559daba02a94 /drivers/infiniband/hw/mthca/mthca_cmd.c
parent7bcb974ef6a0ae903888272c92c66ea779388c01 (diff)
IB/mthca: Don't print debugging info until we have all values
When debugging is enabled, the mthca_QUERY_DEV_LIM() firmware command function prints out some of the device limits that it queries. However the debugging prints happen before all of the fields are extracted from the firmware response, so some of the values that get printed are uninitialized junk. Move the prints to the end of the function to fix this. Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_cmd.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cmd.c38
1 files changed, 19 insertions, 19 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index f9b9b93dc501..2825615ce81c 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -1029,25 +1029,6 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
1029 MTHCA_GET(size, outbox, QUERY_DEV_LIM_UAR_ENTRY_SZ_OFFSET); 1029 MTHCA_GET(size, outbox, QUERY_DEV_LIM_UAR_ENTRY_SZ_OFFSET);
1030 dev_lim->uar_scratch_entry_sz = size; 1030 dev_lim->uar_scratch_entry_sz = size;
1031 1031
1032 mthca_dbg(dev, "Max QPs: %d, reserved QPs: %d, entry size: %d\n",
1033 dev_lim->max_qps, dev_lim->reserved_qps, dev_lim->qpc_entry_sz);
1034 mthca_dbg(dev, "Max SRQs: %d, reserved SRQs: %d, entry size: %d\n",
1035 dev_lim->max_srqs, dev_lim->reserved_srqs, dev_lim->srq_entry_sz);
1036 mthca_dbg(dev, "Max CQs: %d, reserved CQs: %d, entry size: %d\n",
1037 dev_lim->max_cqs, dev_lim->reserved_cqs, dev_lim->cqc_entry_sz);
1038 mthca_dbg(dev, "Max EQs: %d, reserved EQs: %d, entry size: %d\n",
1039 dev_lim->max_eqs, dev_lim->reserved_eqs, dev_lim->eqc_entry_sz);
1040 mthca_dbg(dev, "reserved MPTs: %d, reserved MTTs: %d\n",
1041 dev_lim->reserved_mrws, dev_lim->reserved_mtts);
1042 mthca_dbg(dev, "Max PDs: %d, reserved PDs: %d, reserved UARs: %d\n",
1043 dev_lim->max_pds, dev_lim->reserved_pds, dev_lim->reserved_uars);
1044 mthca_dbg(dev, "Max QP/MCG: %d, reserved MGMs: %d\n",
1045 dev_lim->max_pds, dev_lim->reserved_mgms);
1046 mthca_dbg(dev, "Max CQEs: %d, max WQEs: %d, max SRQ WQEs: %d\n",
1047 dev_lim->max_cq_sz, dev_lim->max_qp_sz, dev_lim->max_srq_sz);
1048
1049 mthca_dbg(dev, "Flags: %08x\n", dev_lim->flags);
1050
1051 if (mthca_is_memfree(dev)) { 1032 if (mthca_is_memfree(dev)) {
1052 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_SRQ_SZ_OFFSET); 1033 MTHCA_GET(field, outbox, QUERY_DEV_LIM_MAX_SRQ_SZ_OFFSET);
1053 dev_lim->max_srq_sz = 1 << field; 1034 dev_lim->max_srq_sz = 1 << field;
@@ -1093,6 +1074,25 @@ int mthca_QUERY_DEV_LIM(struct mthca_dev *dev,
1093 dev_lim->mpt_entry_sz = MTHCA_MPT_ENTRY_SIZE; 1074 dev_lim->mpt_entry_sz = MTHCA_MPT_ENTRY_SIZE;
1094 } 1075 }
1095 1076
1077 mthca_dbg(dev, "Max QPs: %d, reserved QPs: %d, entry size: %d\n",
1078 dev_lim->max_qps, dev_lim->reserved_qps, dev_lim->qpc_entry_sz);
1079 mthca_dbg(dev, "Max SRQs: %d, reserved SRQs: %d, entry size: %d\n",
1080 dev_lim->max_srqs, dev_lim->reserved_srqs, dev_lim->srq_entry_sz);
1081 mthca_dbg(dev, "Max CQs: %d, reserved CQs: %d, entry size: %d\n",
1082 dev_lim->max_cqs, dev_lim->reserved_cqs, dev_lim->cqc_entry_sz);
1083 mthca_dbg(dev, "Max EQs: %d, reserved EQs: %d, entry size: %d\n",
1084 dev_lim->max_eqs, dev_lim->reserved_eqs, dev_lim->eqc_entry_sz);
1085 mthca_dbg(dev, "reserved MPTs: %d, reserved MTTs: %d\n",
1086 dev_lim->reserved_mrws, dev_lim->reserved_mtts);
1087 mthca_dbg(dev, "Max PDs: %d, reserved PDs: %d, reserved UARs: %d\n",
1088 dev_lim->max_pds, dev_lim->reserved_pds, dev_lim->reserved_uars);
1089 mthca_dbg(dev, "Max QP/MCG: %d, reserved MGMs: %d\n",
1090 dev_lim->max_pds, dev_lim->reserved_mgms);
1091 mthca_dbg(dev, "Max CQEs: %d, max WQEs: %d, max SRQ WQEs: %d\n",
1092 dev_lim->max_cq_sz, dev_lim->max_qp_sz, dev_lim->max_srq_sz);
1093
1094 mthca_dbg(dev, "Flags: %08x\n", dev_lim->flags);
1095
1096out: 1096out:
1097 mthca_free_mailbox(dev, mailbox); 1097 mthca_free_mailbox(dev, mailbox);
1098 return err; 1098 return err;