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authorSean Hefty <sean.hefty@intel.com>2005-08-14 00:05:57 -0400
committerRoland Dreier <rolandd@cisco.com>2005-08-26 23:37:35 -0400
commit97f52eb438be7caebe026421545619d8a0c1398a (patch)
tree1085acb833b691e9cc7ef607e4b4ac8cbd81e03f /drivers/infiniband/hw/mthca/mthca_cmd.c
parent92a6b34bf4d0d11c54b2a6bdd6240f98cb326200 (diff)
[PATCH] IB: sparse endianness cleanup
Fix sparse warnings. Use __be* where appropriate. Signed-off-by: Sean Hefty <sean.hefty@intel.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/mthca/mthca_cmd.c')
-rw-r--r--drivers/infiniband/hw/mthca/mthca_cmd.c40
1 files changed, 21 insertions, 19 deletions
diff --git a/drivers/infiniband/hw/mthca/mthca_cmd.c b/drivers/infiniband/hw/mthca/mthca_cmd.c
index 0ff5900e0930..1e60487ecd7f 100644
--- a/drivers/infiniband/hw/mthca/mthca_cmd.c
+++ b/drivers/infiniband/hw/mthca/mthca_cmd.c
@@ -220,20 +220,20 @@ static int mthca_cmd_post(struct mthca_dev *dev,
220 * (and some architectures such as ia64 implement memcpy_toio 220 * (and some architectures such as ia64 implement memcpy_toio
221 * in terms of writeb). 221 * in terms of writeb).
222 */ 222 */
223 __raw_writel(cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4); 223 __raw_writel((__force u32) cpu_to_be32(in_param >> 32), dev->hcr + 0 * 4);
224 __raw_writel(cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4); 224 __raw_writel((__force u32) cpu_to_be32(in_param & 0xfffffffful), dev->hcr + 1 * 4);
225 __raw_writel(cpu_to_be32(in_modifier), dev->hcr + 2 * 4); 225 __raw_writel((__force u32) cpu_to_be32(in_modifier), dev->hcr + 2 * 4);
226 __raw_writel(cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4); 226 __raw_writel((__force u32) cpu_to_be32(out_param >> 32), dev->hcr + 3 * 4);
227 __raw_writel(cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4); 227 __raw_writel((__force u32) cpu_to_be32(out_param & 0xfffffffful), dev->hcr + 4 * 4);
228 __raw_writel(cpu_to_be32(token << 16), dev->hcr + 5 * 4); 228 __raw_writel((__force u32) cpu_to_be32(token << 16), dev->hcr + 5 * 4);
229 229
230 /* __raw_writel may not order writes. */ 230 /* __raw_writel may not order writes. */
231 wmb(); 231 wmb();
232 232
233 __raw_writel(cpu_to_be32((1 << HCR_GO_BIT) | 233 __raw_writel((__force u32) cpu_to_be32((1 << HCR_GO_BIT) |
234 (event ? (1 << HCA_E_BIT) : 0) | 234 (event ? (1 << HCA_E_BIT) : 0) |
235 (op_modifier << HCR_OPMOD_SHIFT) | 235 (op_modifier << HCR_OPMOD_SHIFT) |
236 op), dev->hcr + 6 * 4); 236 op), dev->hcr + 6 * 4);
237 237
238out: 238out:
239 up(&dev->cmd.hcr_sem); 239 up(&dev->cmd.hcr_sem);
@@ -274,12 +274,14 @@ static int mthca_cmd_poll(struct mthca_dev *dev,
274 goto out; 274 goto out;
275 } 275 }
276 276
277 if (out_is_imm) { 277 if (out_is_imm)
278 memcpy_fromio(out_param, dev->hcr + HCR_OUT_PARAM_OFFSET, sizeof (u64)); 278 *out_param =
279 be64_to_cpus(out_param); 279 (u64) be32_to_cpu((__force __be32)
280 } 280 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET)) << 32 |
281 (u64) be32_to_cpu((__force __be32)
282 __raw_readl(dev->hcr + HCR_OUT_PARAM_OFFSET + 4));
281 283
282 *status = be32_to_cpu(__raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24; 284 *status = be32_to_cpu((__force __be32) __raw_readl(dev->hcr + HCR_STATUS_OFFSET)) >> 24;
283 285
284out: 286out:
285 up(&dev->cmd.poll_sem); 287 up(&dev->cmd.poll_sem);
@@ -1122,7 +1124,7 @@ int mthca_INIT_HCA(struct mthca_dev *dev,
1122 u8 *status) 1124 u8 *status)
1123{ 1125{
1124 struct mthca_mailbox *mailbox; 1126 struct mthca_mailbox *mailbox;
1125 u32 *inbox; 1127 __be32 *inbox;
1126 int err; 1128 int err;
1127 1129
1128#define INIT_HCA_IN_SIZE 0x200 1130#define INIT_HCA_IN_SIZE 0x200
@@ -1343,7 +1345,7 @@ int mthca_MAP_ICM(struct mthca_dev *dev, struct mthca_icm *icm, u64 virt, u8 *st
1343int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status) 1345int mthca_MAP_ICM_page(struct mthca_dev *dev, u64 dma_addr, u64 virt, u8 *status)
1344{ 1346{
1345 struct mthca_mailbox *mailbox; 1347 struct mthca_mailbox *mailbox;
1346 u64 *inbox; 1348 __be64 *inbox;
1347 int err; 1349 int err;
1348 1350
1349 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL); 1351 mailbox = mthca_alloc_mailbox(dev, GFP_KERNEL);
@@ -1514,7 +1516,7 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
1514 if (i % 8 == 0) 1516 if (i % 8 == 0)
1515 printk(" [%02x] ", i * 4); 1517 printk(" [%02x] ", i * 4);
1516 printk(" %08x", 1518 printk(" %08x",
1517 be32_to_cpu(((u32 *) mailbox->buf)[i + 2])); 1519 be32_to_cpu(((__be32 *) mailbox->buf)[i + 2]));
1518 if ((i + 1) % 8 == 0) 1520 if ((i + 1) % 8 == 0)
1519 printk("\n"); 1521 printk("\n");
1520 } 1522 }
@@ -1534,7 +1536,7 @@ int mthca_MODIFY_QP(struct mthca_dev *dev, int trans, u32 num,
1534 if (i % 8 == 0) 1536 if (i % 8 == 0)
1535 printk("[%02x] ", i * 4); 1537 printk("[%02x] ", i * 4);
1536 printk(" %08x", 1538 printk(" %08x",
1537 be32_to_cpu(((u32 *) mailbox->buf)[i + 2])); 1539 be32_to_cpu(((__be32 *) mailbox->buf)[i + 2]));
1538 if ((i + 1) % 8 == 0) 1540 if ((i + 1) % 8 == 0)
1539 printk("\n"); 1541 printk("\n");
1540 } 1542 }