mlx5: Add driver for Mellanox Connect-IB adapters

The driver is comprised of two kernel modules: mlx5_ib and mlx5_core.
This partitioning resembles what we have for mlx4, except that mlx5_ib
is the pci device driver and not mlx5_core.

mlx5_core is essentially a library that provides general functionality
that is intended to be used by other Mellanox devices that will be
introduced in the future.  mlx5_ib has a similar role as any hardware
device under drivers/infiniband/hw.

Signed-off-by: Eli Cohen <eli@mellanox.com>
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: Or Gerlitz <ogerlitz@mellanox.com>

[ Merge in coccinelle fixes from Fengguang Wu <fengguang.wu@intel.com>.
  - Roland ]

Signed-off-by: Roland Dreier <roland@purestorage.com>

1 files changed, 121 insertions, 0 deletions

diff --git a/drivers/infiniband/hw/mlx5/user.h b/drivers/infiniband/hw/mlx5/user.h
new file mode 100644
index 000000000000..a886de3e593c
--- /dev/null
+++ b/drivers/infiniband/hw/mlx5/user.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2013, Mellanox Technologies inc.  All rights reserved.
+ *
+ * This software is available to you under a choice of one of two
+ * licenses.  You may choose to be licensed under the terms of the GNU
+ * General Public License (GPL) Version 2, available from the file
+ * COPYING in the main directory of this source tree, or the
+ * OpenIB.org BSD license below:
+ *
+ *     Redistribution and use in source and binary forms, with or
+ *     without modification, are permitted provided that the following
+ *     conditions are met:
+ *
+ *      - Redistributions of source code must retain the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer.
+ *
+ *      - Redistributions in binary form must reproduce the above
+ *        copyright notice, this list of conditions and the following
+ *        disclaimer in the documentation and/or other materials
+ *        provided with the distribution.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+ * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
+ * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
+ * SOFTWARE.
+ */
+
+#ifndef MLX5_IB_USER_H
+#define MLX5_IB_USER_H
+
+#include <linux/types.h>
+
+enum {
+        MLX5_QP_FLAG_SIGNATURE          = 1 << 0,
+        MLX5_QP_FLAG_SCATTER_CQE        = 1 << 1,
+};
+
+enum {
+        MLX5_SRQ_FLAG_SIGNATURE         = 1 << 0,
+};
+
+
+/* Increment this value if any changes that break userspace ABI
+ * compatibility are made.
+ */
+#define MLX5_IB_UVERBS_ABI_VERSION      1
+
+/* Make sure that all structs defined in this file remain laid out so
+ * that they pack the same way on 32-bit and 64-bit architectures (to
+ * avoid incompatibility between 32-bit userspace and 64-bit kernels).
+ * In particular do not use pointer types -- pass pointers in __u64
+ * instead.
+ */
+
+struct mlx5_ib_alloc_ucontext_req {
+        __u32   total_num_uuars;
+        __u32   num_low_latency_uuars;
+};
+
+struct mlx5_ib_alloc_ucontext_resp {
+        __u32   qp_tab_size;
+        __u32   bf_reg_size;
+        __u32   tot_uuars;
+        __u32   cache_line_size;
+        __u16   max_sq_desc_sz;
+        __u16   max_rq_desc_sz;
+        __u32   max_send_wqebb;
+        __u32   max_recv_wr;
+        __u32   max_srq_recv_wr;
+        __u16   num_ports;
+        __u16   reserved;
+};
+
+struct mlx5_ib_alloc_pd_resp {
+        __u32   pdn;
+};
+
+struct mlx5_ib_create_cq {
+        __u64   buf_addr;
+        __u64   db_addr;
+        __u32   cqe_size;
+};
+
+struct mlx5_ib_create_cq_resp {
+        __u32   cqn;
+        __u32   reserved;
+};
+
+struct mlx5_ib_resize_cq {
+        __u64   buf_addr;
+};
+
+struct mlx5_ib_create_srq {
+        __u64   buf_addr;
+        __u64   db_addr;
+        __u32   flags;
+};
+
+struct mlx5_ib_create_srq_resp {
+        __u32   srqn;
+        __u32   reserved;
+};
+
+struct mlx5_ib_create_qp {
+        __u64   buf_addr;
+        __u64   db_addr;
+        __u32   sq_wqe_count;
+        __u32   rq_wqe_count;
+        __u32   rq_wqe_shift;
+        __u32   flags;
+};
+
+struct mlx5_ib_create_qp_resp {
+        __u32   uuar_index;
+};
+#endif /* MLX5_IB_USER_H */