diff options
author | Steve Wise <swise@opengridcomputing.com> | 2008-07-15 02:48:45 -0400 |
---|---|---|
committer | Roland Dreier <rolandd@cisco.com> | 2008-07-15 02:48:45 -0400 |
commit | e7e55829999deaab3f43e201a087731c02c54cf9 (patch) | |
tree | 665f2ff291045af9469bbb929f99224e9707965b /drivers/infiniband/hw/cxgb3/iwch_cq.c | |
parent | 00f7ec36c9324928e4cd23f02e6d8550f30c32ca (diff) |
RDMA/cxgb3: MEM_MGT_EXTENSIONS support
- set IB_DEVICE_MEM_MGT_EXTENSIONS capability bit if fw supports it.
- set max_fast_reg_page_list_len device attribute.
- add iwch_alloc_fast_reg_mr function.
- add iwch_alloc_fastreg_pbl
- add iwch_free_fastreg_pbl
- adjust the WQ depth for kernel mode work queues to account for
fastreg possibly taking 2 WR slots.
- add fastreg_mr work request support.
- add local_inv work request support.
- add send_with_inv and send_with_se_inv work request support.
- removed useless duplicate enums/defines for TPT/MW/MR stuff.
Signed-off-by: Steve Wise <swise@opengridcomputing.com>
Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/cxgb3/iwch_cq.c')
-rw-r--r-- | drivers/infiniband/hw/cxgb3/iwch_cq.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/infiniband/hw/cxgb3/iwch_cq.c b/drivers/infiniband/hw/cxgb3/iwch_cq.c index 4ee8ccd0a9e5..cf5474ae68ff 100644 --- a/drivers/infiniband/hw/cxgb3/iwch_cq.c +++ b/drivers/infiniband/hw/cxgb3/iwch_cq.c | |||
@@ -81,6 +81,7 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
81 | wc->wr_id = cookie; | 81 | wc->wr_id = cookie; |
82 | wc->qp = &qhp->ibqp; | 82 | wc->qp = &qhp->ibqp; |
83 | wc->vendor_err = CQE_STATUS(cqe); | 83 | wc->vendor_err = CQE_STATUS(cqe); |
84 | wc->wc_flags = 0; | ||
84 | 85 | ||
85 | PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " | 86 | PDBG("%s qpid 0x%x type %d opcode %d status 0x%x wrid hi 0x%x " |
86 | "lo 0x%x cookie 0x%llx\n", __func__, | 87 | "lo 0x%x cookie 0x%llx\n", __func__, |
@@ -94,6 +95,11 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
94 | else | 95 | else |
95 | wc->byte_len = 0; | 96 | wc->byte_len = 0; |
96 | wc->opcode = IB_WC_RECV; | 97 | wc->opcode = IB_WC_RECV; |
98 | if (CQE_OPCODE(cqe) == T3_SEND_WITH_INV || | ||
99 | CQE_OPCODE(cqe) == T3_SEND_WITH_SE_INV) { | ||
100 | wc->ex.invalidate_rkey = CQE_WRID_STAG(cqe); | ||
101 | wc->wc_flags |= IB_WC_WITH_INVALIDATE; | ||
102 | } | ||
97 | } else { | 103 | } else { |
98 | switch (CQE_OPCODE(cqe)) { | 104 | switch (CQE_OPCODE(cqe)) { |
99 | case T3_RDMA_WRITE: | 105 | case T3_RDMA_WRITE: |
@@ -105,17 +111,20 @@ static int iwch_poll_cq_one(struct iwch_dev *rhp, struct iwch_cq *chp, | |||
105 | break; | 111 | break; |
106 | case T3_SEND: | 112 | case T3_SEND: |
107 | case T3_SEND_WITH_SE: | 113 | case T3_SEND_WITH_SE: |
114 | case T3_SEND_WITH_INV: | ||
115 | case T3_SEND_WITH_SE_INV: | ||
108 | wc->opcode = IB_WC_SEND; | 116 | wc->opcode = IB_WC_SEND; |
109 | break; | 117 | break; |
110 | case T3_BIND_MW: | 118 | case T3_BIND_MW: |
111 | wc->opcode = IB_WC_BIND_MW; | 119 | wc->opcode = IB_WC_BIND_MW; |
112 | break; | 120 | break; |
113 | 121 | ||
114 | /* these aren't supported yet */ | ||
115 | case T3_SEND_WITH_INV: | ||
116 | case T3_SEND_WITH_SE_INV: | ||
117 | case T3_LOCAL_INV: | 122 | case T3_LOCAL_INV: |
123 | wc->opcode = IB_WC_LOCAL_INV; | ||
124 | break; | ||
118 | case T3_FAST_REGISTER: | 125 | case T3_FAST_REGISTER: |
126 | wc->opcode = IB_WC_FAST_REG_MR; | ||
127 | break; | ||
119 | default: | 128 | default: |
120 | printk(KERN_ERR MOD "Unexpected opcode %d " | 129 | printk(KERN_ERR MOD "Unexpected opcode %d " |
121 | "in the CQE received for QPID=0x%0x\n", | 130 | "in the CQE received for QPID=0x%0x\n", |