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authorSteve Wise <swise@opengridcomputing.com>2009-03-30 11:37:56 -0400
committerRoland Dreier <rolandd@cisco.com>2009-03-30 11:37:56 -0400
commit04b5d028f50ff05a8f9ae049ee71f8fdfcf1f5de (patch)
treea6363d175d07995e0c2b32e035fb16beeca0772a /drivers/infiniband/hw/cxgb3/cxio_hal.h
parent5d80f8e5a9dc9c9a94d4aeaa567e219a808b8a4a (diff)
RDMA/cxgb3: Handle EEH events
- wrap calls into cxgb3 and fail them if we're in the middle of a PCI EEH event. - correctly unwind and release endpoint and other resources when we are in an EEH event. - dispatch IB_EVENT_DEVICE_FATAL event when cxgb3 notifies iw_cxgb3 of a fatal error. Signed-off-by: Steve Wise <swise@opengridcomputing.com> Signed-off-by: Roland Dreier <rolandd@cisco.com>
Diffstat (limited to 'drivers/infiniband/hw/cxgb3/cxio_hal.h')
-rw-r--r--drivers/infiniband/hw/cxgb3/cxio_hal.h6
1 files changed, 6 insertions, 0 deletions
diff --git a/drivers/infiniband/hw/cxgb3/cxio_hal.h b/drivers/infiniband/hw/cxgb3/cxio_hal.h
index 094a66d1480c..bfd03bf8be54 100644
--- a/drivers/infiniband/hw/cxgb3/cxio_hal.h
+++ b/drivers/infiniband/hw/cxgb3/cxio_hal.h
@@ -115,6 +115,11 @@ struct cxio_rdev {
115#define CXIO_ERROR_FATAL 1 115#define CXIO_ERROR_FATAL 1
116}; 116};
117 117
118static inline int cxio_fatal_error(struct cxio_rdev *rdev_p)
119{
120 return rdev_p->flags & CXIO_ERROR_FATAL;
121}
122
118static inline int cxio_num_stags(struct cxio_rdev *rdev_p) 123static inline int cxio_num_stags(struct cxio_rdev *rdev_p)
119{ 124{
120 return min((int)T3_MAX_NUM_STAG, (int)((rdev_p->rnic_info.tpt_top - rdev_p->rnic_info.tpt_base) >> 5)); 125 return min((int)T3_MAX_NUM_STAG, (int)((rdev_p->rnic_info.tpt_top - rdev_p->rnic_info.tpt_base) >> 5));
@@ -188,6 +193,7 @@ void cxio_count_scqes(struct t3_cq *cq, struct t3_wq *wq, int *count);
188void cxio_flush_hw_cq(struct t3_cq *cq); 193void cxio_flush_hw_cq(struct t3_cq *cq);
189int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe, 194int cxio_poll_cq(struct t3_wq *wq, struct t3_cq *cq, struct t3_cqe *cqe,
190 u8 *cqe_flushed, u64 *cookie, u32 *credit); 195 u8 *cqe_flushed, u64 *cookie, u32 *credit);
196int iwch_cxgb3_ofld_send(struct t3cdev *tdev, struct sk_buff *skb);
191 197
192#define MOD "iw_cxgb3: " 198#define MOD "iw_cxgb3: "
193#define PDBG(fmt, args...) pr_debug(MOD fmt, ## args) 199#define PDBG(fmt, args...) pr_debug(MOD fmt, ## args)