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authorSrinivas Pandruvada <srinivas.pandruvada@linux.intel.com>2014-05-08 17:57:00 -0400
committerJonathan Cameron <jic23@kernel.org>2014-08-07 06:43:49 -0400
commitbd7fe5b7191836a229981fdd83845a528ee9f846 (patch)
treeb86fbe9465378076b3f3881bdd9dd915428adcb3 /drivers/iio
parenta735e3d7f03ab40d746290954baaf535719d9025 (diff)
iio: accel: BMC150 accel support
This change implements BMC150 accelerometer driver. A BMC150 package consist of a compass and an accelerometer. This driver only implements accelerometer part. Spec downloaded from: http://ae-bst.resource.bosch.com/media/products/dokumente/bmc150/BST-BMC150-DS000-03.pdf This sensor chip supports many advanced features, but this driver implements minimum feature set which is a must to be useful. This driver can be enhanced incrementally. If the sensor vendor wants to update full featured version, they can substitute or enhance this driver when they get chance. Signed-off-by: Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio')
-rw-r--r--drivers/iio/accel/Kconfig13
-rw-r--r--drivers/iio/accel/Makefile1
-rw-r--r--drivers/iio/accel/bmc150-accel.c1307
3 files changed, 1321 insertions, 0 deletions
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig
index 12addf272a61..5704d6bc2267 100644
--- a/drivers/iio/accel/Kconfig
+++ b/drivers/iio/accel/Kconfig
@@ -17,6 +17,19 @@ config BMA180
17 To compile this driver as a module, choose M here: the 17 To compile this driver as a module, choose M here: the
18 module will be called bma180. 18 module will be called bma180.
19 19
20config BMC150_ACCEL
21 tristate "Bosch BMC150 Accelerometer Driver"
22 depends on I2C
23 select IIO_BUFFER
24 select IIO_TRIGGERED_BUFFER
25 help
26 Say yes here to build support for the Bosch BMC150 accelerometer.
27 Currently this only supports the device via an i2c interface.
28
29 This is a combo module with both accelerometer and magnetometer.
30 This driver is only implementing accelerometer part, which has
31 its own address and register map.
32
20config HID_SENSOR_ACCEL_3D 33config HID_SENSOR_ACCEL_3D
21 depends on HID_SENSOR_HUB 34 depends on HID_SENSOR_HUB
22 select IIO_BUFFER 35 select IIO_BUFFER
diff --git a/drivers/iio/accel/Makefile b/drivers/iio/accel/Makefile
index 6578ca1a8e09..a593996c6539 100644
--- a/drivers/iio/accel/Makefile
+++ b/drivers/iio/accel/Makefile
@@ -4,6 +4,7 @@
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6obj-$(CONFIG_BMA180) += bma180.o 6obj-$(CONFIG_BMA180) += bma180.o
7obj-$(CONFIG_BMC150_ACCEL) += bmc150-accel.o
7obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o 8obj-$(CONFIG_HID_SENSOR_ACCEL_3D) += hid-sensor-accel-3d.o
8obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o 9obj-$(CONFIG_KXCJK1013) += kxcjk-1013.o
9obj-$(CONFIG_KXSD9) += kxsd9.o 10obj-$(CONFIG_KXSD9) += kxsd9.o
diff --git a/drivers/iio/accel/bmc150-accel.c b/drivers/iio/accel/bmc150-accel.c
new file mode 100644
index 000000000000..23ae33496214
--- /dev/null
+++ b/drivers/iio/accel/bmc150-accel.c
@@ -0,0 +1,1307 @@
1/*
2 * BMC150 3-axis accelerometer driver
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14
15#include <linux/module.h>
16#include <linux/i2c.h>
17#include <linux/interrupt.h>
18#include <linux/delay.h>
19#include <linux/slab.h>
20#include <linux/acpi.h>
21#include <linux/gpio/consumer.h>
22#include <linux/pm.h>
23#include <linux/pm_runtime.h>
24#include <linux/iio/iio.h>
25#include <linux/iio/sysfs.h>
26#include <linux/iio/buffer.h>
27#include <linux/iio/events.h>
28#include <linux/iio/trigger.h>
29#include <linux/iio/trigger_consumer.h>
30#include <linux/iio/triggered_buffer.h>
31
32#define BMC150_ACCEL_DRV_NAME "bmc150_accel"
33#define BMC150_ACCEL_IRQ_NAME "bmc150_accel_event"
34#define BMC150_ACCEL_GPIO_NAME "bmc150_accel_int"
35
36#define BMC150_ACCEL_REG_CHIP_ID 0x00
37#define BMC150_ACCEL_CHIP_ID_VAL 0xFA
38
39#define BMC150_ACCEL_REG_INT_STATUS_2 0x0B
40#define BMC150_ACCEL_ANY_MOTION_MASK 0x07
41#define BMC150_ACCEL_ANY_MOTION_BIT_SIGN BIT(3)
42
43#define BMC150_ACCEL_REG_PMU_LPW 0x11
44#define BMC150_ACCEL_PMU_MODE_MASK 0xE0
45#define BMC150_ACCEL_PMU_MODE_SHIFT 5
46#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_MASK 0x17
47#define BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT 1
48
49#define BMC150_ACCEL_REG_PMU_RANGE 0x0F
50
51#define BMC150_ACCEL_DEF_RANGE_2G 0x03
52#define BMC150_ACCEL_DEF_RANGE_4G 0x05
53#define BMC150_ACCEL_DEF_RANGE_8G 0x08
54#define BMC150_ACCEL_DEF_RANGE_16G 0x0C
55
56/* Default BW: 125Hz */
57#define BMC150_ACCEL_REG_PMU_BW 0x10
58#define BMC150_ACCEL_DEF_BW 125
59
60#define BMC150_ACCEL_REG_INT_MAP_0 0x19
61#define BMC150_ACCEL_INT_MAP_0_BIT_SLOPE BIT(2)
62
63#define BMC150_ACCEL_REG_INT_MAP_1 0x1A
64#define BMC150_ACCEL_INT_MAP_1_BIT_DATA BIT(0)
65
66#define BMC150_ACCEL_REG_INT_RST_LATCH 0x21
67#define BMC150_ACCEL_INT_MODE_LATCH_RESET 0x80
68#define BMC150_ACCEL_INT_MODE_LATCH_INT 0x0F
69#define BMC150_ACCEL_INT_MODE_NON_LATCH_INT 0x00
70
71#define BMC150_ACCEL_REG_INT_EN_0 0x16
72#define BMC150_ACCEL_INT_EN_BIT_SLP_X BIT(0)
73#define BMC150_ACCEL_INT_EN_BIT_SLP_Y BIT(1)
74#define BMC150_ACCEL_INT_EN_BIT_SLP_Z BIT(2)
75
76#define BMC150_ACCEL_REG_INT_EN_1 0x17
77#define BMC150_ACCEL_INT_EN_BIT_DATA_EN BIT(4)
78
79#define BMC150_ACCEL_REG_INT_OUT_CTRL 0x20
80#define BMC150_ACCEL_INT_OUT_CTRL_INT1_LVL BIT(0)
81
82#define BMC150_ACCEL_REG_INT_5 0x27
83#define BMC150_ACCEL_SLOPE_DUR_MASK 0x03
84
85#define BMC150_ACCEL_REG_INT_6 0x28
86#define BMC150_ACCEL_SLOPE_THRES_MASK 0xFF
87
88/* Slope duration in terms of number of samples */
89#define BMC150_ACCEL_DEF_SLOPE_DURATION 2
90/* in terms of multiples of g's/LSB, based on range */
91#define BMC150_ACCEL_DEF_SLOPE_THRESHOLD 5
92
93#define BMC150_ACCEL_REG_XOUT_L 0x02
94
95#define BMC150_ACCEL_MAX_STARTUP_TIME_MS 100
96
97/* Sleep Duration values */
98#define BMC150_ACCEL_SLEEP_500_MICRO 0x05
99#define BMC150_ACCEL_SLEEP_1_MS 0x06
100#define BMC150_ACCEL_SLEEP_2_MS 0x07
101#define BMC150_ACCEL_SLEEP_4_MS 0x08
102#define BMC150_ACCEL_SLEEP_6_MS 0x09
103#define BMC150_ACCEL_SLEEP_10_MS 0x0A
104#define BMC150_ACCEL_SLEEP_25_MS 0x0B
105#define BMC150_ACCEL_SLEEP_50_MS 0x0C
106#define BMC150_ACCEL_SLEEP_100_MS 0x0D
107#define BMC150_ACCEL_SLEEP_500_MS 0x0E
108#define BMC150_ACCEL_SLEEP_1_SEC 0x0F
109
110#define BMC150_ACCEL_REG_TEMP 0x08
111#define BMC150_ACCEL_TEMP_CENTER_VAL 24
112
113#define BMC150_ACCEL_AXIS_TO_REG(axis) (BMC150_ACCEL_REG_XOUT_L + (axis * 2))
114#define BMC150_AUTO_SUSPEND_DELAY_MS 2000
115
116enum bmc150_accel_axis {
117 AXIS_X,
118 AXIS_Y,
119 AXIS_Z,
120};
121
122enum bmc150_power_modes {
123 BMC150_ACCEL_SLEEP_MODE_NORMAL,
124 BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND,
125 BMC150_ACCEL_SLEEP_MODE_LPM,
126 BMC150_ACCEL_SLEEP_MODE_SUSPEND = 0x04,
127};
128
129struct bmc150_accel_data {
130 struct i2c_client *client;
131 struct iio_trigger *dready_trig;
132 struct iio_trigger *motion_trig;
133 struct mutex mutex;
134 s16 buffer[8];
135 u8 bw_bits;
136 u32 slope_dur;
137 u32 slope_thres;
138 u32 range;
139 int ev_enable_state;
140 bool dready_trigger_on;
141 bool motion_trigger_on;
142 int64_t timestamp;
143};
144
145static const struct {
146 int val;
147 int val2;
148 u8 bw_bits;
149} bmc150_accel_samp_freq_table[] = { {7, 810000, 0x08},
150 {15, 630000, 0x09},
151 {31, 250000, 0x0A},
152 {62, 500000, 0x0B},
153 {125, 0, 0x0C},
154 {250, 0, 0x0D},
155 {500, 0, 0x0E},
156 {1000, 0, 0x0F} };
157
158static const struct {
159 int bw_bits;
160 int msec;
161} bmc150_accel_sample_upd_time[] = { {0x08, 64},
162 {0x09, 32},
163 {0x0A, 16},
164 {0x0B, 8},
165 {0x0C, 4},
166 {0x0D, 2},
167 {0x0E, 1},
168 {0x0F, 1} };
169
170static const struct {
171 int scale;
172 int range;
173} bmc150_accel_scale_table[] = { {9610, BMC150_ACCEL_DEF_RANGE_2G},
174 {19122, BMC150_ACCEL_DEF_RANGE_4G},
175 {38344, BMC150_ACCEL_DEF_RANGE_8G},
176 {77057, BMC150_ACCEL_DEF_RANGE_16G} };
177
178static const struct {
179 int sleep_dur;
180 int reg_value;
181} bmc150_accel_sleep_value_table[] = { {0, 0},
182 {500, BMC150_ACCEL_SLEEP_500_MICRO},
183 {1000, BMC150_ACCEL_SLEEP_1_MS},
184 {2000, BMC150_ACCEL_SLEEP_2_MS},
185 {4000, BMC150_ACCEL_SLEEP_4_MS},
186 {6000, BMC150_ACCEL_SLEEP_6_MS},
187 {10000, BMC150_ACCEL_SLEEP_10_MS},
188 {25000, BMC150_ACCEL_SLEEP_25_MS},
189 {50000, BMC150_ACCEL_SLEEP_50_MS},
190 {100000, BMC150_ACCEL_SLEEP_100_MS},
191 {500000, BMC150_ACCEL_SLEEP_500_MS},
192 {1000000, BMC150_ACCEL_SLEEP_1_SEC} };
193
194
195static int bmc150_accel_set_mode(struct bmc150_accel_data *data,
196 enum bmc150_power_modes mode,
197 int dur_us)
198{
199 int i;
200 int ret;
201 u8 lpw_bits;
202 int dur_val = -1;
203
204 if (dur_us > 0) {
205 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sleep_value_table);
206 ++i) {
207 if (bmc150_accel_sleep_value_table[i].sleep_dur ==
208 dur_us)
209 dur_val =
210 bmc150_accel_sleep_value_table[i].reg_value;
211 }
212 } else
213 dur_val = 0;
214
215 if (dur_val < 0)
216 return -EINVAL;
217
218 lpw_bits = mode << BMC150_ACCEL_PMU_MODE_SHIFT;
219 lpw_bits |= (dur_val << BMC150_ACCEL_PMU_BIT_SLEEP_DUR_SHIFT);
220
221 dev_dbg(&data->client->dev, "Set Mode bits %x\n", lpw_bits);
222
223 ret = i2c_smbus_write_byte_data(data->client,
224 BMC150_ACCEL_REG_PMU_LPW, lpw_bits);
225 if (ret < 0) {
226 dev_err(&data->client->dev, "Error writing reg_pmu_lpw\n");
227 return ret;
228 }
229
230 return 0;
231}
232
233static int bmc150_accel_set_bw(struct bmc150_accel_data *data, int val,
234 int val2)
235{
236 int i;
237 int ret;
238
239 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
240 if (bmc150_accel_samp_freq_table[i].val == val &&
241 bmc150_accel_samp_freq_table[i].val2 == val2) {
242 ret = i2c_smbus_write_byte_data(
243 data->client,
244 BMC150_ACCEL_REG_PMU_BW,
245 bmc150_accel_samp_freq_table[i].bw_bits);
246 if (ret < 0)
247 return ret;
248
249 data->bw_bits =
250 bmc150_accel_samp_freq_table[i].bw_bits;
251 return 0;
252 }
253 }
254
255 return -EINVAL;
256}
257
258static int bmc150_accel_chip_init(struct bmc150_accel_data *data)
259{
260 int ret;
261
262 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_CHIP_ID);
263 if (ret < 0) {
264 dev_err(&data->client->dev,
265 "Error: Reading chip id\n");
266 return ret;
267 }
268
269 dev_dbg(&data->client->dev, "Chip Id %x\n", ret);
270 if (ret != BMC150_ACCEL_CHIP_ID_VAL) {
271 dev_err(&data->client->dev, "Invalid chip %x\n", ret);
272 return -ENODEV;
273 }
274
275 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
276 if (ret < 0)
277 return ret;
278
279 /* Set Bandwidth */
280 ret = bmc150_accel_set_bw(data, BMC150_ACCEL_DEF_BW, 0);
281 if (ret < 0)
282 return ret;
283
284 /* Set Default Range */
285 ret = i2c_smbus_write_byte_data(data->client,
286 BMC150_ACCEL_REG_PMU_RANGE,
287 BMC150_ACCEL_DEF_RANGE_4G);
288 if (ret < 0) {
289 dev_err(&data->client->dev,
290 "Error writing reg_pmu_range\n");
291 return ret;
292 }
293
294 data->range = BMC150_ACCEL_DEF_RANGE_4G;
295
296 /* Set default slope duration */
297 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_INT_5);
298 if (ret < 0) {
299 dev_err(&data->client->dev, "Error reading reg_int_5\n");
300 return ret;
301 }
302 data->slope_dur |= BMC150_ACCEL_DEF_SLOPE_DURATION;
303 ret = i2c_smbus_write_byte_data(data->client,
304 BMC150_ACCEL_REG_INT_5,
305 data->slope_dur);
306 if (ret < 0) {
307 dev_err(&data->client->dev, "Error writing reg_int_5\n");
308 return ret;
309 }
310 dev_dbg(&data->client->dev, "slope_dur %x\n", data->slope_dur);
311
312 /* Set default slope thresholds */
313 ret = i2c_smbus_write_byte_data(data->client,
314 BMC150_ACCEL_REG_INT_6,
315 BMC150_ACCEL_DEF_SLOPE_THRESHOLD);
316 if (ret < 0) {
317 dev_err(&data->client->dev, "Error writing reg_int_6\n");
318 return ret;
319 }
320 data->slope_thres = BMC150_ACCEL_DEF_SLOPE_THRESHOLD;
321 dev_dbg(&data->client->dev, "slope_thres %x\n", data->slope_thres);
322
323 /* Set default as latched interrupts */
324 ret = i2c_smbus_write_byte_data(data->client,
325 BMC150_ACCEL_REG_INT_RST_LATCH,
326 BMC150_ACCEL_INT_MODE_LATCH_INT |
327 BMC150_ACCEL_INT_MODE_LATCH_RESET);
328 if (ret < 0) {
329 dev_err(&data->client->dev,
330 "Error writing reg_int_rst_latch\n");
331 return ret;
332 }
333
334 return 0;
335}
336
337static int bmc150_accel_setup_any_motion_interrupt(
338 struct bmc150_accel_data *data,
339 bool status)
340{
341 int ret;
342
343 /* Enable/Disable INT1 mapping */
344 ret = i2c_smbus_read_byte_data(data->client,
345 BMC150_ACCEL_REG_INT_MAP_0);
346 if (ret < 0) {
347 dev_err(&data->client->dev, "Error reading reg_int_map_0\n");
348 return ret;
349 }
350 if (status)
351 ret |= BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
352 else
353 ret &= ~BMC150_ACCEL_INT_MAP_0_BIT_SLOPE;
354
355 ret = i2c_smbus_write_byte_data(data->client,
356 BMC150_ACCEL_REG_INT_MAP_0,
357 ret);
358 if (ret < 0) {
359 dev_err(&data->client->dev, "Error writing reg_int_map_0\n");
360 return ret;
361 }
362
363 if (status) {
364 /* Set slope duration (no of samples) */
365 ret = i2c_smbus_write_byte_data(data->client,
366 BMC150_ACCEL_REG_INT_5,
367 data->slope_dur);
368 if (ret < 0) {
369 dev_err(&data->client->dev, "Error write reg_int_5\n");
370 return ret;
371 }
372
373 /* Set slope thresholds */
374 ret = i2c_smbus_write_byte_data(data->client,
375 BMC150_ACCEL_REG_INT_6,
376 data->slope_thres);
377 if (ret < 0) {
378 dev_err(&data->client->dev, "Error write reg_int_6\n");
379 return ret;
380 }
381
382 /*
383 * New data interrupt is always non-latched,
384 * which will have higher priority, so no need
385 * to set latched mode, we will be flooded anyway with INTR
386 */
387 if (!data->dready_trigger_on) {
388 ret = i2c_smbus_write_byte_data(data->client,
389 BMC150_ACCEL_REG_INT_RST_LATCH,
390 BMC150_ACCEL_INT_MODE_LATCH_INT |
391 BMC150_ACCEL_INT_MODE_LATCH_RESET);
392 if (ret < 0) {
393 dev_err(&data->client->dev,
394 "Error writing reg_int_rst_latch\n");
395 return ret;
396 }
397 }
398
399 ret = i2c_smbus_write_byte_data(data->client,
400 BMC150_ACCEL_REG_INT_EN_0,
401 BMC150_ACCEL_INT_EN_BIT_SLP_X |
402 BMC150_ACCEL_INT_EN_BIT_SLP_Y |
403 BMC150_ACCEL_INT_EN_BIT_SLP_Z);
404 } else
405 ret = i2c_smbus_write_byte_data(data->client,
406 BMC150_ACCEL_REG_INT_EN_0,
407 0);
408
409 if (ret < 0) {
410 dev_err(&data->client->dev, "Error writing reg_int_en_0\n");
411 return ret;
412 }
413
414 return 0;
415}
416
417static int bmc150_accel_setup_new_data_interrupt(struct bmc150_accel_data *data,
418 bool status)
419{
420 int ret;
421
422 /* Enable/Disable INT1 mapping */
423 ret = i2c_smbus_read_byte_data(data->client,
424 BMC150_ACCEL_REG_INT_MAP_1);
425 if (ret < 0) {
426 dev_err(&data->client->dev, "Error reading reg_int_map_1\n");
427 return ret;
428 }
429 if (status)
430 ret |= BMC150_ACCEL_INT_MAP_1_BIT_DATA;
431 else
432 ret &= ~BMC150_ACCEL_INT_MAP_1_BIT_DATA;
433
434 ret = i2c_smbus_write_byte_data(data->client,
435 BMC150_ACCEL_REG_INT_MAP_1,
436 ret);
437 if (ret < 0) {
438 dev_err(&data->client->dev, "Error writing reg_int_map_1\n");
439 return ret;
440 }
441
442 if (status) {
443 /*
444 * Set non latched mode interrupt and clear any latched
445 * interrupt
446 */
447 ret = i2c_smbus_write_byte_data(data->client,
448 BMC150_ACCEL_REG_INT_RST_LATCH,
449 BMC150_ACCEL_INT_MODE_NON_LATCH_INT |
450 BMC150_ACCEL_INT_MODE_LATCH_RESET);
451 if (ret < 0) {
452 dev_err(&data->client->dev,
453 "Error writing reg_int_rst_latch\n");
454 return ret;
455 }
456
457 ret = i2c_smbus_write_byte_data(data->client,
458 BMC150_ACCEL_REG_INT_EN_1,
459 BMC150_ACCEL_INT_EN_BIT_DATA_EN);
460
461 } else {
462 /* Restore default interrupt mode */
463 ret = i2c_smbus_write_byte_data(data->client,
464 BMC150_ACCEL_REG_INT_RST_LATCH,
465 BMC150_ACCEL_INT_MODE_LATCH_INT |
466 BMC150_ACCEL_INT_MODE_LATCH_RESET);
467 if (ret < 0) {
468 dev_err(&data->client->dev,
469 "Error writing reg_int_rst_latch\n");
470 return ret;
471 }
472
473 ret = i2c_smbus_write_byte_data(data->client,
474 BMC150_ACCEL_REG_INT_EN_1,
475 0);
476 }
477
478 if (ret < 0) {
479 dev_err(&data->client->dev, "Error writing reg_int_en_1\n");
480 return ret;
481 }
482
483 return 0;
484}
485
486static int bmc150_accel_get_bw(struct bmc150_accel_data *data, int *val,
487 int *val2)
488{
489 int i;
490
491 for (i = 0; i < ARRAY_SIZE(bmc150_accel_samp_freq_table); ++i) {
492 if (bmc150_accel_samp_freq_table[i].bw_bits == data->bw_bits) {
493 *val = bmc150_accel_samp_freq_table[i].val;
494 *val2 = bmc150_accel_samp_freq_table[i].val2;
495 return IIO_VAL_INT_PLUS_MICRO;
496 }
497 }
498
499 return -EINVAL;
500}
501
502static int bmc150_accel_get_startup_times(struct bmc150_accel_data *data)
503{
504 int i;
505
506 for (i = 0; i < ARRAY_SIZE(bmc150_accel_sample_upd_time); ++i) {
507 if (bmc150_accel_sample_upd_time[i].bw_bits == data->bw_bits)
508 return bmc150_accel_sample_upd_time[i].msec;
509 }
510
511 return BMC150_ACCEL_MAX_STARTUP_TIME_MS;
512}
513
514static int bmc150_accel_set_power_state(struct bmc150_accel_data *data, bool on)
515{
516 int ret;
517
518 if (on)
519 ret = pm_runtime_get_sync(&data->client->dev);
520 else {
521 pm_runtime_mark_last_busy(&data->client->dev);
522 ret = pm_runtime_put_autosuspend(&data->client->dev);
523 }
524 if (ret < 0) {
525 dev_err(&data->client->dev,
526 "Failed: bmc150_accel_set_power_state for %d\n", on);
527 return ret;
528 }
529
530 return 0;
531}
532
533static int bmc150_accel_set_scale(struct bmc150_accel_data *data, int val)
534{
535 int ret, i;
536
537 for (i = 0; i < ARRAY_SIZE(bmc150_accel_scale_table); ++i) {
538 if (bmc150_accel_scale_table[i].scale == val) {
539 ret = i2c_smbus_write_byte_data(
540 data->client,
541 BMC150_ACCEL_REG_PMU_RANGE,
542 bmc150_accel_scale_table[i].range);
543 if (ret < 0) {
544 dev_err(&data->client->dev,
545 "Error writing pmu_range\n");
546 return ret;
547 }
548
549 data->range = bmc150_accel_scale_table[i].range;
550 return 0;
551 }
552 }
553
554 return -EINVAL;
555}
556
557static int bmc150_accel_get_temp(struct bmc150_accel_data *data, int *val)
558{
559 int ret;
560
561 mutex_lock(&data->mutex);
562
563 ret = i2c_smbus_read_byte_data(data->client, BMC150_ACCEL_REG_TEMP);
564 if (ret < 0) {
565 dev_err(&data->client->dev, "Error reading reg_temp\n");
566 mutex_unlock(&data->mutex);
567 return ret;
568 }
569 *val = sign_extend32(ret, 7);
570
571 mutex_unlock(&data->mutex);
572
573 return IIO_VAL_INT;
574}
575
576static int bmc150_accel_get_axis(struct bmc150_accel_data *data, int axis,
577 int *val)
578{
579 int ret;
580
581 mutex_lock(&data->mutex);
582 ret = bmc150_accel_set_power_state(data, true);
583 if (ret < 0) {
584 mutex_unlock(&data->mutex);
585 return ret;
586 }
587
588 ret = i2c_smbus_read_word_data(data->client,
589 BMC150_ACCEL_AXIS_TO_REG(axis));
590 if (ret < 0) {
591 dev_err(&data->client->dev, "Error reading axis %d\n", axis);
592 bmc150_accel_set_power_state(data, false);
593 mutex_unlock(&data->mutex);
594 return ret;
595 }
596 *val = sign_extend32(ret >> 4, 11);
597 ret = bmc150_accel_set_power_state(data, false);
598 mutex_unlock(&data->mutex);
599 if (ret < 0)
600 return ret;
601
602 return IIO_VAL_INT;
603}
604
605static int bmc150_accel_read_raw(struct iio_dev *indio_dev,
606 struct iio_chan_spec const *chan,
607 int *val, int *val2, long mask)
608{
609 struct bmc150_accel_data *data = iio_priv(indio_dev);
610 int ret;
611
612 switch (mask) {
613 case IIO_CHAN_INFO_RAW:
614 switch (chan->type) {
615 case IIO_TEMP:
616 return bmc150_accel_get_temp(data, val);
617 case IIO_ACCEL:
618 if (iio_buffer_enabled(indio_dev))
619 return -EBUSY;
620 else
621 return bmc150_accel_get_axis(data,
622 chan->scan_index,
623 val);
624 default:
625 return -EINVAL;
626 }
627 case IIO_CHAN_INFO_OFFSET:
628 if (chan->type == IIO_TEMP) {
629 *val = BMC150_ACCEL_TEMP_CENTER_VAL;
630 return IIO_VAL_INT;
631 } else
632 return -EINVAL;
633 case IIO_CHAN_INFO_SCALE:
634 *val = 0;
635 switch (chan->type) {
636 case IIO_TEMP:
637 *val2 = 500000;
638 return IIO_VAL_INT_PLUS_MICRO;
639 case IIO_ACCEL:
640 {
641 int i;
642
643 for (i = 0; i < ARRAY_SIZE(bmc150_accel_scale_table);
644 ++i) {
645 if (bmc150_accel_scale_table[i].range ==
646 data->range) {
647 *val2 =
648 bmc150_accel_scale_table[i].scale;
649 return IIO_VAL_INT_PLUS_MICRO;
650 }
651 }
652 return -EINVAL;
653 }
654 default:
655 return -EINVAL;
656 }
657 case IIO_CHAN_INFO_SAMP_FREQ:
658 mutex_lock(&data->mutex);
659 ret = bmc150_accel_get_bw(data, val, val2);
660 mutex_unlock(&data->mutex);
661 return ret;
662 default:
663 return -EINVAL;
664 }
665}
666
667static int bmc150_accel_write_raw(struct iio_dev *indio_dev,
668 struct iio_chan_spec const *chan,
669 int val, int val2, long mask)
670{
671 struct bmc150_accel_data *data = iio_priv(indio_dev);
672 int ret;
673
674 switch (mask) {
675 case IIO_CHAN_INFO_SAMP_FREQ:
676 mutex_lock(&data->mutex);
677 ret = bmc150_accel_set_bw(data, val, val2);
678 mutex_unlock(&data->mutex);
679 break;
680 case IIO_CHAN_INFO_SCALE:
681 if (val)
682 return -EINVAL;
683
684 mutex_lock(&data->mutex);
685 ret = bmc150_accel_set_scale(data, val2);
686 mutex_unlock(&data->mutex);
687 return ret;
688 default:
689 ret = -EINVAL;
690 }
691
692 return ret;
693}
694
695static int bmc150_accel_read_event(struct iio_dev *indio_dev,
696 const struct iio_chan_spec *chan,
697 enum iio_event_type type,
698 enum iio_event_direction dir,
699 enum iio_event_info info,
700 int *val, int *val2)
701{
702 struct bmc150_accel_data *data = iio_priv(indio_dev);
703
704 *val2 = 0;
705 switch (info) {
706 case IIO_EV_INFO_VALUE:
707 *val = data->slope_thres;
708 break;
709 case IIO_EV_INFO_PERIOD:
710 *val = data->slope_dur & BMC150_ACCEL_SLOPE_DUR_MASK;
711 break;
712 default:
713 return -EINVAL;
714 }
715
716 return IIO_VAL_INT;
717}
718
719static int bmc150_accel_write_event(struct iio_dev *indio_dev,
720 const struct iio_chan_spec *chan,
721 enum iio_event_type type,
722 enum iio_event_direction dir,
723 enum iio_event_info info,
724 int val, int val2)
725{
726 struct bmc150_accel_data *data = iio_priv(indio_dev);
727
728 if (data->ev_enable_state)
729 return -EBUSY;
730
731 switch (info) {
732 case IIO_EV_INFO_VALUE:
733 data->slope_thres = val;
734 break;
735 case IIO_EV_INFO_PERIOD:
736 data->slope_dur &= ~BMC150_ACCEL_SLOPE_DUR_MASK;
737 data->slope_dur |= val & BMC150_ACCEL_SLOPE_DUR_MASK;
738 break;
739 default:
740 return -EINVAL;
741 }
742
743 return 0;
744}
745
746static int bmc150_accel_read_event_config(struct iio_dev *indio_dev,
747 const struct iio_chan_spec *chan,
748 enum iio_event_type type,
749 enum iio_event_direction dir)
750{
751
752 struct bmc150_accel_data *data = iio_priv(indio_dev);
753
754 return data->ev_enable_state;
755}
756
757static int bmc150_accel_write_event_config(struct iio_dev *indio_dev,
758 const struct iio_chan_spec *chan,
759 enum iio_event_type type,
760 enum iio_event_direction dir,
761 int state)
762{
763 struct bmc150_accel_data *data = iio_priv(indio_dev);
764 int ret;
765
766 if (state && data->ev_enable_state)
767 return 0;
768
769 mutex_lock(&data->mutex);
770
771 if (!state && data->motion_trigger_on) {
772 data->ev_enable_state = 0;
773 mutex_unlock(&data->mutex);
774 return 0;
775 }
776
777 /*
778 * We will expect the enable and disable to do operation in
779 * in reverse order. This will happen here anyway as our
780 * resume operation uses sync mode runtime pm calls, the
781 * suspend operation will be delayed by autosuspend delay
782 * So the disable operation will still happen in reverse of
783 * enable operation. When runtime pm is disabled the mode
784 * is always on so sequence doesn't matter
785 */
786
787 ret = bmc150_accel_set_power_state(data, state);
788 if (ret < 0) {
789 mutex_unlock(&data->mutex);
790 return ret;
791 }
792
793 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
794 if (ret < 0) {
795 mutex_unlock(&data->mutex);
796 return ret;
797 }
798
799 data->ev_enable_state = state;
800 mutex_unlock(&data->mutex);
801
802 return 0;
803}
804
805static int bmc150_accel_validate_trigger(struct iio_dev *indio_dev,
806 struct iio_trigger *trig)
807{
808 struct bmc150_accel_data *data = iio_priv(indio_dev);
809
810 if (data->dready_trig != trig && data->motion_trig != trig)
811 return -EINVAL;
812
813 return 0;
814}
815
816static IIO_CONST_ATTR_SAMP_FREQ_AVAIL(
817 "7.810000 15.630000 31.250000 62.500000 125 250 500 1000");
818
819static struct attribute *bmc150_accel_attributes[] = {
820 &iio_const_attr_sampling_frequency_available.dev_attr.attr,
821 NULL,
822};
823
824static const struct attribute_group bmc150_accel_attrs_group = {
825 .attrs = bmc150_accel_attributes,
826};
827
828static const struct iio_event_spec bmc150_accel_event = {
829 .type = IIO_EV_TYPE_ROC,
830 .dir = IIO_EV_DIR_RISING | IIO_EV_DIR_FALLING,
831 .mask_separate = BIT(IIO_EV_INFO_VALUE) |
832 BIT(IIO_EV_INFO_ENABLE) |
833 BIT(IIO_EV_INFO_PERIOD)
834};
835
836#define BMC150_ACCEL_CHANNEL(_axis) { \
837 .type = IIO_ACCEL, \
838 .modified = 1, \
839 .channel2 = IIO_MOD_##_axis, \
840 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
841 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
842 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
843 .scan_index = AXIS_##_axis, \
844 .scan_type = { \
845 .sign = 's', \
846 .realbits = 12, \
847 .storagebits = 16, \
848 .shift = 4, \
849 }, \
850 .event_spec = &bmc150_accel_event, \
851 .num_event_specs = 1 \
852}
853
854static const struct iio_chan_spec bmc150_accel_channels[] = {
855 {
856 .type = IIO_TEMP,
857 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |
858 BIT(IIO_CHAN_INFO_SCALE) |
859 BIT(IIO_CHAN_INFO_OFFSET),
860 .scan_index = -1,
861 },
862 BMC150_ACCEL_CHANNEL(X),
863 BMC150_ACCEL_CHANNEL(Y),
864 BMC150_ACCEL_CHANNEL(Z),
865 IIO_CHAN_SOFT_TIMESTAMP(3),
866};
867
868static const struct iio_info bmc150_accel_info = {
869 .attrs = &bmc150_accel_attrs_group,
870 .read_raw = bmc150_accel_read_raw,
871 .write_raw = bmc150_accel_write_raw,
872 .read_event_value = bmc150_accel_read_event,
873 .write_event_value = bmc150_accel_write_event,
874 .write_event_config = bmc150_accel_write_event_config,
875 .read_event_config = bmc150_accel_read_event_config,
876 .validate_trigger = bmc150_accel_validate_trigger,
877 .driver_module = THIS_MODULE,
878};
879
880static irqreturn_t bmc150_accel_trigger_handler(int irq, void *p)
881{
882 struct iio_poll_func *pf = p;
883 struct iio_dev *indio_dev = pf->indio_dev;
884 struct bmc150_accel_data *data = iio_priv(indio_dev);
885 int bit, ret, i = 0;
886
887 mutex_lock(&data->mutex);
888 for_each_set_bit(bit, indio_dev->buffer->scan_mask,
889 indio_dev->masklength) {
890 ret = i2c_smbus_read_word_data(data->client,
891 BMC150_ACCEL_AXIS_TO_REG(bit));
892 if (ret < 0) {
893 mutex_unlock(&data->mutex);
894 goto err_read;
895 }
896 data->buffer[i++] = ret;
897 }
898 mutex_unlock(&data->mutex);
899
900 iio_push_to_buffers_with_timestamp(indio_dev, data->buffer,
901 data->timestamp);
902err_read:
903 iio_trigger_notify_done(indio_dev->trig);
904
905 return IRQ_HANDLED;
906}
907
908static int bmc150_accel_trig_try_reen(struct iio_trigger *trig)
909{
910 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
911 struct bmc150_accel_data *data = iio_priv(indio_dev);
912 int ret;
913
914 /* new data interrupts don't need ack */
915 if (data->dready_trigger_on)
916 return 0;
917
918 mutex_lock(&data->mutex);
919 /* clear any latched interrupt */
920 ret = i2c_smbus_write_byte_data(data->client,
921 BMC150_ACCEL_REG_INT_RST_LATCH,
922 BMC150_ACCEL_INT_MODE_LATCH_INT |
923 BMC150_ACCEL_INT_MODE_LATCH_RESET);
924 mutex_unlock(&data->mutex);
925 if (ret < 0) {
926 dev_err(&data->client->dev,
927 "Error writing reg_int_rst_latch\n");
928 return ret;
929 }
930
931 return 0;
932}
933
934static int bmc150_accel_data_rdy_trigger_set_state(struct iio_trigger *trig,
935 bool state)
936{
937 struct iio_dev *indio_dev = iio_trigger_get_drvdata(trig);
938 struct bmc150_accel_data *data = iio_priv(indio_dev);
939 int ret;
940
941 mutex_lock(&data->mutex);
942
943 if (!state && data->ev_enable_state && data->motion_trigger_on) {
944 data->motion_trigger_on = false;
945 mutex_unlock(&data->mutex);
946 return 0;
947 }
948
949 /*
950 * Refer to comment in bmc150_accel_write_event_config for
951 * enable/disable operation order
952 */
953 ret = bmc150_accel_set_power_state(data, state);
954 if (ret < 0) {
955 mutex_unlock(&data->mutex);
956 return ret;
957 }
958 if (data->motion_trig == trig)
959 ret = bmc150_accel_setup_any_motion_interrupt(data, state);
960 else
961 ret = bmc150_accel_setup_new_data_interrupt(data, state);
962 if (ret < 0) {
963 mutex_unlock(&data->mutex);
964 return ret;
965 }
966 if (data->motion_trig == trig)
967 data->motion_trigger_on = state;
968 else
969 data->dready_trigger_on = state;
970
971 mutex_unlock(&data->mutex);
972
973 return ret;
974}
975
976static const struct iio_trigger_ops bmc150_accel_trigger_ops = {
977 .set_trigger_state = bmc150_accel_data_rdy_trigger_set_state,
978 .try_reenable = bmc150_accel_trig_try_reen,
979 .owner = THIS_MODULE,
980};
981
982static irqreturn_t bmc150_accel_event_handler(int irq, void *private)
983{
984 struct iio_dev *indio_dev = private;
985 struct bmc150_accel_data *data = iio_priv(indio_dev);
986 int ret;
987 int dir;
988
989 ret = i2c_smbus_read_byte_data(data->client,
990 BMC150_ACCEL_REG_INT_STATUS_2);
991 if (ret < 0) {
992 dev_err(&data->client->dev, "Error reading reg_int_status_2\n");
993 goto ack_intr_status;
994 }
995
996 if (ret & BMC150_ACCEL_ANY_MOTION_BIT_SIGN)
997 dir = IIO_EV_DIR_FALLING;
998 else
999 dir = IIO_EV_DIR_RISING;
1000
1001 if (ret & BMC150_ACCEL_ANY_MOTION_MASK)
1002 iio_push_event(indio_dev, IIO_MOD_EVENT_CODE(IIO_ACCEL,
1003 0,
1004 IIO_MOD_X_OR_Y_OR_Z,
1005 IIO_EV_TYPE_ROC,
1006 IIO_EV_DIR_EITHER),
1007 data->timestamp);
1008ack_intr_status:
1009 if (!data->dready_trigger_on)
1010 ret = i2c_smbus_write_byte_data(data->client,
1011 BMC150_ACCEL_REG_INT_RST_LATCH,
1012 BMC150_ACCEL_INT_MODE_LATCH_INT |
1013 BMC150_ACCEL_INT_MODE_LATCH_RESET);
1014
1015 return IRQ_HANDLED;
1016}
1017
1018static irqreturn_t bmc150_accel_data_rdy_trig_poll(int irq, void *private)
1019{
1020 struct iio_dev *indio_dev = private;
1021 struct bmc150_accel_data *data = iio_priv(indio_dev);
1022
1023 data->timestamp = iio_get_time_ns();
1024
1025 if (data->dready_trigger_on)
1026 iio_trigger_poll(data->dready_trig);
1027 else if (data->motion_trigger_on)
1028 iio_trigger_poll(data->motion_trig);
1029
1030 if (data->ev_enable_state)
1031 return IRQ_WAKE_THREAD;
1032 else
1033 return IRQ_HANDLED;
1034}
1035
1036static int bmc150_accel_acpi_gpio_probe(struct i2c_client *client,
1037 struct bmc150_accel_data *data)
1038{
1039 const struct acpi_device_id *id;
1040 struct device *dev;
1041 struct gpio_desc *gpio;
1042 int ret;
1043
1044 if (!client)
1045 return -EINVAL;
1046
1047 dev = &client->dev;
1048 if (!ACPI_HANDLE(dev))
1049 return -ENODEV;
1050
1051 id = acpi_match_device(dev->driver->acpi_match_table, dev);
1052 if (!id)
1053 return -ENODEV;
1054
1055 /* data ready gpio interrupt pin */
1056 gpio = devm_gpiod_get_index(dev, BMC150_ACCEL_GPIO_NAME, 0);
1057 if (IS_ERR(gpio)) {
1058 dev_err(dev, "Failed: acpi gpio get index\n");
1059 return PTR_ERR(gpio);
1060 }
1061
1062 ret = gpiod_direction_input(gpio);
1063 if (ret)
1064 return ret;
1065
1066 ret = gpiod_to_irq(gpio);
1067
1068 dev_dbg(dev, "GPIO resource, no:%d irq:%d\n", desc_to_gpio(gpio), ret);
1069
1070 return ret;
1071}
1072
1073static int bmc150_accel_probe(struct i2c_client *client,
1074 const struct i2c_device_id *id)
1075{
1076 struct bmc150_accel_data *data;
1077 struct iio_dev *indio_dev;
1078 int ret;
1079
1080 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
1081 if (!indio_dev)
1082 return -ENOMEM;
1083
1084 data = iio_priv(indio_dev);
1085 i2c_set_clientdata(client, indio_dev);
1086 data->client = client;
1087
1088 ret = bmc150_accel_chip_init(data);
1089 if (ret < 0)
1090 return ret;
1091
1092 mutex_init(&data->mutex);
1093
1094 indio_dev->dev.parent = &client->dev;
1095 indio_dev->channels = bmc150_accel_channels;
1096 indio_dev->num_channels = ARRAY_SIZE(bmc150_accel_channels);
1097 indio_dev->name = BMC150_ACCEL_DRV_NAME;
1098 indio_dev->modes = INDIO_DIRECT_MODE;
1099 indio_dev->info = &bmc150_accel_info;
1100
1101 if (client->irq < 0)
1102 client->irq = bmc150_accel_acpi_gpio_probe(client, data);
1103
1104 if (client->irq >= 0) {
1105 ret = devm_request_threaded_irq(
1106 &client->dev, client->irq,
1107 bmc150_accel_data_rdy_trig_poll,
1108 bmc150_accel_event_handler,
1109 IRQF_TRIGGER_RISING,
1110 BMC150_ACCEL_IRQ_NAME,
1111 indio_dev);
1112 if (ret)
1113 return ret;
1114
1115 data->dready_trig = devm_iio_trigger_alloc(&client->dev,
1116 "%s-dev%d",
1117 indio_dev->name,
1118 indio_dev->id);
1119 if (!data->dready_trig)
1120 return -ENOMEM;
1121
1122 data->motion_trig = devm_iio_trigger_alloc(&client->dev,
1123 "%s-any-motion-dev%d",
1124 indio_dev->name,
1125 indio_dev->id);
1126 if (!data->motion_trig)
1127 return -ENOMEM;
1128
1129 data->dready_trig->dev.parent = &client->dev;
1130 data->dready_trig->ops = &bmc150_accel_trigger_ops;
1131 iio_trigger_set_drvdata(data->dready_trig, indio_dev);
1132 ret = iio_trigger_register(data->dready_trig);
1133 if (ret)
1134 return ret;
1135
1136 data->motion_trig->dev.parent = &client->dev;
1137 data->motion_trig->ops = &bmc150_accel_trigger_ops;
1138 iio_trigger_set_drvdata(data->motion_trig, indio_dev);
1139 ret = iio_trigger_register(data->motion_trig);
1140 if (ret) {
1141 data->motion_trig = NULL;
1142 goto err_trigger_unregister;
1143 }
1144
1145 ret = iio_triggered_buffer_setup(indio_dev,
1146 &iio_pollfunc_store_time,
1147 bmc150_accel_trigger_handler,
1148 NULL);
1149 if (ret < 0) {
1150 dev_err(&client->dev,
1151 "Failed: iio triggered buffer setup\n");
1152 goto err_trigger_unregister;
1153 }
1154 }
1155
1156 ret = iio_device_register(indio_dev);
1157 if (ret < 0) {
1158 dev_err(&client->dev, "Unable to register iio device\n");
1159 goto err_buffer_cleanup;
1160 }
1161
1162 ret = pm_runtime_set_active(&client->dev);
1163 if (ret)
1164 goto err_iio_unregister;
1165
1166 pm_runtime_enable(&client->dev);
1167 pm_runtime_set_autosuspend_delay(&client->dev,
1168 BMC150_AUTO_SUSPEND_DELAY_MS);
1169 pm_runtime_use_autosuspend(&client->dev);
1170
1171 return 0;
1172
1173err_iio_unregister:
1174 iio_device_unregister(indio_dev);
1175err_buffer_cleanup:
1176 if (data->dready_trig)
1177 iio_triggered_buffer_cleanup(indio_dev);
1178err_trigger_unregister:
1179 if (data->dready_trig)
1180 iio_trigger_unregister(data->dready_trig);
1181 if (data->motion_trig)
1182 iio_trigger_unregister(data->motion_trig);
1183
1184 return ret;
1185}
1186
1187static int bmc150_accel_remove(struct i2c_client *client)
1188{
1189 struct iio_dev *indio_dev = i2c_get_clientdata(client);
1190 struct bmc150_accel_data *data = iio_priv(indio_dev);
1191
1192 pm_runtime_disable(&client->dev);
1193 pm_runtime_set_suspended(&client->dev);
1194 pm_runtime_put_noidle(&client->dev);
1195
1196 iio_device_unregister(indio_dev);
1197
1198 if (data->dready_trig) {
1199 iio_triggered_buffer_cleanup(indio_dev);
1200 iio_trigger_unregister(data->dready_trig);
1201 iio_trigger_unregister(data->motion_trig);
1202 }
1203
1204 mutex_lock(&data->mutex);
1205 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_DEEP_SUSPEND, 0);
1206 mutex_unlock(&data->mutex);
1207
1208 return 0;
1209}
1210
1211#ifdef CONFIG_PM_SLEEP
1212static int bmc150_accel_suspend(struct device *dev)
1213{
1214 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1215 struct bmc150_accel_data *data = iio_priv(indio_dev);
1216
1217 mutex_lock(&data->mutex);
1218 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1219 mutex_unlock(&data->mutex);
1220
1221 return 0;
1222}
1223
1224static int bmc150_accel_resume(struct device *dev)
1225{
1226 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1227 struct bmc150_accel_data *data = iio_priv(indio_dev);
1228
1229 mutex_lock(&data->mutex);
1230 if (data->dready_trigger_on || data->motion_trigger_on ||
1231 data->ev_enable_state)
1232 bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1233 mutex_unlock(&data->mutex);
1234
1235 return 0;
1236}
1237#endif
1238
1239#ifdef CONFIG_PM_RUNTIME
1240static int bmc150_accel_runtime_suspend(struct device *dev)
1241{
1242 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1243 struct bmc150_accel_data *data = iio_priv(indio_dev);
1244
1245 dev_dbg(&data->client->dev, __func__);
1246
1247 return bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_SUSPEND, 0);
1248}
1249
1250static int bmc150_accel_runtime_resume(struct device *dev)
1251{
1252 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
1253 struct bmc150_accel_data *data = iio_priv(indio_dev);
1254 int ret;
1255 int sleep_val;
1256
1257 dev_dbg(&data->client->dev, __func__);
1258
1259 ret = bmc150_accel_set_mode(data, BMC150_ACCEL_SLEEP_MODE_NORMAL, 0);
1260 if (ret < 0)
1261 return ret;
1262
1263 sleep_val = bmc150_accel_get_startup_times(data);
1264 if (sleep_val < 20)
1265 usleep_range(sleep_val * 1000, 20000);
1266 else
1267 msleep_interruptible(sleep_val);
1268
1269 return 0;
1270}
1271#endif
1272
1273static const struct dev_pm_ops bmc150_accel_pm_ops = {
1274 SET_SYSTEM_SLEEP_PM_OPS(bmc150_accel_suspend, bmc150_accel_resume)
1275 SET_RUNTIME_PM_OPS(bmc150_accel_runtime_suspend,
1276 bmc150_accel_runtime_resume, NULL)
1277};
1278
1279static const struct acpi_device_id bmc150_accel_acpi_match[] = {
1280 {"BSBA0150", 0},
1281 {"BMC150A", 0},
1282 { },
1283};
1284MODULE_DEVICE_TABLE(acpi, bmc150_accel_acpi_match);
1285
1286static const struct i2c_device_id bmc150_accel_id[] = {
1287 {"bmc150_accel", 0},
1288 {}
1289};
1290
1291MODULE_DEVICE_TABLE(i2c, bmc150_accel_id);
1292
1293static struct i2c_driver bmc150_accel_driver = {
1294 .driver = {
1295 .name = BMC150_ACCEL_DRV_NAME,
1296 .acpi_match_table = ACPI_PTR(bmc150_accel_acpi_match),
1297 .pm = &bmc150_accel_pm_ops,
1298 },
1299 .probe = bmc150_accel_probe,
1300 .remove = bmc150_accel_remove,
1301 .id_table = bmc150_accel_id,
1302};
1303module_i2c_driver(bmc150_accel_driver);
1304
1305MODULE_AUTHOR("Srinivas Pandruvada <srinivas.pandruvada@linux.intel.com>");
1306MODULE_LICENSE("GPL v2");
1307MODULE_DESCRIPTION("BMC150 accelerometer driver");
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-14 07:09:30 -0500