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authorLars-Peter Clausen <lars@metafoo.de>2013-01-31 09:27:00 -0500
committerJonathan Cameron <jic23@kernel.org>2013-02-02 04:27:56 -0500
commit420b0fcb523b61eefb347317d3956db3249e968d (patch)
tree48d9a5a4ef4ffbaef92733ed38179efd07e404f7 /drivers/iio/gyro/adxrs450.c
parent53ac8500ba9badae82b0412d08e1db9f5b21b3d5 (diff)
staging:iio: Move adxrs450 driver out of staging
The adxrs450 is in a reasonable shape now. It follows the IIO ABI and non of the standard code checker tools report any issue, so move it out of staging. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/gyro/adxrs450.c')
-rw-r--r--drivers/iio/gyro/adxrs450.c497
1 files changed, 497 insertions, 0 deletions
diff --git a/drivers/iio/gyro/adxrs450.c b/drivers/iio/gyro/adxrs450.c
new file mode 100644
index 000000000000..d9d43831c380
--- /dev/null
+++ b/drivers/iio/gyro/adxrs450.c
@@ -0,0 +1,497 @@
1/*
2 * ADXRS450/ADXRS453 Digital Output Gyroscope Driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
10#include <linux/irq.h>
11#include <linux/delay.h>
12#include <linux/mutex.h>
13#include <linux/device.h>
14#include <linux/kernel.h>
15#include <linux/spi/spi.h>
16#include <linux/slab.h>
17#include <linux/sysfs.h>
18#include <linux/list.h>
19#include <linux/module.h>
20
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23
24#define ADXRS450_STARTUP_DELAY 50 /* ms */
25
26/* The MSB for the spi commands */
27#define ADXRS450_SENSOR_DATA (0x20 << 24)
28#define ADXRS450_WRITE_DATA (0x40 << 24)
29#define ADXRS450_READ_DATA (0x80 << 24)
30
31#define ADXRS450_RATE1 0x00 /* Rate Registers */
32#define ADXRS450_TEMP1 0x02 /* Temperature Registers */
33#define ADXRS450_LOCST1 0x04 /* Low CST Memory Registers */
34#define ADXRS450_HICST1 0x06 /* High CST Memory Registers */
35#define ADXRS450_QUAD1 0x08 /* Quad Memory Registers */
36#define ADXRS450_FAULT1 0x0A /* Fault Registers */
37#define ADXRS450_PID1 0x0C /* Part ID Register 1 */
38#define ADXRS450_SNH 0x0E /* Serial Number Registers, 4 bytes */
39#define ADXRS450_SNL 0x10
40#define ADXRS450_DNC1 0x12 /* Dynamic Null Correction Registers */
41/* Check bits */
42#define ADXRS450_P 0x01
43#define ADXRS450_CHK 0x02
44#define ADXRS450_CST 0x04
45#define ADXRS450_PWR 0x08
46#define ADXRS450_POR 0x10
47#define ADXRS450_NVM 0x20
48#define ADXRS450_Q 0x40
49#define ADXRS450_PLL 0x80
50#define ADXRS450_UV 0x100
51#define ADXRS450_OV 0x200
52#define ADXRS450_AMP 0x400
53#define ADXRS450_FAIL 0x800
54
55#define ADXRS450_WRERR_MASK (0x7 << 29)
56
57#define ADXRS450_MAX_RX 4
58#define ADXRS450_MAX_TX 4
59
60#define ADXRS450_GET_ST(a) ((a >> 26) & 0x3)
61
62enum {
63 ID_ADXRS450,
64 ID_ADXRS453,
65};
66
67/**
68 * struct adxrs450_state - device instance specific data
69 * @us: actual spi_device
70 * @buf_lock: mutex to protect tx and rx
71 * @tx: transmit buffer
72 * @rx: receive buffer
73 **/
74struct adxrs450_state {
75 struct spi_device *us;
76 struct mutex buf_lock;
77 __be32 tx ____cacheline_aligned;
78 __be32 rx;
79
80};
81
82/**
83 * adxrs450_spi_read_reg_16() - read 2 bytes from a register pair
84 * @indio_dev: device associated with child of actual iio_dev
85 * @reg_address: the address of the lower of the two registers, which should be
86 * an even address, the second register's address is reg_address + 1.
87 * @val: somewhere to pass back the value read
88 **/
89static int adxrs450_spi_read_reg_16(struct iio_dev *indio_dev,
90 u8 reg_address,
91 u16 *val)
92{
93 struct spi_message msg;
94 struct adxrs450_state *st = iio_priv(indio_dev);
95 u32 tx;
96 int ret;
97 struct spi_transfer xfers[] = {
98 {
99 .tx_buf = &st->tx,
100 .bits_per_word = 8,
101 .len = sizeof(st->tx),
102 .cs_change = 1,
103 }, {
104 .rx_buf = &st->rx,
105 .bits_per_word = 8,
106 .len = sizeof(st->rx),
107 },
108 };
109
110 mutex_lock(&st->buf_lock);
111 tx = ADXRS450_READ_DATA | (reg_address << 17);
112
113 if (!(hweight32(tx) & 1))
114 tx |= ADXRS450_P;
115
116 st->tx = cpu_to_be32(tx);
117 spi_message_init(&msg);
118 spi_message_add_tail(&xfers[0], &msg);
119 spi_message_add_tail(&xfers[1], &msg);
120 ret = spi_sync(st->us, &msg);
121 if (ret) {
122 dev_err(&st->us->dev, "problem while reading 16 bit register 0x%02x\n",
123 reg_address);
124 goto error_ret;
125 }
126
127 *val = (be32_to_cpu(st->rx) >> 5) & 0xFFFF;
128
129error_ret:
130 mutex_unlock(&st->buf_lock);
131 return ret;
132}
133
134/**
135 * adxrs450_spi_write_reg_16() - write 2 bytes data to a register pair
136 * @indio_dev: device associated with child of actual actual iio_dev
137 * @reg_address: the address of the lower of the two registers,which should be
138 * an even address, the second register's address is reg_address + 1.
139 * @val: value to be written.
140 **/
141static int adxrs450_spi_write_reg_16(struct iio_dev *indio_dev,
142 u8 reg_address,
143 u16 val)
144{
145 struct adxrs450_state *st = iio_priv(indio_dev);
146 u32 tx;
147 int ret;
148
149 mutex_lock(&st->buf_lock);
150 tx = ADXRS450_WRITE_DATA | (reg_address << 17) | (val << 1);
151
152 if (!(hweight32(tx) & 1))
153 tx |= ADXRS450_P;
154
155 st->tx = cpu_to_be32(tx);
156 ret = spi_write(st->us, &st->tx, sizeof(st->tx));
157 if (ret)
158 dev_err(&st->us->dev, "problem while writing 16 bit register 0x%02x\n",
159 reg_address);
160 usleep_range(100, 1000); /* enforce sequential transfer delay 0.1ms */
161 mutex_unlock(&st->buf_lock);
162 return ret;
163}
164
165/**
166 * adxrs450_spi_sensor_data() - read 2 bytes sensor data
167 * @indio_dev: device associated with child of actual iio_dev
168 * @val: somewhere to pass back the value read
169 **/
170static int adxrs450_spi_sensor_data(struct iio_dev *indio_dev, s16 *val)
171{
172 struct spi_message msg;
173 struct adxrs450_state *st = iio_priv(indio_dev);
174 int ret;
175 struct spi_transfer xfers[] = {
176 {
177 .tx_buf = &st->tx,
178 .bits_per_word = 8,
179 .len = sizeof(st->tx),
180 .cs_change = 1,
181 }, {
182 .rx_buf = &st->rx,
183 .bits_per_word = 8,
184 .len = sizeof(st->rx),
185 },
186 };
187
188 mutex_lock(&st->buf_lock);
189 st->tx = cpu_to_be32(ADXRS450_SENSOR_DATA);
190
191 spi_message_init(&msg);
192 spi_message_add_tail(&xfers[0], &msg);
193 spi_message_add_tail(&xfers[1], &msg);
194 ret = spi_sync(st->us, &msg);
195 if (ret) {
196 dev_err(&st->us->dev, "Problem while reading sensor data\n");
197 goto error_ret;
198 }
199
200 *val = (be32_to_cpu(st->rx) >> 10) & 0xFFFF;
201
202error_ret:
203 mutex_unlock(&st->buf_lock);
204 return ret;
205}
206
207/**
208 * adxrs450_spi_initial() - use for initializing procedure.
209 * @st: device instance specific data
210 * @val: somewhere to pass back the value read
211 * @chk: Whether to perform fault check
212 **/
213static int adxrs450_spi_initial(struct adxrs450_state *st,
214 u32 *val, char chk)
215{
216 struct spi_message msg;
217 int ret;
218 u32 tx;
219 struct spi_transfer xfers = {
220 .tx_buf = &st->tx,
221 .rx_buf = &st->rx,
222 .bits_per_word = 8,
223 .len = sizeof(st->tx),
224 };
225
226 mutex_lock(&st->buf_lock);
227 tx = ADXRS450_SENSOR_DATA;
228 if (chk)
229 tx |= (ADXRS450_CHK | ADXRS450_P);
230 st->tx = cpu_to_be32(tx);
231 spi_message_init(&msg);
232 spi_message_add_tail(&xfers, &msg);
233 ret = spi_sync(st->us, &msg);
234 if (ret) {
235 dev_err(&st->us->dev, "Problem while reading initializing data\n");
236 goto error_ret;
237 }
238
239 *val = be32_to_cpu(st->rx);
240
241error_ret:
242 mutex_unlock(&st->buf_lock);
243 return ret;
244}
245
246/* Recommended Startup Sequence by spec */
247static int adxrs450_initial_setup(struct iio_dev *indio_dev)
248{
249 u32 t;
250 u16 data;
251 int ret;
252 struct adxrs450_state *st = iio_priv(indio_dev);
253
254 msleep(ADXRS450_STARTUP_DELAY*2);
255 ret = adxrs450_spi_initial(st, &t, 1);
256 if (ret)
257 return ret;
258 if (t != 0x01)
259 dev_warn(&st->us->dev, "The initial power on response is not correct! Restart without reset?\n");
260
261 msleep(ADXRS450_STARTUP_DELAY);
262 ret = adxrs450_spi_initial(st, &t, 0);
263 if (ret)
264 return ret;
265
266 msleep(ADXRS450_STARTUP_DELAY);
267 ret = adxrs450_spi_initial(st, &t, 0);
268 if (ret)
269 return ret;
270 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
271 dev_err(&st->us->dev, "The second response is not correct!\n");
272 return -EIO;
273
274 }
275 ret = adxrs450_spi_initial(st, &t, 0);
276 if (ret)
277 return ret;
278 if (((t & 0xff) | 0x01) != 0xff || ADXRS450_GET_ST(t) != 2) {
279 dev_err(&st->us->dev, "The third response is not correct!\n");
280 return -EIO;
281
282 }
283 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_FAULT1, &data);
284 if (ret)
285 return ret;
286 if (data & 0x0fff) {
287 dev_err(&st->us->dev, "The device is not in normal status!\n");
288 return -EINVAL;
289 }
290
291 return 0;
292}
293
294static int adxrs450_write_raw(struct iio_dev *indio_dev,
295 struct iio_chan_spec const *chan,
296 int val,
297 int val2,
298 long mask)
299{
300 int ret;
301 switch (mask) {
302 case IIO_CHAN_INFO_CALIBBIAS:
303 if (val < -0x400 || val >= 0x400)
304 return -EINVAL;
305 ret = adxrs450_spi_write_reg_16(indio_dev,
306 ADXRS450_DNC1, val);
307 break;
308 default:
309 ret = -EINVAL;
310 break;
311 }
312 return ret;
313}
314
315static int adxrs450_read_raw(struct iio_dev *indio_dev,
316 struct iio_chan_spec const *chan,
317 int *val,
318 int *val2,
319 long mask)
320{
321 int ret;
322 s16 t;
323
324 switch (mask) {
325 case IIO_CHAN_INFO_RAW:
326 switch (chan->type) {
327 case IIO_ANGL_VEL:
328 ret = adxrs450_spi_sensor_data(indio_dev, &t);
329 if (ret)
330 break;
331 *val = t;
332 ret = IIO_VAL_INT;
333 break;
334 case IIO_TEMP:
335 ret = adxrs450_spi_read_reg_16(indio_dev,
336 ADXRS450_TEMP1, &t);
337 if (ret)
338 break;
339 *val = (t >> 6) + 225;
340 ret = IIO_VAL_INT;
341 break;
342 default:
343 ret = -EINVAL;
344 break;
345 }
346 break;
347 case IIO_CHAN_INFO_SCALE:
348 switch (chan->type) {
349 case IIO_ANGL_VEL:
350 *val = 0;
351 *val2 = 218166;
352 return IIO_VAL_INT_PLUS_NANO;
353 case IIO_TEMP:
354 *val = 200;
355 *val2 = 0;
356 return IIO_VAL_INT;
357 default:
358 return -EINVAL;
359 }
360 break;
361 case IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW:
362 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_QUAD1, &t);
363 if (ret)
364 break;
365 *val = t;
366 ret = IIO_VAL_INT;
367 break;
368 case IIO_CHAN_INFO_CALIBBIAS:
369 ret = adxrs450_spi_read_reg_16(indio_dev, ADXRS450_DNC1, &t);
370 if (ret)
371 break;
372 *val = sign_extend32(t, 9);
373 ret = IIO_VAL_INT;
374 break;
375 default:
376 ret = -EINVAL;
377 break;
378 }
379
380 return ret;
381}
382
383static const struct iio_chan_spec adxrs450_channels[2][2] = {
384 [ID_ADXRS450] = {
385 {
386 .type = IIO_ANGL_VEL,
387 .modified = 1,
388 .channel2 = IIO_MOD_Z,
389 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
390 IIO_CHAN_INFO_CALIBBIAS_SEPARATE_BIT |
391 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT |
392 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
393 }, {
394 .type = IIO_TEMP,
395 .indexed = 1,
396 .channel = 0,
397 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
398 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
399 }
400 },
401 [ID_ADXRS453] = {
402 {
403 .type = IIO_ANGL_VEL,
404 .modified = 1,
405 .channel2 = IIO_MOD_Z,
406 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
407 IIO_CHAN_INFO_SCALE_SEPARATE_BIT |
408 IIO_CHAN_INFO_QUADRATURE_CORRECTION_RAW_SEPARATE_BIT,
409 }, {
410 .type = IIO_TEMP,
411 .indexed = 1,
412 .channel = 0,
413 .info_mask = IIO_CHAN_INFO_RAW_SEPARATE_BIT |
414 IIO_CHAN_INFO_SCALE_SEPARATE_BIT,
415 }
416 },
417};
418
419static const struct iio_info adxrs450_info = {
420 .driver_module = THIS_MODULE,
421 .read_raw = &adxrs450_read_raw,
422 .write_raw = &adxrs450_write_raw,
423};
424
425static int adxrs450_probe(struct spi_device *spi)
426{
427 int ret;
428 struct adxrs450_state *st;
429 struct iio_dev *indio_dev;
430
431 /* setup the industrialio driver allocated elements */
432 indio_dev = iio_device_alloc(sizeof(*st));
433 if (indio_dev == NULL) {
434 ret = -ENOMEM;
435 goto error_ret;
436 }
437 st = iio_priv(indio_dev);
438 st->us = spi;
439 mutex_init(&st->buf_lock);
440 /* This is only used for removal purposes */
441 spi_set_drvdata(spi, indio_dev);
442
443 indio_dev->dev.parent = &spi->dev;
444 indio_dev->info = &adxrs450_info;
445 indio_dev->modes = INDIO_DIRECT_MODE;
446 indio_dev->channels =
447 adxrs450_channels[spi_get_device_id(spi)->driver_data];
448 indio_dev->num_channels = ARRAY_SIZE(adxrs450_channels);
449 indio_dev->name = spi->dev.driver->name;
450
451 ret = iio_device_register(indio_dev);
452 if (ret)
453 goto error_free_dev;
454
455 /* Get the device into a sane initial state */
456 ret = adxrs450_initial_setup(indio_dev);
457 if (ret)
458 goto error_initial;
459 return 0;
460error_initial:
461 iio_device_unregister(indio_dev);
462error_free_dev:
463 iio_device_free(indio_dev);
464
465error_ret:
466 return ret;
467}
468
469static int adxrs450_remove(struct spi_device *spi)
470{
471 iio_device_unregister(spi_get_drvdata(spi));
472 iio_device_free(spi_get_drvdata(spi));
473
474 return 0;
475}
476
477static const struct spi_device_id adxrs450_id[] = {
478 {"adxrs450", ID_ADXRS450},
479 {"adxrs453", ID_ADXRS453},
480 {}
481};
482MODULE_DEVICE_TABLE(spi, adxrs450_id);
483
484static struct spi_driver adxrs450_driver = {
485 .driver = {
486 .name = "adxrs450",
487 .owner = THIS_MODULE,
488 },
489 .probe = adxrs450_probe,
490 .remove = adxrs450_remove,
491 .id_table = adxrs450_id,
492};
493module_spi_driver(adxrs450_driver);
494
495MODULE_AUTHOR("Cliff Cai <cliff.cai@xxxxxxxxxx>");
496MODULE_DESCRIPTION("Analog Devices ADXRS450/ADXRS453 Gyroscope SPI driver");
497MODULE_LICENSE("GPL v2");