diff options
author | Arnd Bergmann <arnd@arndb.de> | 2014-07-28 08:44:00 -0400 |
---|---|---|
committer | Jonathan Cameron <jic23@kernel.org> | 2014-08-07 12:36:55 -0400 |
commit | 249535d894216f5dcd922accfb435d32d417d56f (patch) | |
tree | dc996287bf5603197828ce4725a04d500914bac1 /drivers/iio/adc/exynos_adc.c | |
parent | 44d6f2ef94f9825e6eb9072f1611e0ea4cd81fa1 (diff) |
iio: adc: exynos_adc: add support for s3c64xx adc
The ADC in s3c64xx is almost the same as exynosv1, but
has a different 'select' method. Adding this here will be
helpful to move over the existing s3c64xx platform from the
legacy plat-samsung/adc driver to the new exynos-adc.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
Diffstat (limited to 'drivers/iio/adc/exynos_adc.c')
-rw-r--r-- | drivers/iio/adc/exynos_adc.c | 28 |
1 files changed, 27 insertions, 1 deletions
diff --git a/drivers/iio/adc/exynos_adc.c b/drivers/iio/adc/exynos_adc.c index fc9dfc23ecb7..62631a778b1f 100644 --- a/drivers/iio/adc/exynos_adc.c +++ b/drivers/iio/adc/exynos_adc.c | |||
@@ -40,7 +40,7 @@ | |||
40 | #include <linux/iio/machine.h> | 40 | #include <linux/iio/machine.h> |
41 | #include <linux/iio/driver.h> | 41 | #include <linux/iio/driver.h> |
42 | 42 | ||
43 | /* EXYNOS4412/5250 ADC_V1 registers definitions */ | 43 | /* S3C/EXYNOS4412/5250 ADC_V1 registers definitions */ |
44 | #define ADC_V1_CON(x) ((x) + 0x00) | 44 | #define ADC_V1_CON(x) ((x) + 0x00) |
45 | #define ADC_V1_DLY(x) ((x) + 0x08) | 45 | #define ADC_V1_DLY(x) ((x) + 0x08) |
46 | #define ADC_V1_DATX(x) ((x) + 0x0C) | 46 | #define ADC_V1_DATX(x) ((x) + 0x0C) |
@@ -61,6 +61,9 @@ | |||
61 | #define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) | 61 | #define ADC_V1_CON_PRSCLV(x) (((x) & 0xFF) << 6) |
62 | #define ADC_V1_CON_STANDBY (1u << 2) | 62 | #define ADC_V1_CON_STANDBY (1u << 2) |
63 | 63 | ||
64 | /* Bit definitions for S3C2410 ADC */ | ||
65 | #define ADC_S3C2410_CON_SELMUX(x) (((x) & 7) << 3) | ||
66 | |||
64 | /* Bit definitions for ADC_V2 */ | 67 | /* Bit definitions for ADC_V2 */ |
65 | #define ADC_V2_CON1_SOFT_RESET (1u << 2) | 68 | #define ADC_V2_CON1_SOFT_RESET (1u << 2) |
66 | 69 | ||
@@ -217,6 +220,26 @@ static const struct exynos_adc_data exynos_adc_v1_data = { | |||
217 | .start_conv = exynos_adc_v1_start_conv, | 220 | .start_conv = exynos_adc_v1_start_conv, |
218 | }; | 221 | }; |
219 | 222 | ||
223 | static void exynos_adc_s3c64xx_start_conv(struct exynos_adc *info, | ||
224 | unsigned long addr) | ||
225 | { | ||
226 | u32 con1; | ||
227 | |||
228 | con1 = readl(ADC_V1_CON(info->regs)); | ||
229 | con1 &= ~ADC_S3C2410_CON_SELMUX(0x7); | ||
230 | con1 |= ADC_S3C2410_CON_SELMUX(addr); | ||
231 | writel(con1 | ADC_CON_EN_START, ADC_V1_CON(info->regs)); | ||
232 | } | ||
233 | |||
234 | static struct exynos_adc_data const exynos_adc_s3c64xx_data = { | ||
235 | .num_channels = MAX_ADC_V1_CHANNELS, | ||
236 | |||
237 | .init_hw = exynos_adc_v1_init_hw, | ||
238 | .exit_hw = exynos_adc_v1_exit_hw, | ||
239 | .clear_irq = exynos_adc_v1_clear_irq, | ||
240 | .start_conv = exynos_adc_s3c64xx_start_conv, | ||
241 | }; | ||
242 | |||
220 | static void exynos_adc_v2_init_hw(struct exynos_adc *info) | 243 | static void exynos_adc_v2_init_hw(struct exynos_adc *info) |
221 | { | 244 | { |
222 | u32 con1, con2; | 245 | u32 con1, con2; |
@@ -285,6 +308,9 @@ static const struct exynos_adc_data exynos3250_adc_data = { | |||
285 | 308 | ||
286 | static const struct of_device_id exynos_adc_match[] = { | 309 | static const struct of_device_id exynos_adc_match[] = { |
287 | { | 310 | { |
311 | .compatible = "samsung,s3c6410-adc", | ||
312 | .data = &exynos_adc_s3c64xx_data, | ||
313 | }, { | ||
288 | .compatible = "samsung,exynos-adc-v1", | 314 | .compatible = "samsung,exynos-adc-v1", |
289 | .data = &exynos_adc_v1_data, | 315 | .data = &exynos_adc_v1_data, |
290 | }, { | 316 | }, { |