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authorJody McIntyre <scjody@modernduck.com>2006-03-28 19:55:11 -0500
committerJody McIntyre <scjody@modernduck.com>2006-03-28 19:55:11 -0500
commite2f8165dc3c70cd74bcf2c63a6c0de254c6ff50c (patch)
treece7c0f0af9e21de680c283f1ac8fbc9773f75571 /drivers/ieee1394/ohci1394.c
parent147830f297f369fa8731a75e3e4c7c7cd5c3e868 (diff)
Signed-off-by: Jody McIntyre <scjody@modernduck.com>
Diffstat (limited to 'drivers/ieee1394/ohci1394.c')
-rw-r--r--drivers/ieee1394/ohci1394.c8
1 files changed, 5 insertions, 3 deletions
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c
index b6b96fa04d62..eb329a875099 100644
--- a/drivers/ieee1394/ohci1394.c
+++ b/drivers/ieee1394/ohci1394.c
@@ -572,6 +572,7 @@ static void ohci_initialize(struct ti_ohci *ohci)
572 OHCI1394_reqTxComplete | 572 OHCI1394_reqTxComplete |
573 OHCI1394_isochRx | 573 OHCI1394_isochRx |
574 OHCI1394_isochTx | 574 OHCI1394_isochTx |
575 OHCI1394_postedWriteErr |
575 OHCI1394_cycleInconsistent); 576 OHCI1394_cycleInconsistent);
576 577
577 /* Enable link */ 578 /* Enable link */
@@ -2374,7 +2375,10 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
2374 2375
2375 event &= ~OHCI1394_unrecoverableError; 2376 event &= ~OHCI1394_unrecoverableError;
2376 } 2377 }
2377 2378 if (event & OHCI1394_postedWriteErr) {
2379 PRINT(KERN_ERR, "physical posted write error");
2380 /* no recovery strategy yet, had to involve protocol drivers */
2381 }
2378 if (event & OHCI1394_cycleInconsistent) { 2382 if (event & OHCI1394_cycleInconsistent) {
2379 /* We subscribe to the cycleInconsistent event only to 2383 /* We subscribe to the cycleInconsistent event only to
2380 * clear the corresponding event bit... otherwise, 2384 * clear the corresponding event bit... otherwise,
@@ -2382,7 +2386,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
2382 DBGMSG("OHCI1394_cycleInconsistent"); 2386 DBGMSG("OHCI1394_cycleInconsistent");
2383 event &= ~OHCI1394_cycleInconsistent; 2387 event &= ~OHCI1394_cycleInconsistent;
2384 } 2388 }
2385
2386 if (event & OHCI1394_busReset) { 2389 if (event & OHCI1394_busReset) {
2387 /* The busReset event bit can't be cleared during the 2390 /* The busReset event bit can't be cleared during the
2388 * selfID phase, so we disable busReset interrupts, to 2391 * selfID phase, so we disable busReset interrupts, to
@@ -2426,7 +2429,6 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
2426 } 2429 }
2427 event &= ~OHCI1394_busReset; 2430 event &= ~OHCI1394_busReset;
2428 } 2431 }
2429
2430 if (event & OHCI1394_reqTxComplete) { 2432 if (event & OHCI1394_reqTxComplete) {
2431 struct dma_trm_ctx *d = &ohci->at_req_context; 2433 struct dma_trm_ctx *d = &ohci->at_req_context;
2432 DBGMSG("Got reqTxComplete interrupt " 2434 DBGMSG("Got reqTxComplete interrupt "