ieee1394/ohci1394: CycleTooLong interrupt management

This patch modifies the ohci1394.c file to enable and manage the "cycle too
long" interrupt.
If this interrupt occurs, the "LinkControl.CycleMaster" bit of the host
controller is reseted. This implies, that the host controller does not send
"cycle start" packet anymore freezing then the isochronous communication.
The management of the interrupt added by the patch is that when the interrupt
occurs, the OHCI irq handler prints a kernel log warning and then sets the
"LinkControl.CycleMaster" bit again resuming the isochronous communication.

Signed-off-by: Jean-Baptiste Mur <jeanbaptiste@maunakeatech.com>
Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Signed-off-by: Ben Collins <bcollins@ubuntu.com>

1 files changed, 10 insertions, 0 deletions

diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c
index 8c43065a6055..643094c3339c 100644
--- a/drivers/ieee1394/ohci1394.c
+++ b/drivers/ieee1394/ohci1394.c
@@ -580,6 +580,7 @@ static void ohci_initialize(struct ti_ohci *ohci)
                   OHCI1394_isochRx |
                   OHCI1394_isochTx |
                   OHCI1394_postedWriteErr |
+                  OHCI1394_cycleTooLong |
                   OHCI1394_cycleInconsistent);
 
         /* Enable link */
@@ -2386,6 +2387,15 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id,
                 PRINT(KERN_ERR, "physical posted write error");
                 /* no recovery strategy yet, had to involve protocol drivers */
         }
+        if (event & OHCI1394_cycleTooLong) {
+                if(printk_ratelimit())
+                        PRINT(KERN_WARNING, "isochronous cycle too long");
+                else
+                        DBGMSG("OHCI1394_cycleTooLong");
+                reg_write(ohci, OHCI1394_LinkControlSet,
+                          OHCI1394_LinkControl_CycleMaster);
+                event &= ~OHCI1394_cycleTooLong;
+        }
         if (event & OHCI1394_cycleInconsistent) {
                 /* We subscribe to the cycleInconsistent event only to
                  * clear the corresponding event bit... otherwise,