diff options
author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-20 23:01:16 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-06-20 23:01:16 -0400 |
commit | 34641a58a227e498adf471ab016bd054cc399d7e (patch) | |
tree | da1e0af965d06d0c6e13c546ac01f6a54a904d86 /drivers/ieee1394/ohci1394.c | |
parent | 2eec0e0842ef747027eb9181d5f50d7157184d57 (diff) | |
parent | 7136b8073f0123918e3e50269ae021bbb09e1a81 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/bcollins/linux1394-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/bcollins/linux1394-2.6: (28 commits)
eth1394: replace __constant_htons by htons
ieee1394: adjust code formatting in highlevel.c
ieee1394: hl_irqs_lock is taken in hardware interrupt context
ieee1394_core: switch to kthread API
ieee1394: sbp2: Kconfig fix
ieee1394: add preprocessor constant for invalid csr address
sbp2: fix deregistration of status fifo address space
[PATCH] eth1394: endian fixes
Fix broken suspend/resume in ohci1394
sbp2: use __attribute__((packed)) for on-the-wire structures
sbp2: provide helptext for CONFIG_IEEE1394_SBP2_PHYS_DMA and mark it experimental
Update feature removal of obsolete raw1394 ISO requests.
sbp2: fix S800 transfers if phys_dma is off
sbp2: remove ohci1394 specific constant
ohci1394: make phys_dma parameter read-only
ohci1394: set address range properties
ieee1394: extend lowlevel API for address range properties
sbp2: log number of supported concurrent logins
sbp2: remove manipulation of inquiry response
ieee1394: save RAM by using a single tlabel for broadcast transactions
...
Diffstat (limited to 'drivers/ieee1394/ohci1394.c')
-rw-r--r-- | drivers/ieee1394/ohci1394.c | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/drivers/ieee1394/ohci1394.c b/drivers/ieee1394/ohci1394.c index c031650a1c74..3d278412e1ca 100644 --- a/drivers/ieee1394/ohci1394.c +++ b/drivers/ieee1394/ohci1394.c | |||
@@ -163,7 +163,7 @@ printk(level "%s: fw-host%d: " fmt "\n" , OHCI1394_DRIVER_NAME, ohci->host->id , | |||
163 | 163 | ||
164 | /* Module Parameters */ | 164 | /* Module Parameters */ |
165 | static int phys_dma = 1; | 165 | static int phys_dma = 1; |
166 | module_param(phys_dma, int, 0644); | 166 | module_param(phys_dma, int, 0444); |
167 | MODULE_PARM_DESC(phys_dma, "Enable physical dma (default = 1)."); | 167 | MODULE_PARM_DESC(phys_dma, "Enable physical dma (default = 1)."); |
168 | 168 | ||
169 | static void dma_trm_tasklet(unsigned long data); | 169 | static void dma_trm_tasklet(unsigned long data); |
@@ -553,7 +553,8 @@ static void ohci_initialize(struct ti_ohci *ohci) | |||
553 | * register content. | 553 | * register content. |
554 | * To actually enable physical responses is the job of our interrupt | 554 | * To actually enable physical responses is the job of our interrupt |
555 | * handler which programs the physical request filter. */ | 555 | * handler which programs the physical request filter. */ |
556 | reg_write(ohci, OHCI1394_PhyUpperBound, 0x01000000); | 556 | reg_write(ohci, OHCI1394_PhyUpperBound, |
557 | OHCI1394_PHYS_UPPER_BOUND_PROGRAMMED >> 16); | ||
557 | 558 | ||
558 | DBGMSG("physUpperBoundOffset=%08x", | 559 | DBGMSG("physUpperBoundOffset=%08x", |
559 | reg_read(ohci, OHCI1394_PhyUpperBound)); | 560 | reg_read(ohci, OHCI1394_PhyUpperBound)); |
@@ -580,6 +581,7 @@ static void ohci_initialize(struct ti_ohci *ohci) | |||
580 | OHCI1394_isochRx | | 581 | OHCI1394_isochRx | |
581 | OHCI1394_isochTx | | 582 | OHCI1394_isochTx | |
582 | OHCI1394_postedWriteErr | | 583 | OHCI1394_postedWriteErr | |
584 | OHCI1394_cycleTooLong | | ||
583 | OHCI1394_cycleInconsistent); | 585 | OHCI1394_cycleInconsistent); |
584 | 586 | ||
585 | /* Enable link */ | 587 | /* Enable link */ |
@@ -2382,6 +2384,15 @@ static irqreturn_t ohci_irq_handler(int irq, void *dev_id, | |||
2382 | PRINT(KERN_ERR, "physical posted write error"); | 2384 | PRINT(KERN_ERR, "physical posted write error"); |
2383 | /* no recovery strategy yet, had to involve protocol drivers */ | 2385 | /* no recovery strategy yet, had to involve protocol drivers */ |
2384 | } | 2386 | } |
2387 | if (event & OHCI1394_cycleTooLong) { | ||
2388 | if(printk_ratelimit()) | ||
2389 | PRINT(KERN_WARNING, "isochronous cycle too long"); | ||
2390 | else | ||
2391 | DBGMSG("OHCI1394_cycleTooLong"); | ||
2392 | reg_write(ohci, OHCI1394_LinkControlSet, | ||
2393 | OHCI1394_LinkControl_CycleMaster); | ||
2394 | event &= ~OHCI1394_cycleTooLong; | ||
2395 | } | ||
2385 | if (event & OHCI1394_cycleInconsistent) { | 2396 | if (event & OHCI1394_cycleInconsistent) { |
2386 | /* We subscribe to the cycleInconsistent event only to | 2397 | /* We subscribe to the cycleInconsistent event only to |
2387 | * clear the corresponding event bit... otherwise, | 2398 | * clear the corresponding event bit... otherwise, |
@@ -3400,6 +3411,14 @@ static int __devinit ohci1394_pci_probe(struct pci_dev *dev, | |||
3400 | host->csr.max_rec = (reg_read(ohci, OHCI1394_BusOptions) >> 12) & 0xf; | 3411 | host->csr.max_rec = (reg_read(ohci, OHCI1394_BusOptions) >> 12) & 0xf; |
3401 | host->csr.lnk_spd = reg_read(ohci, OHCI1394_BusOptions) & 0x7; | 3412 | host->csr.lnk_spd = reg_read(ohci, OHCI1394_BusOptions) & 0x7; |
3402 | 3413 | ||
3414 | if (phys_dma) { | ||
3415 | host->low_addr_space = | ||
3416 | (u64) reg_read(ohci, OHCI1394_PhyUpperBound) << 16; | ||
3417 | if (!host->low_addr_space) | ||
3418 | host->low_addr_space = OHCI1394_PHYS_UPPER_BOUND_FIXED; | ||
3419 | } | ||
3420 | host->middle_addr_space = OHCI1394_MIDDLE_ADDRESS_SPACE; | ||
3421 | |||
3403 | /* Tell the highlevel this host is ready */ | 3422 | /* Tell the highlevel this host is ready */ |
3404 | if (hpsb_add_host(host)) | 3423 | if (hpsb_add_host(host)) |
3405 | FAIL(-ENOMEM, "Failed to register host with highlevel"); | 3424 | FAIL(-ENOMEM, "Failed to register host with highlevel"); |
@@ -3458,24 +3477,13 @@ static void ohci1394_pci_remove(struct pci_dev *pdev) | |||
3458 | case OHCI_INIT_HAVE_TXRX_BUFFERS__MAYBE: | 3477 | case OHCI_INIT_HAVE_TXRX_BUFFERS__MAYBE: |
3459 | /* The ohci_soft_reset() stops all DMA contexts, so we | 3478 | /* The ohci_soft_reset() stops all DMA contexts, so we |
3460 | * dont need to do this. */ | 3479 | * dont need to do this. */ |
3461 | /* Free AR dma */ | ||
3462 | free_dma_rcv_ctx(&ohci->ar_req_context); | 3480 | free_dma_rcv_ctx(&ohci->ar_req_context); |
3463 | free_dma_rcv_ctx(&ohci->ar_resp_context); | 3481 | free_dma_rcv_ctx(&ohci->ar_resp_context); |
3464 | |||
3465 | /* Free AT dma */ | ||
3466 | free_dma_trm_ctx(&ohci->at_req_context); | 3482 | free_dma_trm_ctx(&ohci->at_req_context); |
3467 | free_dma_trm_ctx(&ohci->at_resp_context); | 3483 | free_dma_trm_ctx(&ohci->at_resp_context); |
3468 | |||
3469 | /* Free IR dma */ | ||
3470 | free_dma_rcv_ctx(&ohci->ir_legacy_context); | 3484 | free_dma_rcv_ctx(&ohci->ir_legacy_context); |
3471 | |||
3472 | /* Free IT dma */ | ||
3473 | free_dma_trm_ctx(&ohci->it_legacy_context); | 3485 | free_dma_trm_ctx(&ohci->it_legacy_context); |
3474 | 3486 | ||
3475 | /* Free IR legacy dma */ | ||
3476 | free_dma_rcv_ctx(&ohci->ir_legacy_context); | ||
3477 | |||
3478 | |||
3479 | case OHCI_INIT_HAVE_SELFID_BUFFER: | 3487 | case OHCI_INIT_HAVE_SELFID_BUFFER: |
3480 | pci_free_consistent(ohci->dev, OHCI1394_SI_DMA_BUF_SIZE, | 3488 | pci_free_consistent(ohci->dev, OHCI1394_SI_DMA_BUF_SIZE, |
3481 | ohci->selfid_buf_cpu, | 3489 | ohci->selfid_buf_cpu, |
@@ -3535,6 +3543,7 @@ static int ohci1394_pci_resume (struct pci_dev *pdev) | |||
3535 | } | 3543 | } |
3536 | #endif /* CONFIG_PPC_PMAC */ | 3544 | #endif /* CONFIG_PPC_PMAC */ |
3537 | 3545 | ||
3546 | pci_restore_state(pdev); | ||
3538 | pci_enable_device(pdev); | 3547 | pci_enable_device(pdev); |
3539 | 3548 | ||
3540 | return 0; | 3549 | return 0; |
@@ -3554,6 +3563,8 @@ static int ohci1394_pci_suspend (struct pci_dev *pdev, pm_message_t state) | |||
3554 | } | 3563 | } |
3555 | #endif | 3564 | #endif |
3556 | 3565 | ||
3566 | pci_save_state(pdev); | ||
3567 | |||
3557 | return 0; | 3568 | return 0; |
3558 | } | 3569 | } |
3559 | 3570 | ||