aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/ieee1394/dv1394-private.h
diff options
context:
space:
mode:
authorHarvey Harrison <harvey.harrison@gmail.com>2008-12-13 18:20:39 -0500
committerStefan Richter <stefanr@s5r6.in-berlin.de>2009-01-04 17:50:36 -0500
commit7d7039d3650688319670b2e828b1013fbfd2cc3b (patch)
tree9f766872bd2f42c4871c18863050ca41d4266d82 /drivers/ieee1394/dv1394-private.h
parentfaf26bcc4729546ef95f5edb44f3749bb1b47d1c (diff)
ieee1394: dv1394: annotate frame input/output structs as little endian
No Functional changes. Signed-off-by: Harvey Harrison <harvey.harrison@gmail.com> Signed-off-by: Stefan Richter <stefanr@s5r6.in-berlin.de>
Diffstat (limited to 'drivers/ieee1394/dv1394-private.h')
-rw-r--r--drivers/ieee1394/dv1394-private.h44
1 files changed, 22 insertions, 22 deletions
diff --git a/drivers/ieee1394/dv1394-private.h b/drivers/ieee1394/dv1394-private.h
index 7d1d2845b420..18b92cbf4a9f 100644
--- a/drivers/ieee1394/dv1394-private.h
+++ b/drivers/ieee1394/dv1394-private.h
@@ -77,11 +77,11 @@ static inline void fill_cip_header(struct CIP_header *cip,
77 See the Texas Instruments OHCI 1394 chipset documentation. 77 See the Texas Instruments OHCI 1394 chipset documentation.
78*/ 78*/
79 79
80struct output_more_immediate { u32 q[8]; }; 80struct output_more_immediate { __le32 q[8]; };
81struct output_more { u32 q[4]; }; 81struct output_more { __le32 q[4]; };
82struct output_last { u32 q[4]; }; 82struct output_last { __le32 q[4]; };
83struct input_more { u32 q[4]; }; 83struct input_more { __le32 q[4]; };
84struct input_last { u32 q[4]; }; 84struct input_last { __le32 q[4]; };
85 85
86/* outputs */ 86/* outputs */
87 87
@@ -92,9 +92,9 @@ static inline void fill_output_more_immediate(struct output_more_immediate *omi,
92 unsigned int payload_size) 92 unsigned int payload_size)
93{ 93{
94 omi->q[0] = cpu_to_le32(0x02000000 | 8); /* OUTPUT_MORE_IMMEDIATE; 8 is the size of the IT header */ 94 omi->q[0] = cpu_to_le32(0x02000000 | 8); /* OUTPUT_MORE_IMMEDIATE; 8 is the size of the IT header */
95 omi->q[1] = 0; 95 omi->q[1] = cpu_to_le32(0);
96 omi->q[2] = 0; 96 omi->q[2] = cpu_to_le32(0);
97 omi->q[3] = 0; 97 omi->q[3] = cpu_to_le32(0);
98 98
99 /* IT packet header */ 99 /* IT packet header */
100 omi->q[4] = cpu_to_le32( (0x0 << 16) /* IEEE1394_SPEED_100 */ 100 omi->q[4] = cpu_to_le32( (0x0 << 16) /* IEEE1394_SPEED_100 */
@@ -106,8 +106,8 @@ static inline void fill_output_more_immediate(struct output_more_immediate *omi,
106 /* reserved field; mimic behavior of my Sony DSR-40 */ 106 /* reserved field; mimic behavior of my Sony DSR-40 */
107 omi->q[5] = cpu_to_le32((payload_size << 16) | (0x7F << 8) | 0xA0); 107 omi->q[5] = cpu_to_le32((payload_size << 16) | (0x7F << 8) | 0xA0);
108 108
109 omi->q[6] = 0; 109 omi->q[6] = cpu_to_le32(0);
110 omi->q[7] = 0; 110 omi->q[7] = cpu_to_le32(0);
111} 111}
112 112
113static inline void fill_output_more(struct output_more *om, 113static inline void fill_output_more(struct output_more *om,
@@ -116,8 +116,8 @@ static inline void fill_output_more(struct output_more *om,
116{ 116{
117 om->q[0] = cpu_to_le32(data_size); 117 om->q[0] = cpu_to_le32(data_size);
118 om->q[1] = cpu_to_le32(data_phys_addr); 118 om->q[1] = cpu_to_le32(data_phys_addr);
119 om->q[2] = 0; 119 om->q[2] = cpu_to_le32(0);
120 om->q[3] = 0; 120 om->q[3] = cpu_to_le32(0);
121} 121}
122 122
123static inline void fill_output_last(struct output_last *ol, 123static inline void fill_output_last(struct output_last *ol,
@@ -140,8 +140,8 @@ static inline void fill_output_last(struct output_last *ol,
140 140
141 ol->q[0] = cpu_to_le32(temp); 141 ol->q[0] = cpu_to_le32(temp);
142 ol->q[1] = cpu_to_le32(data_phys_addr); 142 ol->q[1] = cpu_to_le32(data_phys_addr);
143 ol->q[2] = 0; 143 ol->q[2] = cpu_to_le32(0);
144 ol->q[3] = 0; 144 ol->q[3] = cpu_to_le32(0);
145} 145}
146 146
147/* inputs */ 147/* inputs */
@@ -161,8 +161,8 @@ static inline void fill_input_more(struct input_more *im,
161 161
162 im->q[0] = cpu_to_le32(temp); 162 im->q[0] = cpu_to_le32(temp);
163 im->q[1] = cpu_to_le32(data_phys_addr); 163 im->q[1] = cpu_to_le32(data_phys_addr);
164 im->q[2] = 0; /* branchAddress and Z not use in packet-per-buffer mode */ 164 im->q[2] = cpu_to_le32(0); /* branchAddress and Z not use in packet-per-buffer mode */
165 im->q[3] = 0; /* xferStatus & resCount, resCount must be initialize to data_size */ 165 im->q[3] = cpu_to_le32(0); /* xferStatus & resCount, resCount must be initialize to data_size */
166} 166}
167 167
168static inline void fill_input_last(struct input_last *il, 168static inline void fill_input_last(struct input_last *il,
@@ -331,7 +331,7 @@ struct frame {
331 331
332 /* points to status/timestamp field of first DMA packet */ 332 /* points to status/timestamp field of first DMA packet */
333 /* (we'll check it later to monitor timestamp accuracy) */ 333 /* (we'll check it later to monitor timestamp accuracy) */
334 u32 *frame_begin_timestamp; 334 __le32 *frame_begin_timestamp;
335 335
336 /* the timestamp we assigned to the first packet in the frame */ 336 /* the timestamp we assigned to the first packet in the frame */
337 u32 assigned_timestamp; 337 u32 assigned_timestamp;
@@ -348,15 +348,15 @@ struct frame {
348 that can cause interrupts. We'll check these from the 348 that can cause interrupts. We'll check these from the
349 interrupt handler. 349 interrupt handler.
350 */ 350 */
351 u32 *mid_frame_timestamp; 351 __le32 *mid_frame_timestamp;
352 u32 *frame_end_timestamp; 352 __le32 *frame_end_timestamp;
353 353
354 /* branch address field of final packet. This is effectively 354 /* branch address field of final packet. This is effectively
355 the "tail" in the chain of DMA descriptor blocks. 355 the "tail" in the chain of DMA descriptor blocks.
356 We will fill it with the address of the first DMA descriptor 356 We will fill it with the address of the first DMA descriptor
357 block in the subsequent frame, once it is ready. 357 block in the subsequent frame, once it is ready.
358 */ 358 */
359 u32 *frame_end_branch; 359 __le32 *frame_end_branch;
360 360
361 /* the number of descriptors in the first descriptor block 361 /* the number of descriptors in the first descriptor block
362 of the frame. Needed to start DMA */ 362 of the frame. Needed to start DMA */
@@ -365,10 +365,10 @@ struct frame {
365 365
366 366
367struct packet { 367struct packet {
368 u16 timestamp; 368 __le16 timestamp;
369 u16 invalid; 369 u16 invalid;
370 u16 iso_header; 370 u16 iso_header;
371 u16 data_length; 371 __le16 data_length;
372 u32 cip_h1; 372 u32 cip_h1;
373 u32 cip_h2; 373 u32 cip_h2;
374 unsigned char data[480]; 374 unsigned char data[480];