diff options
author | Thomas Renninger <trenn@suse.de> | 2011-02-27 16:36:43 -0500 |
---|---|---|
committer | Len Brown <len.brown@intel.com> | 2011-02-28 11:04:45 -0500 |
commit | 15e123e5d7e8ee9ba3717e743d8eb5fd0fe57712 (patch) | |
tree | cfe9641781f112d028cac099d978f43344834278 /drivers/idle | |
parent | bfb53ccf1c734b1907df7189eef4c08489827951 (diff) |
intel_idle: Rename cpuidle states
Userspace apps might have to cut off parts off the
idle state name for display reasons.
Switch NHM-C1 to C1-NHM (and others) so that a cut off
name is unique and makes sense to the user.
Signed-off-by: Thomas Renninger <trenn@suse.de>
CC: lenb@kernel.org
Signed-off-by: Len Brown <len.brown@intel.com>
Diffstat (limited to 'drivers/idle')
-rw-r--r-- | drivers/idle/intel_idle.c | 22 |
1 files changed, 11 insertions, 11 deletions
diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c index 4a5c4a44ffb1..a46dddf61078 100644 --- a/drivers/idle/intel_idle.c +++ b/drivers/idle/intel_idle.c | |||
@@ -107,7 +107,7 @@ static unsigned long long auto_demotion_disable_flags; | |||
107 | static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { | 107 | static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { |
108 | { /* MWAIT C0 */ }, | 108 | { /* MWAIT C0 */ }, |
109 | { /* MWAIT C1 */ | 109 | { /* MWAIT C1 */ |
110 | .name = "NHM-C1", | 110 | .name = "C1-NHM", |
111 | .desc = "MWAIT 0x00", | 111 | .desc = "MWAIT 0x00", |
112 | .driver_data = (void *) 0x00, | 112 | .driver_data = (void *) 0x00, |
113 | .flags = CPUIDLE_FLAG_TIME_VALID, | 113 | .flags = CPUIDLE_FLAG_TIME_VALID, |
@@ -115,7 +115,7 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
115 | .target_residency = 6, | 115 | .target_residency = 6, |
116 | .enter = &intel_idle }, | 116 | .enter = &intel_idle }, |
117 | { /* MWAIT C2 */ | 117 | { /* MWAIT C2 */ |
118 | .name = "NHM-C3", | 118 | .name = "C3-NHM", |
119 | .desc = "MWAIT 0x10", | 119 | .desc = "MWAIT 0x10", |
120 | .driver_data = (void *) 0x10, | 120 | .driver_data = (void *) 0x10, |
121 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 121 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -123,7 +123,7 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
123 | .target_residency = 80, | 123 | .target_residency = 80, |
124 | .enter = &intel_idle }, | 124 | .enter = &intel_idle }, |
125 | { /* MWAIT C3 */ | 125 | { /* MWAIT C3 */ |
126 | .name = "NHM-C6", | 126 | .name = "C6-NHM", |
127 | .desc = "MWAIT 0x20", | 127 | .desc = "MWAIT 0x20", |
128 | .driver_data = (void *) 0x20, | 128 | .driver_data = (void *) 0x20, |
129 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 129 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -135,7 +135,7 @@ static struct cpuidle_state nehalem_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
135 | static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | 135 | static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { |
136 | { /* MWAIT C0 */ }, | 136 | { /* MWAIT C0 */ }, |
137 | { /* MWAIT C1 */ | 137 | { /* MWAIT C1 */ |
138 | .name = "SNB-C1", | 138 | .name = "C1-SNB", |
139 | .desc = "MWAIT 0x00", | 139 | .desc = "MWAIT 0x00", |
140 | .driver_data = (void *) 0x00, | 140 | .driver_data = (void *) 0x00, |
141 | .flags = CPUIDLE_FLAG_TIME_VALID, | 141 | .flags = CPUIDLE_FLAG_TIME_VALID, |
@@ -143,7 +143,7 @@ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
143 | .target_residency = 1, | 143 | .target_residency = 1, |
144 | .enter = &intel_idle }, | 144 | .enter = &intel_idle }, |
145 | { /* MWAIT C2 */ | 145 | { /* MWAIT C2 */ |
146 | .name = "SNB-C3", | 146 | .name = "C3-SNB", |
147 | .desc = "MWAIT 0x10", | 147 | .desc = "MWAIT 0x10", |
148 | .driver_data = (void *) 0x10, | 148 | .driver_data = (void *) 0x10, |
149 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 149 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -151,7 +151,7 @@ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
151 | .target_residency = 211, | 151 | .target_residency = 211, |
152 | .enter = &intel_idle }, | 152 | .enter = &intel_idle }, |
153 | { /* MWAIT C3 */ | 153 | { /* MWAIT C3 */ |
154 | .name = "SNB-C6", | 154 | .name = "C6-SNB", |
155 | .desc = "MWAIT 0x20", | 155 | .desc = "MWAIT 0x20", |
156 | .driver_data = (void *) 0x20, | 156 | .driver_data = (void *) 0x20, |
157 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 157 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -159,7 +159,7 @@ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
159 | .target_residency = 345, | 159 | .target_residency = 345, |
160 | .enter = &intel_idle }, | 160 | .enter = &intel_idle }, |
161 | { /* MWAIT C4 */ | 161 | { /* MWAIT C4 */ |
162 | .name = "SNB-C7", | 162 | .name = "C7-SNB", |
163 | .desc = "MWAIT 0x30", | 163 | .desc = "MWAIT 0x30", |
164 | .driver_data = (void *) 0x30, | 164 | .driver_data = (void *) 0x30, |
165 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 165 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -171,7 +171,7 @@ static struct cpuidle_state snb_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
171 | static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | 171 | static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { |
172 | { /* MWAIT C0 */ }, | 172 | { /* MWAIT C0 */ }, |
173 | { /* MWAIT C1 */ | 173 | { /* MWAIT C1 */ |
174 | .name = "ATM-C1", | 174 | .name = "C1-ATM", |
175 | .desc = "MWAIT 0x00", | 175 | .desc = "MWAIT 0x00", |
176 | .driver_data = (void *) 0x00, | 176 | .driver_data = (void *) 0x00, |
177 | .flags = CPUIDLE_FLAG_TIME_VALID, | 177 | .flags = CPUIDLE_FLAG_TIME_VALID, |
@@ -179,7 +179,7 @@ static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
179 | .target_residency = 4, | 179 | .target_residency = 4, |
180 | .enter = &intel_idle }, | 180 | .enter = &intel_idle }, |
181 | { /* MWAIT C2 */ | 181 | { /* MWAIT C2 */ |
182 | .name = "ATM-C2", | 182 | .name = "C2-ATM", |
183 | .desc = "MWAIT 0x10", | 183 | .desc = "MWAIT 0x10", |
184 | .driver_data = (void *) 0x10, | 184 | .driver_data = (void *) 0x10, |
185 | .flags = CPUIDLE_FLAG_TIME_VALID, | 185 | .flags = CPUIDLE_FLAG_TIME_VALID, |
@@ -188,7 +188,7 @@ static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
188 | .enter = &intel_idle }, | 188 | .enter = &intel_idle }, |
189 | { /* MWAIT C3 */ }, | 189 | { /* MWAIT C3 */ }, |
190 | { /* MWAIT C4 */ | 190 | { /* MWAIT C4 */ |
191 | .name = "ATM-C4", | 191 | .name = "C4-ATM", |
192 | .desc = "MWAIT 0x30", | 192 | .desc = "MWAIT 0x30", |
193 | .driver_data = (void *) 0x30, | 193 | .driver_data = (void *) 0x30, |
194 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 194 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |
@@ -197,7 +197,7 @@ static struct cpuidle_state atom_cstates[MWAIT_MAX_NUM_CSTATES] = { | |||
197 | .enter = &intel_idle }, | 197 | .enter = &intel_idle }, |
198 | { /* MWAIT C5 */ }, | 198 | { /* MWAIT C5 */ }, |
199 | { /* MWAIT C6 */ | 199 | { /* MWAIT C6 */ |
200 | .name = "ATM-C6", | 200 | .name = "C6-ATM", |
201 | .desc = "MWAIT 0x52", | 201 | .desc = "MWAIT 0x52", |
202 | .driver_data = (void *) 0x52, | 202 | .driver_data = (void *) 0x52, |
203 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, | 203 | .flags = CPUIDLE_FLAG_TIME_VALID | CPUIDLE_FLAG_TLB_FLUSHED, |