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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2009-11-18 13:38:37 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-18 13:38:37 -0500
commita531cd69ada8c8b89f631b1b6ba246b5d84b5344 (patch)
treec6b0eebadd8ab2b202ad0e5d7ec3994907fb67eb /drivers/ide
parent73ba32320da60b2e872b4f7ba9b7d4fd1218e5b3 (diff)
hpt366: remove dead old timing tables
It has been enough time since introduction of the new timing tables (commit 809b53c from Dec 12 2007) and the old timing tables are still available in pata_hpt37x.c (or git history) if somebody needs them. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/hpt366.c63
1 files changed, 0 insertions, 63 deletions
diff --git a/drivers/ide/hpt366.c b/drivers/ide/hpt366.c
index e2f1e69c31c6..4d90ac2dbb1b 100644
--- a/drivers/ide/hpt366.c
+++ b/drivers/ide/hpt366.c
@@ -297,68 +297,6 @@ static u32 twenty_five_base_hpt36x[] = {
297 /* XFER_PIO_0 */ 0xc0d08585 297 /* XFER_PIO_0 */ 0xc0d08585
298}; 298};
299 299
300#if 0
301/* These are the timing tables from the HighPoint open source drivers... */
302static u32 thirty_three_base_hpt37x[] = {
303 /* XFER_UDMA_6 */ 0x12446231, /* 0x12646231 ?? */
304 /* XFER_UDMA_5 */ 0x12446231,
305 /* XFER_UDMA_4 */ 0x12446231,
306 /* XFER_UDMA_3 */ 0x126c6231,
307 /* XFER_UDMA_2 */ 0x12486231,
308 /* XFER_UDMA_1 */ 0x124c6233,
309 /* XFER_UDMA_0 */ 0x12506297,
310
311 /* XFER_MW_DMA_2 */ 0x22406c31,
312 /* XFER_MW_DMA_1 */ 0x22406c33,
313 /* XFER_MW_DMA_0 */ 0x22406c97,
314
315 /* XFER_PIO_4 */ 0x06414e31,
316 /* XFER_PIO_3 */ 0x06414e42,
317 /* XFER_PIO_2 */ 0x06414e53,
318 /* XFER_PIO_1 */ 0x06814e93,
319 /* XFER_PIO_0 */ 0x06814ea7
320};
321
322static u32 fifty_base_hpt37x[] = {
323 /* XFER_UDMA_6 */ 0x12848242,
324 /* XFER_UDMA_5 */ 0x12848242,
325 /* XFER_UDMA_4 */ 0x12ac8242,
326 /* XFER_UDMA_3 */ 0x128c8242,
327 /* XFER_UDMA_2 */ 0x120c8242,
328 /* XFER_UDMA_1 */ 0x12148254,
329 /* XFER_UDMA_0 */ 0x121882ea,
330
331 /* XFER_MW_DMA_2 */ 0x22808242,
332 /* XFER_MW_DMA_1 */ 0x22808254,
333 /* XFER_MW_DMA_0 */ 0x228082ea,
334
335 /* XFER_PIO_4 */ 0x0a81f442,
336 /* XFER_PIO_3 */ 0x0a81f443,
337 /* XFER_PIO_2 */ 0x0a81f454,
338 /* XFER_PIO_1 */ 0x0ac1f465,
339 /* XFER_PIO_0 */ 0x0ac1f48a
340};
341
342static u32 sixty_six_base_hpt37x[] = {
343 /* XFER_UDMA_6 */ 0x1c869c62,
344 /* XFER_UDMA_5 */ 0x1cae9c62, /* 0x1c8a9c62 */
345 /* XFER_UDMA_4 */ 0x1c8a9c62,
346 /* XFER_UDMA_3 */ 0x1c8e9c62,
347 /* XFER_UDMA_2 */ 0x1c929c62,
348 /* XFER_UDMA_1 */ 0x1c9a9c62,
349 /* XFER_UDMA_0 */ 0x1c829c62,
350
351 /* XFER_MW_DMA_2 */ 0x2c829c62,
352 /* XFER_MW_DMA_1 */ 0x2c829c66,
353 /* XFER_MW_DMA_0 */ 0x2c829d2e,
354
355 /* XFER_PIO_4 */ 0x0c829c62,
356 /* XFER_PIO_3 */ 0x0c829c84,
357 /* XFER_PIO_2 */ 0x0c829ca6,
358 /* XFER_PIO_1 */ 0x0d029d26,
359 /* XFER_PIO_0 */ 0x0d029d5e
360};
361#else
362/* 300/*
363 * The following are the new timing tables with PIO mode data/taskfile transfer 301 * The following are the new timing tables with PIO mode data/taskfile transfer
364 * overclocking fixed... 302 * overclocking fixed...
@@ -424,7 +362,6 @@ static u32 sixty_six_base_hpt37x[] = {
424 /* XFER_PIO_1 */ 0x0d02ff26, 362 /* XFER_PIO_1 */ 0x0d02ff26,
425 /* XFER_PIO_0 */ 0x0d42ff7f 363 /* XFER_PIO_0 */ 0x0d42ff7f
426}; 364};
427#endif
428 365
429#define HPT371_ALLOW_ATA133_6 1 366#define HPT371_ALLOW_ATA133_6 1
430#define HPT302_ALLOW_ATA133_6 1 367#define HPT302_ALLOW_ATA133_6 1