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authorAuke Kok <auke-jan.h.kok@intel.com>2007-10-18 18:30:08 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-18 18:30:08 -0400
commit1afa65549266a2094d985508a88ab41d9c40ab44 (patch)
tree2b12d46c3b6f98ae3c5ef411abe18e49db13ee1e /drivers/ide
parenta84f3eeddfe367cbb5bf794eb482e3d466f098df (diff)
cmd64x: Use dev->revision
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Cc: Greg Kroah-Hartman <gregkh@suse.de> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/pci/cmd64x.c14
1 files changed, 4 insertions, 10 deletions
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 0ad57c497b0d..519080ff4665 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -439,11 +439,8 @@ static unsigned int __devinit init_chipset_cmd64x(struct pci_dev *dev, const cha
439 u8 mrdmode = 0; 439 u8 mrdmode = 0;
440 440
441 if (dev->device == PCI_DEVICE_ID_CMD_646) { 441 if (dev->device == PCI_DEVICE_ID_CMD_646) {
442 u8 rev = 0;
443 442
444 pci_read_config_byte(dev, PCI_REVISION_ID, &rev); 443 switch (dev->revision) {
445
446 switch (rev) {
447 case 0x07: 444 case 0x07:
448 case 0x05: 445 case 0x05:
449 printk("%s: UltraDMA capable\n", name); 446 printk("%s: UltraDMA capable\n", name);
@@ -505,9 +502,6 @@ static u8 __devinit ata66_cmd64x(ide_hwif_t *hwif)
505static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif) 502static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
506{ 503{
507 struct pci_dev *dev = hwif->pci_dev; 504 struct pci_dev *dev = hwif->pci_dev;
508 u8 rev = 0;
509
510 pci_read_config_byte(dev, PCI_REVISION_ID, &rev);
511 505
512 hwif->set_pio_mode = &cmd64x_set_pio_mode; 506 hwif->set_pio_mode = &cmd64x_set_pio_mode;
513 hwif->set_dma_mode = &cmd64x_set_dma_mode; 507 hwif->set_dma_mode = &cmd64x_set_dma_mode;
@@ -529,7 +523,7 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
529 * 523 *
530 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets. 524 * So we only do UltraDMA on revision 0x05 and 0x07 chipsets.
531 */ 525 */
532 if (dev->device == PCI_DEVICE_ID_CMD_646 && rev < 5) 526 if (dev->device == PCI_DEVICE_ID_CMD_646 && dev->revision < 5)
533 hwif->ultra_mask = 0x00; 527 hwif->ultra_mask = 0x00;
534 528
535 if (hwif->cbl != ATA_CBL_PATA40_SHORT) 529 if (hwif->cbl != ATA_CBL_PATA40_SHORT)
@@ -544,10 +538,10 @@ static void __devinit init_hwif_cmd64x(ide_hwif_t *hwif)
544 break; 538 break;
545 case PCI_DEVICE_ID_CMD_646: 539 case PCI_DEVICE_ID_CMD_646:
546 hwif->chipset = ide_cmd646; 540 hwif->chipset = ide_cmd646;
547 if (rev == 0x01) { 541 if (dev->revision == 0x01) {
548 hwif->ide_dma_end = &cmd646_1_ide_dma_end; 542 hwif->ide_dma_end = &cmd646_1_ide_dma_end;
549 break; 543 break;
550 } else if (rev >= 0x03) 544 } else if (dev->revision >= 0x03)
551 goto alt_irq_bits; 545 goto alt_irq_bits;
552 /* fall thru */ 546 /* fall thru */
553 default: 547 default: