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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-08-01 17:46:46 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-08-01 17:46:46 -0400
commit3fcece66911c9d485c1e2050ba033fde607b5130 (patch)
tree7acbc24ea7a51f8cd78efa36c3125c865e5bdf4f /drivers/ide
parent0c8de52d76e4bec6e9168b47be29f11b3bb92768 (diff)
scc_pata: PIO fixes
* Use pio == 255 == "auto-tune" in scc_config_drive_for_dma() instead of forcing PIO4 on PIO fallback. Fix comment while at it. * Rename scc_tuneproc() to scc_tune_pio() and add scc_tuneproc() wrapper. Move finding of the best PIO mode and setting of transfer mode on the device to the new wrapper. * Fix scc_tune_chipset() to tune PIO modes. Do a small cleanup while at it. Acked-by: Sergei Shtylyov <sshtylyov@ru.mvista.com> Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/pci/scc_pata.c61
1 files changed, 20 insertions, 41 deletions
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index bf19ddfa6cda..eeb0a6d434aa 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -190,7 +190,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
190} 190}
191 191
192/** 192/**
193 * scc_tuneproc - tune a drive PIO mode 193 * scc_tune_pio - tune a drive PIO mode
194 * @drive: drive to tune 194 * @drive: drive to tune
195 * @mode_wanted: the target operating mode 195 * @mode_wanted: the target operating mode
196 * 196 *
@@ -198,7 +198,7 @@ scc_ide_outsl(unsigned long port, void *addr, u32 count)
198 * controller. 198 * controller.
199 */ 199 */
200 200
201static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted) 201static void scc_tune_pio(ide_drive_t *drive, const u8 pio)
202{ 202{
203 ide_hwif_t *hwif = HWIF(drive); 203 ide_hwif_t *hwif = HWIF(drive);
204 struct scc_ports *ports = ide_get_hwifdata(hwif); 204 struct scc_ports *ports = ide_get_hwifdata(hwif);
@@ -207,41 +207,25 @@ static void scc_tuneproc(ide_drive_t *drive, byte mode_wanted)
207 unsigned long piosht_port = ctl_base + 0x000; 207 unsigned long piosht_port = ctl_base + 0x000;
208 unsigned long pioct_port = ctl_base + 0x004; 208 unsigned long pioct_port = ctl_base + 0x004;
209 unsigned long reg; 209 unsigned long reg;
210 unsigned char speed = XFER_PIO_0;
211 int offset; 210 int offset;
212 211
213 mode_wanted = ide_get_best_pio_mode(drive, mode_wanted, 4);
214 switch (mode_wanted) {
215 case 4:
216 speed = XFER_PIO_4;
217 break;
218 case 3:
219 speed = XFER_PIO_3;
220 break;
221 case 2:
222 speed = XFER_PIO_2;
223 break;
224 case 1:
225 speed = XFER_PIO_1;
226 break;
227 case 0:
228 default:
229 speed = XFER_PIO_0;
230 break;
231 }
232
233 reg = in_be32((void __iomem *)cckctrl_port); 212 reg = in_be32((void __iomem *)cckctrl_port);
234 if (reg & CCKCTRL_ATACLKOEN) { 213 if (reg & CCKCTRL_ATACLKOEN) {
235 offset = 1; /* 133MHz */ 214 offset = 1; /* 133MHz */
236 } else { 215 } else {
237 offset = 0; /* 100MHz */ 216 offset = 0; /* 100MHz */
238 } 217 }
239 reg = JCHSTtbl[offset][mode_wanted] << 16 | JCHHTtbl[offset][mode_wanted]; 218 reg = JCHSTtbl[offset][pio] << 16 | JCHHTtbl[offset][pio];
240 out_be32((void __iomem *)piosht_port, reg); 219 out_be32((void __iomem *)piosht_port, reg);
241 reg = JCHCTtbl[offset][mode_wanted]; 220 reg = JCHCTtbl[offset][pio];
242 out_be32((void __iomem *)pioct_port, reg); 221 out_be32((void __iomem *)pioct_port, reg);
222}
243 223
244 ide_config_drive_speed(drive, speed); 224static void scc_tuneproc(ide_drive_t *drive, u8 pio)
225{
226 pio = ide_get_best_pio_mode(drive, pio, 4);
227 scc_tune_pio(drive, pio);
228 ide_config_drive_speed(drive, XFER_PIO_0 + pio);
245} 229}
246 230
247/** 231/**
@@ -280,26 +264,21 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
280 264
281 switch (speed) { 265 switch (speed) {
282 case XFER_UDMA_6: 266 case XFER_UDMA_6:
283 idx = 6;
284 break;
285 case XFER_UDMA_5: 267 case XFER_UDMA_5:
286 idx = 5;
287 break;
288 case XFER_UDMA_4: 268 case XFER_UDMA_4:
289 idx = 4;
290 break;
291 case XFER_UDMA_3: 269 case XFER_UDMA_3:
292 idx = 3;
293 break;
294 case XFER_UDMA_2: 270 case XFER_UDMA_2:
295 idx = 2;
296 break;
297 case XFER_UDMA_1: 271 case XFER_UDMA_1:
298 idx = 1;
299 break;
300 case XFER_UDMA_0: 272 case XFER_UDMA_0:
301 idx = 0; 273 idx = speed - XFER_UDMA_0;
302 break; 274 break;
275 case XFER_PIO_4:
276 case XFER_PIO_3:
277 case XFER_PIO_2:
278 case XFER_PIO_1:
279 case XFER_PIO_0:
280 scc_tune_pio(drive, speed - XFER_PIO_0);
281 return ide_config_drive_speed(drive, speed);
303 default: 282 default:
304 return 1; 283 return 1;
305 } 284 }
@@ -329,7 +308,7 @@ static int scc_tune_chipset(ide_drive_t *drive, byte xferspeed)
329 * required. 308 * required.
330 * If the drive isn't suitable for DMA or we hit other problems 309 * If the drive isn't suitable for DMA or we hit other problems
331 * then we will drop down to PIO and set up PIO appropriately. 310 * then we will drop down to PIO and set up PIO appropriately.
332 * (return 1) 311 * (return -1)
333 */ 312 */
334 313
335static int scc_config_drive_for_dma(ide_drive_t *drive) 314static int scc_config_drive_for_dma(ide_drive_t *drive)
@@ -338,7 +317,7 @@ static int scc_config_drive_for_dma(ide_drive_t *drive)
338 return 0; 317 return 0;
339 318
340 if (ide_use_fast_pio(drive)) 319 if (ide_use_fast_pio(drive))
341 scc_tuneproc(drive, 4); 320 scc_tuneproc(drive, 255);
342 321
343 return -1; 322 return -1;
344} 323}