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authorBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 17:54:02 -0400
committerBartlomiej Zolnierkiewicz <bzolnier@gmail.com>2007-10-11 17:54:02 -0400
commit8f4dd2e42637fd61a6366d2cace69091926eaa15 (patch)
tree38dc8e475afc27c575ff7f3701e57d5c9e3a9be9 /drivers/ide
parent0d3be723cb6432e384267d0fe83ee0bae5e17846 (diff)
ide: use only ->set_pio_mode method for programming PIO modes (take 2)
Use ->set_pio_mode method to program PIO modes in ide_set_xfer_rate() (the only place which used ->speedproc to program PIO modes) and remove handling of PIO modes from all ->speedproc implementations. v2: * Fix pmac_ide_tune_chipset() comment. There should be no functionality changes caused by this patch. Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Diffstat (limited to 'drivers/ide')
-rw-r--r--drivers/ide/cris/ide-cris.c5
-rw-r--r--drivers/ide/ide-lib.c12
-rw-r--r--drivers/ide/mips/au1xxx-ide.c5
-rw-r--r--drivers/ide/pci/alim15x3.c5
-rw-r--r--drivers/ide/pci/atiixp.c5
-rw-r--r--drivers/ide/pci/cmd64x.c8
-rw-r--r--drivers/ide/pci/cs5520.c36
-rw-r--r--drivers/ide/pci/cs5530.c7
-rw-r--r--drivers/ide/pci/it8213.c5
-rw-r--r--drivers/ide/pci/it821x.c9
-rw-r--r--drivers/ide/pci/piix.c5
-rw-r--r--drivers/ide/pci/sc1200.c10
-rw-r--r--drivers/ide/pci/scc_pata.c7
-rw-r--r--drivers/ide/pci/serverworks.c5
-rw-r--r--drivers/ide/pci/siimage.c7
-rw-r--r--drivers/ide/pci/sis5513.c12
-rw-r--r--drivers/ide/pci/sl82c105.c8
-rw-r--r--drivers/ide/pci/slc90e66.c5
-rw-r--r--drivers/ide/ppc/pmac.c9
19 files changed, 29 insertions, 136 deletions
diff --git a/drivers/ide/cris/ide-cris.c b/drivers/ide/cris/ide-cris.c
index 7c90218e9319..4bb42b30bfc0 100644
--- a/drivers/ide/cris/ide-cris.c
+++ b/drivers/ide/cris/ide-cris.c
@@ -724,11 +724,6 @@ static int speed_cris_ide(ide_drive_t *drive, const u8 speed)
724{ 724{
725 int cyc = 0, dvs = 0, strobe = 0, hold = 0; 725 int cyc = 0, dvs = 0, strobe = 0, hold = 0;
726 726
727 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
728 cris_set_pio_mode(drive, speed - XFER_PIO_0);
729 return ide_config_drive_speed(drive, speed);
730 }
731
732 switch(speed) 727 switch(speed)
733 { 728 {
734 case XFER_UDMA_0: 729 case XFER_UDMA_0:
diff --git a/drivers/ide/ide-lib.c b/drivers/ide/ide-lib.c
index 8400b1b4aa1b..d97390c0543b 100644
--- a/drivers/ide/ide-lib.c
+++ b/drivers/ide/ide-lib.c
@@ -398,6 +398,18 @@ int ide_set_xfer_rate(ide_drive_t *drive, u8 rate)
398 398
399 rate = ide_rate_filter(drive, rate); 399 rate = ide_rate_filter(drive, rate);
400 400
401 if (rate >= XFER_PIO_0 && rate <= XFER_PIO_5) {
402 if (hwif->set_pio_mode)
403 hwif->set_pio_mode(drive, rate - XFER_PIO_0);
404
405 /*
406 * FIXME: this is incorrect to return zero here but
407 * since all users of ide_set_xfer_rate() ignore
408 * the return value it is not a problem currently
409 */
410 return 0;
411 }
412
401 return hwif->speedproc(drive, rate); 413 return hwif->speedproc(drive, rate);
402} 414}
403 415
diff --git a/drivers/ide/mips/au1xxx-ide.c b/drivers/ide/mips/au1xxx-ide.c
index 670cb748481f..85819ae20602 100644
--- a/drivers/ide/mips/au1xxx-ide.c
+++ b/drivers/ide/mips/au1xxx-ide.c
@@ -177,11 +177,6 @@ static int auide_tune_chipset(ide_drive_t *drive, const u8 speed)
177 mem_sttime = 0; 177 mem_sttime = 0;
178 mem_stcfg = au_readl(MEM_STCFG2); 178 mem_stcfg = au_readl(MEM_STCFG2);
179 179
180 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
181 au1xxx_set_pio_mode(drive, speed - XFER_PIO_0);
182 return 0;
183 }
184
185 switch(speed) { 180 switch(speed) {
186#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA 181#ifdef CONFIG_BLK_DEV_IDE_AU1XXX_MDMA2_DBDMA
187 case XFER_MW_DMA_2: 182 case XFER_MW_DMA_2:
diff --git a/drivers/ide/pci/alim15x3.c b/drivers/ide/pci/alim15x3.c
index f15c8879d2c1..80013d2bb039 100644
--- a/drivers/ide/pci/alim15x3.c
+++ b/drivers/ide/pci/alim15x3.c
@@ -421,11 +421,6 @@ static int ali15x3_tune_chipset(ide_drive_t *drive, const u8 speed)
421 if (speed < XFER_PIO_0) 421 if (speed < XFER_PIO_0)
422 return 1; 422 return 1;
423 423
424 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_5) {
425 ali_tune_pio(drive, speed - XFER_PIO_0);
426 return ide_config_drive_speed(drive, speed);
427 }
428
429 if (speed == XFER_UDMA_6) 424 if (speed == XFER_UDMA_6)
430 speed1 = 0x47; 425 speed1 = 0x47;
431 426
diff --git a/drivers/ide/pci/atiixp.c b/drivers/ide/pci/atiixp.c
index b9f66f53f9a6..178876a3afca 100644
--- a/drivers/ide/pci/atiixp.c
+++ b/drivers/ide/pci/atiixp.c
@@ -178,11 +178,6 @@ static int atiixp_speedproc(ide_drive_t *drive, const u8 speed)
178 u16 tmp16; 178 u16 tmp16;
179 u8 pio; 179 u8 pio;
180 180
181 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
182 atiixp_tune_pio(drive, speed - XFER_PIO_0);
183 return ide_config_drive_speed(drive, speed);
184 }
185
186 spin_lock_irqsave(&atiixp_lock, flags); 181 spin_lock_irqsave(&atiixp_lock, flags);
187 182
188 save_mdma_mode[drive->dn] = 0; 183 save_mdma_mode[drive->dn] = 0;
diff --git a/drivers/ide/pci/cmd64x.c b/drivers/ide/pci/cmd64x.c
index 85f5e42eb831..0b568c60f926 100644
--- a/drivers/ide/pci/cmd64x.c
+++ b/drivers/ide/pci/cmd64x.c
@@ -323,14 +323,6 @@ static int cmd64x_tune_chipset(ide_drive_t *drive, const u8 speed)
323 case XFER_MW_DMA_0: 323 case XFER_MW_DMA_0:
324 program_cycle_times(drive, 480, 215); 324 program_cycle_times(drive, 480, 215);
325 break; 325 break;
326 case XFER_PIO_5:
327 case XFER_PIO_4:
328 case XFER_PIO_3:
329 case XFER_PIO_2:
330 case XFER_PIO_1:
331 case XFER_PIO_0:
332 cmd64x_tune_pio(drive, speed - XFER_PIO_0);
333 break;
334 default: 326 default:
335 return 1; 327 return 1;
336 } 328 }
diff --git a/drivers/ide/pci/cs5520.c b/drivers/ide/pci/cs5520.c
index e6af534a7190..1217d2a747fb 100644
--- a/drivers/ide/pci/cs5520.c
+++ b/drivers/ide/pci/cs5520.c
@@ -66,30 +66,13 @@ static struct pio_clocks cs5520_pio_clocks[]={
66 {1, 2, 1} 66 {1, 2, 1}
67}; 67};
68 68
69static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed) 69static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio)
70{ 70{
71 ide_hwif_t *hwif = HWIF(drive); 71 ide_hwif_t *hwif = HWIF(drive);
72 struct pci_dev *pdev = hwif->pci_dev; 72 struct pci_dev *pdev = hwif->pci_dev;
73 int pio = speed;
74 u8 reg;
75 int controller = drive->dn > 1 ? 1 : 0; 73 int controller = drive->dn > 1 ? 1 : 0;
74 u8 reg;
76 75
77 switch(speed)
78 {
79 case XFER_PIO_4:
80 case XFER_PIO_3:
81 case XFER_PIO_2:
82 case XFER_PIO_1:
83 case XFER_PIO_0:
84 pio -= XFER_PIO_0;
85 break;
86 default:
87 pio = 0;
88 printk(KERN_ERR "cs55x0: bad ide timing.\n");
89 }
90
91 printk("PIO clocking = %d\n", pio);
92
93 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */ 76 /* FIXME: if DMA = 1 do we need to set the DMA bit here ? */
94 77
95 /* 8bit CAT/CRT - 8bit command timing for channel */ 78 /* 8bit CAT/CRT - 8bit command timing for channel */
@@ -114,12 +97,21 @@ static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
114 reg |= 1<<((drive->dn&1)+5); 97 reg |= 1<<((drive->dn&1)+5);
115 outb(reg, hwif->dma_base + 0x02 + 8*controller); 98 outb(reg, hwif->dma_base + 0x02 + 8*controller);
116 99
117 return ide_config_drive_speed(drive, speed); 100 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
118} 101}
119 102
120static void cs5520_set_pio_mode(ide_drive_t *drive, const u8 pio) 103static int cs5520_tune_chipset(ide_drive_t *drive, const u8 speed)
121{ 104{
122 cs5520_tune_chipset(drive, XFER_PIO_0 + pio); 105 printk(KERN_ERR "cs55x0: bad ide timing.\n");
106
107 cs5520_set_pio_mode(drive, 0);
108
109 /*
110 * FIXME: this is incorrect to return zero here but
111 * since all users of ide_set_xfer_rate() ignore
112 * the return value it is not a problem currently
113 */
114 return 0;
123} 115}
124 116
125static int cs5520_config_drive_xfer_rate(ide_drive_t *drive) 117static int cs5520_config_drive_xfer_rate(ide_drive_t *drive)
diff --git a/drivers/ide/pci/cs5530.c b/drivers/ide/pci/cs5530.c
index 1588a323c5d0..741507b4cd93 100644
--- a/drivers/ide/pci/cs5530.c
+++ b/drivers/ide/pci/cs5530.c
@@ -163,13 +163,6 @@ static int cs5530_tune_chipset(ide_drive_t *drive, const u8 mode)
163 case XFER_MW_DMA_0: timings = 0x00077771; break; 163 case XFER_MW_DMA_0: timings = 0x00077771; break;
164 case XFER_MW_DMA_1: timings = 0x00012121; break; 164 case XFER_MW_DMA_1: timings = 0x00012121; break;
165 case XFER_MW_DMA_2: timings = 0x00002020; break; 165 case XFER_MW_DMA_2: timings = 0x00002020; break;
166 case XFER_PIO_4:
167 case XFER_PIO_3:
168 case XFER_PIO_2:
169 case XFER_PIO_1:
170 case XFER_PIO_0:
171 cs5530_tunepio(drive, mode - XFER_PIO_0);
172 return 0;
173 default: 166 default:
174 BUG(); 167 BUG();
175 break; 168 break;
diff --git a/drivers/ide/pci/it8213.c b/drivers/ide/pci/it8213.c
index 24ef091ec5b9..76e91ff9420b 100644
--- a/drivers/ide/pci/it8213.c
+++ b/drivers/ide/pci/it8213.c
@@ -132,11 +132,6 @@ static int it8213_tune_chipset(ide_drive_t *drive, const u8 speed)
132 u16 reg4042, reg4a; 132 u16 reg4042, reg4a;
133 u8 reg48, reg54, reg55; 133 u8 reg48, reg54, reg55;
134 134
135 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
136 it8213_tune_pio(drive, speed - XFER_PIO_0);
137 return ide_config_drive_speed(drive, speed);
138 }
139
140 pci_read_config_word(dev, maslave, &reg4042); 135 pci_read_config_word(dev, maslave, &reg4042);
141 pci_read_config_byte(dev, 0x48, &reg48); 136 pci_read_config_byte(dev, 0x48, &reg48);
142 pci_read_config_word(dev, 0x4a, &reg4a); 137 pci_read_config_word(dev, 0x4a, &reg4a);
diff --git a/drivers/ide/pci/it821x.c b/drivers/ide/pci/it821x.c
index 0cce4a7f5e46..758a98230cc5 100644
--- a/drivers/ide/pci/it821x.c
+++ b/drivers/ide/pci/it821x.c
@@ -418,15 +418,6 @@ static int it821x_tune_chipset(ide_drive_t *drive, const u8 speed)
418 ide_hwif_t *hwif = drive->hwif; 418 ide_hwif_t *hwif = drive->hwif;
419 struct it821x_dev *itdev = ide_get_hwifdata(hwif); 419 struct it821x_dev *itdev = ide_get_hwifdata(hwif);
420 420
421 switch (speed) {
422 case XFER_PIO_4:
423 case XFER_PIO_3:
424 case XFER_PIO_2:
425 case XFER_PIO_1:
426 case XFER_PIO_0:
427 return it821x_tunepio(drive, speed - XFER_PIO_0);
428 }
429
430 if (itdev->smart == 0) { 421 if (itdev->smart == 0) {
431 switch (speed) { 422 switch (speed) {
432 /* MWDMA tuning is really hard because our MWDMA and PIO 423 /* MWDMA tuning is really hard because our MWDMA and PIO
diff --git a/drivers/ide/pci/piix.c b/drivers/ide/pci/piix.c
index 860b929f6e58..fd8214a7ab98 100644
--- a/drivers/ide/pci/piix.c
+++ b/drivers/ide/pci/piix.c
@@ -242,11 +242,6 @@ static int piix_tune_chipset(ide_drive_t *drive, const u8 speed)
242 u16 reg4042, reg4a; 242 u16 reg4042, reg4a;
243 u8 reg48, reg54, reg55; 243 u8 reg48, reg54, reg55;
244 244
245 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
246 piix_tune_pio(drive, speed - XFER_PIO_0);
247 return ide_config_drive_speed(drive, speed);
248 }
249
250 pci_read_config_word(dev, maslave, &reg4042); 245 pci_read_config_word(dev, maslave, &reg4042);
251 sitre = (reg4042 & 0x4000) ? 1 : 0; 246 sitre = (reg4042 & 0x4000) ? 1 : 0;
252 pci_read_config_byte(dev, 0x48, &reg48); 247 pci_read_config_byte(dev, 0x48, &reg48);
diff --git a/drivers/ide/pci/sc1200.c b/drivers/ide/pci/sc1200.c
index d46627eced91..79ecab689489 100644
--- a/drivers/ide/pci/sc1200.c
+++ b/drivers/ide/pci/sc1200.c
@@ -152,16 +152,6 @@ static int sc1200_tune_chipset(ide_drive_t *drive, const u8 mode)
152 if (sc1200_set_xfer_mode(drive, mode)) 152 if (sc1200_set_xfer_mode(drive, mode))
153 return 1; /* failure */ 153 return 1; /* failure */
154 154
155 switch (mode) {
156 case XFER_PIO_4:
157 case XFER_PIO_3:
158 case XFER_PIO_2:
159 case XFER_PIO_1:
160 case XFER_PIO_0:
161 sc1200_tunepio(drive, mode - XFER_PIO_0);
162 return 0;
163 }
164
165 pci_clock = sc1200_get_pci_clock(); 155 pci_clock = sc1200_get_pci_clock();
166 156
167 /* 157 /*
diff --git a/drivers/ide/pci/scc_pata.c b/drivers/ide/pci/scc_pata.c
index 3505d57eda18..66a526e0ece4 100644
--- a/drivers/ide/pci/scc_pata.c
+++ b/drivers/ide/pci/scc_pata.c
@@ -270,13 +270,6 @@ static int scc_tune_chipset(ide_drive_t *drive, const u8 speed)
270 case XFER_UDMA_0: 270 case XFER_UDMA_0:
271 idx = speed - XFER_UDMA_0; 271 idx = speed - XFER_UDMA_0;
272 break; 272 break;
273 case XFER_PIO_4:
274 case XFER_PIO_3:
275 case XFER_PIO_2:
276 case XFER_PIO_1:
277 case XFER_PIO_0:
278 scc_tune_pio(drive, speed - XFER_PIO_0);
279 return ide_config_drive_speed(drive, speed);
280 default: 273 default:
281 return 1; 274 return 1;
282 } 275 }
diff --git a/drivers/ide/pci/serverworks.c b/drivers/ide/pci/serverworks.c
index f4e08abf0fee..0351cf210427 100644
--- a/drivers/ide/pci/serverworks.c
+++ b/drivers/ide/pci/serverworks.c
@@ -157,11 +157,6 @@ static int svwks_tune_chipset(ide_drive_t *drive, const u8 speed)
157 157
158 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0; 158 u8 ultra_enable = 0, ultra_timing = 0, dma_timing = 0;
159 159
160 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
161 svwks_tune_pio(drive, speed - XFER_PIO_0);
162 return ide_config_drive_speed(drive, speed);
163 }
164
165 /* If we are about to put a disk into UDMA mode we screwed up. 160 /* If we are about to put a disk into UDMA mode we screwed up.
166 Our code assumes we never _ever_ do this on an OSB4 */ 161 Our code assumes we never _ever_ do this on an OSB4 */
167 162
diff --git a/drivers/ide/pci/siimage.c b/drivers/ide/pci/siimage.c
index c526c70d65a4..5d1e5e52a044 100644
--- a/drivers/ide/pci/siimage.c
+++ b/drivers/ide/pci/siimage.c
@@ -284,13 +284,6 @@ static int siimage_tune_chipset(ide_drive_t *drive, const u8 speed)
284 scsc = is_sata(hwif) ? 1 : scsc; 284 scsc = is_sata(hwif) ? 1 : scsc;
285 285
286 switch(speed) { 286 switch(speed) {
287 case XFER_PIO_4:
288 case XFER_PIO_3:
289 case XFER_PIO_2:
290 case XFER_PIO_1:
291 case XFER_PIO_0:
292 sil_tune_pio(drive, speed - XFER_PIO_0);
293 return ide_config_drive_speed(drive, speed);
294 case XFER_MW_DMA_2: 287 case XFER_MW_DMA_2:
295 case XFER_MW_DMA_1: 288 case XFER_MW_DMA_1:
296 case XFER_MW_DMA_0: 289 case XFER_MW_DMA_0:
diff --git a/drivers/ide/pci/sis5513.c b/drivers/ide/pci/sis5513.c
index 3a8cb1468a76..3e18899de631 100644
--- a/drivers/ide/pci/sis5513.c
+++ b/drivers/ide/pci/sis5513.c
@@ -519,15 +519,10 @@ static void config_art_rwp_pio (ide_drive_t *drive, u8 pio)
519 } 519 }
520} 520}
521 521
522static int sis5513_tune_drive(ide_drive_t *drive, const u8 pio)
523{
524 config_art_rwp_pio(drive, pio);
525 return ide_config_drive_speed(drive, XFER_PIO_0 + pio);
526}
527
528static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio) 522static void sis_set_pio_mode(ide_drive_t *drive, const u8 pio)
529{ 523{
530 (void)sis5513_tune_drive(drive, pio); 524 config_art_rwp_pio(drive, pio);
525 (void)ide_config_drive_speed(drive, XFER_PIO_0 + pio);
531} 526}
532 527
533static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed) 528static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
@@ -537,9 +532,6 @@ static int sis5513_tune_chipset(ide_drive_t *drive, const u8 speed)
537 u32 regdw; 532 u32 regdw;
538 u8 drive_pci, reg; 533 u8 drive_pci, reg;
539 534
540 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4)
541 return sis5513_tune_drive(drive, speed - XFER_PIO_0);
542
543 /* See config_art_rwp_pio for drive pci config registers */ 535 /* See config_art_rwp_pio for drive pci config registers */
544 drive_pci = 0x40; 536 drive_pci = 0x40;
545 if (chipset_family >= ATA_133) { 537 if (chipset_family >= ATA_133) {
diff --git a/drivers/ide/pci/sl82c105.c b/drivers/ide/pci/sl82c105.c
index 131e91ca1d82..f492318ba797 100644
--- a/drivers/ide/pci/sl82c105.c
+++ b/drivers/ide/pci/sl82c105.c
@@ -139,14 +139,6 @@ static int sl82c105_tune_chipset(ide_drive_t *drive, const u8 speed)
139 pci_write_config_word(dev, reg, drv_ctrl); 139 pci_write_config_word(dev, reg, drv_ctrl);
140 } 140 }
141 break; 141 break;
142 case XFER_PIO_5:
143 case XFER_PIO_4:
144 case XFER_PIO_3:
145 case XFER_PIO_2:
146 case XFER_PIO_1:
147 case XFER_PIO_0:
148 sl82c105_tune_pio(drive, speed - XFER_PIO_0);
149 break;
150 default: 142 default:
151 return -1; 143 return -1;
152 } 144 }
diff --git a/drivers/ide/pci/slc90e66.c b/drivers/ide/pci/slc90e66.c
index 967b939e9d2e..ae8e91324577 100644
--- a/drivers/ide/pci/slc90e66.c
+++ b/drivers/ide/pci/slc90e66.c
@@ -110,11 +110,6 @@ static int slc90e66_tune_chipset(ide_drive_t *drive, const u8 speed)
110 int u_speed = 0, u_flag = 1 << drive->dn; 110 int u_speed = 0, u_flag = 1 << drive->dn;
111 u16 reg4042, reg44, reg48, reg4a; 111 u16 reg4042, reg44, reg48, reg4a;
112 112
113 if (speed >= XFER_PIO_0 && speed <= XFER_PIO_4) {
114 slc90e66_tune_pio(drive, speed - XFER_PIO_0);
115 return ide_config_drive_speed(drive, speed);
116 }
117
118 pci_read_config_word(dev, maslave, &reg4042); 113 pci_read_config_word(dev, maslave, &reg4042);
119 sitre = (reg4042 & 0x4000) ? 1 : 0; 114 sitre = (reg4042 & 0x4000) ? 1 : 0;
120 pci_read_config_word(dev, 0x44, &reg44); 115 pci_read_config_word(dev, 0x44, &reg44);
diff --git a/drivers/ide/ppc/pmac.c b/drivers/ide/ppc/pmac.c
index 4da251882cc1..f759a5397865 100644
--- a/drivers/ide/ppc/pmac.c
+++ b/drivers/ide/ppc/pmac.c
@@ -917,7 +917,7 @@ set_timings_mdma(ide_drive_t *drive, int intf_type, u32 *timings, u32 *timings2,
917 917
918/* 918/*
919 * Speedproc. This function is called by the core to set any of the standard 919 * Speedproc. This function is called by the core to set any of the standard
920 * timing (PIO, MDMA or UDMA) to both the drive and the controller. 920 * DMA timing (MDMA or UDMA) to both the drive and the controller.
921 * You may notice we don't use this function on normal "dma check" operation, 921 * You may notice we don't use this function on normal "dma check" operation,
922 * our dedicated function is more precise as it uses the drive provided 922 * our dedicated function is more precise as it uses the drive provided
923 * cycle time value. We should probably fix this one to deal with that too... 923 * cycle time value. We should probably fix this one to deal with that too...
@@ -964,13 +964,6 @@ static int pmac_ide_tune_chipset(ide_drive_t *drive, const u8 speed)
964 case XFER_SW_DMA_0: 964 case XFER_SW_DMA_0:
965 return 1; 965 return 1;
966#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */ 966#endif /* CONFIG_BLK_DEV_IDEDMA_PMAC */
967 case XFER_PIO_4:
968 case XFER_PIO_3:
969 case XFER_PIO_2:
970 case XFER_PIO_1:
971 case XFER_PIO_0:
972 pmac_ide_set_pio_mode(drive, speed & 0x07);
973 return 0;
974 default: 967 default:
975 ret = 1; 968 ret = 1;
976 } 969 }